Revision 99a0949b hw/pci.h
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/* PCI bus */ |
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extern target_phys_addr_t pci_mem_base;
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extern a_target_phys_addr pci_mem_base;
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#define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
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#define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
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* a 4K aligned region all by itself. Align it to |
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* target pages so that drivers can do passthrough |
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* on the rest of the region. */ |
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target_phys_addr_t msix_page_size;
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a_target_phys_addr msix_page_size;
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}; |
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PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
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PCIBus *pci_prep_init(qemu_irq *pic); |
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/* apb_pci.c */ |
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PCIBus *pci_apb_init(target_phys_addr_t special_base,
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target_phys_addr_t mem_base,
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PCIBus *pci_apb_init(a_target_phys_addr special_base,
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a_target_phys_addr mem_base,
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qemu_irq *pic, PCIBus **bus2, PCIBus **bus3); |
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/* sh_pci.c */ |
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