Revision 99d09dd3
b/hw/acpi/pcihp.c | ||
---|---|---|
215 | 215 |
switch (addr) { |
216 | 216 |
case PCI_UP_BASE: |
217 | 217 |
val = s->acpi_pcihp_pci_status[bsel].up; |
218 |
s->acpi_pcihp_pci_status[bsel].up = 0; |
|
218 |
if (!s->legacy_piix) { |
|
219 |
s->acpi_pcihp_pci_status[bsel].up = 0; |
|
220 |
} |
|
219 | 221 |
ACPI_PCIHP_DPRINTF("pci_up_read %" PRIu32 "\n", val); |
220 | 222 |
break; |
221 | 223 |
case PCI_DOWN_BASE: |
... | ... | |
273 | 275 |
}; |
274 | 276 |
|
275 | 277 |
void acpi_pcihp_init(AcpiPciHpState *s, PCIBus *root_bus, |
276 |
MemoryRegion *address_space_io) |
|
278 |
MemoryRegion *address_space_io, bool bridges_enabled)
|
|
277 | 279 |
{ |
278 | 280 |
s->root= root_bus; |
281 |
s->legacy_piix = !bridges_enabled; |
|
279 | 282 |
memory_region_init_io(&s->io, NULL, &acpi_pcihp_io_ops, s, |
280 | 283 |
"acpi-pci-hotplug", |
281 | 284 |
PCI_HOTPLUG_SIZE); |
b/hw/acpi/piix4.c | ||
---|---|---|
695 | 695 |
memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe); |
696 | 696 |
|
697 | 697 |
if (s->use_acpi_pci_hotplug) { |
698 |
acpi_pcihp_init(&s->acpi_pci_hotplug, bus, parent); |
|
698 |
acpi_pcihp_init(&s->acpi_pci_hotplug, bus, parent, |
|
699 |
s->use_acpi_pci_hotplug); |
|
699 | 700 |
} else { |
700 | 701 |
memory_region_init_io(&s->io_pci, OBJECT(s), &piix4_pci_ops, s, |
701 | 702 |
"acpi-pci-hotplug", PCI_HOTPLUG_SIZE); |
b/include/hw/acpi/pcihp.h | ||
---|---|---|
46 | 46 |
uint32_t hotplug_select; |
47 | 47 |
PCIBus *root; |
48 | 48 |
MemoryRegion io; |
49 |
bool legacy_piix; |
|
49 | 50 |
} AcpiPciHpState; |
50 | 51 |
|
51 | 52 |
void acpi_pcihp_init(AcpiPciHpState *, PCIBus *root, |
52 |
MemoryRegion *address_space_io); |
|
53 |
MemoryRegion *address_space_io, bool bridges_enabled);
|
|
53 | 54 |
|
54 | 55 |
/* Invoke on device hotplug */ |
55 | 56 |
int acpi_pcihp_device_hotplug(AcpiPciHpState *, PCIDevice *, |
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