root / hw / tsc210x.c @ 9a393c6c
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/*
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* TI TSC2102 (touchscreen/sensors/audio controller) emulator.
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*
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* Copyright (c) 2006 Andrzej Zaborowski <balrog@zabor.org>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include "hw.h" |
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#include "audio/audio.h" |
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#include "qemu-timer.h" |
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#include "console.h" |
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#include "omap.h" |
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|
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#define TSC_DATA_REGISTERS_PAGE 0x0 |
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#define TSC_CONTROL_REGISTERS_PAGE 0x1 |
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#define TSC_AUDIO_REGISTERS_PAGE 0x2 |
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|
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#define TSC_VERBOSE
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#define TSC_CUT_RESOLUTION(value, p) ((value) >> (16 - resolution[p])) |
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struct tsc210x_state_s {
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qemu_irq pint; |
| 38 |
QEMUTimer *timer; |
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QEMUSoundCard card; |
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struct uwire_slave_s chip;
|
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struct i2s_codec_s codec;
|
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uint8_t in_fifo[16384];
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uint8_t out_fifo[16384];
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|
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int x, y;
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int pressure;
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|
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int state, page, offset, irq;
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uint16_t command, dav; |
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|
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int busy;
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int enabled;
|
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int host_mode;
|
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int function;
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int nextfunction;
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int precision;
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int nextprecision;
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int filter;
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int pin_func;
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int ref;
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int timing;
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int noise;
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|
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uint16_t audio_ctrl1; |
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uint16_t audio_ctrl2; |
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uint16_t audio_ctrl3; |
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uint16_t pll[2];
|
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uint16_t volume; |
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int64_t volume_change; |
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int softstep;
|
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uint16_t dac_power; |
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int64_t powerdown; |
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uint16_t filter_data[0x14];
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|
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const char *name; |
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SWVoiceIn *adc_voice[1];
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SWVoiceOut *dac_voice[1];
|
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int i2s_rx_rate;
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int i2s_tx_rate;
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AudioState *audio; |
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}; |
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|
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static const int resolution[4] = { 12, 8, 10, 12 }; |
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|
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#define TSC_MODE_NO_SCAN 0x0 |
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#define TSC_MODE_XY_SCAN 0x1 |
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#define TSC_MODE_XYZ_SCAN 0x2 |
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#define TSC_MODE_X 0x3 |
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#define TSC_MODE_Y 0x4 |
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#define TSC_MODE_Z 0x5 |
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#define TSC_MODE_BAT1 0x6 |
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#define TSC_MODE_BAT2 0x7 |
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#define TSC_MODE_AUX 0x8 |
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#define TSC_MODE_AUX_SCAN 0x9 |
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#define TSC_MODE_TEMP1 0xa |
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#define TSC_MODE_PORT_SCAN 0xb |
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#define TSC_MODE_TEMP2 0xc |
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#define TSC_MODE_XX_DRV 0xd |
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#define TSC_MODE_YY_DRV 0xe |
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#define TSC_MODE_YX_DRV 0xf |
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|
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static const uint16_t mode_regs[16] = { |
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0x0000, /* No scan */ |
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0x0600, /* X, Y scan */ |
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0x0780, /* X, Y, Z scan */ |
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0x0400, /* X */ |
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0x0200, /* Y */ |
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0x0180, /* Z */ |
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0x0040, /* BAT1 */ |
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0x0030, /* BAT2 */ |
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0x0010, /* AUX */ |
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0x0010, /* AUX scan */ |
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0x0004, /* TEMP1 */ |
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0x0070, /* Port scan */ |
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0x0002, /* TEMP2 */ |
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0x0000, /* X+, X- drivers */ |
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0x0000, /* Y+, Y- drivers */ |
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0x0000, /* Y+, X- drivers */ |
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}; |
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|
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/*
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* Convert screen coordinates to arbitrary values that the
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* touchscreen in my Palm Tungsten E device returns.
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* This shouldn't really matter (because the guest system
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* should calibrate the touchscreen anyway), but let's
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* imitate some real hardware.
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*/
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#define X_TRANSFORM(value) \
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((3850 - ((int) (value) * (3850 - 250) / 32768)) << 4) |
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#define Y_TRANSFORM(value) \
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((150 + ((int) (value) * (3037 - 150) / 32768)) << 4) |
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#define Z1_TRANSFORM(s) \
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((400 - ((s)->x >> 7) + ((s)->pressure << 10)) << 4) |
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#define Z2_TRANSFORM(s) \
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((4000 + ((s)->y >> 7) - ((s)->pressure << 10)) << 4) |
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|
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#define BAT1_VAL 0x8660 |
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#define BAT2_VAL 0x0000 |
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#define AUX1_VAL 0x35c0 |
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#define AUX2_VAL 0xffff |
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#define TEMP1_VAL 0x8c70 |
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#define TEMP2_VAL 0xa5b0 |
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|
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#define TSC_POWEROFF_DELAY 50 |
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#define TSC_SOFTSTEP_DELAY 50 |
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|
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static void tsc210x_reset(struct tsc210x_state_s *s) |
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{
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s->state = 0;
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s->pin_func = 2;
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s->enabled = 0;
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s->busy = 0;
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s->nextfunction = 0;
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s->ref = 0;
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s->timing = 0;
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s->irq = 0;
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s->dav = 0;
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s->audio_ctrl1 = 0x0000;
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s->audio_ctrl2 = 0x4410;
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s->audio_ctrl3 = 0x0000;
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s->pll[0] = 0x1004; |
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s->pll[1] = 0x0000; |
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s->volume = 0xffff;
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s->dac_power = 0x8540;
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s->softstep = 1;
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s->volume_change = 0;
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s->powerdown = 0;
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s->filter_data[0x00] = 0x6be3; |
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s->filter_data[0x01] = 0x9666; |
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s->filter_data[0x02] = 0x675d; |
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s->filter_data[0x03] = 0x6be3; |
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s->filter_data[0x04] = 0x9666; |
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s->filter_data[0x05] = 0x675d; |
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s->filter_data[0x06] = 0x7d83; |
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s->filter_data[0x07] = 0x84ee; |
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s->filter_data[0x08] = 0x7d83; |
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s->filter_data[0x09] = 0x84ee; |
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s->filter_data[0x0a] = 0x6be3; |
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s->filter_data[0x0b] = 0x9666; |
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s->filter_data[0x0c] = 0x675d; |
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s->filter_data[0x0d] = 0x6be3; |
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s->filter_data[0x0e] = 0x9666; |
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s->filter_data[0x0f] = 0x675d; |
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s->filter_data[0x10] = 0x7d83; |
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s->filter_data[0x11] = 0x84ee; |
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s->filter_data[0x12] = 0x7d83; |
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s->filter_data[0x13] = 0x84ee; |
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|
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s->i2s_tx_rate = 0;
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s->i2s_rx_rate = 0;
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qemu_set_irq(s->pint, !s->irq); |
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} |
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|
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struct tsc210x_rate_info_s {
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int rate;
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int dsor;
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int fsref;
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}; |
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|
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/* { rate, dsor, fsref } */
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static const struct tsc210x_rate_info_s tsc2101_rates[] = { |
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/* Fsref / 6.0 */
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{ 7350, 7, 1 },
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{ 8000, 7, 0 },
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/* Fsref / 5.5 */
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{ 8018, 6, 1 },
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{ 8727, 6, 0 },
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/* Fsref / 5.0 */
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{ 8820, 5, 1 },
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{ 9600, 5, 0 },
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/* Fsref / 4.0 */
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{ 11025, 4, 1 },
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{ 12000, 4, 0 },
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/* Fsref / 3.0 */
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{ 14700, 3, 1 },
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{ 16000, 3, 0 },
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/* Fsref / 2.0 */
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{ 22050, 2, 1 },
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{ 24000, 2, 0 },
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/* Fsref / 1.5 */
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{ 29400, 1, 1 },
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{ 32000, 1, 0 },
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/* Fsref */
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{ 44100, 0, 1 },
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{ 48000, 0, 0 },
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|
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{ 0, 0, 0 },
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}; |
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|
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/* { rate, dsor, fsref } */
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static const struct tsc210x_rate_info_s tsc2102_rates[] = { |
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/* Fsref / 6.0 */
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{ 7350, 63, 1 },
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{ 8000, 63, 0 },
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/* Fsref / 6.0 */
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{ 7350, 54, 1 },
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{ 8000, 54, 0 },
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/* Fsref / 5.0 */
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{ 8820, 45, 1 },
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{ 9600, 45, 0 },
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/* Fsref / 4.0 */
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{ 11025, 36, 1 },
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{ 12000, 36, 0 },
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/* Fsref / 3.0 */
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{ 14700, 27, 1 },
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{ 16000, 27, 0 },
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/* Fsref / 2.0 */
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{ 22050, 18, 1 },
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{ 24000, 18, 0 },
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/* Fsref / 1.5 */
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{ 29400, 9, 1 },
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{ 32000, 9, 0 },
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/* Fsref */
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{ 44100, 0, 1 },
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{ 48000, 0, 0 },
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{ 0, 0, 0 },
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}; |
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|
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static inline void tsc210x_out_flush(struct tsc210x_state_s *s, int len) |
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{
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uint8_t *data = s->codec.out.fifo + s->codec.out.start; |
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uint8_t *end = data + len; |
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while (data < end)
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data += AUD_write(s->dac_voice[0], data, end - data) ?: (end - data);
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|
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s->codec.out.len -= len; |
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if (s->codec.out.len)
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memmove(s->codec.out.fifo, end, s->codec.out.len); |
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s->codec.out.start = 0;
|
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} |
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|
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static void tsc210x_audio_out_cb(struct tsc210x_state_s *s, int free_b) |
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{
|
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if (s->codec.out.len >= free_b) {
|
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tsc210x_out_flush(s, free_b); |
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return;
|
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} |
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|
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s->codec.out.size = MIN(free_b, 16384);
|
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qemu_irq_raise(s->codec.tx_start); |
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} |
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|
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static void tsc2102_audio_rate_update(struct tsc210x_state_s *s) |
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{
|
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const struct tsc210x_rate_info_s *rate; |
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|
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s->codec.tx_rate = 0;
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s->codec.rx_rate = 0;
|
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if (s->dac_power & (1 << 15)) /* PWDNC */ |
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return;
|
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|
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for (rate = tsc2102_rates; rate->rate; rate ++)
|
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if (rate->dsor == (s->audio_ctrl1 & 0x3f) && /* DACFS */ |
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rate->fsref == ((s->audio_ctrl3 >> 13) & 1))/* REFFS */ |
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break;
|
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if (!rate->rate) {
|
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printf("%s: unknown sampling rate configured\n", __FUNCTION__);
|
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return;
|
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} |
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|
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s->codec.tx_rate = rate->rate; |
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} |
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|
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static void tsc2102_audio_output_update(struct tsc210x_state_s *s) |
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{
|
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int enable;
|
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audsettings_t fmt; |
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|
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if (s->dac_voice[0]) { |
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tsc210x_out_flush(s, s->codec.out.len); |
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s->codec.out.size = 0;
|
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AUD_set_active_out(s->dac_voice[0], 0); |
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AUD_close_out(&s->card, s->dac_voice[0]);
|
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s->dac_voice[0] = 0; |
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} |
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s->codec.cts = 0;
|
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|
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enable = |
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(~s->dac_power & (1 << 15)) && /* PWDNC */ |
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(~s->dac_power & (1 << 10)); /* DAPWDN */ |
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if (!enable || !s->codec.tx_rate)
|
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return;
|
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|
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/* Force our own sampling rate even in slave DAC mode */
|
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fmt.endianness = 0;
|
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fmt.nchannels = 2;
|
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fmt.freq = s->codec.tx_rate; |
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fmt.fmt = AUD_FMT_S16; |
| 333 |
|
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s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0], |
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"tsc2102.sink", s, (void *) tsc210x_audio_out_cb, &fmt); |
| 336 |
if (s->dac_voice[0]) { |
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s->codec.cts = 1;
|
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AUD_set_active_out(s->dac_voice[0], 1); |
| 339 |
} |
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} |
| 341 |
|
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static uint16_t tsc2102_data_register_read(struct tsc210x_state_s *s, int reg) |
| 343 |
{
|
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switch (reg) {
|
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case 0x00: /* X */ |
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s->dav &= 0xfbff;
|
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return TSC_CUT_RESOLUTION(X_TRANSFORM(s->x), s->precision) +
|
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(s->noise & 3);
|
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|
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case 0x01: /* Y */ |
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s->noise ++; |
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s->dav &= 0xfdff;
|
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return TSC_CUT_RESOLUTION(Y_TRANSFORM(s->y), s->precision) ^
|
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(s->noise & 3);
|
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|
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case 0x02: /* Z1 */ |
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s->dav &= 0xfeff;
|
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return TSC_CUT_RESOLUTION(Z1_TRANSFORM(s), s->precision) -
|
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(s->noise & 3);
|
| 360 |
|
| 361 |
case 0x03: /* Z2 */ |
| 362 |
s->dav &= 0xff7f;
|
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return TSC_CUT_RESOLUTION(Z2_TRANSFORM(s), s->precision) |
|
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(s->noise & 3);
|
| 365 |
|
| 366 |
case 0x04: /* KPData */ |
| 367 |
return 0xffff; |
| 368 |
|
| 369 |
case 0x05: /* BAT1 */ |
| 370 |
s->dav &= 0xffbf;
|
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return TSC_CUT_RESOLUTION(BAT1_VAL, s->precision) +
|
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(s->noise & 6);
|
| 373 |
|
| 374 |
case 0x06: /* BAT2 */ |
| 375 |
s->dav &= 0xffdf;
|
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return TSC_CUT_RESOLUTION(BAT2_VAL, s->precision);
|
| 377 |
|
| 378 |
case 0x07: /* AUX1 */ |
| 379 |
s->dav &= 0xffef;
|
| 380 |
return TSC_CUT_RESOLUTION(AUX1_VAL, s->precision);
|
| 381 |
|
| 382 |
case 0x08: /* AUX2 */ |
| 383 |
s->dav &= 0xfff7;
|
| 384 |
return 0xffff; |
| 385 |
|
| 386 |
case 0x09: /* TEMP1 */ |
| 387 |
s->dav &= 0xfffb;
|
| 388 |
return TSC_CUT_RESOLUTION(TEMP1_VAL, s->precision) -
|
| 389 |
(s->noise & 5);
|
| 390 |
|
| 391 |
case 0x0a: /* TEMP2 */ |
| 392 |
s->dav &= 0xfffd;
|
| 393 |
return TSC_CUT_RESOLUTION(TEMP2_VAL, s->precision) ^
|
| 394 |
(s->noise & 3);
|
| 395 |
|
| 396 |
case 0x0b: /* DAC */ |
| 397 |
s->dav &= 0xfffe;
|
| 398 |
return 0xffff; |
| 399 |
|
| 400 |
default:
|
| 401 |
#ifdef TSC_VERBOSE
|
| 402 |
fprintf(stderr, "tsc2102_data_register_read: "
|
| 403 |
"no such register: 0x%02x\n", reg);
|
| 404 |
#endif
|
| 405 |
return 0xffff; |
| 406 |
} |
| 407 |
} |
| 408 |
|
| 409 |
static uint16_t tsc2102_control_register_read(
|
| 410 |
struct tsc210x_state_s *s, int reg) |
| 411 |
{
|
| 412 |
switch (reg) {
|
| 413 |
case 0x00: /* TSC ADC */ |
| 414 |
return (s->pressure << 15) | ((!s->busy) << 14) | |
| 415 |
(s->nextfunction << 10) | (s->nextprecision << 8) | s->filter; |
| 416 |
|
| 417 |
case 0x01: /* Status */ |
| 418 |
return (s->pin_func << 14) | ((!s->enabled) << 13) | |
| 419 |
(s->host_mode << 12) | ((!!s->dav) << 11) | s->dav; |
| 420 |
|
| 421 |
case 0x03: /* Reference */ |
| 422 |
return s->ref;
|
| 423 |
|
| 424 |
case 0x04: /* Reset */ |
| 425 |
return 0xffff; |
| 426 |
|
| 427 |
case 0x05: /* Configuration */ |
| 428 |
return s->timing;
|
| 429 |
|
| 430 |
default:
|
| 431 |
#ifdef TSC_VERBOSE
|
| 432 |
fprintf(stderr, "tsc2102_control_register_read: "
|
| 433 |
"no such register: 0x%02x\n", reg);
|
| 434 |
#endif
|
| 435 |
return 0xffff; |
| 436 |
} |
| 437 |
} |
| 438 |
|
| 439 |
static uint16_t tsc2102_audio_register_read(struct tsc210x_state_s *s, int reg) |
| 440 |
{
|
| 441 |
int l_ch, r_ch;
|
| 442 |
uint16_t val; |
| 443 |
|
| 444 |
switch (reg) {
|
| 445 |
case 0x00: /* Audio Control 1 */ |
| 446 |
return s->audio_ctrl1;
|
| 447 |
|
| 448 |
case 0x01: |
| 449 |
return 0xff00; |
| 450 |
|
| 451 |
case 0x02: /* DAC Volume Control */ |
| 452 |
return s->volume;
|
| 453 |
|
| 454 |
case 0x03: |
| 455 |
return 0x8b00; |
| 456 |
|
| 457 |
case 0x04: /* Audio Control 2 */ |
| 458 |
l_ch = 1;
|
| 459 |
r_ch = 1;
|
| 460 |
if (s->softstep && !(s->dac_power & (1 << 10))) { |
| 461 |
l_ch = (qemu_get_clock(vm_clock) > |
| 462 |
s->volume_change + TSC_SOFTSTEP_DELAY); |
| 463 |
r_ch = (qemu_get_clock(vm_clock) > |
| 464 |
s->volume_change + TSC_SOFTSTEP_DELAY); |
| 465 |
} |
| 466 |
|
| 467 |
return s->audio_ctrl2 | (l_ch << 3) | (r_ch << 2); |
| 468 |
|
| 469 |
case 0x05: /* Stereo DAC Power Control */ |
| 470 |
return 0x2aa0 | s->dac_power | |
| 471 |
(((s->dac_power & (1 << 10)) && |
| 472 |
(qemu_get_clock(vm_clock) > |
| 473 |
s->powerdown + TSC_POWEROFF_DELAY)) << 6);
|
| 474 |
|
| 475 |
case 0x06: /* Audio Control 3 */ |
| 476 |
val = s->audio_ctrl3 | 0x0001;
|
| 477 |
s->audio_ctrl3 &= 0xff3f;
|
| 478 |
return val;
|
| 479 |
|
| 480 |
case 0x07: /* LCH_BASS_BOOST_N0 */ |
| 481 |
case 0x08: /* LCH_BASS_BOOST_N1 */ |
| 482 |
case 0x09: /* LCH_BASS_BOOST_N2 */ |
| 483 |
case 0x0a: /* LCH_BASS_BOOST_N3 */ |
| 484 |
case 0x0b: /* LCH_BASS_BOOST_N4 */ |
| 485 |
case 0x0c: /* LCH_BASS_BOOST_N5 */ |
| 486 |
case 0x0d: /* LCH_BASS_BOOST_D1 */ |
| 487 |
case 0x0e: /* LCH_BASS_BOOST_D2 */ |
| 488 |
case 0x0f: /* LCH_BASS_BOOST_D4 */ |
| 489 |
case 0x10: /* LCH_BASS_BOOST_D5 */ |
| 490 |
case 0x11: /* RCH_BASS_BOOST_N0 */ |
| 491 |
case 0x12: /* RCH_BASS_BOOST_N1 */ |
| 492 |
case 0x13: /* RCH_BASS_BOOST_N2 */ |
| 493 |
case 0x14: /* RCH_BASS_BOOST_N3 */ |
| 494 |
case 0x15: /* RCH_BASS_BOOST_N4 */ |
| 495 |
case 0x16: /* RCH_BASS_BOOST_N5 */ |
| 496 |
case 0x17: /* RCH_BASS_BOOST_D1 */ |
| 497 |
case 0x18: /* RCH_BASS_BOOST_D2 */ |
| 498 |
case 0x19: /* RCH_BASS_BOOST_D4 */ |
| 499 |
case 0x1a: /* RCH_BASS_BOOST_D5 */ |
| 500 |
return s->filter_data[reg - 0x07]; |
| 501 |
|
| 502 |
case 0x1b: /* PLL Programmability 1 */ |
| 503 |
return s->pll[0]; |
| 504 |
|
| 505 |
case 0x1c: /* PLL Programmability 2 */ |
| 506 |
return s->pll[1]; |
| 507 |
|
| 508 |
case 0x1d: /* Audio Control 4 */ |
| 509 |
return (!s->softstep) << 14; |
| 510 |
|
| 511 |
default:
|
| 512 |
#ifdef TSC_VERBOSE
|
| 513 |
fprintf(stderr, "tsc2102_audio_register_read: "
|
| 514 |
"no such register: 0x%02x\n", reg);
|
| 515 |
#endif
|
| 516 |
return 0xffff; |
| 517 |
} |
| 518 |
} |
| 519 |
|
| 520 |
static void tsc2102_data_register_write( |
| 521 |
struct tsc210x_state_s *s, int reg, uint16_t value) |
| 522 |
{
|
| 523 |
switch (reg) {
|
| 524 |
case 0x00: /* X */ |
| 525 |
case 0x01: /* Y */ |
| 526 |
case 0x02: /* Z1 */ |
| 527 |
case 0x03: /* Z2 */ |
| 528 |
case 0x05: /* BAT1 */ |
| 529 |
case 0x06: /* BAT2 */ |
| 530 |
case 0x07: /* AUX1 */ |
| 531 |
case 0x08: /* AUX2 */ |
| 532 |
case 0x09: /* TEMP1 */ |
| 533 |
case 0x0a: /* TEMP2 */ |
| 534 |
return;
|
| 535 |
|
| 536 |
default:
|
| 537 |
#ifdef TSC_VERBOSE
|
| 538 |
fprintf(stderr, "tsc2102_data_register_write: "
|
| 539 |
"no such register: 0x%02x\n", reg);
|
| 540 |
#endif
|
| 541 |
} |
| 542 |
} |
| 543 |
|
| 544 |
static void tsc2102_control_register_write( |
| 545 |
struct tsc210x_state_s *s, int reg, uint16_t value) |
| 546 |
{
|
| 547 |
switch (reg) {
|
| 548 |
case 0x00: /* TSC ADC */ |
| 549 |
s->host_mode = value >> 15;
|
| 550 |
s->enabled = !(value & 0x4000);
|
| 551 |
if (s->busy && !s->enabled)
|
| 552 |
qemu_del_timer(s->timer); |
| 553 |
s->busy &= s->enabled; |
| 554 |
s->nextfunction = (value >> 10) & 0xf; |
| 555 |
s->nextprecision = (value >> 8) & 3; |
| 556 |
s->filter = value & 0xff;
|
| 557 |
return;
|
| 558 |
|
| 559 |
case 0x01: /* Status */ |
| 560 |
s->pin_func = value >> 14;
|
| 561 |
return;
|
| 562 |
|
| 563 |
case 0x03: /* Reference */ |
| 564 |
s->ref = value & 0x1f;
|
| 565 |
return;
|
| 566 |
|
| 567 |
case 0x04: /* Reset */ |
| 568 |
if (value == 0xbb00) { |
| 569 |
if (s->busy)
|
| 570 |
qemu_del_timer(s->timer); |
| 571 |
tsc210x_reset(s); |
| 572 |
#ifdef TSC_VERBOSE
|
| 573 |
} else {
|
| 574 |
fprintf(stderr, "tsc2102_control_register_write: "
|
| 575 |
"wrong value written into RESET\n");
|
| 576 |
#endif
|
| 577 |
} |
| 578 |
return;
|
| 579 |
|
| 580 |
case 0x05: /* Configuration */ |
| 581 |
s->timing = value & 0x3f;
|
| 582 |
#ifdef TSC_VERBOSE
|
| 583 |
if (value & ~0x3f) |
| 584 |
fprintf(stderr, "tsc2102_control_register_write: "
|
| 585 |
"wrong value written into CONFIG\n");
|
| 586 |
#endif
|
| 587 |
return;
|
| 588 |
|
| 589 |
default:
|
| 590 |
#ifdef TSC_VERBOSE
|
| 591 |
fprintf(stderr, "tsc2102_control_register_write: "
|
| 592 |
"no such register: 0x%02x\n", reg);
|
| 593 |
#endif
|
| 594 |
} |
| 595 |
} |
| 596 |
|
| 597 |
static void tsc2102_audio_register_write( |
| 598 |
struct tsc210x_state_s *s, int reg, uint16_t value) |
| 599 |
{
|
| 600 |
switch (reg) {
|
| 601 |
case 0x00: /* Audio Control 1 */ |
| 602 |
s->audio_ctrl1 = value & 0x0f3f;
|
| 603 |
#ifdef TSC_VERBOSE
|
| 604 |
if ((value & ~0x0f3f) || ((value & 7) != ((value >> 3) & 7))) |
| 605 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 606 |
"wrong value written into Audio 1\n");
|
| 607 |
#endif
|
| 608 |
tsc2102_audio_rate_update(s); |
| 609 |
if (s->audio)
|
| 610 |
tsc2102_audio_output_update(s); |
| 611 |
return;
|
| 612 |
|
| 613 |
case 0x01: |
| 614 |
#ifdef TSC_VERBOSE
|
| 615 |
if (value != 0xff00) |
| 616 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 617 |
"wrong value written into reg 0x01\n");
|
| 618 |
#endif
|
| 619 |
return;
|
| 620 |
|
| 621 |
case 0x02: /* DAC Volume Control */ |
| 622 |
s->volume = value; |
| 623 |
s->volume_change = qemu_get_clock(vm_clock); |
| 624 |
return;
|
| 625 |
|
| 626 |
case 0x03: |
| 627 |
#ifdef TSC_VERBOSE
|
| 628 |
if (value != 0x8b00) |
| 629 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 630 |
"wrong value written into reg 0x03\n");
|
| 631 |
#endif
|
| 632 |
return;
|
| 633 |
|
| 634 |
case 0x04: /* Audio Control 2 */ |
| 635 |
s->audio_ctrl2 = value & 0xf7f2;
|
| 636 |
#ifdef TSC_VERBOSE
|
| 637 |
if (value & ~0xf7fd) |
| 638 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 639 |
"wrong value written into Audio 2\n");
|
| 640 |
#endif
|
| 641 |
return;
|
| 642 |
|
| 643 |
case 0x05: /* Stereo DAC Power Control */ |
| 644 |
if ((value & ~s->dac_power) & (1 << 10)) |
| 645 |
s->powerdown = qemu_get_clock(vm_clock); |
| 646 |
|
| 647 |
s->dac_power = value & 0x9543;
|
| 648 |
#ifdef TSC_VERBOSE
|
| 649 |
if ((value & ~0x9543) != 0x2aa0) |
| 650 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 651 |
"wrong value written into Power\n");
|
| 652 |
#endif
|
| 653 |
tsc2102_audio_rate_update(s); |
| 654 |
if (s->audio)
|
| 655 |
tsc2102_audio_output_update(s); |
| 656 |
return;
|
| 657 |
|
| 658 |
case 0x06: /* Audio Control 3 */ |
| 659 |
s->audio_ctrl3 &= 0x00c0;
|
| 660 |
s->audio_ctrl3 |= value & 0xf800;
|
| 661 |
#ifdef TSC_VERBOSE
|
| 662 |
if (value & ~0xf8c7) |
| 663 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 664 |
"wrong value written into Audio 3\n");
|
| 665 |
#endif
|
| 666 |
if (s->audio)
|
| 667 |
tsc2102_audio_output_update(s); |
| 668 |
return;
|
| 669 |
|
| 670 |
case 0x07: /* LCH_BASS_BOOST_N0 */ |
| 671 |
case 0x08: /* LCH_BASS_BOOST_N1 */ |
| 672 |
case 0x09: /* LCH_BASS_BOOST_N2 */ |
| 673 |
case 0x0a: /* LCH_BASS_BOOST_N3 */ |
| 674 |
case 0x0b: /* LCH_BASS_BOOST_N4 */ |
| 675 |
case 0x0c: /* LCH_BASS_BOOST_N5 */ |
| 676 |
case 0x0d: /* LCH_BASS_BOOST_D1 */ |
| 677 |
case 0x0e: /* LCH_BASS_BOOST_D2 */ |
| 678 |
case 0x0f: /* LCH_BASS_BOOST_D4 */ |
| 679 |
case 0x10: /* LCH_BASS_BOOST_D5 */ |
| 680 |
case 0x11: /* RCH_BASS_BOOST_N0 */ |
| 681 |
case 0x12: /* RCH_BASS_BOOST_N1 */ |
| 682 |
case 0x13: /* RCH_BASS_BOOST_N2 */ |
| 683 |
case 0x14: /* RCH_BASS_BOOST_N3 */ |
| 684 |
case 0x15: /* RCH_BASS_BOOST_N4 */ |
| 685 |
case 0x16: /* RCH_BASS_BOOST_N5 */ |
| 686 |
case 0x17: /* RCH_BASS_BOOST_D1 */ |
| 687 |
case 0x18: /* RCH_BASS_BOOST_D2 */ |
| 688 |
case 0x19: /* RCH_BASS_BOOST_D4 */ |
| 689 |
case 0x1a: /* RCH_BASS_BOOST_D5 */ |
| 690 |
s->filter_data[reg - 0x07] = value;
|
| 691 |
return;
|
| 692 |
|
| 693 |
case 0x1b: /* PLL Programmability 1 */ |
| 694 |
s->pll[0] = value & 0xfffc; |
| 695 |
#ifdef TSC_VERBOSE
|
| 696 |
if (value & ~0xfffc) |
| 697 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 698 |
"wrong value written into PLL 1\n");
|
| 699 |
#endif
|
| 700 |
return;
|
| 701 |
|
| 702 |
case 0x1c: /* PLL Programmability 2 */ |
| 703 |
s->pll[1] = value & 0xfffc; |
| 704 |
#ifdef TSC_VERBOSE
|
| 705 |
if (value & ~0xfffc) |
| 706 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 707 |
"wrong value written into PLL 2\n");
|
| 708 |
#endif
|
| 709 |
return;
|
| 710 |
|
| 711 |
case 0x1d: /* Audio Control 4 */ |
| 712 |
s->softstep = !(value & 0x4000);
|
| 713 |
#ifdef TSC_VERBOSE
|
| 714 |
if (value & ~0x4000) |
| 715 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 716 |
"wrong value written into Audio 4\n");
|
| 717 |
#endif
|
| 718 |
return;
|
| 719 |
|
| 720 |
default:
|
| 721 |
#ifdef TSC_VERBOSE
|
| 722 |
fprintf(stderr, "tsc2102_audio_register_write: "
|
| 723 |
"no such register: 0x%02x\n", reg);
|
| 724 |
#endif
|
| 725 |
} |
| 726 |
} |
| 727 |
|
| 728 |
/* This handles most of the chip logic. */
|
| 729 |
static void tsc210x_pin_update(struct tsc210x_state_s *s) |
| 730 |
{
|
| 731 |
int64_t expires; |
| 732 |
int pin_state;
|
| 733 |
|
| 734 |
switch (s->pin_func) {
|
| 735 |
case 0: |
| 736 |
pin_state = s->pressure; |
| 737 |
break;
|
| 738 |
case 1: |
| 739 |
pin_state = !!s->dav; |
| 740 |
break;
|
| 741 |
case 2: |
| 742 |
default:
|
| 743 |
pin_state = s->pressure && !s->dav; |
| 744 |
} |
| 745 |
|
| 746 |
if (!s->enabled)
|
| 747 |
pin_state = 0;
|
| 748 |
|
| 749 |
if (pin_state != s->irq) {
|
| 750 |
s->irq = pin_state; |
| 751 |
qemu_set_irq(s->pint, !s->irq); |
| 752 |
} |
| 753 |
|
| 754 |
switch (s->nextfunction) {
|
| 755 |
case TSC_MODE_XY_SCAN:
|
| 756 |
case TSC_MODE_XYZ_SCAN:
|
| 757 |
if (!s->pressure)
|
| 758 |
return;
|
| 759 |
break;
|
| 760 |
|
| 761 |
case TSC_MODE_X:
|
| 762 |
case TSC_MODE_Y:
|
| 763 |
case TSC_MODE_Z:
|
| 764 |
if (!s->pressure)
|
| 765 |
return;
|
| 766 |
/* Fall through */
|
| 767 |
case TSC_MODE_BAT1:
|
| 768 |
case TSC_MODE_BAT2:
|
| 769 |
case TSC_MODE_AUX:
|
| 770 |
case TSC_MODE_TEMP1:
|
| 771 |
case TSC_MODE_TEMP2:
|
| 772 |
if (s->dav)
|
| 773 |
s->enabled = 0;
|
| 774 |
break;
|
| 775 |
|
| 776 |
case TSC_MODE_AUX_SCAN:
|
| 777 |
case TSC_MODE_PORT_SCAN:
|
| 778 |
break;
|
| 779 |
|
| 780 |
case TSC_MODE_NO_SCAN:
|
| 781 |
case TSC_MODE_XX_DRV:
|
| 782 |
case TSC_MODE_YY_DRV:
|
| 783 |
case TSC_MODE_YX_DRV:
|
| 784 |
default:
|
| 785 |
return;
|
| 786 |
} |
| 787 |
|
| 788 |
if (!s->enabled || s->busy)
|
| 789 |
return;
|
| 790 |
|
| 791 |
s->busy = 1;
|
| 792 |
s->precision = s->nextprecision; |
| 793 |
s->function = s->nextfunction; |
| 794 |
expires = qemu_get_clock(vm_clock) + (ticks_per_sec >> 10);
|
| 795 |
qemu_mod_timer(s->timer, expires); |
| 796 |
} |
| 797 |
|
| 798 |
static uint16_t tsc210x_read(struct tsc210x_state_s *s) |
| 799 |
{
|
| 800 |
uint16_t ret = 0x0000;
|
| 801 |
|
| 802 |
if (!s->command)
|
| 803 |
fprintf(stderr, "tsc210x_read: SPI underrun!\n");
|
| 804 |
|
| 805 |
switch (s->page) {
|
| 806 |
case TSC_DATA_REGISTERS_PAGE:
|
| 807 |
ret = tsc2102_data_register_read(s, s->offset); |
| 808 |
break;
|
| 809 |
case TSC_CONTROL_REGISTERS_PAGE:
|
| 810 |
ret = tsc2102_control_register_read(s, s->offset); |
| 811 |
break;
|
| 812 |
case TSC_AUDIO_REGISTERS_PAGE:
|
| 813 |
ret = tsc2102_audio_register_read(s, s->offset); |
| 814 |
break;
|
| 815 |
default:
|
| 816 |
cpu_abort(cpu_single_env, "tsc210x_read: wrong memory page\n");
|
| 817 |
} |
| 818 |
|
| 819 |
tsc210x_pin_update(s); |
| 820 |
|
| 821 |
/* Allow sequential reads. */
|
| 822 |
s->offset ++; |
| 823 |
s->state = 0;
|
| 824 |
return ret;
|
| 825 |
} |
| 826 |
|
| 827 |
static void tsc210x_write(struct tsc210x_state_s *s, uint16_t value) |
| 828 |
{
|
| 829 |
/*
|
| 830 |
* This is a two-state state machine for reading
|
| 831 |
* command and data every second time.
|
| 832 |
*/
|
| 833 |
if (!s->state) {
|
| 834 |
s->command = value >> 15;
|
| 835 |
s->page = (value >> 11) & 0x0f; |
| 836 |
s->offset = (value >> 5) & 0x3f; |
| 837 |
s->state = 1;
|
| 838 |
} else {
|
| 839 |
if (s->command)
|
| 840 |
fprintf(stderr, "tsc210x_write: SPI overrun!\n");
|
| 841 |
else
|
| 842 |
switch (s->page) {
|
| 843 |
case TSC_DATA_REGISTERS_PAGE:
|
| 844 |
tsc2102_data_register_write(s, s->offset, value); |
| 845 |
break;
|
| 846 |
case TSC_CONTROL_REGISTERS_PAGE:
|
| 847 |
tsc2102_control_register_write(s, s->offset, value); |
| 848 |
break;
|
| 849 |
case TSC_AUDIO_REGISTERS_PAGE:
|
| 850 |
tsc2102_audio_register_write(s, s->offset, value); |
| 851 |
break;
|
| 852 |
default:
|
| 853 |
cpu_abort(cpu_single_env, |
| 854 |
"tsc210x_write: wrong memory page\n");
|
| 855 |
} |
| 856 |
|
| 857 |
tsc210x_pin_update(s); |
| 858 |
s->state = 0;
|
| 859 |
} |
| 860 |
} |
| 861 |
|
| 862 |
static void tsc210x_timer_tick(void *opaque) |
| 863 |
{
|
| 864 |
struct tsc210x_state_s *s = opaque;
|
| 865 |
|
| 866 |
/* Timer ticked -- a set of conversions has been finished. */
|
| 867 |
|
| 868 |
if (!s->busy)
|
| 869 |
return;
|
| 870 |
|
| 871 |
s->busy = 0;
|
| 872 |
s->dav |= mode_regs[s->function]; |
| 873 |
tsc210x_pin_update(s); |
| 874 |
} |
| 875 |
|
| 876 |
static void tsc210x_touchscreen_event(void *opaque, |
| 877 |
int x, int y, int z, int buttons_state) |
| 878 |
{
|
| 879 |
struct tsc210x_state_s *s = opaque;
|
| 880 |
int p = s->pressure;
|
| 881 |
|
| 882 |
if (buttons_state) {
|
| 883 |
s->x = x; |
| 884 |
s->y = y; |
| 885 |
} |
| 886 |
s->pressure = !!buttons_state; |
| 887 |
|
| 888 |
/*
|
| 889 |
* Note: We would get better responsiveness in the guest by
|
| 890 |
* signaling TS events immediately, but for now we simulate
|
| 891 |
* the first conversion delay for sake of correctness.
|
| 892 |
*/
|
| 893 |
if (p != s->pressure)
|
| 894 |
tsc210x_pin_update(s); |
| 895 |
} |
| 896 |
|
| 897 |
static void tsc210x_i2s_swallow(struct tsc210x_state_s *s) |
| 898 |
{
|
| 899 |
if (s->dac_voice[0]) |
| 900 |
tsc210x_out_flush(s, s->codec.out.len); |
| 901 |
else
|
| 902 |
s->codec.out.len = 0;
|
| 903 |
} |
| 904 |
|
| 905 |
static void tsc210x_i2s_set_rate(struct tsc210x_state_s *s, int in, int out) |
| 906 |
{
|
| 907 |
s->i2s_tx_rate = out; |
| 908 |
s->i2s_rx_rate = in; |
| 909 |
} |
| 910 |
|
| 911 |
static void tsc210x_save(QEMUFile *f, void *opaque) |
| 912 |
{
|
| 913 |
struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque; |
| 914 |
int64_t now = qemu_get_clock(vm_clock); |
| 915 |
int i;
|
| 916 |
|
| 917 |
qemu_put_be16(f, s->x); |
| 918 |
qemu_put_be16(f, s->y); |
| 919 |
qemu_put_byte(f, s->pressure); |
| 920 |
|
| 921 |
qemu_put_byte(f, s->state); |
| 922 |
qemu_put_byte(f, s->page); |
| 923 |
qemu_put_byte(f, s->offset); |
| 924 |
qemu_put_byte(f, s->command); |
| 925 |
|
| 926 |
qemu_put_byte(f, s->irq); |
| 927 |
qemu_put_be16s(f, &s->dav); |
| 928 |
|
| 929 |
qemu_put_timer(f, s->timer); |
| 930 |
qemu_put_byte(f, s->enabled); |
| 931 |
qemu_put_byte(f, s->host_mode); |
| 932 |
qemu_put_byte(f, s->function); |
| 933 |
qemu_put_byte(f, s->nextfunction); |
| 934 |
qemu_put_byte(f, s->precision); |
| 935 |
qemu_put_byte(f, s->nextprecision); |
| 936 |
qemu_put_byte(f, s->filter); |
| 937 |
qemu_put_byte(f, s->pin_func); |
| 938 |
qemu_put_byte(f, s->ref); |
| 939 |
qemu_put_byte(f, s->timing); |
| 940 |
qemu_put_be32(f, s->noise); |
| 941 |
|
| 942 |
qemu_put_be16s(f, &s->audio_ctrl1); |
| 943 |
qemu_put_be16s(f, &s->audio_ctrl2); |
| 944 |
qemu_put_be16s(f, &s->audio_ctrl3); |
| 945 |
qemu_put_be16s(f, &s->pll[0]);
|
| 946 |
qemu_put_be16s(f, &s->pll[1]);
|
| 947 |
qemu_put_be16s(f, &s->volume); |
| 948 |
qemu_put_be64(f, (uint64_t) (s->volume_change - now)); |
| 949 |
qemu_put_be64(f, (uint64_t) (s->powerdown - now)); |
| 950 |
qemu_put_byte(f, s->softstep); |
| 951 |
qemu_put_be16s(f, &s->dac_power); |
| 952 |
|
| 953 |
for (i = 0; i < 0x14; i ++) |
| 954 |
qemu_put_be16s(f, &s->filter_data[i]); |
| 955 |
} |
| 956 |
|
| 957 |
static int tsc210x_load(QEMUFile *f, void *opaque, int version_id) |
| 958 |
{
|
| 959 |
struct tsc210x_state_s *s = (struct tsc210x_state_s *) opaque; |
| 960 |
int64_t now = qemu_get_clock(vm_clock); |
| 961 |
int i;
|
| 962 |
|
| 963 |
s->x = qemu_get_be16(f); |
| 964 |
s->y = qemu_get_be16(f); |
| 965 |
s->pressure = qemu_get_byte(f); |
| 966 |
|
| 967 |
s->state = qemu_get_byte(f); |
| 968 |
s->page = qemu_get_byte(f); |
| 969 |
s->offset = qemu_get_byte(f); |
| 970 |
s->command = qemu_get_byte(f); |
| 971 |
|
| 972 |
s->irq = qemu_get_byte(f); |
| 973 |
qemu_get_be16s(f, &s->dav); |
| 974 |
|
| 975 |
qemu_get_timer(f, s->timer); |
| 976 |
s->enabled = qemu_get_byte(f); |
| 977 |
s->host_mode = qemu_get_byte(f); |
| 978 |
s->function = qemu_get_byte(f); |
| 979 |
s->nextfunction = qemu_get_byte(f); |
| 980 |
s->precision = qemu_get_byte(f); |
| 981 |
s->nextprecision = qemu_get_byte(f); |
| 982 |
s->filter = qemu_get_byte(f); |
| 983 |
s->pin_func = qemu_get_byte(f); |
| 984 |
s->ref = qemu_get_byte(f); |
| 985 |
s->timing = qemu_get_byte(f); |
| 986 |
s->noise = qemu_get_be32(f); |
| 987 |
|
| 988 |
qemu_get_be16s(f, &s->audio_ctrl1); |
| 989 |
qemu_get_be16s(f, &s->audio_ctrl2); |
| 990 |
qemu_get_be16s(f, &s->audio_ctrl3); |
| 991 |
qemu_get_be16s(f, &s->pll[0]);
|
| 992 |
qemu_get_be16s(f, &s->pll[1]);
|
| 993 |
qemu_get_be16s(f, &s->volume); |
| 994 |
s->volume_change = (int64_t) qemu_get_be64(f) + now; |
| 995 |
s->powerdown = (int64_t) qemu_get_be64(f) + now; |
| 996 |
s->softstep = qemu_get_byte(f); |
| 997 |
qemu_get_be16s(f, &s->dac_power); |
| 998 |
|
| 999 |
for (i = 0; i < 0x14; i ++) |
| 1000 |
qemu_get_be16s(f, &s->filter_data[i]); |
| 1001 |
|
| 1002 |
s->busy = qemu_timer_pending(s->timer); |
| 1003 |
qemu_set_irq(s->pint, !s->irq); |
| 1004 |
|
| 1005 |
return 0; |
| 1006 |
} |
| 1007 |
|
| 1008 |
static int tsc2102_iid = 0; |
| 1009 |
|
| 1010 |
struct uwire_slave_s *tsc2102_init(qemu_irq pint, AudioState *audio)
|
| 1011 |
{
|
| 1012 |
struct tsc210x_state_s *s;
|
| 1013 |
|
| 1014 |
s = (struct tsc210x_state_s *)
|
| 1015 |
qemu_mallocz(sizeof(struct tsc210x_state_s)); |
| 1016 |
memset(s, 0, sizeof(struct tsc210x_state_s)); |
| 1017 |
s->x = 160;
|
| 1018 |
s->y = 160;
|
| 1019 |
s->pressure = 0;
|
| 1020 |
s->precision = s->nextprecision = 0;
|
| 1021 |
s->timer = qemu_new_timer(vm_clock, tsc210x_timer_tick, s); |
| 1022 |
s->pint = pint; |
| 1023 |
s->name = "tsc2102";
|
| 1024 |
s->audio = audio; |
| 1025 |
|
| 1026 |
s->chip.opaque = s; |
| 1027 |
s->chip.send = (void *) tsc210x_write;
|
| 1028 |
s->chip.receive = (void *) tsc210x_read;
|
| 1029 |
|
| 1030 |
s->codec.opaque = s; |
| 1031 |
s->codec.tx_swallow = (void *) tsc210x_i2s_swallow;
|
| 1032 |
s->codec.set_rate = (void *) tsc210x_i2s_set_rate;
|
| 1033 |
s->codec.in.fifo = s->in_fifo; |
| 1034 |
s->codec.out.fifo = s->out_fifo; |
| 1035 |
|
| 1036 |
tsc210x_reset(s); |
| 1037 |
|
| 1038 |
qemu_add_mouse_event_handler(tsc210x_touchscreen_event, s, 1,
|
| 1039 |
"QEMU TSC2102-driven Touchscreen");
|
| 1040 |
|
| 1041 |
if (s->audio)
|
| 1042 |
AUD_register_card(s->audio, s->name, &s->card); |
| 1043 |
|
| 1044 |
qemu_register_reset((void *) tsc210x_reset, s);
|
| 1045 |
register_savevm(s->name, tsc2102_iid ++, 0,
|
| 1046 |
tsc210x_save, tsc210x_load, s); |
| 1047 |
|
| 1048 |
return &s->chip;
|
| 1049 |
} |
| 1050 |
|
| 1051 |
struct i2s_codec_s *tsc210x_codec(struct uwire_slave_s *chip) |
| 1052 |
{
|
| 1053 |
struct tsc210x_state_s *s = (struct tsc210x_state_s *) chip->opaque; |
| 1054 |
|
| 1055 |
return &s->codec;
|
| 1056 |
} |