root / hw / ppc_booke.c @ 9a3a8895
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1 | ddd1055b | Fabien Chouteau | /*
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2 | ddd1055b | Fabien Chouteau | * QEMU PowerPC Booke hardware System Emulator
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3 | ddd1055b | Fabien Chouteau | *
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4 | ddd1055b | Fabien Chouteau | * Copyright (c) 2011 AdaCore
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5 | ddd1055b | Fabien Chouteau | *
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6 | ddd1055b | Fabien Chouteau | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | ddd1055b | Fabien Chouteau | * of this software and associated documentation files (the "Software"), to deal
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8 | ddd1055b | Fabien Chouteau | * in the Software without restriction, including without limitation the rights
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9 | ddd1055b | Fabien Chouteau | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | ddd1055b | Fabien Chouteau | * copies of the Software, and to permit persons to whom the Software is
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11 | ddd1055b | Fabien Chouteau | * furnished to do so, subject to the following conditions:
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12 | ddd1055b | Fabien Chouteau | *
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13 | ddd1055b | Fabien Chouteau | * The above copyright notice and this permission notice shall be included in
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14 | ddd1055b | Fabien Chouteau | * all copies or substantial portions of the Software.
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15 | ddd1055b | Fabien Chouteau | *
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16 | ddd1055b | Fabien Chouteau | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | ddd1055b | Fabien Chouteau | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | ddd1055b | Fabien Chouteau | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | ddd1055b | Fabien Chouteau | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | ddd1055b | Fabien Chouteau | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | ddd1055b | Fabien Chouteau | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | ddd1055b | Fabien Chouteau | * THE SOFTWARE.
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23 | ddd1055b | Fabien Chouteau | */
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24 | ddd1055b | Fabien Chouteau | #include "hw.h" |
25 | ddd1055b | Fabien Chouteau | #include "ppc.h" |
26 | ddd1055b | Fabien Chouteau | #include "qemu-timer.h" |
27 | ddd1055b | Fabien Chouteau | #include "sysemu.h" |
28 | ddd1055b | Fabien Chouteau | #include "nvram.h" |
29 | ddd1055b | Fabien Chouteau | #include "qemu-log.h" |
30 | ddd1055b | Fabien Chouteau | #include "loader.h" |
31 | ddd1055b | Fabien Chouteau | |
32 | ddd1055b | Fabien Chouteau | |
33 | ddd1055b | Fabien Chouteau | /* Timer Control Register */
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34 | ddd1055b | Fabien Chouteau | |
35 | ddd1055b | Fabien Chouteau | #define TCR_WP_SHIFT 30 /* Watchdog Timer Period */ |
36 | ddd1055b | Fabien Chouteau | #define TCR_WP_MASK (0x3 << TCR_WP_SHIFT) |
37 | ddd1055b | Fabien Chouteau | #define TCR_WRC_SHIFT 28 /* Watchdog Timer Reset Control */ |
38 | ddd1055b | Fabien Chouteau | #define TCR_WRC_MASK (0x3 << TCR_WRC_SHIFT) |
39 | ddd1055b | Fabien Chouteau | #define TCR_WIE (1 << 27) /* Watchdog Timer Interrupt Enable */ |
40 | ddd1055b | Fabien Chouteau | #define TCR_DIE (1 << 26) /* Decrementer Interrupt Enable */ |
41 | ddd1055b | Fabien Chouteau | #define TCR_FP_SHIFT 24 /* Fixed-Interval Timer Period */ |
42 | ddd1055b | Fabien Chouteau | #define TCR_FP_MASK (0x3 << TCR_FP_SHIFT) |
43 | ddd1055b | Fabien Chouteau | #define TCR_FIE (1 << 23) /* Fixed-Interval Timer Interrupt Enable */ |
44 | ddd1055b | Fabien Chouteau | #define TCR_ARE (1 << 22) /* Auto-Reload Enable */ |
45 | ddd1055b | Fabien Chouteau | |
46 | ddd1055b | Fabien Chouteau | /* Timer Control Register (e500 specific fields) */
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47 | ddd1055b | Fabien Chouteau | |
48 | ddd1055b | Fabien Chouteau | #define TCR_E500_FPEXT_SHIFT 13 /* Fixed-Interval Timer Period Extension */ |
49 | ddd1055b | Fabien Chouteau | #define TCR_E500_FPEXT_MASK (0xf << TCR_E500_FPEXT_SHIFT) |
50 | ddd1055b | Fabien Chouteau | #define TCR_E500_WPEXT_SHIFT 17 /* Watchdog Timer Period Extension */ |
51 | ddd1055b | Fabien Chouteau | #define TCR_E500_WPEXT_MASK (0xf << TCR_E500_WPEXT_SHIFT) |
52 | ddd1055b | Fabien Chouteau | |
53 | ddd1055b | Fabien Chouteau | /* Timer Status Register */
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54 | ddd1055b | Fabien Chouteau | |
55 | ddd1055b | Fabien Chouteau | #define TSR_FIS (1 << 26) /* Fixed-Interval Timer Interrupt Status */ |
56 | ddd1055b | Fabien Chouteau | #define TSR_DIS (1 << 27) /* Decrementer Interrupt Status */ |
57 | ddd1055b | Fabien Chouteau | #define TSR_WRS_SHIFT 28 /* Watchdog Timer Reset Status */ |
58 | ddd1055b | Fabien Chouteau | #define TSR_WRS_MASK (0x3 << TSR_WRS_SHIFT) |
59 | ddd1055b | Fabien Chouteau | #define TSR_WIS (1 << 30) /* Watchdog Timer Interrupt Status */ |
60 | ddd1055b | Fabien Chouteau | #define TSR_ENW (1 << 31) /* Enable Next Watchdog Timer */ |
61 | ddd1055b | Fabien Chouteau | |
62 | ddd1055b | Fabien Chouteau | typedef struct booke_timer_t booke_timer_t; |
63 | ddd1055b | Fabien Chouteau | struct booke_timer_t {
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64 | ddd1055b | Fabien Chouteau | |
65 | ddd1055b | Fabien Chouteau | uint64_t fit_next; |
66 | ddd1055b | Fabien Chouteau | struct QEMUTimer *fit_timer;
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67 | ddd1055b | Fabien Chouteau | |
68 | ddd1055b | Fabien Chouteau | uint64_t wdt_next; |
69 | ddd1055b | Fabien Chouteau | struct QEMUTimer *wdt_timer;
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70 | ddd1055b | Fabien Chouteau | |
71 | ddd1055b | Fabien Chouteau | uint32_t flags; |
72 | ddd1055b | Fabien Chouteau | }; |
73 | ddd1055b | Fabien Chouteau | |
74 | e2684c0b | Andreas Färber | static void booke_update_irq(CPUPPCState *env) |
75 | ddd1055b | Fabien Chouteau | { |
76 | ddd1055b | Fabien Chouteau | ppc_set_irq(env, PPC_INTERRUPT_DECR, |
77 | ddd1055b | Fabien Chouteau | (env->spr[SPR_BOOKE_TSR] & TSR_DIS |
78 | ddd1055b | Fabien Chouteau | && env->spr[SPR_BOOKE_TCR] & TCR_DIE)); |
79 | ddd1055b | Fabien Chouteau | |
80 | ddd1055b | Fabien Chouteau | ppc_set_irq(env, PPC_INTERRUPT_WDT, |
81 | ddd1055b | Fabien Chouteau | (env->spr[SPR_BOOKE_TSR] & TSR_WIS |
82 | ddd1055b | Fabien Chouteau | && env->spr[SPR_BOOKE_TCR] & TCR_WIE)); |
83 | ddd1055b | Fabien Chouteau | |
84 | ddd1055b | Fabien Chouteau | ppc_set_irq(env, PPC_INTERRUPT_FIT, |
85 | ddd1055b | Fabien Chouteau | (env->spr[SPR_BOOKE_TSR] & TSR_FIS |
86 | ddd1055b | Fabien Chouteau | && env->spr[SPR_BOOKE_TCR] & TCR_FIE)); |
87 | ddd1055b | Fabien Chouteau | } |
88 | ddd1055b | Fabien Chouteau | |
89 | ddd1055b | Fabien Chouteau | /* Return the location of the bit of time base at which the FIT will raise an
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90 | ddd1055b | Fabien Chouteau | interrupt */
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91 | e2684c0b | Andreas Färber | static uint8_t booke_get_fit_target(CPUPPCState *env, ppc_tb_t *tb_env)
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92 | ddd1055b | Fabien Chouteau | { |
93 | ddd1055b | Fabien Chouteau | uint8_t fp = (env->spr[SPR_BOOKE_TCR] & TCR_FP_MASK) >> TCR_FP_SHIFT; |
94 | ddd1055b | Fabien Chouteau | |
95 | ddd1055b | Fabien Chouteau | if (tb_env->flags & PPC_TIMER_E500) {
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96 | ddd1055b | Fabien Chouteau | /* e500 Fixed-interval timer period extension */
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97 | ddd1055b | Fabien Chouteau | uint32_t fpext = (env->spr[SPR_BOOKE_TCR] & TCR_E500_FPEXT_MASK) |
98 | ddd1055b | Fabien Chouteau | >> TCR_E500_FPEXT_SHIFT; |
99 | ddd1055b | Fabien Chouteau | fp = 63 - (fp | fpext << 2); |
100 | ddd1055b | Fabien Chouteau | } else {
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101 | ddd1055b | Fabien Chouteau | fp = env->fit_period[fp]; |
102 | ddd1055b | Fabien Chouteau | } |
103 | ddd1055b | Fabien Chouteau | |
104 | ddd1055b | Fabien Chouteau | return fp;
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105 | ddd1055b | Fabien Chouteau | } |
106 | ddd1055b | Fabien Chouteau | |
107 | ddd1055b | Fabien Chouteau | /* Return the location of the bit of time base at which the WDT will raise an
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108 | ddd1055b | Fabien Chouteau | interrupt */
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109 | e2684c0b | Andreas Färber | static uint8_t booke_get_wdt_target(CPUPPCState *env, ppc_tb_t *tb_env)
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110 | ddd1055b | Fabien Chouteau | { |
111 | ddd1055b | Fabien Chouteau | uint8_t wp = (env->spr[SPR_BOOKE_TCR] & TCR_WP_MASK) >> TCR_WP_SHIFT; |
112 | ddd1055b | Fabien Chouteau | |
113 | ddd1055b | Fabien Chouteau | if (tb_env->flags & PPC_TIMER_E500) {
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114 | ddd1055b | Fabien Chouteau | /* e500 Watchdog timer period extension */
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115 | ddd1055b | Fabien Chouteau | uint32_t wpext = (env->spr[SPR_BOOKE_TCR] & TCR_E500_WPEXT_MASK) |
116 | ddd1055b | Fabien Chouteau | >> TCR_E500_WPEXT_SHIFT; |
117 | ddd1055b | Fabien Chouteau | wp = 63 - (wp | wpext << 2); |
118 | ddd1055b | Fabien Chouteau | } else {
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119 | ddd1055b | Fabien Chouteau | wp = env->wdt_period[wp]; |
120 | ddd1055b | Fabien Chouteau | } |
121 | ddd1055b | Fabien Chouteau | |
122 | ddd1055b | Fabien Chouteau | return wp;
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123 | ddd1055b | Fabien Chouteau | } |
124 | ddd1055b | Fabien Chouteau | |
125 | e2684c0b | Andreas Färber | static void booke_update_fixed_timer(CPUPPCState *env, |
126 | ddd1055b | Fabien Chouteau | uint8_t target_bit, |
127 | ddd1055b | Fabien Chouteau | uint64_t *next, |
128 | ddd1055b | Fabien Chouteau | struct QEMUTimer *timer)
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129 | ddd1055b | Fabien Chouteau | { |
130 | ddd1055b | Fabien Chouteau | ppc_tb_t *tb_env = env->tb_env; |
131 | ddd1055b | Fabien Chouteau | uint64_t lapse; |
132 | ddd1055b | Fabien Chouteau | uint64_t tb; |
133 | ddd1055b | Fabien Chouteau | uint64_t period = 1 << (target_bit + 1); |
134 | ddd1055b | Fabien Chouteau | uint64_t now; |
135 | ddd1055b | Fabien Chouteau | |
136 | ddd1055b | Fabien Chouteau | now = qemu_get_clock_ns(vm_clock); |
137 | ddd1055b | Fabien Chouteau | tb = cpu_ppc_get_tb(tb_env, now, tb_env->tb_offset); |
138 | ddd1055b | Fabien Chouteau | |
139 | ddd1055b | Fabien Chouteau | lapse = period - ((tb - (1 << target_bit)) & (period - 1)); |
140 | ddd1055b | Fabien Chouteau | |
141 | ddd1055b | Fabien Chouteau | *next = now + muldiv64(lapse, get_ticks_per_sec(), tb_env->tb_freq); |
142 | ddd1055b | Fabien Chouteau | |
143 | ddd1055b | Fabien Chouteau | /* XXX: If expire time is now. We can't run the callback because we don't
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144 | ddd1055b | Fabien Chouteau | * have access to it. So we just set the timer one nanosecond later.
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145 | ddd1055b | Fabien Chouteau | */
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146 | ddd1055b | Fabien Chouteau | |
147 | ddd1055b | Fabien Chouteau | if (*next == now) {
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148 | ddd1055b | Fabien Chouteau | (*next)++; |
149 | ddd1055b | Fabien Chouteau | } |
150 | ddd1055b | Fabien Chouteau | |
151 | ddd1055b | Fabien Chouteau | qemu_mod_timer(timer, *next); |
152 | ddd1055b | Fabien Chouteau | } |
153 | ddd1055b | Fabien Chouteau | |
154 | ddd1055b | Fabien Chouteau | static void booke_decr_cb(void *opaque) |
155 | ddd1055b | Fabien Chouteau | { |
156 | e2684c0b | Andreas Färber | CPUPPCState *env = opaque; |
157 | ddd1055b | Fabien Chouteau | |
158 | ddd1055b | Fabien Chouteau | env->spr[SPR_BOOKE_TSR] |= TSR_DIS; |
159 | ddd1055b | Fabien Chouteau | booke_update_irq(env); |
160 | ddd1055b | Fabien Chouteau | |
161 | ddd1055b | Fabien Chouteau | if (env->spr[SPR_BOOKE_TCR] & TCR_ARE) {
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162 | ddd1055b | Fabien Chouteau | /* Auto Reload */
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163 | ddd1055b | Fabien Chouteau | cpu_ppc_store_decr(env, env->spr[SPR_BOOKE_DECAR]); |
164 | ddd1055b | Fabien Chouteau | } |
165 | ddd1055b | Fabien Chouteau | } |
166 | ddd1055b | Fabien Chouteau | |
167 | ddd1055b | Fabien Chouteau | static void booke_fit_cb(void *opaque) |
168 | ddd1055b | Fabien Chouteau | { |
169 | e2684c0b | Andreas Färber | CPUPPCState *env; |
170 | ddd1055b | Fabien Chouteau | ppc_tb_t *tb_env; |
171 | ddd1055b | Fabien Chouteau | booke_timer_t *booke_timer; |
172 | ddd1055b | Fabien Chouteau | |
173 | ddd1055b | Fabien Chouteau | env = opaque; |
174 | ddd1055b | Fabien Chouteau | tb_env = env->tb_env; |
175 | ddd1055b | Fabien Chouteau | booke_timer = tb_env->opaque; |
176 | ddd1055b | Fabien Chouteau | env->spr[SPR_BOOKE_TSR] |= TSR_FIS; |
177 | ddd1055b | Fabien Chouteau | |
178 | ddd1055b | Fabien Chouteau | booke_update_irq(env); |
179 | ddd1055b | Fabien Chouteau | |
180 | ddd1055b | Fabien Chouteau | booke_update_fixed_timer(env, |
181 | ddd1055b | Fabien Chouteau | booke_get_fit_target(env, tb_env), |
182 | ddd1055b | Fabien Chouteau | &booke_timer->fit_next, |
183 | ddd1055b | Fabien Chouteau | booke_timer->fit_timer); |
184 | ddd1055b | Fabien Chouteau | } |
185 | ddd1055b | Fabien Chouteau | |
186 | ddd1055b | Fabien Chouteau | static void booke_wdt_cb(void *opaque) |
187 | ddd1055b | Fabien Chouteau | { |
188 | e2684c0b | Andreas Färber | CPUPPCState *env; |
189 | ddd1055b | Fabien Chouteau | ppc_tb_t *tb_env; |
190 | ddd1055b | Fabien Chouteau | booke_timer_t *booke_timer; |
191 | ddd1055b | Fabien Chouteau | |
192 | ddd1055b | Fabien Chouteau | env = opaque; |
193 | ddd1055b | Fabien Chouteau | tb_env = env->tb_env; |
194 | ddd1055b | Fabien Chouteau | booke_timer = tb_env->opaque; |
195 | ddd1055b | Fabien Chouteau | |
196 | ddd1055b | Fabien Chouteau | /* TODO: There's lots of complicated stuff to do here */
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197 | ddd1055b | Fabien Chouteau | |
198 | ddd1055b | Fabien Chouteau | booke_update_irq(env); |
199 | ddd1055b | Fabien Chouteau | |
200 | ddd1055b | Fabien Chouteau | booke_update_fixed_timer(env, |
201 | ddd1055b | Fabien Chouteau | booke_get_wdt_target(env, tb_env), |
202 | ddd1055b | Fabien Chouteau | &booke_timer->wdt_next, |
203 | ddd1055b | Fabien Chouteau | booke_timer->wdt_timer); |
204 | ddd1055b | Fabien Chouteau | } |
205 | ddd1055b | Fabien Chouteau | |
206 | e2684c0b | Andreas Färber | void store_booke_tsr(CPUPPCState *env, target_ulong val)
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207 | ddd1055b | Fabien Chouteau | { |
208 | ddd1055b | Fabien Chouteau | env->spr[SPR_BOOKE_TSR] &= ~val; |
209 | ddd1055b | Fabien Chouteau | booke_update_irq(env); |
210 | ddd1055b | Fabien Chouteau | } |
211 | ddd1055b | Fabien Chouteau | |
212 | e2684c0b | Andreas Färber | void store_booke_tcr(CPUPPCState *env, target_ulong val)
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213 | ddd1055b | Fabien Chouteau | { |
214 | ddd1055b | Fabien Chouteau | ppc_tb_t *tb_env = env->tb_env; |
215 | ddd1055b | Fabien Chouteau | booke_timer_t *booke_timer = tb_env->opaque; |
216 | ddd1055b | Fabien Chouteau | |
217 | ddd1055b | Fabien Chouteau | tb_env = env->tb_env; |
218 | ddd1055b | Fabien Chouteau | env->spr[SPR_BOOKE_TCR] = val; |
219 | ddd1055b | Fabien Chouteau | |
220 | ddd1055b | Fabien Chouteau | booke_update_irq(env); |
221 | ddd1055b | Fabien Chouteau | |
222 | ddd1055b | Fabien Chouteau | booke_update_fixed_timer(env, |
223 | ddd1055b | Fabien Chouteau | booke_get_fit_target(env, tb_env), |
224 | ddd1055b | Fabien Chouteau | &booke_timer->fit_next, |
225 | ddd1055b | Fabien Chouteau | booke_timer->fit_timer); |
226 | ddd1055b | Fabien Chouteau | |
227 | ddd1055b | Fabien Chouteau | booke_update_fixed_timer(env, |
228 | ddd1055b | Fabien Chouteau | booke_get_wdt_target(env, tb_env), |
229 | ddd1055b | Fabien Chouteau | &booke_timer->wdt_next, |
230 | ddd1055b | Fabien Chouteau | booke_timer->wdt_timer); |
231 | ddd1055b | Fabien Chouteau | |
232 | ddd1055b | Fabien Chouteau | } |
233 | ddd1055b | Fabien Chouteau | |
234 | e2684c0b | Andreas Färber | void ppc_booke_timers_init(CPUPPCState *env, uint32_t freq, uint32_t flags)
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235 | ddd1055b | Fabien Chouteau | { |
236 | ddd1055b | Fabien Chouteau | ppc_tb_t *tb_env; |
237 | ddd1055b | Fabien Chouteau | booke_timer_t *booke_timer; |
238 | ddd1055b | Fabien Chouteau | |
239 | ddd1055b | Fabien Chouteau | tb_env = g_malloc0(sizeof(ppc_tb_t));
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240 | ddd1055b | Fabien Chouteau | booke_timer = g_malloc0(sizeof(booke_timer_t));
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241 | ddd1055b | Fabien Chouteau | |
242 | ddd1055b | Fabien Chouteau | env->tb_env = tb_env; |
243 | ddd1055b | Fabien Chouteau | tb_env->flags = flags | PPC_TIMER_BOOKE | PPC_DECR_ZERO_TRIGGERED; |
244 | ddd1055b | Fabien Chouteau | |
245 | ddd1055b | Fabien Chouteau | tb_env->tb_freq = freq; |
246 | ddd1055b | Fabien Chouteau | tb_env->decr_freq = freq; |
247 | ddd1055b | Fabien Chouteau | tb_env->opaque = booke_timer; |
248 | ddd1055b | Fabien Chouteau | tb_env->decr_timer = qemu_new_timer_ns(vm_clock, &booke_decr_cb, env); |
249 | ddd1055b | Fabien Chouteau | |
250 | ddd1055b | Fabien Chouteau | booke_timer->fit_timer = |
251 | ddd1055b | Fabien Chouteau | qemu_new_timer_ns(vm_clock, &booke_fit_cb, env); |
252 | ddd1055b | Fabien Chouteau | booke_timer->wdt_timer = |
253 | ddd1055b | Fabien Chouteau | qemu_new_timer_ns(vm_clock, &booke_wdt_cb, env); |
254 | ddd1055b | Fabien Chouteau | } |