root / hw / pflash_cfi02.c @ 9a6ee9fd
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1 | 29133e9a | bellard | /*
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2 | 29133e9a | bellard | * CFI parallel flash with AMD command set emulation
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3 | 5fafdf24 | ths | *
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4 | 29133e9a | bellard | * Copyright (c) 2005 Jocelyn Mayer
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5 | 29133e9a | bellard | *
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6 | 29133e9a | bellard | * This library is free software; you can redistribute it and/or
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7 | 29133e9a | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | 29133e9a | bellard | * License as published by the Free Software Foundation; either
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9 | 29133e9a | bellard | * version 2 of the License, or (at your option) any later version.
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10 | 29133e9a | bellard | *
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11 | 29133e9a | bellard | * This library is distributed in the hope that it will be useful,
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12 | 29133e9a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 29133e9a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | 29133e9a | bellard | * Lesser General Public License for more details.
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15 | 29133e9a | bellard | *
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16 | 29133e9a | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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18 | 29133e9a | bellard | */
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19 | 29133e9a | bellard | |
20 | 29133e9a | bellard | /*
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21 | 29133e9a | bellard | * For now, this code can emulate flashes of 1, 2 or 4 bytes width.
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22 | 29133e9a | bellard | * Supported commands/modes are:
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23 | 29133e9a | bellard | * - flash read
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24 | 29133e9a | bellard | * - flash write
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25 | 29133e9a | bellard | * - flash ID read
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26 | 29133e9a | bellard | * - sector erase
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27 | 29133e9a | bellard | * - chip erase
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28 | 29133e9a | bellard | * - unlock bypass command
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29 | 29133e9a | bellard | * - CFI queries
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30 | 29133e9a | bellard | *
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31 | 29133e9a | bellard | * It does not support flash interleaving.
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32 | 29133e9a | bellard | * It does not implement boot blocs with reduced size
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33 | 29133e9a | bellard | * It does not implement software data protection as found in many real chips
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34 | 29133e9a | bellard | * It does not implement erase suspend/resume commands
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35 | 29133e9a | bellard | * It does not implement multiple sectors erase
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36 | 29133e9a | bellard | */
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37 | 29133e9a | bellard | |
38 | 87ecb68b | pbrook | #include "hw.h" |
39 | 87ecb68b | pbrook | #include "flash.h" |
40 | 1de7afc9 | Paolo Bonzini | #include "qemu/timer.h" |
41 | 737e150e | Paolo Bonzini | #include "block/block.h" |
42 | 022c62cb | Paolo Bonzini | #include "exec/address-spaces.h" |
43 | 1de7afc9 | Paolo Bonzini | #include "qemu/host-utils.h" |
44 | 368a354f | Peter Crosthwaite | #include "sysbus.h" |
45 | 29133e9a | bellard | |
46 | 29133e9a | bellard | //#define PFLASH_DEBUG
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47 | 29133e9a | bellard | #ifdef PFLASH_DEBUG
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48 | ec9ea489 | Peter Crosthwaite | #define DPRINTF(fmt, ...) \
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49 | ec9ea489 | Peter Crosthwaite | do { \
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50 | ec9ea489 | Peter Crosthwaite | fprintf(stderr "PFLASH: " fmt , ## __VA_ARGS__); \ |
51 | 29133e9a | bellard | } while (0) |
52 | 29133e9a | bellard | #else
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53 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) do { } while (0) |
54 | 29133e9a | bellard | #endif
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55 | 29133e9a | bellard | |
56 | 661bfc80 | Jan Kiszka | #define PFLASH_LAZY_ROMD_THRESHOLD 42 |
57 | 661bfc80 | Jan Kiszka | |
58 | c227f099 | Anthony Liguori | struct pflash_t {
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59 | 368a354f | Peter Crosthwaite | SysBusDevice busdev; |
60 | 29133e9a | bellard | BlockDriverState *bs; |
61 | 71db710f | blueswir1 | uint32_t sector_len; |
62 | 368a354f | Peter Crosthwaite | uint32_t nb_blocs; |
63 | 4fbd24ba | balrog | uint32_t chip_len; |
64 | 368a354f | Peter Crosthwaite | uint8_t mappings; |
65 | 368a354f | Peter Crosthwaite | uint8_t width; |
66 | 368a354f | Peter Crosthwaite | uint8_t be; |
67 | 29133e9a | bellard | int wcycle; /* if 0, the flash is read normally */ |
68 | 29133e9a | bellard | int bypass;
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69 | 29133e9a | bellard | int ro;
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70 | 29133e9a | bellard | uint8_t cmd; |
71 | 29133e9a | bellard | uint8_t status; |
72 | 368a354f | Peter Crosthwaite | /* FIXME: implement array device properties */
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73 | 368a354f | Peter Crosthwaite | uint16_t ident0; |
74 | 368a354f | Peter Crosthwaite | uint16_t ident1; |
75 | 368a354f | Peter Crosthwaite | uint16_t ident2; |
76 | 368a354f | Peter Crosthwaite | uint16_t ident3; |
77 | 368a354f | Peter Crosthwaite | uint16_t unlock_addr0; |
78 | 368a354f | Peter Crosthwaite | uint16_t unlock_addr1; |
79 | 29133e9a | bellard | uint8_t cfi_len; |
80 | 29133e9a | bellard | uint8_t cfi_table[0x52];
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81 | 29133e9a | bellard | QEMUTimer *timer; |
82 | cfe5f011 | Avi Kivity | /* The device replicates the flash memory across its memory space. Emulate
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83 | cfe5f011 | Avi Kivity | * that by having a container (.mem) filled with an array of aliases
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84 | cfe5f011 | Avi Kivity | * (.mem_mappings) pointing to the flash memory (.orig_mem).
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85 | cfe5f011 | Avi Kivity | */
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86 | cfe5f011 | Avi Kivity | MemoryRegion mem; |
87 | cfe5f011 | Avi Kivity | MemoryRegion *mem_mappings; /* array; one per mapping */
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88 | cfe5f011 | Avi Kivity | MemoryRegion orig_mem; |
89 | 9c9bb6c8 | balrog | int rom_mode;
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90 | 661bfc80 | Jan Kiszka | int read_counter; /* used for lazy switch-back to rom mode */ |
91 | 368a354f | Peter Crosthwaite | char *name;
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92 | 29133e9a | bellard | void *storage;
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93 | 29133e9a | bellard | }; |
94 | 29133e9a | bellard | |
95 | cfe5f011 | Avi Kivity | /*
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96 | cfe5f011 | Avi Kivity | * Set up replicated mappings of the same region.
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97 | cfe5f011 | Avi Kivity | */
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98 | cfe5f011 | Avi Kivity | static void pflash_setup_mappings(pflash_t *pfl) |
99 | c8a50e59 | Avi Kivity | { |
100 | cfe5f011 | Avi Kivity | unsigned i;
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101 | a8170e5e | Avi Kivity | hwaddr size = memory_region_size(&pfl->orig_mem); |
102 | cfe5f011 | Avi Kivity | |
103 | cfe5f011 | Avi Kivity | memory_region_init(&pfl->mem, "pflash", pfl->mappings * size);
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104 | cfe5f011 | Avi Kivity | pfl->mem_mappings = g_new(MemoryRegion, pfl->mappings); |
105 | cfe5f011 | Avi Kivity | for (i = 0; i < pfl->mappings; ++i) { |
106 | cfe5f011 | Avi Kivity | memory_region_init_alias(&pfl->mem_mappings[i], "pflash-alias",
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107 | cfe5f011 | Avi Kivity | &pfl->orig_mem, 0, size);
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108 | cfe5f011 | Avi Kivity | memory_region_add_subregion(&pfl->mem, i * size, &pfl->mem_mappings[i]); |
109 | cfe5f011 | Avi Kivity | } |
110 | cfe5f011 | Avi Kivity | } |
111 | 01e0451a | Anthony Liguori | |
112 | cfe5f011 | Avi Kivity | static void pflash_register_memory(pflash_t *pfl, int rom_mode) |
113 | cfe5f011 | Avi Kivity | { |
114 | cfe5f011 | Avi Kivity | memory_region_rom_device_set_readable(&pfl->orig_mem, rom_mode); |
115 | bda254da | Jan Kiszka | pfl->rom_mode = rom_mode; |
116 | 4fbd24ba | balrog | } |
117 | 4fbd24ba | balrog | |
118 | 29133e9a | bellard | static void pflash_timer (void *opaque) |
119 | 29133e9a | bellard | { |
120 | c227f099 | Anthony Liguori | pflash_t *pfl = opaque; |
121 | 29133e9a | bellard | |
122 | 29133e9a | bellard | DPRINTF("%s: command %02x done\n", __func__, pfl->cmd);
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123 | 29133e9a | bellard | /* Reset flash */
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124 | 29133e9a | bellard | pfl->status ^= 0x80;
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125 | 29133e9a | bellard | if (pfl->bypass) {
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126 | 29133e9a | bellard | pfl->wcycle = 2;
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127 | 29133e9a | bellard | } else {
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128 | 4fbd24ba | balrog | pflash_register_memory(pfl, 1);
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129 | 29133e9a | bellard | pfl->wcycle = 0;
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130 | 29133e9a | bellard | } |
131 | 29133e9a | bellard | pfl->cmd = 0;
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132 | 29133e9a | bellard | } |
133 | 29133e9a | bellard | |
134 | a8170e5e | Avi Kivity | static uint32_t pflash_read (pflash_t *pfl, hwaddr offset,
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135 | 5f9fc5ad | Blue Swirl | int width, int be) |
136 | 29133e9a | bellard | { |
137 | a8170e5e | Avi Kivity | hwaddr boff; |
138 | 29133e9a | bellard | uint32_t ret; |
139 | 29133e9a | bellard | uint8_t *p; |
140 | 29133e9a | bellard | |
141 | f8be67ee | Blue Swirl | DPRINTF("%s: offset " TARGET_FMT_plx "\n", __func__, offset); |
142 | 29133e9a | bellard | ret = -1;
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143 | 661bfc80 | Jan Kiszka | /* Lazy reset to ROMD mode after a certain amount of read accesses */
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144 | 661bfc80 | Jan Kiszka | if (!pfl->rom_mode && pfl->wcycle == 0 && |
145 | 661bfc80 | Jan Kiszka | ++pfl->read_counter > PFLASH_LAZY_ROMD_THRESHOLD) { |
146 | 661bfc80 | Jan Kiszka | pflash_register_memory(pfl, 1);
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147 | 0f459d16 | pbrook | } |
148 | 4fbd24ba | balrog | offset &= pfl->chip_len - 1;
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149 | 29133e9a | bellard | boff = offset & 0xFF;
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150 | 29133e9a | bellard | if (pfl->width == 2) |
151 | 29133e9a | bellard | boff = boff >> 1;
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152 | 29133e9a | bellard | else if (pfl->width == 4) |
153 | 29133e9a | bellard | boff = boff >> 2;
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154 | 29133e9a | bellard | switch (pfl->cmd) {
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155 | 29133e9a | bellard | default:
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156 | 29133e9a | bellard | /* This should never happen : reset state & treat it as a read*/
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157 | 29133e9a | bellard | DPRINTF("%s: unknown command state: %x\n", __func__, pfl->cmd);
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158 | 29133e9a | bellard | pfl->wcycle = 0;
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159 | 29133e9a | bellard | pfl->cmd = 0;
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160 | 30954850 | Peter Maydell | /* fall through to the read code */
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161 | 29133e9a | bellard | case 0x80: |
162 | 29133e9a | bellard | /* We accept reads during second unlock sequence... */
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163 | 29133e9a | bellard | case 0x00: |
164 | 29133e9a | bellard | flash_read:
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165 | 29133e9a | bellard | /* Flash area read */
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166 | 29133e9a | bellard | p = pfl->storage; |
167 | 29133e9a | bellard | switch (width) {
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168 | 29133e9a | bellard | case 1: |
169 | 29133e9a | bellard | ret = p[offset]; |
170 | 29133e9a | bellard | // DPRINTF("%s: data offset %08x %02x\n", __func__, offset, ret);
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171 | 29133e9a | bellard | break;
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172 | 29133e9a | bellard | case 2: |
173 | 5f9fc5ad | Blue Swirl | if (be) {
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174 | 5f9fc5ad | Blue Swirl | ret = p[offset] << 8;
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175 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 1];
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176 | 5f9fc5ad | Blue Swirl | } else {
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177 | 5f9fc5ad | Blue Swirl | ret = p[offset]; |
178 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 1] << 8; |
179 | 5f9fc5ad | Blue Swirl | } |
180 | 29133e9a | bellard | // DPRINTF("%s: data offset %08x %04x\n", __func__, offset, ret);
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181 | 29133e9a | bellard | break;
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182 | 29133e9a | bellard | case 4: |
183 | 5f9fc5ad | Blue Swirl | if (be) {
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184 | 5f9fc5ad | Blue Swirl | ret = p[offset] << 24;
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185 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 1] << 16; |
186 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 2] << 8; |
187 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 3];
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188 | 5f9fc5ad | Blue Swirl | } else {
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189 | 5f9fc5ad | Blue Swirl | ret = p[offset]; |
190 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 1] << 8; |
191 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 2] << 16; |
192 | 5f9fc5ad | Blue Swirl | ret |= p[offset + 3] << 24; |
193 | 5f9fc5ad | Blue Swirl | } |
194 | 29133e9a | bellard | // DPRINTF("%s: data offset %08x %08x\n", __func__, offset, ret);
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195 | 29133e9a | bellard | break;
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196 | 29133e9a | bellard | } |
197 | 29133e9a | bellard | break;
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198 | 29133e9a | bellard | case 0x90: |
199 | 29133e9a | bellard | /* flash ID read */
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200 | 29133e9a | bellard | switch (boff) {
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201 | 29133e9a | bellard | case 0x00: |
202 | 29133e9a | bellard | case 0x01: |
203 | 368a354f | Peter Crosthwaite | ret = boff & 0x01 ? pfl->ident1 : pfl->ident0;
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204 | 29133e9a | bellard | break;
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205 | 29133e9a | bellard | case 0x02: |
206 | 29133e9a | bellard | ret = 0x00; /* Pretend all sectors are unprotected */ |
207 | 29133e9a | bellard | break;
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208 | 29133e9a | bellard | case 0x0E: |
209 | 29133e9a | bellard | case 0x0F: |
210 | 368a354f | Peter Crosthwaite | ret = boff & 0x01 ? pfl->ident3 : pfl->ident2;
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211 | 368a354f | Peter Crosthwaite | if (ret == (uint8_t)-1) { |
212 | 29133e9a | bellard | goto flash_read;
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213 | 368a354f | Peter Crosthwaite | } |
214 | 29133e9a | bellard | break;
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215 | 29133e9a | bellard | default:
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216 | 29133e9a | bellard | goto flash_read;
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217 | 29133e9a | bellard | } |
218 | b9055c3c | Stefan Weil | DPRINTF("%s: ID " TARGET_FMT_plx " %x\n", __func__, boff, ret); |
219 | 29133e9a | bellard | break;
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220 | 29133e9a | bellard | case 0xA0: |
221 | 29133e9a | bellard | case 0x10: |
222 | 29133e9a | bellard | case 0x30: |
223 | 29133e9a | bellard | /* Status register read */
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224 | 29133e9a | bellard | ret = pfl->status; |
225 | 29133e9a | bellard | DPRINTF("%s: status %x\n", __func__, ret);
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226 | 29133e9a | bellard | /* Toggle bit 6 */
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227 | 29133e9a | bellard | pfl->status ^= 0x40;
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228 | 29133e9a | bellard | break;
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229 | 29133e9a | bellard | case 0x98: |
230 | 29133e9a | bellard | /* CFI query mode */
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231 | 29133e9a | bellard | if (boff > pfl->cfi_len)
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232 | 29133e9a | bellard | ret = 0;
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233 | 29133e9a | bellard | else
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234 | 29133e9a | bellard | ret = pfl->cfi_table[boff]; |
235 | 29133e9a | bellard | break;
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236 | 29133e9a | bellard | } |
237 | 29133e9a | bellard | |
238 | 29133e9a | bellard | return ret;
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239 | 29133e9a | bellard | } |
240 | 29133e9a | bellard | |
241 | 29133e9a | bellard | /* update flash content on disk */
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242 | c227f099 | Anthony Liguori | static void pflash_update(pflash_t *pfl, int offset, |
243 | 29133e9a | bellard | int size)
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244 | 29133e9a | bellard | { |
245 | 29133e9a | bellard | int offset_end;
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246 | 29133e9a | bellard | if (pfl->bs) {
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247 | 29133e9a | bellard | offset_end = offset + size; |
248 | 29133e9a | bellard | /* round to sectors */
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249 | 29133e9a | bellard | offset = offset >> 9;
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250 | 29133e9a | bellard | offset_end = (offset_end + 511) >> 9; |
251 | 5fafdf24 | ths | bdrv_write(pfl->bs, offset, pfl->storage + (offset << 9),
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252 | 29133e9a | bellard | offset_end - offset); |
253 | 29133e9a | bellard | } |
254 | 29133e9a | bellard | } |
255 | 29133e9a | bellard | |
256 | a8170e5e | Avi Kivity | static void pflash_write (pflash_t *pfl, hwaddr offset, |
257 | 5f9fc5ad | Blue Swirl | uint32_t value, int width, int be) |
258 | 29133e9a | bellard | { |
259 | a8170e5e | Avi Kivity | hwaddr boff; |
260 | 29133e9a | bellard | uint8_t *p; |
261 | 29133e9a | bellard | uint8_t cmd; |
262 | 29133e9a | bellard | |
263 | 95d1f3ed | j_mayer | cmd = value; |
264 | 95d1f3ed | j_mayer | if (pfl->cmd != 0xA0 && cmd == 0xF0) { |
265 | 95d1f3ed | j_mayer | #if 0
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266 | 95d1f3ed | j_mayer | DPRINTF("%s: flash reset asked (%02x %02x)\n",
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267 | 95d1f3ed | j_mayer | __func__, pfl->cmd, cmd);
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268 | 95d1f3ed | j_mayer | #endif
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269 | 95d1f3ed | j_mayer | goto reset_flash;
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270 | 95d1f3ed | j_mayer | } |
271 | f8be67ee | Blue Swirl | DPRINTF("%s: offset " TARGET_FMT_plx " %08x %d %d\n", __func__, |
272 | 95d1f3ed | j_mayer | offset, value, width, pfl->wcycle); |
273 | 4fbd24ba | balrog | offset &= pfl->chip_len - 1;
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274 | 3b46e624 | ths | |
275 | f8be67ee | Blue Swirl | DPRINTF("%s: offset " TARGET_FMT_plx " %08x %d\n", __func__, |
276 | e96efcfc | j_mayer | offset, value, width); |
277 | 29133e9a | bellard | boff = offset & (pfl->sector_len - 1);
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278 | 29133e9a | bellard | if (pfl->width == 2) |
279 | 29133e9a | bellard | boff = boff >> 1;
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280 | 29133e9a | bellard | else if (pfl->width == 4) |
281 | 29133e9a | bellard | boff = boff >> 2;
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282 | 29133e9a | bellard | switch (pfl->wcycle) {
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283 | 29133e9a | bellard | case 0: |
284 | 9c9bb6c8 | balrog | /* Set the device in I/O access mode if required */
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285 | 9c9bb6c8 | balrog | if (pfl->rom_mode)
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286 | 9c9bb6c8 | balrog | pflash_register_memory(pfl, 0);
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287 | 661bfc80 | Jan Kiszka | pfl->read_counter = 0;
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288 | 29133e9a | bellard | /* We're in read mode */
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289 | 29133e9a | bellard | check_unlock0:
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290 | 29133e9a | bellard | if (boff == 0x55 && cmd == 0x98) { |
291 | 29133e9a | bellard | enter_CFI_mode:
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292 | 29133e9a | bellard | /* Enter CFI query mode */
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293 | 29133e9a | bellard | pfl->wcycle = 7;
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294 | 29133e9a | bellard | pfl->cmd = 0x98;
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295 | 29133e9a | bellard | return;
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296 | 29133e9a | bellard | } |
297 | 368a354f | Peter Crosthwaite | if (boff != pfl->unlock_addr0 || cmd != 0xAA) { |
298 | f8be67ee | Blue Swirl | DPRINTF("%s: unlock0 failed " TARGET_FMT_plx " %02x %04x\n", |
299 | 368a354f | Peter Crosthwaite | __func__, boff, cmd, pfl->unlock_addr0); |
300 | 29133e9a | bellard | goto reset_flash;
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301 | 29133e9a | bellard | } |
302 | 29133e9a | bellard | DPRINTF("%s: unlock sequence started\n", __func__);
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303 | 29133e9a | bellard | break;
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304 | 29133e9a | bellard | case 1: |
305 | 29133e9a | bellard | /* We started an unlock sequence */
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306 | 29133e9a | bellard | check_unlock1:
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307 | 368a354f | Peter Crosthwaite | if (boff != pfl->unlock_addr1 || cmd != 0x55) { |
308 | f8be67ee | Blue Swirl | DPRINTF("%s: unlock1 failed " TARGET_FMT_plx " %02x\n", __func__, |
309 | e96efcfc | j_mayer | boff, cmd); |
310 | 29133e9a | bellard | goto reset_flash;
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311 | 29133e9a | bellard | } |
312 | 29133e9a | bellard | DPRINTF("%s: unlock sequence done\n", __func__);
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313 | 29133e9a | bellard | break;
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314 | 29133e9a | bellard | case 2: |
315 | 29133e9a | bellard | /* We finished an unlock sequence */
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316 | 368a354f | Peter Crosthwaite | if (!pfl->bypass && boff != pfl->unlock_addr0) {
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317 | f8be67ee | Blue Swirl | DPRINTF("%s: command failed " TARGET_FMT_plx " %02x\n", __func__, |
318 | e96efcfc | j_mayer | boff, cmd); |
319 | 29133e9a | bellard | goto reset_flash;
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320 | 29133e9a | bellard | } |
321 | 29133e9a | bellard | switch (cmd) {
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322 | 29133e9a | bellard | case 0x20: |
323 | 29133e9a | bellard | pfl->bypass = 1;
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324 | 29133e9a | bellard | goto do_bypass;
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325 | 29133e9a | bellard | case 0x80: |
326 | 29133e9a | bellard | case 0x90: |
327 | 29133e9a | bellard | case 0xA0: |
328 | 29133e9a | bellard | pfl->cmd = cmd; |
329 | 29133e9a | bellard | DPRINTF("%s: starting command %02x\n", __func__, cmd);
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330 | 29133e9a | bellard | break;
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331 | 29133e9a | bellard | default:
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332 | 29133e9a | bellard | DPRINTF("%s: unknown command %02x\n", __func__, cmd);
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333 | 29133e9a | bellard | goto reset_flash;
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334 | 29133e9a | bellard | } |
335 | 29133e9a | bellard | break;
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336 | 29133e9a | bellard | case 3: |
337 | 29133e9a | bellard | switch (pfl->cmd) {
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338 | 29133e9a | bellard | case 0x80: |
339 | 29133e9a | bellard | /* We need another unlock sequence */
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340 | 29133e9a | bellard | goto check_unlock0;
|
341 | 29133e9a | bellard | case 0xA0: |
342 | f8be67ee | Blue Swirl | DPRINTF("%s: write data offset " TARGET_FMT_plx " %08x %d\n", |
343 | 29133e9a | bellard | __func__, offset, value, width); |
344 | 29133e9a | bellard | p = pfl->storage; |
345 | de8efe8f | Jordan Justen | if (!pfl->ro) {
|
346 | de8efe8f | Jordan Justen | switch (width) {
|
347 | de8efe8f | Jordan Justen | case 1: |
348 | 5f9fc5ad | Blue Swirl | p[offset] &= value; |
349 | de8efe8f | Jordan Justen | pflash_update(pfl, offset, 1);
|
350 | de8efe8f | Jordan Justen | break;
|
351 | de8efe8f | Jordan Justen | case 2: |
352 | de8efe8f | Jordan Justen | if (be) {
|
353 | de8efe8f | Jordan Justen | p[offset] &= value >> 8;
|
354 | de8efe8f | Jordan Justen | p[offset + 1] &= value;
|
355 | de8efe8f | Jordan Justen | } else {
|
356 | de8efe8f | Jordan Justen | p[offset] &= value; |
357 | de8efe8f | Jordan Justen | p[offset + 1] &= value >> 8; |
358 | de8efe8f | Jordan Justen | } |
359 | de8efe8f | Jordan Justen | pflash_update(pfl, offset, 2);
|
360 | de8efe8f | Jordan Justen | break;
|
361 | de8efe8f | Jordan Justen | case 4: |
362 | de8efe8f | Jordan Justen | if (be) {
|
363 | de8efe8f | Jordan Justen | p[offset] &= value >> 24;
|
364 | de8efe8f | Jordan Justen | p[offset + 1] &= value >> 16; |
365 | de8efe8f | Jordan Justen | p[offset + 2] &= value >> 8; |
366 | de8efe8f | Jordan Justen | p[offset + 3] &= value;
|
367 | de8efe8f | Jordan Justen | } else {
|
368 | de8efe8f | Jordan Justen | p[offset] &= value; |
369 | de8efe8f | Jordan Justen | p[offset + 1] &= value >> 8; |
370 | de8efe8f | Jordan Justen | p[offset + 2] &= value >> 16; |
371 | de8efe8f | Jordan Justen | p[offset + 3] &= value >> 24; |
372 | de8efe8f | Jordan Justen | } |
373 | de8efe8f | Jordan Justen | pflash_update(pfl, offset, 4);
|
374 | de8efe8f | Jordan Justen | break;
|
375 | 5f9fc5ad | Blue Swirl | } |
376 | 29133e9a | bellard | } |
377 | 29133e9a | bellard | pfl->status = 0x00 | ~(value & 0x80); |
378 | 29133e9a | bellard | /* Let's pretend write is immediate */
|
379 | 29133e9a | bellard | if (pfl->bypass)
|
380 | 29133e9a | bellard | goto do_bypass;
|
381 | 29133e9a | bellard | goto reset_flash;
|
382 | 29133e9a | bellard | case 0x90: |
383 | 29133e9a | bellard | if (pfl->bypass && cmd == 0x00) { |
384 | 29133e9a | bellard | /* Unlock bypass reset */
|
385 | 29133e9a | bellard | goto reset_flash;
|
386 | 29133e9a | bellard | } |
387 | 29133e9a | bellard | /* We can enter CFI query mode from autoselect mode */
|
388 | 29133e9a | bellard | if (boff == 0x55 && cmd == 0x98) |
389 | 29133e9a | bellard | goto enter_CFI_mode;
|
390 | 29133e9a | bellard | /* No break here */
|
391 | 29133e9a | bellard | default:
|
392 | 29133e9a | bellard | DPRINTF("%s: invalid write for command %02x\n",
|
393 | 29133e9a | bellard | __func__, pfl->cmd); |
394 | 29133e9a | bellard | goto reset_flash;
|
395 | 29133e9a | bellard | } |
396 | 29133e9a | bellard | case 4: |
397 | 29133e9a | bellard | switch (pfl->cmd) {
|
398 | 29133e9a | bellard | case 0xA0: |
399 | a1c7273b | Stefan Weil | /* Ignore writes while flash data write is occurring */
|
400 | 29133e9a | bellard | /* As we suppose write is immediate, this should never happen */
|
401 | 29133e9a | bellard | return;
|
402 | 29133e9a | bellard | case 0x80: |
403 | 29133e9a | bellard | goto check_unlock1;
|
404 | 29133e9a | bellard | default:
|
405 | 29133e9a | bellard | /* Should never happen */
|
406 | 29133e9a | bellard | DPRINTF("%s: invalid command state %02x (wc 4)\n",
|
407 | 29133e9a | bellard | __func__, pfl->cmd); |
408 | 29133e9a | bellard | goto reset_flash;
|
409 | 29133e9a | bellard | } |
410 | 29133e9a | bellard | break;
|
411 | 29133e9a | bellard | case 5: |
412 | 29133e9a | bellard | switch (cmd) {
|
413 | 29133e9a | bellard | case 0x10: |
414 | 368a354f | Peter Crosthwaite | if (boff != pfl->unlock_addr0) {
|
415 | f8be67ee | Blue Swirl | DPRINTF("%s: chip erase: invalid address " TARGET_FMT_plx "\n", |
416 | 29133e9a | bellard | __func__, offset); |
417 | 29133e9a | bellard | goto reset_flash;
|
418 | 29133e9a | bellard | } |
419 | 29133e9a | bellard | /* Chip erase */
|
420 | 29133e9a | bellard | DPRINTF("%s: start chip erase\n", __func__);
|
421 | de8efe8f | Jordan Justen | if (!pfl->ro) {
|
422 | de8efe8f | Jordan Justen | memset(pfl->storage, 0xFF, pfl->chip_len);
|
423 | de8efe8f | Jordan Justen | pflash_update(pfl, 0, pfl->chip_len);
|
424 | de8efe8f | Jordan Justen | } |
425 | 29133e9a | bellard | pfl->status = 0x00;
|
426 | 29133e9a | bellard | /* Let's wait 5 seconds before chip erase is done */
|
427 | 5fafdf24 | ths | qemu_mod_timer(pfl->timer, |
428 | 74475455 | Paolo Bonzini | qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() * 5));
|
429 | 29133e9a | bellard | break;
|
430 | 29133e9a | bellard | case 0x30: |
431 | 29133e9a | bellard | /* Sector erase */
|
432 | 29133e9a | bellard | p = pfl->storage; |
433 | 29133e9a | bellard | offset &= ~(pfl->sector_len - 1);
|
434 | f8be67ee | Blue Swirl | DPRINTF("%s: start sector erase at " TARGET_FMT_plx "\n", __func__, |
435 | e96efcfc | j_mayer | offset); |
436 | de8efe8f | Jordan Justen | if (!pfl->ro) {
|
437 | de8efe8f | Jordan Justen | memset(p + offset, 0xFF, pfl->sector_len);
|
438 | de8efe8f | Jordan Justen | pflash_update(pfl, offset, pfl->sector_len); |
439 | de8efe8f | Jordan Justen | } |
440 | 29133e9a | bellard | pfl->status = 0x00;
|
441 | 29133e9a | bellard | /* Let's wait 1/2 second before sector erase is done */
|
442 | 5fafdf24 | ths | qemu_mod_timer(pfl->timer, |
443 | 74475455 | Paolo Bonzini | qemu_get_clock_ns(vm_clock) + (get_ticks_per_sec() / 2));
|
444 | 29133e9a | bellard | break;
|
445 | 29133e9a | bellard | default:
|
446 | 29133e9a | bellard | DPRINTF("%s: invalid command %02x (wc 5)\n", __func__, cmd);
|
447 | 29133e9a | bellard | goto reset_flash;
|
448 | 29133e9a | bellard | } |
449 | 29133e9a | bellard | pfl->cmd = cmd; |
450 | 29133e9a | bellard | break;
|
451 | 29133e9a | bellard | case 6: |
452 | 29133e9a | bellard | switch (pfl->cmd) {
|
453 | 29133e9a | bellard | case 0x10: |
454 | 29133e9a | bellard | /* Ignore writes during chip erase */
|
455 | 29133e9a | bellard | return;
|
456 | 29133e9a | bellard | case 0x30: |
457 | 29133e9a | bellard | /* Ignore writes during sector erase */
|
458 | 29133e9a | bellard | return;
|
459 | 29133e9a | bellard | default:
|
460 | 29133e9a | bellard | /* Should never happen */
|
461 | 29133e9a | bellard | DPRINTF("%s: invalid command state %02x (wc 6)\n",
|
462 | 29133e9a | bellard | __func__, pfl->cmd); |
463 | 29133e9a | bellard | goto reset_flash;
|
464 | 29133e9a | bellard | } |
465 | 29133e9a | bellard | break;
|
466 | 29133e9a | bellard | case 7: /* Special value for CFI queries */ |
467 | 29133e9a | bellard | DPRINTF("%s: invalid write in CFI query mode\n", __func__);
|
468 | 29133e9a | bellard | goto reset_flash;
|
469 | 29133e9a | bellard | default:
|
470 | 29133e9a | bellard | /* Should never happen */
|
471 | 29133e9a | bellard | DPRINTF("%s: invalid write state (wc 7)\n", __func__);
|
472 | 29133e9a | bellard | goto reset_flash;
|
473 | 29133e9a | bellard | } |
474 | 29133e9a | bellard | pfl->wcycle++; |
475 | 29133e9a | bellard | |
476 | 29133e9a | bellard | return;
|
477 | 29133e9a | bellard | |
478 | 29133e9a | bellard | /* Reset flash */
|
479 | 29133e9a | bellard | reset_flash:
|
480 | 29133e9a | bellard | pfl->bypass = 0;
|
481 | 29133e9a | bellard | pfl->wcycle = 0;
|
482 | 29133e9a | bellard | pfl->cmd = 0;
|
483 | 29133e9a | bellard | return;
|
484 | 29133e9a | bellard | |
485 | 29133e9a | bellard | do_bypass:
|
486 | 29133e9a | bellard | pfl->wcycle = 2;
|
487 | 29133e9a | bellard | pfl->cmd = 0;
|
488 | 29133e9a | bellard | } |
489 | 29133e9a | bellard | |
490 | 29133e9a | bellard | |
491 | a8170e5e | Avi Kivity | static uint32_t pflash_readb_be(void *opaque, hwaddr addr) |
492 | 5f9fc5ad | Blue Swirl | { |
493 | 5f9fc5ad | Blue Swirl | return pflash_read(opaque, addr, 1, 1); |
494 | 5f9fc5ad | Blue Swirl | } |
495 | 5f9fc5ad | Blue Swirl | |
496 | a8170e5e | Avi Kivity | static uint32_t pflash_readb_le(void *opaque, hwaddr addr) |
497 | 5f9fc5ad | Blue Swirl | { |
498 | 5f9fc5ad | Blue Swirl | return pflash_read(opaque, addr, 1, 0); |
499 | 5f9fc5ad | Blue Swirl | } |
500 | 5f9fc5ad | Blue Swirl | |
501 | a8170e5e | Avi Kivity | static uint32_t pflash_readw_be(void *opaque, hwaddr addr) |
502 | 5f9fc5ad | Blue Swirl | { |
503 | 5f9fc5ad | Blue Swirl | pflash_t *pfl = opaque; |
504 | 5f9fc5ad | Blue Swirl | |
505 | 5f9fc5ad | Blue Swirl | return pflash_read(pfl, addr, 2, 1); |
506 | 5f9fc5ad | Blue Swirl | } |
507 | 5f9fc5ad | Blue Swirl | |
508 | a8170e5e | Avi Kivity | static uint32_t pflash_readw_le(void *opaque, hwaddr addr) |
509 | 5f9fc5ad | Blue Swirl | { |
510 | 5f9fc5ad | Blue Swirl | pflash_t *pfl = opaque; |
511 | 5f9fc5ad | Blue Swirl | |
512 | 5f9fc5ad | Blue Swirl | return pflash_read(pfl, addr, 2, 0); |
513 | 5f9fc5ad | Blue Swirl | } |
514 | 5f9fc5ad | Blue Swirl | |
515 | a8170e5e | Avi Kivity | static uint32_t pflash_readl_be(void *opaque, hwaddr addr) |
516 | 29133e9a | bellard | { |
517 | 5f9fc5ad | Blue Swirl | pflash_t *pfl = opaque; |
518 | 5f9fc5ad | Blue Swirl | |
519 | 5f9fc5ad | Blue Swirl | return pflash_read(pfl, addr, 4, 1); |
520 | 29133e9a | bellard | } |
521 | 29133e9a | bellard | |
522 | a8170e5e | Avi Kivity | static uint32_t pflash_readl_le(void *opaque, hwaddr addr) |
523 | 29133e9a | bellard | { |
524 | c227f099 | Anthony Liguori | pflash_t *pfl = opaque; |
525 | 29133e9a | bellard | |
526 | 5f9fc5ad | Blue Swirl | return pflash_read(pfl, addr, 4, 0); |
527 | 5f9fc5ad | Blue Swirl | } |
528 | 5f9fc5ad | Blue Swirl | |
529 | a8170e5e | Avi Kivity | static void pflash_writeb_be(void *opaque, hwaddr addr, |
530 | 5f9fc5ad | Blue Swirl | uint32_t value) |
531 | 5f9fc5ad | Blue Swirl | { |
532 | 5f9fc5ad | Blue Swirl | pflash_write(opaque, addr, value, 1, 1); |
533 | 29133e9a | bellard | } |
534 | 29133e9a | bellard | |
535 | a8170e5e | Avi Kivity | static void pflash_writeb_le(void *opaque, hwaddr addr, |
536 | 5f9fc5ad | Blue Swirl | uint32_t value) |
537 | 5f9fc5ad | Blue Swirl | { |
538 | 5f9fc5ad | Blue Swirl | pflash_write(opaque, addr, value, 1, 0); |
539 | 5f9fc5ad | Blue Swirl | } |
540 | 5f9fc5ad | Blue Swirl | |
541 | a8170e5e | Avi Kivity | static void pflash_writew_be(void *opaque, hwaddr addr, |
542 | 5f9fc5ad | Blue Swirl | uint32_t value) |
543 | 29133e9a | bellard | { |
544 | c227f099 | Anthony Liguori | pflash_t *pfl = opaque; |
545 | 29133e9a | bellard | |
546 | 5f9fc5ad | Blue Swirl | pflash_write(pfl, addr, value, 2, 1); |
547 | 29133e9a | bellard | } |
548 | 29133e9a | bellard | |
549 | a8170e5e | Avi Kivity | static void pflash_writew_le(void *opaque, hwaddr addr, |
550 | 5f9fc5ad | Blue Swirl | uint32_t value) |
551 | 29133e9a | bellard | { |
552 | 5f9fc5ad | Blue Swirl | pflash_t *pfl = opaque; |
553 | 5f9fc5ad | Blue Swirl | |
554 | 5f9fc5ad | Blue Swirl | pflash_write(pfl, addr, value, 2, 0); |
555 | 29133e9a | bellard | } |
556 | 29133e9a | bellard | |
557 | a8170e5e | Avi Kivity | static void pflash_writel_be(void *opaque, hwaddr addr, |
558 | 5f9fc5ad | Blue Swirl | uint32_t value) |
559 | 29133e9a | bellard | { |
560 | c227f099 | Anthony Liguori | pflash_t *pfl = opaque; |
561 | 29133e9a | bellard | |
562 | 5f9fc5ad | Blue Swirl | pflash_write(pfl, addr, value, 4, 1); |
563 | 29133e9a | bellard | } |
564 | 29133e9a | bellard | |
565 | a8170e5e | Avi Kivity | static void pflash_writel_le(void *opaque, hwaddr addr, |
566 | 5f9fc5ad | Blue Swirl | uint32_t value) |
567 | 29133e9a | bellard | { |
568 | c227f099 | Anthony Liguori | pflash_t *pfl = opaque; |
569 | 29133e9a | bellard | |
570 | 5f9fc5ad | Blue Swirl | pflash_write(pfl, addr, value, 4, 0); |
571 | 29133e9a | bellard | } |
572 | 29133e9a | bellard | |
573 | cfe5f011 | Avi Kivity | static const MemoryRegionOps pflash_cfi02_ops_be = { |
574 | cfe5f011 | Avi Kivity | .old_mmio = { |
575 | cfe5f011 | Avi Kivity | .read = { pflash_readb_be, pflash_readw_be, pflash_readl_be, }, |
576 | cfe5f011 | Avi Kivity | .write = { pflash_writeb_be, pflash_writew_be, pflash_writel_be, }, |
577 | cfe5f011 | Avi Kivity | }, |
578 | cfe5f011 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
579 | 5f9fc5ad | Blue Swirl | }; |
580 | 5f9fc5ad | Blue Swirl | |
581 | cfe5f011 | Avi Kivity | static const MemoryRegionOps pflash_cfi02_ops_le = { |
582 | cfe5f011 | Avi Kivity | .old_mmio = { |
583 | cfe5f011 | Avi Kivity | .read = { pflash_readb_le, pflash_readw_le, pflash_readl_le, }, |
584 | cfe5f011 | Avi Kivity | .write = { pflash_writeb_le, pflash_writew_le, pflash_writel_le, }, |
585 | cfe5f011 | Avi Kivity | }, |
586 | cfe5f011 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
587 | 29133e9a | bellard | }; |
588 | 29133e9a | bellard | |
589 | 368a354f | Peter Crosthwaite | static int pflash_cfi02_init(SysBusDevice *dev) |
590 | 29133e9a | bellard | { |
591 | 368a354f | Peter Crosthwaite | pflash_t *pfl = FROM_SYSBUS(typeof(*pfl), dev); |
592 | 368a354f | Peter Crosthwaite | uint32_t chip_len; |
593 | d0e7605e | Vijay Kumar | int ret;
|
594 | 29133e9a | bellard | |
595 | 368a354f | Peter Crosthwaite | chip_len = pfl->sector_len * pfl->nb_blocs; |
596 | 29133e9a | bellard | /* XXX: to be fixed */
|
597 | 95d1f3ed | j_mayer | #if 0
|
598 | 29133e9a | bellard | if (total_len != (8 * 1024 * 1024) && total_len != (16 * 1024 * 1024) &&
|
599 | 29133e9a | bellard | total_len != (32 * 1024 * 1024) && total_len != (64 * 1024 * 1024))
|
600 | 29133e9a | bellard | return NULL;
|
601 | 95d1f3ed | j_mayer | #endif
|
602 | 368a354f | Peter Crosthwaite | |
603 | 368a354f | Peter Crosthwaite | memory_region_init_rom_device(&pfl->orig_mem, pfl->be ? |
604 | 368a354f | Peter Crosthwaite | &pflash_cfi02_ops_be : &pflash_cfi02_ops_le, |
605 | 368a354f | Peter Crosthwaite | pfl, pfl->name, chip_len); |
606 | 368a354f | Peter Crosthwaite | vmstate_register_ram(&pfl->orig_mem, DEVICE(pfl)); |
607 | cfe5f011 | Avi Kivity | pfl->storage = memory_region_get_ram_ptr(&pfl->orig_mem); |
608 | 4fbd24ba | balrog | pfl->chip_len = chip_len; |
609 | 29133e9a | bellard | if (pfl->bs) {
|
610 | 29133e9a | bellard | /* read the initial flash content */
|
611 | d0e7605e | Vijay Kumar | ret = bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9); |
612 | d0e7605e | Vijay Kumar | if (ret < 0) { |
613 | 7267c094 | Anthony Liguori | g_free(pfl); |
614 | 368a354f | Peter Crosthwaite | return 1; |
615 | d0e7605e | Vijay Kumar | } |
616 | 29133e9a | bellard | } |
617 | de8efe8f | Jordan Justen | |
618 | cfe5f011 | Avi Kivity | pflash_setup_mappings(pfl); |
619 | cfe5f011 | Avi Kivity | pfl->rom_mode = 1;
|
620 | 368a354f | Peter Crosthwaite | sysbus_init_mmio(dev, &pfl->mem); |
621 | de8efe8f | Jordan Justen | |
622 | de8efe8f | Jordan Justen | if (pfl->bs) {
|
623 | de8efe8f | Jordan Justen | pfl->ro = bdrv_is_read_only(pfl->bs); |
624 | de8efe8f | Jordan Justen | } else {
|
625 | de8efe8f | Jordan Justen | pfl->ro = 0;
|
626 | de8efe8f | Jordan Justen | } |
627 | de8efe8f | Jordan Justen | |
628 | 74475455 | Paolo Bonzini | pfl->timer = qemu_new_timer_ns(vm_clock, pflash_timer, pfl); |
629 | 29133e9a | bellard | pfl->wcycle = 0;
|
630 | 29133e9a | bellard | pfl->cmd = 0;
|
631 | 29133e9a | bellard | pfl->status = 0;
|
632 | 29133e9a | bellard | /* Hardcoded CFI table (mostly from SG29 Spansion flash) */
|
633 | 29133e9a | bellard | pfl->cfi_len = 0x52;
|
634 | 29133e9a | bellard | /* Standard "QRY" string */
|
635 | 29133e9a | bellard | pfl->cfi_table[0x10] = 'Q'; |
636 | 29133e9a | bellard | pfl->cfi_table[0x11] = 'R'; |
637 | 29133e9a | bellard | pfl->cfi_table[0x12] = 'Y'; |
638 | 29133e9a | bellard | /* Command set (AMD/Fujitsu) */
|
639 | 29133e9a | bellard | pfl->cfi_table[0x13] = 0x02; |
640 | 29133e9a | bellard | pfl->cfi_table[0x14] = 0x00; |
641 | 78556820 | edgar_igl | /* Primary extended table address */
|
642 | 78556820 | edgar_igl | pfl->cfi_table[0x15] = 0x31; |
643 | 29133e9a | bellard | pfl->cfi_table[0x16] = 0x00; |
644 | 29133e9a | bellard | /* Alternate command set (none) */
|
645 | 29133e9a | bellard | pfl->cfi_table[0x17] = 0x00; |
646 | 29133e9a | bellard | pfl->cfi_table[0x18] = 0x00; |
647 | 29133e9a | bellard | /* Alternate extended table (none) */
|
648 | 29133e9a | bellard | pfl->cfi_table[0x19] = 0x00; |
649 | 29133e9a | bellard | pfl->cfi_table[0x1A] = 0x00; |
650 | 29133e9a | bellard | /* Vcc min */
|
651 | 29133e9a | bellard | pfl->cfi_table[0x1B] = 0x27; |
652 | 29133e9a | bellard | /* Vcc max */
|
653 | 29133e9a | bellard | pfl->cfi_table[0x1C] = 0x36; |
654 | 29133e9a | bellard | /* Vpp min (no Vpp pin) */
|
655 | 29133e9a | bellard | pfl->cfi_table[0x1D] = 0x00; |
656 | 29133e9a | bellard | /* Vpp max (no Vpp pin) */
|
657 | 29133e9a | bellard | pfl->cfi_table[0x1E] = 0x00; |
658 | 29133e9a | bellard | /* Reserved */
|
659 | 29133e9a | bellard | pfl->cfi_table[0x1F] = 0x07; |
660 | 78556820 | edgar_igl | /* Timeout for min size buffer write (NA) */
|
661 | 78556820 | edgar_igl | pfl->cfi_table[0x20] = 0x00; |
662 | 29133e9a | bellard | /* Typical timeout for block erase (512 ms) */
|
663 | 29133e9a | bellard | pfl->cfi_table[0x21] = 0x09; |
664 | 29133e9a | bellard | /* Typical timeout for full chip erase (4096 ms) */
|
665 | 29133e9a | bellard | pfl->cfi_table[0x22] = 0x0C; |
666 | 29133e9a | bellard | /* Reserved */
|
667 | 29133e9a | bellard | pfl->cfi_table[0x23] = 0x01; |
668 | 78556820 | edgar_igl | /* Max timeout for buffer write (NA) */
|
669 | 78556820 | edgar_igl | pfl->cfi_table[0x24] = 0x00; |
670 | 29133e9a | bellard | /* Max timeout for block erase */
|
671 | 29133e9a | bellard | pfl->cfi_table[0x25] = 0x0A; |
672 | 29133e9a | bellard | /* Max timeout for chip erase */
|
673 | 29133e9a | bellard | pfl->cfi_table[0x26] = 0x0D; |
674 | 29133e9a | bellard | /* Device size */
|
675 | 78556820 | edgar_igl | pfl->cfi_table[0x27] = ctz32(chip_len);
|
676 | 29133e9a | bellard | /* Flash device interface (8 & 16 bits) */
|
677 | 29133e9a | bellard | pfl->cfi_table[0x28] = 0x02; |
678 | 29133e9a | bellard | pfl->cfi_table[0x29] = 0x00; |
679 | 29133e9a | bellard | /* Max number of bytes in multi-bytes write */
|
680 | 95d1f3ed | j_mayer | /* XXX: disable buffered write as it's not supported */
|
681 | 95d1f3ed | j_mayer | // pfl->cfi_table[0x2A] = 0x05;
|
682 | 95d1f3ed | j_mayer | pfl->cfi_table[0x2A] = 0x00; |
683 | 29133e9a | bellard | pfl->cfi_table[0x2B] = 0x00; |
684 | 29133e9a | bellard | /* Number of erase block regions (uniform) */
|
685 | 29133e9a | bellard | pfl->cfi_table[0x2C] = 0x01; |
686 | 29133e9a | bellard | /* Erase block region 1 */
|
687 | 368a354f | Peter Crosthwaite | pfl->cfi_table[0x2D] = pfl->nb_blocs - 1; |
688 | 368a354f | Peter Crosthwaite | pfl->cfi_table[0x2E] = (pfl->nb_blocs - 1) >> 8; |
689 | 368a354f | Peter Crosthwaite | pfl->cfi_table[0x2F] = pfl->sector_len >> 8; |
690 | 368a354f | Peter Crosthwaite | pfl->cfi_table[0x30] = pfl->sector_len >> 16; |
691 | 29133e9a | bellard | |
692 | 78556820 | edgar_igl | /* Extended */
|
693 | 78556820 | edgar_igl | pfl->cfi_table[0x31] = 'P'; |
694 | 78556820 | edgar_igl | pfl->cfi_table[0x32] = 'R'; |
695 | 78556820 | edgar_igl | pfl->cfi_table[0x33] = 'I'; |
696 | 78556820 | edgar_igl | |
697 | 78556820 | edgar_igl | pfl->cfi_table[0x34] = '1'; |
698 | 78556820 | edgar_igl | pfl->cfi_table[0x35] = '0'; |
699 | 78556820 | edgar_igl | |
700 | 78556820 | edgar_igl | pfl->cfi_table[0x36] = 0x00; |
701 | 78556820 | edgar_igl | pfl->cfi_table[0x37] = 0x00; |
702 | 78556820 | edgar_igl | pfl->cfi_table[0x38] = 0x00; |
703 | 78556820 | edgar_igl | pfl->cfi_table[0x39] = 0x00; |
704 | 78556820 | edgar_igl | |
705 | 78556820 | edgar_igl | pfl->cfi_table[0x3a] = 0x00; |
706 | 78556820 | edgar_igl | |
707 | 78556820 | edgar_igl | pfl->cfi_table[0x3b] = 0x00; |
708 | 78556820 | edgar_igl | pfl->cfi_table[0x3c] = 0x00; |
709 | 78556820 | edgar_igl | |
710 | 368a354f | Peter Crosthwaite | return 0; |
711 | 368a354f | Peter Crosthwaite | } |
712 | 368a354f | Peter Crosthwaite | |
713 | 368a354f | Peter Crosthwaite | static Property pflash_cfi02_properties[] = {
|
714 | 368a354f | Peter Crosthwaite | DEFINE_PROP_DRIVE("drive", struct pflash_t, bs), |
715 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT32("num-blocks", struct pflash_t, nb_blocs, 0), |
716 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT32("sector-length", struct pflash_t, sector_len, 0), |
717 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT8("width", struct pflash_t, width, 0), |
718 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT8("mappings", struct pflash_t, mappings, 0), |
719 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT8("big-endian", struct pflash_t, be, 0), |
720 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT16("id0", struct pflash_t, ident0, 0), |
721 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT16("id1", struct pflash_t, ident1, 0), |
722 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT16("id2", struct pflash_t, ident2, 0), |
723 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT16("id3", struct pflash_t, ident3, 0), |
724 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT16("unlock-addr0", struct pflash_t, unlock_addr0, 0), |
725 | 368a354f | Peter Crosthwaite | DEFINE_PROP_UINT16("unlock-addr1", struct pflash_t, unlock_addr1, 0), |
726 | 368a354f | Peter Crosthwaite | DEFINE_PROP_STRING("name", struct pflash_t, name), |
727 | 368a354f | Peter Crosthwaite | DEFINE_PROP_END_OF_LIST(), |
728 | 368a354f | Peter Crosthwaite | }; |
729 | 368a354f | Peter Crosthwaite | |
730 | 368a354f | Peter Crosthwaite | static void pflash_cfi02_class_init(ObjectClass *klass, void *data) |
731 | 368a354f | Peter Crosthwaite | { |
732 | 368a354f | Peter Crosthwaite | DeviceClass *dc = DEVICE_CLASS(klass); |
733 | 368a354f | Peter Crosthwaite | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
734 | 368a354f | Peter Crosthwaite | |
735 | 368a354f | Peter Crosthwaite | k->init = pflash_cfi02_init; |
736 | 368a354f | Peter Crosthwaite | dc->props = pflash_cfi02_properties; |
737 | 368a354f | Peter Crosthwaite | } |
738 | 368a354f | Peter Crosthwaite | |
739 | 368a354f | Peter Crosthwaite | static const TypeInfo pflash_cfi02_info = { |
740 | 368a354f | Peter Crosthwaite | .name = "cfi.pflash02",
|
741 | 368a354f | Peter Crosthwaite | .parent = TYPE_SYS_BUS_DEVICE, |
742 | 368a354f | Peter Crosthwaite | .instance_size = sizeof(struct pflash_t), |
743 | 368a354f | Peter Crosthwaite | .class_init = pflash_cfi02_class_init, |
744 | 368a354f | Peter Crosthwaite | }; |
745 | 368a354f | Peter Crosthwaite | |
746 | 368a354f | Peter Crosthwaite | static void pflash_cfi02_register_types(void) |
747 | 368a354f | Peter Crosthwaite | { |
748 | 368a354f | Peter Crosthwaite | type_register_static(&pflash_cfi02_info); |
749 | 368a354f | Peter Crosthwaite | } |
750 | 368a354f | Peter Crosthwaite | |
751 | 368a354f | Peter Crosthwaite | type_init(pflash_cfi02_register_types) |
752 | 368a354f | Peter Crosthwaite | |
753 | 368a354f | Peter Crosthwaite | pflash_t *pflash_cfi02_register(hwaddr base, |
754 | 368a354f | Peter Crosthwaite | DeviceState *qdev, const char *name, |
755 | 368a354f | Peter Crosthwaite | hwaddr size, |
756 | 368a354f | Peter Crosthwaite | BlockDriverState *bs, uint32_t sector_len, |
757 | 368a354f | Peter Crosthwaite | int nb_blocs, int nb_mappings, int width, |
758 | 368a354f | Peter Crosthwaite | uint16_t id0, uint16_t id1, |
759 | 368a354f | Peter Crosthwaite | uint16_t id2, uint16_t id3, |
760 | 368a354f | Peter Crosthwaite | uint16_t unlock_addr0, uint16_t unlock_addr1, |
761 | 368a354f | Peter Crosthwaite | int be)
|
762 | 368a354f | Peter Crosthwaite | { |
763 | 368a354f | Peter Crosthwaite | DeviceState *dev = qdev_create(NULL, "cfi.pflash02"); |
764 | 1356b98d | Andreas Färber | SysBusDevice *busdev = SYS_BUS_DEVICE(dev); |
765 | 368a354f | Peter Crosthwaite | pflash_t *pfl = (pflash_t *)object_dynamic_cast(OBJECT(dev), |
766 | 368a354f | Peter Crosthwaite | "cfi.pflash02");
|
767 | 368a354f | Peter Crosthwaite | |
768 | 368a354f | Peter Crosthwaite | if (bs && qdev_prop_set_drive(dev, "drive", bs)) { |
769 | 368a354f | Peter Crosthwaite | abort(); |
770 | 368a354f | Peter Crosthwaite | } |
771 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint32(dev, "num-blocks", nb_blocs);
|
772 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint32(dev, "sector-length", sector_len);
|
773 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint8(dev, "width", width);
|
774 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint8(dev, "mappings", nb_mappings);
|
775 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint8(dev, "big-endian", !!be);
|
776 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint16(dev, "id0", id0);
|
777 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint16(dev, "id1", id1);
|
778 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint16(dev, "id2", id2);
|
779 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint16(dev, "id3", id3);
|
780 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint16(dev, "unlock-addr0", unlock_addr0);
|
781 | 368a354f | Peter Crosthwaite | qdev_prop_set_uint16(dev, "unlock-addr1", unlock_addr1);
|
782 | 368a354f | Peter Crosthwaite | qdev_prop_set_string(dev, "name", name);
|
783 | 368a354f | Peter Crosthwaite | qdev_init_nofail(dev); |
784 | 368a354f | Peter Crosthwaite | |
785 | 368a354f | Peter Crosthwaite | sysbus_mmio_map(busdev, 0, base);
|
786 | 29133e9a | bellard | return pfl;
|
787 | 29133e9a | bellard | } |