root / hw / spapr_pci.c @ 9a6ee9fd
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1 | 3384f95c | David Gibson | /*
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2 | 3384f95c | David Gibson | * QEMU sPAPR PCI host originated from Uninorth PCI host
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3 | 3384f95c | David Gibson | *
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4 | 3384f95c | David Gibson | * Copyright (c) 2011 Alexey Kardashevskiy, IBM Corporation.
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5 | 3384f95c | David Gibson | * Copyright (C) 2011 David Gibson, IBM Corporation.
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6 | 3384f95c | David Gibson | *
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7 | 3384f95c | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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8 | 3384f95c | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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9 | 3384f95c | David Gibson | * in the Software without restriction, including without limitation the rights
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10 | 3384f95c | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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11 | 3384f95c | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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12 | 3384f95c | David Gibson | * furnished to do so, subject to the following conditions:
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13 | 3384f95c | David Gibson | *
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14 | 3384f95c | David Gibson | * The above copyright notice and this permission notice shall be included in
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15 | 3384f95c | David Gibson | * all copies or substantial portions of the Software.
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16 | 3384f95c | David Gibson | *
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17 | 3384f95c | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 | 3384f95c | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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19 | 3384f95c | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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20 | 3384f95c | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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21 | 3384f95c | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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22 | 3384f95c | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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23 | 3384f95c | David Gibson | * THE SOFTWARE.
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24 | 3384f95c | David Gibson | */
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25 | 3384f95c | David Gibson | #include "hw.h" |
26 | a2cb15b0 | Michael S. Tsirkin | #include "pci/pci.h" |
27 | a2cb15b0 | Michael S. Tsirkin | #include "pci/msi.h" |
28 | a2cb15b0 | Michael S. Tsirkin | #include "pci/msix.h" |
29 | a2cb15b0 | Michael S. Tsirkin | #include "pci/pci_host.h" |
30 | 3384f95c | David Gibson | #include "hw/spapr.h" |
31 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
32 | 022c62cb | Paolo Bonzini | #include "exec/address-spaces.h" |
33 | 3384f95c | David Gibson | #include <libfdt.h> |
34 | a2950fb6 | Alexey Kardashevskiy | #include "trace.h" |
35 | 3384f95c | David Gibson | |
36 | 06aac7bd | Michael S. Tsirkin | #include "hw/pci/pci_bus.h" |
37 | 3384f95c | David Gibson | |
38 | 0ee2c058 | Alexey Kardashevskiy | /* Copied from the kernel arch/powerpc/platforms/pseries/msi.c */
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39 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_QUERY_FN 0 |
40 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_CHANGE_FN 1 |
41 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_RESET_FN 2 |
42 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_CHANGE_MSI_FN 3 |
43 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_CHANGE_MSIX_FN 4 |
44 | 0ee2c058 | Alexey Kardashevskiy | |
45 | 0ee2c058 | Alexey Kardashevskiy | /* Interrupt types to return on RTAS_CHANGE_* */
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46 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_TYPE_MSI 1 |
47 | 0ee2c058 | Alexey Kardashevskiy | #define RTAS_TYPE_MSIX 2 |
48 | 0ee2c058 | Alexey Kardashevskiy | |
49 | 9894c5d4 | Alexey Kardashevskiy | static sPAPRPHBState *find_phb(sPAPREnvironment *spapr, uint64_t buid)
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50 | 3384f95c | David Gibson | { |
51 | 8c9f64df | Andreas Färber | sPAPRPHBState *sphb; |
52 | 3384f95c | David Gibson | |
53 | 8c9f64df | Andreas Färber | QLIST_FOREACH(sphb, &spapr->phbs, list) { |
54 | 8c9f64df | Andreas Färber | if (sphb->buid != buid) {
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55 | 3384f95c | David Gibson | continue;
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56 | 3384f95c | David Gibson | } |
57 | 8c9f64df | Andreas Färber | return sphb;
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58 | 9894c5d4 | Alexey Kardashevskiy | } |
59 | 9894c5d4 | Alexey Kardashevskiy | |
60 | 9894c5d4 | Alexey Kardashevskiy | return NULL; |
61 | 9894c5d4 | Alexey Kardashevskiy | } |
62 | 9894c5d4 | Alexey Kardashevskiy | |
63 | 9894c5d4 | Alexey Kardashevskiy | static PCIDevice *find_dev(sPAPREnvironment *spapr, uint64_t buid,
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64 | 9894c5d4 | Alexey Kardashevskiy | uint32_t config_addr) |
65 | 9894c5d4 | Alexey Kardashevskiy | { |
66 | 8c9f64df | Andreas Färber | sPAPRPHBState *sphb = find_phb(spapr, buid); |
67 | 8558d942 | Andreas Färber | PCIHostState *phb = PCI_HOST_BRIDGE(sphb); |
68 | 8c9f64df | Andreas Färber | BusState *bus = BUS(phb->bus); |
69 | 9894c5d4 | Alexey Kardashevskiy | BusChild *kid; |
70 | 9894c5d4 | Alexey Kardashevskiy | int devfn = (config_addr >> 8) & 0xFF; |
71 | 9894c5d4 | Alexey Kardashevskiy | |
72 | 9894c5d4 | Alexey Kardashevskiy | if (!phb) {
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73 | 9894c5d4 | Alexey Kardashevskiy | return NULL; |
74 | 9894c5d4 | Alexey Kardashevskiy | } |
75 | 3384f95c | David Gibson | |
76 | 8c9f64df | Andreas Färber | QTAILQ_FOREACH(kid, &bus->children, sibling) { |
77 | 9894c5d4 | Alexey Kardashevskiy | PCIDevice *dev = (PCIDevice *)kid->child; |
78 | 9894c5d4 | Alexey Kardashevskiy | if (dev->devfn == devfn) {
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79 | 9894c5d4 | Alexey Kardashevskiy | return dev;
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80 | 3384f95c | David Gibson | } |
81 | 3384f95c | David Gibson | } |
82 | 3384f95c | David Gibson | |
83 | 3384f95c | David Gibson | return NULL; |
84 | 3384f95c | David Gibson | } |
85 | 3384f95c | David Gibson | |
86 | 3f7565c9 | Benjamin Herrenschmidt | static uint32_t rtas_pci_cfgaddr(uint32_t arg)
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87 | 3f7565c9 | Benjamin Herrenschmidt | { |
88 | 92615a5a | David Gibson | /* This handles the encoding of extended config space addresses */
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89 | 3f7565c9 | Benjamin Herrenschmidt | return ((arg >> 20) & 0xf00) | (arg & 0xff); |
90 | 3f7565c9 | Benjamin Herrenschmidt | } |
91 | 3f7565c9 | Benjamin Herrenschmidt | |
92 | 92615a5a | David Gibson | static void finish_read_pci_config(sPAPREnvironment *spapr, uint64_t buid, |
93 | 92615a5a | David Gibson | uint32_t addr, uint32_t size, |
94 | 92615a5a | David Gibson | target_ulong rets) |
95 | 88045ac5 | Alexander Graf | { |
96 | 92615a5a | David Gibson | PCIDevice *pci_dev; |
97 | 92615a5a | David Gibson | uint32_t val; |
98 | 92615a5a | David Gibson | |
99 | 92615a5a | David Gibson | if ((size != 1) && (size != 2) && (size != 4)) { |
100 | 92615a5a | David Gibson | /* access must be 1, 2 or 4 bytes */
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101 | 92615a5a | David Gibson | rtas_st(rets, 0, -1); |
102 | 92615a5a | David Gibson | return;
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103 | 88045ac5 | Alexander Graf | } |
104 | 88045ac5 | Alexander Graf | |
105 | 92615a5a | David Gibson | pci_dev = find_dev(spapr, buid, addr); |
106 | 92615a5a | David Gibson | addr = rtas_pci_cfgaddr(addr); |
107 | 92615a5a | David Gibson | |
108 | 92615a5a | David Gibson | if (!pci_dev || (addr % size) || (addr >= pci_config_size(pci_dev))) {
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109 | 92615a5a | David Gibson | /* Access must be to a valid device, within bounds and
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110 | 92615a5a | David Gibson | * naturally aligned */
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111 | 92615a5a | David Gibson | rtas_st(rets, 0, -1); |
112 | 92615a5a | David Gibson | return;
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113 | 88045ac5 | Alexander Graf | } |
114 | 92615a5a | David Gibson | |
115 | 92615a5a | David Gibson | val = pci_host_config_read_common(pci_dev, addr, |
116 | 92615a5a | David Gibson | pci_config_size(pci_dev), size); |
117 | 92615a5a | David Gibson | |
118 | 92615a5a | David Gibson | rtas_st(rets, 0, 0); |
119 | 92615a5a | David Gibson | rtas_st(rets, 1, val);
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120 | 88045ac5 | Alexander Graf | } |
121 | 88045ac5 | Alexander Graf | |
122 | 3384f95c | David Gibson | static void rtas_ibm_read_pci_config(sPAPREnvironment *spapr, |
123 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
124 | 3384f95c | David Gibson | target_ulong args, |
125 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
126 | 3384f95c | David Gibson | { |
127 | 92615a5a | David Gibson | uint64_t buid; |
128 | 92615a5a | David Gibson | uint32_t size, addr; |
129 | 3384f95c | David Gibson | |
130 | 92615a5a | David Gibson | if ((nargs != 4) || (nret != 2)) { |
131 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
132 | 3384f95c | David Gibson | return;
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133 | 3384f95c | David Gibson | } |
134 | 92615a5a | David Gibson | |
135 | 92615a5a | David Gibson | buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); |
136 | 3384f95c | David Gibson | size = rtas_ld(args, 3);
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137 | 92615a5a | David Gibson | addr = rtas_ld(args, 0);
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138 | 92615a5a | David Gibson | |
139 | 92615a5a | David Gibson | finish_read_pci_config(spapr, buid, addr, size, rets); |
140 | 3384f95c | David Gibson | } |
141 | 3384f95c | David Gibson | |
142 | 3384f95c | David Gibson | static void rtas_read_pci_config(sPAPREnvironment *spapr, |
143 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
144 | 3384f95c | David Gibson | target_ulong args, |
145 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
146 | 3384f95c | David Gibson | { |
147 | 92615a5a | David Gibson | uint32_t size, addr; |
148 | 3384f95c | David Gibson | |
149 | 92615a5a | David Gibson | if ((nargs != 2) || (nret != 2)) { |
150 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
151 | 3384f95c | David Gibson | return;
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152 | 3384f95c | David Gibson | } |
153 | 92615a5a | David Gibson | |
154 | 3384f95c | David Gibson | size = rtas_ld(args, 1);
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155 | 92615a5a | David Gibson | addr = rtas_ld(args, 0);
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156 | 92615a5a | David Gibson | |
157 | 92615a5a | David Gibson | finish_read_pci_config(spapr, 0, addr, size, rets);
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158 | 92615a5a | David Gibson | } |
159 | 92615a5a | David Gibson | |
160 | 92615a5a | David Gibson | static void finish_write_pci_config(sPAPREnvironment *spapr, uint64_t buid, |
161 | 92615a5a | David Gibson | uint32_t addr, uint32_t size, |
162 | 92615a5a | David Gibson | uint32_t val, target_ulong rets) |
163 | 92615a5a | David Gibson | { |
164 | 92615a5a | David Gibson | PCIDevice *pci_dev; |
165 | 92615a5a | David Gibson | |
166 | 92615a5a | David Gibson | if ((size != 1) && (size != 2) && (size != 4)) { |
167 | 92615a5a | David Gibson | /* access must be 1, 2 or 4 bytes */
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168 | 92615a5a | David Gibson | rtas_st(rets, 0, -1); |
169 | 92615a5a | David Gibson | return;
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170 | 92615a5a | David Gibson | } |
171 | 92615a5a | David Gibson | |
172 | 92615a5a | David Gibson | pci_dev = find_dev(spapr, buid, addr); |
173 | 92615a5a | David Gibson | addr = rtas_pci_cfgaddr(addr); |
174 | 92615a5a | David Gibson | |
175 | 92615a5a | David Gibson | if (!pci_dev || (addr % size) || (addr >= pci_config_size(pci_dev))) {
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176 | 92615a5a | David Gibson | /* Access must be to a valid device, within bounds and
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177 | 92615a5a | David Gibson | * naturally aligned */
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178 | 92615a5a | David Gibson | rtas_st(rets, 0, -1); |
179 | 92615a5a | David Gibson | return;
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180 | 92615a5a | David Gibson | } |
181 | 92615a5a | David Gibson | |
182 | 92615a5a | David Gibson | pci_host_config_write_common(pci_dev, addr, pci_config_size(pci_dev), |
183 | 92615a5a | David Gibson | val, size); |
184 | 92615a5a | David Gibson | |
185 | 3384f95c | David Gibson | rtas_st(rets, 0, 0); |
186 | 3384f95c | David Gibson | } |
187 | 3384f95c | David Gibson | |
188 | 3384f95c | David Gibson | static void rtas_ibm_write_pci_config(sPAPREnvironment *spapr, |
189 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
190 | 3384f95c | David Gibson | target_ulong args, |
191 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
192 | 3384f95c | David Gibson | { |
193 | 92615a5a | David Gibson | uint64_t buid; |
194 | 3384f95c | David Gibson | uint32_t val, size, addr; |
195 | 3384f95c | David Gibson | |
196 | 92615a5a | David Gibson | if ((nargs != 5) || (nret != 1)) { |
197 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
198 | 3384f95c | David Gibson | return;
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199 | 3384f95c | David Gibson | } |
200 | 92615a5a | David Gibson | |
201 | 92615a5a | David Gibson | buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); |
202 | 3384f95c | David Gibson | val = rtas_ld(args, 4);
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203 | 3384f95c | David Gibson | size = rtas_ld(args, 3);
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204 | 92615a5a | David Gibson | addr = rtas_ld(args, 0);
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205 | 92615a5a | David Gibson | |
206 | 92615a5a | David Gibson | finish_write_pci_config(spapr, buid, addr, size, val, rets); |
207 | 3384f95c | David Gibson | } |
208 | 3384f95c | David Gibson | |
209 | 3384f95c | David Gibson | static void rtas_write_pci_config(sPAPREnvironment *spapr, |
210 | 3384f95c | David Gibson | uint32_t token, uint32_t nargs, |
211 | 3384f95c | David Gibson | target_ulong args, |
212 | 3384f95c | David Gibson | uint32_t nret, target_ulong rets) |
213 | 3384f95c | David Gibson | { |
214 | 3384f95c | David Gibson | uint32_t val, size, addr; |
215 | 3384f95c | David Gibson | |
216 | 92615a5a | David Gibson | if ((nargs != 3) || (nret != 1)) { |
217 | 3384f95c | David Gibson | rtas_st(rets, 0, -1); |
218 | 3384f95c | David Gibson | return;
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219 | 3384f95c | David Gibson | } |
220 | 92615a5a | David Gibson | |
221 | 92615a5a | David Gibson | |
222 | 3384f95c | David Gibson | val = rtas_ld(args, 2);
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223 | 3384f95c | David Gibson | size = rtas_ld(args, 1);
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224 | 92615a5a | David Gibson | addr = rtas_ld(args, 0);
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225 | 92615a5a | David Gibson | |
226 | 92615a5a | David Gibson | finish_write_pci_config(spapr, 0, addr, size, val, rets);
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227 | 3384f95c | David Gibson | } |
228 | 3384f95c | David Gibson | |
229 | 0ee2c058 | Alexey Kardashevskiy | /*
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230 | 0ee2c058 | Alexey Kardashevskiy | * Find an entry with config_addr or returns the empty one if not found AND
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231 | 0ee2c058 | Alexey Kardashevskiy | * alloc_new is set.
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232 | 0ee2c058 | Alexey Kardashevskiy | * At the moment the msi_table entries are never released so there is
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233 | 0ee2c058 | Alexey Kardashevskiy | * no point to look till the end of the list if we need to find the free entry.
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234 | 0ee2c058 | Alexey Kardashevskiy | */
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235 | 0ee2c058 | Alexey Kardashevskiy | static int spapr_msicfg_find(sPAPRPHBState *phb, uint32_t config_addr, |
236 | 0ee2c058 | Alexey Kardashevskiy | bool alloc_new)
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237 | 0ee2c058 | Alexey Kardashevskiy | { |
238 | 0ee2c058 | Alexey Kardashevskiy | int i;
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239 | 0ee2c058 | Alexey Kardashevskiy | |
240 | 0ee2c058 | Alexey Kardashevskiy | for (i = 0; i < SPAPR_MSIX_MAX_DEVS; ++i) { |
241 | 0ee2c058 | Alexey Kardashevskiy | if (!phb->msi_table[i].nvec) {
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242 | 0ee2c058 | Alexey Kardashevskiy | break;
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243 | 0ee2c058 | Alexey Kardashevskiy | } |
244 | 0ee2c058 | Alexey Kardashevskiy | if (phb->msi_table[i].config_addr == config_addr) {
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245 | 0ee2c058 | Alexey Kardashevskiy | return i;
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246 | 0ee2c058 | Alexey Kardashevskiy | } |
247 | 0ee2c058 | Alexey Kardashevskiy | } |
248 | 0ee2c058 | Alexey Kardashevskiy | if ((i < SPAPR_MSIX_MAX_DEVS) && alloc_new) {
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249 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi("Allocating new MSI config", i, config_addr);
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250 | 0ee2c058 | Alexey Kardashevskiy | return i;
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251 | 0ee2c058 | Alexey Kardashevskiy | } |
252 | 0ee2c058 | Alexey Kardashevskiy | |
253 | 0ee2c058 | Alexey Kardashevskiy | return -1; |
254 | 0ee2c058 | Alexey Kardashevskiy | } |
255 | 0ee2c058 | Alexey Kardashevskiy | |
256 | 0ee2c058 | Alexey Kardashevskiy | /*
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257 | 0ee2c058 | Alexey Kardashevskiy | * Set MSI/MSIX message data.
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258 | 0ee2c058 | Alexey Kardashevskiy | * This is required for msi_notify()/msix_notify() which
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259 | 0ee2c058 | Alexey Kardashevskiy | * will write at the addresses via spapr_msi_write().
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260 | 0ee2c058 | Alexey Kardashevskiy | */
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261 | a8170e5e | Avi Kivity | static void spapr_msi_setmsg(PCIDevice *pdev, hwaddr addr, |
262 | 0ee2c058 | Alexey Kardashevskiy | bool msix, unsigned req_num) |
263 | 0ee2c058 | Alexey Kardashevskiy | { |
264 | 0ee2c058 | Alexey Kardashevskiy | unsigned i;
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265 | 0ee2c058 | Alexey Kardashevskiy | MSIMessage msg = { .address = addr, .data = 0 };
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266 | 0ee2c058 | Alexey Kardashevskiy | |
267 | 0ee2c058 | Alexey Kardashevskiy | if (!msix) {
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268 | 0ee2c058 | Alexey Kardashevskiy | msi_set_message(pdev, msg); |
269 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi_setup(pdev->name, 0, msg.address);
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270 | 0ee2c058 | Alexey Kardashevskiy | return;
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271 | 0ee2c058 | Alexey Kardashevskiy | } |
272 | 0ee2c058 | Alexey Kardashevskiy | |
273 | 0ee2c058 | Alexey Kardashevskiy | for (i = 0; i < req_num; ++i) { |
274 | 0ee2c058 | Alexey Kardashevskiy | msg.address = addr | (i << 2);
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275 | 0ee2c058 | Alexey Kardashevskiy | msix_set_message(pdev, i, msg); |
276 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi_setup(pdev->name, i, msg.address); |
277 | 0ee2c058 | Alexey Kardashevskiy | } |
278 | 0ee2c058 | Alexey Kardashevskiy | } |
279 | 0ee2c058 | Alexey Kardashevskiy | |
280 | 0ee2c058 | Alexey Kardashevskiy | static void rtas_ibm_change_msi(sPAPREnvironment *spapr, |
281 | 0ee2c058 | Alexey Kardashevskiy | uint32_t token, uint32_t nargs, |
282 | 0ee2c058 | Alexey Kardashevskiy | target_ulong args, uint32_t nret, |
283 | 0ee2c058 | Alexey Kardashevskiy | target_ulong rets) |
284 | 0ee2c058 | Alexey Kardashevskiy | { |
285 | 0ee2c058 | Alexey Kardashevskiy | uint32_t config_addr = rtas_ld(args, 0);
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286 | 0ee2c058 | Alexey Kardashevskiy | uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); |
287 | 0ee2c058 | Alexey Kardashevskiy | unsigned int func = rtas_ld(args, 3); |
288 | 0ee2c058 | Alexey Kardashevskiy | unsigned int req_num = rtas_ld(args, 4); /* 0 == remove all */ |
289 | 0ee2c058 | Alexey Kardashevskiy | unsigned int seq_num = rtas_ld(args, 5); |
290 | 0ee2c058 | Alexey Kardashevskiy | unsigned int ret_intr_type; |
291 | 0ee2c058 | Alexey Kardashevskiy | int ndev, irq;
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292 | 0ee2c058 | Alexey Kardashevskiy | sPAPRPHBState *phb = NULL;
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293 | 0ee2c058 | Alexey Kardashevskiy | PCIDevice *pdev = NULL;
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294 | 0ee2c058 | Alexey Kardashevskiy | |
295 | 0ee2c058 | Alexey Kardashevskiy | switch (func) {
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296 | 0ee2c058 | Alexey Kardashevskiy | case RTAS_CHANGE_MSI_FN:
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297 | 0ee2c058 | Alexey Kardashevskiy | case RTAS_CHANGE_FN:
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298 | 0ee2c058 | Alexey Kardashevskiy | ret_intr_type = RTAS_TYPE_MSI; |
299 | 0ee2c058 | Alexey Kardashevskiy | break;
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300 | 0ee2c058 | Alexey Kardashevskiy | case RTAS_CHANGE_MSIX_FN:
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301 | 0ee2c058 | Alexey Kardashevskiy | ret_intr_type = RTAS_TYPE_MSIX; |
302 | 0ee2c058 | Alexey Kardashevskiy | break;
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303 | 0ee2c058 | Alexey Kardashevskiy | default:
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304 | 0ee2c058 | Alexey Kardashevskiy | fprintf(stderr, "rtas_ibm_change_msi(%u) is not implemented\n", func);
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305 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -3); /* Parameter error */ |
306 | 0ee2c058 | Alexey Kardashevskiy | return;
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307 | 0ee2c058 | Alexey Kardashevskiy | } |
308 | 0ee2c058 | Alexey Kardashevskiy | |
309 | 0ee2c058 | Alexey Kardashevskiy | /* Fins sPAPRPHBState */
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310 | 0ee2c058 | Alexey Kardashevskiy | phb = find_phb(spapr, buid); |
311 | 0ee2c058 | Alexey Kardashevskiy | if (phb) {
|
312 | 0ee2c058 | Alexey Kardashevskiy | pdev = find_dev(spapr, buid, config_addr); |
313 | 0ee2c058 | Alexey Kardashevskiy | } |
314 | 0ee2c058 | Alexey Kardashevskiy | if (!phb || !pdev) {
|
315 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -3); /* Parameter error */ |
316 | 0ee2c058 | Alexey Kardashevskiy | return;
|
317 | 0ee2c058 | Alexey Kardashevskiy | } |
318 | 0ee2c058 | Alexey Kardashevskiy | |
319 | 0ee2c058 | Alexey Kardashevskiy | /* Releasing MSIs */
|
320 | 0ee2c058 | Alexey Kardashevskiy | if (!req_num) {
|
321 | 0ee2c058 | Alexey Kardashevskiy | ndev = spapr_msicfg_find(phb, config_addr, false);
|
322 | 0ee2c058 | Alexey Kardashevskiy | if (ndev < 0) { |
323 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr); |
324 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -1); /* Hardware error */ |
325 | 0ee2c058 | Alexey Kardashevskiy | return;
|
326 | 0ee2c058 | Alexey Kardashevskiy | } |
327 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi("Released MSIs", ndev, config_addr);
|
328 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, 0); |
329 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 1, 0); |
330 | 0ee2c058 | Alexey Kardashevskiy | return;
|
331 | 0ee2c058 | Alexey Kardashevskiy | } |
332 | 0ee2c058 | Alexey Kardashevskiy | |
333 | 0ee2c058 | Alexey Kardashevskiy | /* Enabling MSI */
|
334 | 0ee2c058 | Alexey Kardashevskiy | |
335 | 0ee2c058 | Alexey Kardashevskiy | /* Find a device number in the map to add or reuse the existing one */
|
336 | 0ee2c058 | Alexey Kardashevskiy | ndev = spapr_msicfg_find(phb, config_addr, true);
|
337 | 0ee2c058 | Alexey Kardashevskiy | if (ndev >= SPAPR_MSIX_MAX_DEVS || ndev < 0) { |
338 | 0ee2c058 | Alexey Kardashevskiy | fprintf(stderr, "No free entry for a new MSI device\n");
|
339 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -1); /* Hardware error */ |
340 | 0ee2c058 | Alexey Kardashevskiy | return;
|
341 | 0ee2c058 | Alexey Kardashevskiy | } |
342 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi("Configuring MSI", ndev, config_addr);
|
343 | 0ee2c058 | Alexey Kardashevskiy | |
344 | 0ee2c058 | Alexey Kardashevskiy | /* Check if there is an old config and MSI number has not changed */
|
345 | 0ee2c058 | Alexey Kardashevskiy | if (phb->msi_table[ndev].nvec && (req_num != phb->msi_table[ndev].nvec)) {
|
346 | 0ee2c058 | Alexey Kardashevskiy | /* Unexpected behaviour */
|
347 | 0ee2c058 | Alexey Kardashevskiy | fprintf(stderr, "Cannot reuse MSI config for device#%d", ndev);
|
348 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -1); /* Hardware error */ |
349 | 0ee2c058 | Alexey Kardashevskiy | return;
|
350 | 0ee2c058 | Alexey Kardashevskiy | } |
351 | 0ee2c058 | Alexey Kardashevskiy | |
352 | 0ee2c058 | Alexey Kardashevskiy | /* There is no cached config, allocate MSIs */
|
353 | 0ee2c058 | Alexey Kardashevskiy | if (!phb->msi_table[ndev].nvec) {
|
354 | 70c68cf6 | Alexey Kardashevskiy | irq = spapr_allocate_irq_block(req_num, false);
|
355 | 0ee2c058 | Alexey Kardashevskiy | if (irq < 0) { |
356 | 0ee2c058 | Alexey Kardashevskiy | fprintf(stderr, "Cannot allocate MSIs for device#%d", ndev);
|
357 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -1); /* Hardware error */ |
358 | 0ee2c058 | Alexey Kardashevskiy | return;
|
359 | 0ee2c058 | Alexey Kardashevskiy | } |
360 | 0ee2c058 | Alexey Kardashevskiy | phb->msi_table[ndev].irq = irq; |
361 | 0ee2c058 | Alexey Kardashevskiy | phb->msi_table[ndev].nvec = req_num; |
362 | 0ee2c058 | Alexey Kardashevskiy | phb->msi_table[ndev].config_addr = config_addr; |
363 | 0ee2c058 | Alexey Kardashevskiy | } |
364 | 0ee2c058 | Alexey Kardashevskiy | |
365 | 0ee2c058 | Alexey Kardashevskiy | /* Setup MSI/MSIX vectors in the device (via cfgspace or MSIX BAR) */
|
366 | 0ee2c058 | Alexey Kardashevskiy | spapr_msi_setmsg(pdev, phb->msi_win_addr | (ndev << 16),
|
367 | 0ee2c058 | Alexey Kardashevskiy | ret_intr_type == RTAS_TYPE_MSIX, req_num); |
368 | 0ee2c058 | Alexey Kardashevskiy | |
369 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, 0); |
370 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 1, req_num);
|
371 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 2, ++seq_num);
|
372 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 3, ret_intr_type);
|
373 | 0ee2c058 | Alexey Kardashevskiy | |
374 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_rtas_ibm_change_msi(func, req_num); |
375 | 0ee2c058 | Alexey Kardashevskiy | } |
376 | 0ee2c058 | Alexey Kardashevskiy | |
377 | 0ee2c058 | Alexey Kardashevskiy | static void rtas_ibm_query_interrupt_source_number(sPAPREnvironment *spapr, |
378 | 0ee2c058 | Alexey Kardashevskiy | uint32_t token, |
379 | 0ee2c058 | Alexey Kardashevskiy | uint32_t nargs, |
380 | 0ee2c058 | Alexey Kardashevskiy | target_ulong args, |
381 | 0ee2c058 | Alexey Kardashevskiy | uint32_t nret, |
382 | 0ee2c058 | Alexey Kardashevskiy | target_ulong rets) |
383 | 0ee2c058 | Alexey Kardashevskiy | { |
384 | 0ee2c058 | Alexey Kardashevskiy | uint32_t config_addr = rtas_ld(args, 0);
|
385 | 0ee2c058 | Alexey Kardashevskiy | uint64_t buid = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 2); |
386 | 0ee2c058 | Alexey Kardashevskiy | unsigned int intr_src_num = -1, ioa_intr_num = rtas_ld(args, 3); |
387 | 0ee2c058 | Alexey Kardashevskiy | int ndev;
|
388 | 0ee2c058 | Alexey Kardashevskiy | sPAPRPHBState *phb = NULL;
|
389 | 0ee2c058 | Alexey Kardashevskiy | |
390 | 0ee2c058 | Alexey Kardashevskiy | /* Fins sPAPRPHBState */
|
391 | 0ee2c058 | Alexey Kardashevskiy | phb = find_phb(spapr, buid); |
392 | 0ee2c058 | Alexey Kardashevskiy | if (!phb) {
|
393 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -3); /* Parameter error */ |
394 | 0ee2c058 | Alexey Kardashevskiy | return;
|
395 | 0ee2c058 | Alexey Kardashevskiy | } |
396 | 0ee2c058 | Alexey Kardashevskiy | |
397 | 0ee2c058 | Alexey Kardashevskiy | /* Find device descriptor and start IRQ */
|
398 | 0ee2c058 | Alexey Kardashevskiy | ndev = spapr_msicfg_find(phb, config_addr, false);
|
399 | 0ee2c058 | Alexey Kardashevskiy | if (ndev < 0) { |
400 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi("MSI has not been enabled", -1, config_addr); |
401 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, -1); /* Hardware error */ |
402 | 0ee2c058 | Alexey Kardashevskiy | return;
|
403 | 0ee2c058 | Alexey Kardashevskiy | } |
404 | 0ee2c058 | Alexey Kardashevskiy | |
405 | 0ee2c058 | Alexey Kardashevskiy | intr_src_num = phb->msi_table[ndev].irq + ioa_intr_num; |
406 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_rtas_ibm_query_interrupt_source_number(ioa_intr_num, |
407 | 0ee2c058 | Alexey Kardashevskiy | intr_src_num); |
408 | 0ee2c058 | Alexey Kardashevskiy | |
409 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 0, 0); |
410 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 1, intr_src_num);
|
411 | 0ee2c058 | Alexey Kardashevskiy | rtas_st(rets, 2, 1);/* 0 == level; 1 == edge */ |
412 | 0ee2c058 | Alexey Kardashevskiy | } |
413 | 0ee2c058 | Alexey Kardashevskiy | |
414 | 7fb0bd34 | David Gibson | static int pci_spapr_swizzle(int slot, int pin) |
415 | 7fb0bd34 | David Gibson | { |
416 | 7fb0bd34 | David Gibson | return (slot + pin) % PCI_NUM_PINS;
|
417 | 7fb0bd34 | David Gibson | } |
418 | 7fb0bd34 | David Gibson | |
419 | 3384f95c | David Gibson | static int pci_spapr_map_irq(PCIDevice *pci_dev, int irq_num) |
420 | 3384f95c | David Gibson | { |
421 | 3384f95c | David Gibson | /*
|
422 | 3384f95c | David Gibson | * Here we need to convert pci_dev + irq_num to some unique value
|
423 | 7fb0bd34 | David Gibson | * which is less than number of IRQs on the specific bus (4). We
|
424 | 7fb0bd34 | David Gibson | * use standard PCI swizzling, that is (slot number + pin number)
|
425 | 7fb0bd34 | David Gibson | * % 4.
|
426 | 3384f95c | David Gibson | */
|
427 | 7fb0bd34 | David Gibson | return pci_spapr_swizzle(PCI_SLOT(pci_dev->devfn), irq_num);
|
428 | 3384f95c | David Gibson | } |
429 | 3384f95c | David Gibson | |
430 | 3384f95c | David Gibson | static void pci_spapr_set_irq(void *opaque, int irq_num, int level) |
431 | 3384f95c | David Gibson | { |
432 | 3384f95c | David Gibson | /*
|
433 | 3384f95c | David Gibson | * Here we use the number returned by pci_spapr_map_irq to find a
|
434 | 3384f95c | David Gibson | * corresponding qemu_irq.
|
435 | 3384f95c | David Gibson | */
|
436 | 3384f95c | David Gibson | sPAPRPHBState *phb = opaque; |
437 | 3384f95c | David Gibson | |
438 | caae58cb | David Gibson | trace_spapr_pci_lsi_set(phb->dtbusname, irq_num, phb->lsi_table[irq_num].irq); |
439 | a307d594 | Alexey Kardashevskiy | qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level); |
440 | 3384f95c | David Gibson | } |
441 | 3384f95c | David Gibson | |
442 | a3cfa18e | David Gibson | static uint64_t spapr_io_read(void *opaque, hwaddr addr, |
443 | a3cfa18e | David Gibson | unsigned size)
|
444 | a3cfa18e | David Gibson | { |
445 | a3cfa18e | David Gibson | switch (size) {
|
446 | a3cfa18e | David Gibson | case 1: |
447 | a3cfa18e | David Gibson | return cpu_inb(addr);
|
448 | a3cfa18e | David Gibson | case 2: |
449 | a3cfa18e | David Gibson | return cpu_inw(addr);
|
450 | a3cfa18e | David Gibson | case 4: |
451 | a3cfa18e | David Gibson | return cpu_inl(addr);
|
452 | a3cfa18e | David Gibson | } |
453 | a3cfa18e | David Gibson | assert(0);
|
454 | a3cfa18e | David Gibson | } |
455 | a3cfa18e | David Gibson | |
456 | a3cfa18e | David Gibson | static void spapr_io_write(void *opaque, hwaddr addr, |
457 | a3cfa18e | David Gibson | uint64_t data, unsigned size)
|
458 | a3cfa18e | David Gibson | { |
459 | a3cfa18e | David Gibson | switch (size) {
|
460 | a3cfa18e | David Gibson | case 1: |
461 | a3cfa18e | David Gibson | cpu_outb(addr, data); |
462 | a3cfa18e | David Gibson | return;
|
463 | a3cfa18e | David Gibson | case 2: |
464 | a3cfa18e | David Gibson | cpu_outw(addr, data); |
465 | a3cfa18e | David Gibson | return;
|
466 | a3cfa18e | David Gibson | case 4: |
467 | a3cfa18e | David Gibson | cpu_outl(addr, data); |
468 | a3cfa18e | David Gibson | return;
|
469 | a3cfa18e | David Gibson | } |
470 | a3cfa18e | David Gibson | assert(0);
|
471 | a3cfa18e | David Gibson | } |
472 | a3cfa18e | David Gibson | |
473 | a3cfa18e | David Gibson | static const MemoryRegionOps spapr_io_ops = { |
474 | a3cfa18e | David Gibson | .endianness = DEVICE_LITTLE_ENDIAN, |
475 | a3cfa18e | David Gibson | .read = spapr_io_read, |
476 | a3cfa18e | David Gibson | .write = spapr_io_write |
477 | a3cfa18e | David Gibson | }; |
478 | a3cfa18e | David Gibson | |
479 | 298a9710 | David Gibson | /*
|
480 | 0ee2c058 | Alexey Kardashevskiy | * MSI/MSIX memory region implementation.
|
481 | 0ee2c058 | Alexey Kardashevskiy | * The handler handles both MSI and MSIX.
|
482 | 0ee2c058 | Alexey Kardashevskiy | * For MSI-X, the vector number is encoded as a part of the address,
|
483 | 0ee2c058 | Alexey Kardashevskiy | * data is set to 0.
|
484 | 0ee2c058 | Alexey Kardashevskiy | * For MSI, the vector number is encoded in least bits in data.
|
485 | 0ee2c058 | Alexey Kardashevskiy | */
|
486 | a8170e5e | Avi Kivity | static void spapr_msi_write(void *opaque, hwaddr addr, |
487 | 0ee2c058 | Alexey Kardashevskiy | uint64_t data, unsigned size)
|
488 | 0ee2c058 | Alexey Kardashevskiy | { |
489 | 0ee2c058 | Alexey Kardashevskiy | sPAPRPHBState *phb = opaque; |
490 | 0ee2c058 | Alexey Kardashevskiy | int ndev = addr >> 16; |
491 | 0ee2c058 | Alexey Kardashevskiy | int vec = ((addr & 0xFFFF) >> 2) | data; |
492 | 0ee2c058 | Alexey Kardashevskiy | uint32_t irq = phb->msi_table[ndev].irq + vec; |
493 | 0ee2c058 | Alexey Kardashevskiy | |
494 | 0ee2c058 | Alexey Kardashevskiy | trace_spapr_pci_msi_write(addr, data, irq); |
495 | 0ee2c058 | Alexey Kardashevskiy | |
496 | 0ee2c058 | Alexey Kardashevskiy | qemu_irq_pulse(xics_get_qirq(spapr->icp, irq)); |
497 | 0ee2c058 | Alexey Kardashevskiy | } |
498 | 0ee2c058 | Alexey Kardashevskiy | |
499 | 0ee2c058 | Alexey Kardashevskiy | static const MemoryRegionOps spapr_msi_ops = { |
500 | 0ee2c058 | Alexey Kardashevskiy | /* There is no .read as the read result is undefined by PCI spec */
|
501 | 0ee2c058 | Alexey Kardashevskiy | .read = NULL,
|
502 | 0ee2c058 | Alexey Kardashevskiy | .write = spapr_msi_write, |
503 | 0ee2c058 | Alexey Kardashevskiy | .endianness = DEVICE_LITTLE_ENDIAN |
504 | 0ee2c058 | Alexey Kardashevskiy | }; |
505 | 0ee2c058 | Alexey Kardashevskiy | |
506 | 0ee2c058 | Alexey Kardashevskiy | /*
|
507 | 298a9710 | David Gibson | * PHB PCI device
|
508 | 298a9710 | David Gibson | */
|
509 | edded454 | David Gibson | static DMAContext *spapr_pci_dma_context_fn(PCIBus *bus, void *opaque, |
510 | edded454 | David Gibson | int devfn)
|
511 | edded454 | David Gibson | { |
512 | edded454 | David Gibson | sPAPRPHBState *phb = opaque; |
513 | edded454 | David Gibson | |
514 | edded454 | David Gibson | return phb->dma;
|
515 | edded454 | David Gibson | } |
516 | edded454 | David Gibson | |
517 | 298a9710 | David Gibson | static int spapr_phb_init(SysBusDevice *s) |
518 | 3384f95c | David Gibson | { |
519 | 8c9f64df | Andreas Färber | sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s); |
520 | 8558d942 | Andreas Färber | PCIHostState *phb = PCI_HOST_BRIDGE(s); |
521 | 298a9710 | David Gibson | char *namebuf;
|
522 | 298a9710 | David Gibson | int i;
|
523 | 3384f95c | David Gibson | PCIBus *bus; |
524 | 3384f95c | David Gibson | |
525 | caae58cb | David Gibson | if (sphb->index != -1) { |
526 | caae58cb | David Gibson | hwaddr windows_base; |
527 | caae58cb | David Gibson | |
528 | caae58cb | David Gibson | if ((sphb->buid != -1) || (sphb->dma_liobn != -1) |
529 | caae58cb | David Gibson | || (sphb->mem_win_addr != -1)
|
530 | caae58cb | David Gibson | || (sphb->io_win_addr != -1)
|
531 | caae58cb | David Gibson | || (sphb->msi_win_addr != -1)) {
|
532 | caae58cb | David Gibson | fprintf(stderr, "Either \"index\" or other parameters must"
|
533 | caae58cb | David Gibson | " be specified for PAPR PHB, not both\n");
|
534 | caae58cb | David Gibson | return -1; |
535 | caae58cb | David Gibson | } |
536 | caae58cb | David Gibson | |
537 | caae58cb | David Gibson | sphb->buid = SPAPR_PCI_BASE_BUID + sphb->index; |
538 | caae58cb | David Gibson | sphb->dma_liobn = SPAPR_PCI_BASE_LIOBN + sphb->index; |
539 | caae58cb | David Gibson | |
540 | caae58cb | David Gibson | windows_base = SPAPR_PCI_WINDOW_BASE |
541 | caae58cb | David Gibson | + sphb->index * SPAPR_PCI_WINDOW_SPACING; |
542 | caae58cb | David Gibson | sphb->mem_win_addr = windows_base + SPAPR_PCI_MMIO_WIN_OFF; |
543 | caae58cb | David Gibson | sphb->io_win_addr = windows_base + SPAPR_PCI_IO_WIN_OFF; |
544 | caae58cb | David Gibson | sphb->msi_win_addr = windows_base + SPAPR_PCI_MSI_WIN_OFF; |
545 | caae58cb | David Gibson | } |
546 | caae58cb | David Gibson | |
547 | caae58cb | David Gibson | if (sphb->buid == -1) { |
548 | caae58cb | David Gibson | fprintf(stderr, "BUID not specified for PHB\n");
|
549 | caae58cb | David Gibson | return -1; |
550 | caae58cb | David Gibson | } |
551 | caae58cb | David Gibson | |
552 | caae58cb | David Gibson | if (sphb->dma_liobn == -1) { |
553 | caae58cb | David Gibson | fprintf(stderr, "LIOBN not specified for PHB\n");
|
554 | caae58cb | David Gibson | return -1; |
555 | caae58cb | David Gibson | } |
556 | caae58cb | David Gibson | |
557 | caae58cb | David Gibson | if (sphb->mem_win_addr == -1) { |
558 | caae58cb | David Gibson | fprintf(stderr, "Memory window address not specified for PHB\n");
|
559 | caae58cb | David Gibson | return -1; |
560 | caae58cb | David Gibson | } |
561 | caae58cb | David Gibson | |
562 | caae58cb | David Gibson | if (sphb->io_win_addr == -1) { |
563 | caae58cb | David Gibson | fprintf(stderr, "IO window address not specified for PHB\n");
|
564 | caae58cb | David Gibson | return -1; |
565 | caae58cb | David Gibson | } |
566 | caae58cb | David Gibson | |
567 | caae58cb | David Gibson | if (sphb->msi_win_addr == -1) { |
568 | caae58cb | David Gibson | fprintf(stderr, "MSI window address not specified for PHB\n");
|
569 | caae58cb | David Gibson | return -1; |
570 | caae58cb | David Gibson | } |
571 | caae58cb | David Gibson | |
572 | caae58cb | David Gibson | if (find_phb(spapr, sphb->buid)) {
|
573 | caae58cb | David Gibson | fprintf(stderr, "PCI host bridges must have unique BUIDs\n");
|
574 | caae58cb | David Gibson | return -1; |
575 | caae58cb | David Gibson | } |
576 | caae58cb | David Gibson | |
577 | 8c9f64df | Andreas Färber | sphb->dtbusname = g_strdup_printf("pci@%" PRIx64, sphb->buid);
|
578 | caae58cb | David Gibson | if (!sphb->busname) {
|
579 | caae58cb | David Gibson | sphb->busname = sphb->dtbusname; |
580 | caae58cb | David Gibson | } |
581 | caae58cb | David Gibson | |
582 | 8c9f64df | Andreas Färber | namebuf = alloca(strlen(sphb->dtbusname) + 32);
|
583 | 3384f95c | David Gibson | |
584 | 298a9710 | David Gibson | /* Initialize memory regions */
|
585 | 8c9f64df | Andreas Färber | sprintf(namebuf, "%s.mmio", sphb->dtbusname);
|
586 | 8c9f64df | Andreas Färber | memory_region_init(&sphb->memspace, namebuf, INT64_MAX); |
587 | 3384f95c | David Gibson | |
588 | 8c9f64df | Andreas Färber | sprintf(namebuf, "%s.mmio-alias", sphb->dtbusname);
|
589 | 8c9f64df | Andreas Färber | memory_region_init_alias(&sphb->memwindow, namebuf, &sphb->memspace, |
590 | 8c9f64df | Andreas Färber | SPAPR_PCI_MEM_WIN_BUS_OFFSET, sphb->mem_win_size); |
591 | 8c9f64df | Andreas Färber | memory_region_add_subregion(get_system_memory(), sphb->mem_win_addr, |
592 | 8c9f64df | Andreas Färber | &sphb->memwindow); |
593 | 3384f95c | David Gibson | |
594 | 3384f95c | David Gibson | /* On ppc, we only have MMIO no specific IO space from the CPU
|
595 | 3384f95c | David Gibson | * perspective. In theory we ought to be able to embed the PCI IO
|
596 | 3384f95c | David Gibson | * memory region direction in the system memory space. However,
|
597 | 3384f95c | David Gibson | * if any of the IO BAR subregions use the old_portio mechanism,
|
598 | 3384f95c | David Gibson | * that won't be processed properly unless accessed from the
|
599 | 3384f95c | David Gibson | * system io address space. This hack to bounce things via
|
600 | 3384f95c | David Gibson | * system_io works around the problem until all the users of
|
601 | 3384f95c | David Gibson | * old_portion are updated */
|
602 | 8c9f64df | Andreas Färber | sprintf(namebuf, "%s.io", sphb->dtbusname);
|
603 | 8c9f64df | Andreas Färber | memory_region_init(&sphb->iospace, namebuf, SPAPR_PCI_IO_WIN_SIZE); |
604 | a3cfa18e | David Gibson | /* FIXME: fix to support multiple PHBs */
|
605 | a3cfa18e | David Gibson | memory_region_add_subregion(get_system_io(), 0, &sphb->iospace);
|
606 | 3384f95c | David Gibson | |
607 | a3cfa18e | David Gibson | sprintf(namebuf, "%s.io-alias", sphb->dtbusname);
|
608 | a3cfa18e | David Gibson | memory_region_init_io(&sphb->iowindow, &spapr_io_ops, sphb, |
609 | a3cfa18e | David Gibson | namebuf, SPAPR_PCI_IO_WIN_SIZE); |
610 | 8c9f64df | Andreas Färber | memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, |
611 | a3cfa18e | David Gibson | &sphb->iowindow); |
612 | 3384f95c | David Gibson | |
613 | 0ee2c058 | Alexey Kardashevskiy | /* As MSI/MSIX interrupts trigger by writing at MSI/MSIX vectors,
|
614 | 0ee2c058 | Alexey Kardashevskiy | * we need to allocate some memory to catch those writes coming
|
615 | 0ee2c058 | Alexey Kardashevskiy | * from msi_notify()/msix_notify() */
|
616 | 0ee2c058 | Alexey Kardashevskiy | if (msi_supported) {
|
617 | 8c9f64df | Andreas Färber | sprintf(namebuf, "%s.msi", sphb->dtbusname);
|
618 | 8c9f64df | Andreas Färber | memory_region_init_io(&sphb->msiwindow, &spapr_msi_ops, sphb, |
619 | 0ee2c058 | Alexey Kardashevskiy | namebuf, SPAPR_MSIX_MAX_DEVS * 0x10000);
|
620 | 8c9f64df | Andreas Färber | memory_region_add_subregion(get_system_memory(), sphb->msi_win_addr, |
621 | 8c9f64df | Andreas Färber | &sphb->msiwindow); |
622 | 0ee2c058 | Alexey Kardashevskiy | } |
623 | 0ee2c058 | Alexey Kardashevskiy | |
624 | caae58cb | David Gibson | bus = pci_register_bus(DEVICE(s), sphb->busname, |
625 | 8c9f64df | Andreas Färber | pci_spapr_set_irq, pci_spapr_map_irq, sphb, |
626 | 8c9f64df | Andreas Färber | &sphb->memspace, &sphb->iospace, |
627 | 7fb0bd34 | David Gibson | PCI_DEVFN(0, 0), PCI_NUM_PINS); |
628 | 8c9f64df | Andreas Färber | phb->bus = bus; |
629 | 298a9710 | David Gibson | |
630 | 8c9f64df | Andreas Färber | sphb->dma_window_start = 0;
|
631 | 8c9f64df | Andreas Färber | sphb->dma_window_size = 0x40000000;
|
632 | 8c9f64df | Andreas Färber | sphb->dma = spapr_tce_new_dma_context(sphb->dma_liobn, sphb->dma_window_size); |
633 | caae58cb | David Gibson | if (!sphb->dma) {
|
634 | caae58cb | David Gibson | fprintf(stderr, "Unable to create TCE table for %s\n", sphb->dtbusname);
|
635 | caae58cb | David Gibson | return -1; |
636 | caae58cb | David Gibson | } |
637 | 8c9f64df | Andreas Färber | pci_setup_iommu(bus, spapr_pci_dma_context_fn, sphb); |
638 | edded454 | David Gibson | |
639 | 8c9f64df | Andreas Färber | QLIST_INSERT_HEAD(&spapr->phbs, sphb, list); |
640 | 298a9710 | David Gibson | |
641 | 298a9710 | David Gibson | /* Initialize the LSI table */
|
642 | 7fb0bd34 | David Gibson | for (i = 0; i < PCI_NUM_PINS; i++) { |
643 | a307d594 | Alexey Kardashevskiy | uint32_t irq; |
644 | 298a9710 | David Gibson | |
645 | a307d594 | Alexey Kardashevskiy | irq = spapr_allocate_lsi(0);
|
646 | a307d594 | Alexey Kardashevskiy | if (!irq) {
|
647 | 298a9710 | David Gibson | return -1; |
648 | 298a9710 | David Gibson | } |
649 | 298a9710 | David Gibson | |
650 | 8c9f64df | Andreas Färber | sphb->lsi_table[i].irq = irq; |
651 | 298a9710 | David Gibson | } |
652 | 298a9710 | David Gibson | |
653 | 298a9710 | David Gibson | return 0; |
654 | 298a9710 | David Gibson | } |
655 | 298a9710 | David Gibson | |
656 | eddeed26 | David Gibson | static void spapr_phb_reset(DeviceState *qdev) |
657 | eddeed26 | David Gibson | { |
658 | 1356b98d | Andreas Färber | SysBusDevice *s = SYS_BUS_DEVICE(qdev); |
659 | eddeed26 | David Gibson | sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s); |
660 | eddeed26 | David Gibson | |
661 | eddeed26 | David Gibson | /* Reset the IOMMU state */
|
662 | eddeed26 | David Gibson | spapr_tce_reset(sphb->dma); |
663 | eddeed26 | David Gibson | } |
664 | eddeed26 | David Gibson | |
665 | 298a9710 | David Gibson | static Property spapr_phb_properties[] = {
|
666 | 298a9710 | David Gibson | DEFINE_PROP_STRING("busname", sPAPRPHBState, busname),
|
667 | caae58cb | David Gibson | DEFINE_PROP_INT32("index", sPAPRPHBState, index, -1), |
668 | caae58cb | David Gibson | DEFINE_PROP_HEX64("buid", sPAPRPHBState, buid, -1), |
669 | caae58cb | David Gibson | DEFINE_PROP_HEX32("liobn", sPAPRPHBState, dma_liobn, -1), |
670 | caae58cb | David Gibson | DEFINE_PROP_HEX64("mem_win_addr", sPAPRPHBState, mem_win_addr, -1), |
671 | caae58cb | David Gibson | DEFINE_PROP_HEX64("mem_win_size", sPAPRPHBState, mem_win_size,
|
672 | caae58cb | David Gibson | SPAPR_PCI_MMIO_WIN_SIZE), |
673 | caae58cb | David Gibson | DEFINE_PROP_HEX64("io_win_addr", sPAPRPHBState, io_win_addr, -1), |
674 | caae58cb | David Gibson | DEFINE_PROP_HEX64("io_win_size", sPAPRPHBState, io_win_size,
|
675 | caae58cb | David Gibson | SPAPR_PCI_IO_WIN_SIZE), |
676 | caae58cb | David Gibson | DEFINE_PROP_HEX64("msi_win_addr", sPAPRPHBState, msi_win_addr, -1), |
677 | 298a9710 | David Gibson | DEFINE_PROP_END_OF_LIST(), |
678 | 298a9710 | David Gibson | }; |
679 | 298a9710 | David Gibson | |
680 | 298a9710 | David Gibson | static void spapr_phb_class_init(ObjectClass *klass, void *data) |
681 | 298a9710 | David Gibson | { |
682 | 298a9710 | David Gibson | SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass); |
683 | 298a9710 | David Gibson | DeviceClass *dc = DEVICE_CLASS(klass); |
684 | 298a9710 | David Gibson | |
685 | 298a9710 | David Gibson | sdc->init = spapr_phb_init; |
686 | 298a9710 | David Gibson | dc->props = spapr_phb_properties; |
687 | eddeed26 | David Gibson | dc->reset = spapr_phb_reset; |
688 | 298a9710 | David Gibson | } |
689 | 3384f95c | David Gibson | |
690 | 4240abff | Andreas Färber | static const TypeInfo spapr_phb_info = { |
691 | 8c9f64df | Andreas Färber | .name = TYPE_SPAPR_PCI_HOST_BRIDGE, |
692 | 8558d942 | Andreas Färber | .parent = TYPE_PCI_HOST_BRIDGE, |
693 | 298a9710 | David Gibson | .instance_size = sizeof(sPAPRPHBState),
|
694 | 298a9710 | David Gibson | .class_init = spapr_phb_class_init, |
695 | 298a9710 | David Gibson | }; |
696 | 298a9710 | David Gibson | |
697 | caae58cb | David Gibson | PCIHostState *spapr_create_phb(sPAPREnvironment *spapr, int index,
|
698 | caae58cb | David Gibson | const char *busname) |
699 | 298a9710 | David Gibson | { |
700 | 298a9710 | David Gibson | DeviceState *dev; |
701 | 298a9710 | David Gibson | |
702 | 8c9f64df | Andreas Färber | dev = qdev_create(NULL, TYPE_SPAPR_PCI_HOST_BRIDGE);
|
703 | caae58cb | David Gibson | qdev_prop_set_uint32(dev, "index", index);
|
704 | caae58cb | David Gibson | qdev_prop_set_string(dev, "busname", busname);
|
705 | 298a9710 | David Gibson | qdev_init_nofail(dev); |
706 | caae58cb | David Gibson | |
707 | caae58cb | David Gibson | return PCI_HOST_BRIDGE(dev);
|
708 | 3384f95c | David Gibson | } |
709 | 3384f95c | David Gibson | |
710 | 3384f95c | David Gibson | /* Macros to operate with address in OF binding to PCI */
|
711 | 3384f95c | David Gibson | #define b_x(x, p, l) (((x) & ((1<<(l))-1)) << (p)) |
712 | 3384f95c | David Gibson | #define b_n(x) b_x((x), 31, 1) /* 0 if relocatable */ |
713 | 3384f95c | David Gibson | #define b_p(x) b_x((x), 30, 1) /* 1 if prefetchable */ |
714 | 3384f95c | David Gibson | #define b_t(x) b_x((x), 29, 1) /* 1 if the address is aliased */ |
715 | 3384f95c | David Gibson | #define b_ss(x) b_x((x), 24, 2) /* the space code */ |
716 | 3384f95c | David Gibson | #define b_bbbbbbbb(x) b_x((x), 16, 8) /* bus number */ |
717 | 3384f95c | David Gibson | #define b_ddddd(x) b_x((x), 11, 5) /* device number */ |
718 | 3384f95c | David Gibson | #define b_fff(x) b_x((x), 8, 3) /* function number */ |
719 | 3384f95c | David Gibson | #define b_rrrrrrrr(x) b_x((x), 0, 8) /* register number */ |
720 | 3384f95c | David Gibson | |
721 | e0fdbd7c | Alexey Kardashevskiy | int spapr_populate_pci_dt(sPAPRPHBState *phb,
|
722 | e0fdbd7c | Alexey Kardashevskiy | uint32_t xics_phandle, |
723 | e0fdbd7c | Alexey Kardashevskiy | void *fdt)
|
724 | 3384f95c | David Gibson | { |
725 | 7fb0bd34 | David Gibson | int bus_off, i, j;
|
726 | 3384f95c | David Gibson | char nodename[256]; |
727 | 3384f95c | David Gibson | uint32_t bus_range[] = { cpu_to_be32(0), cpu_to_be32(0xff) }; |
728 | 3384f95c | David Gibson | struct {
|
729 | 3384f95c | David Gibson | uint32_t hi; |
730 | 3384f95c | David Gibson | uint64_t child; |
731 | 3384f95c | David Gibson | uint64_t parent; |
732 | 3384f95c | David Gibson | uint64_t size; |
733 | c4889f54 | Alexey Kardashevskiy | } QEMU_PACKED ranges[] = { |
734 | 3384f95c | David Gibson | { |
735 | 3384f95c | David Gibson | cpu_to_be32(b_ss(1)), cpu_to_be64(0), |
736 | 3384f95c | David Gibson | cpu_to_be64(phb->io_win_addr), |
737 | 3384f95c | David Gibson | cpu_to_be64(memory_region_size(&phb->iospace)), |
738 | 3384f95c | David Gibson | }, |
739 | 3384f95c | David Gibson | { |
740 | 3384f95c | David Gibson | cpu_to_be32(b_ss(2)), cpu_to_be64(SPAPR_PCI_MEM_WIN_BUS_OFFSET),
|
741 | 3384f95c | David Gibson | cpu_to_be64(phb->mem_win_addr), |
742 | 3384f95c | David Gibson | cpu_to_be64(memory_region_size(&phb->memwindow)), |
743 | 3384f95c | David Gibson | }, |
744 | 3384f95c | David Gibson | }; |
745 | 3384f95c | David Gibson | uint64_t bus_reg[] = { cpu_to_be64(phb->buid), 0 };
|
746 | 3384f95c | David Gibson | uint32_t interrupt_map_mask[] = { |
747 | 7fb0bd34 | David Gibson | cpu_to_be32(b_ddddd(-1)|b_fff(0)), 0x0, 0x0, cpu_to_be32(-1)}; |
748 | 7fb0bd34 | David Gibson | uint32_t interrupt_map[PCI_SLOT_MAX * PCI_NUM_PINS][7];
|
749 | 3384f95c | David Gibson | |
750 | 3384f95c | David Gibson | /* Start populating the FDT */
|
751 | 3384f95c | David Gibson | sprintf(nodename, "pci@%" PRIx64, phb->buid);
|
752 | 3384f95c | David Gibson | bus_off = fdt_add_subnode(fdt, 0, nodename);
|
753 | 3384f95c | David Gibson | if (bus_off < 0) { |
754 | 3384f95c | David Gibson | return bus_off;
|
755 | 3384f95c | David Gibson | } |
756 | 3384f95c | David Gibson | |
757 | 3384f95c | David Gibson | #define _FDT(exp) \
|
758 | 3384f95c | David Gibson | do { \
|
759 | 3384f95c | David Gibson | int ret = (exp); \
|
760 | 3384f95c | David Gibson | if (ret < 0) { \ |
761 | 3384f95c | David Gibson | return ret; \
|
762 | 3384f95c | David Gibson | } \ |
763 | 3384f95c | David Gibson | } while (0) |
764 | 3384f95c | David Gibson | |
765 | 3384f95c | David Gibson | /* Write PHB properties */
|
766 | 3384f95c | David Gibson | _FDT(fdt_setprop_string(fdt, bus_off, "device_type", "pci")); |
767 | 3384f95c | David Gibson | _FDT(fdt_setprop_string(fdt, bus_off, "compatible", "IBM,Logical_PHB")); |
768 | 3384f95c | David Gibson | _FDT(fdt_setprop_cell(fdt, bus_off, "#address-cells", 0x3)); |
769 | 3384f95c | David Gibson | _FDT(fdt_setprop_cell(fdt, bus_off, "#size-cells", 0x2)); |
770 | 3384f95c | David Gibson | _FDT(fdt_setprop_cell(fdt, bus_off, "#interrupt-cells", 0x1)); |
771 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "used-by-rtas", NULL, 0)); |
772 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "bus-range", &bus_range, sizeof(bus_range))); |
773 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof(ranges))); |
774 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg))); |
775 | 3f7565c9 | Benjamin Herrenschmidt | _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1)); |
776 | 3384f95c | David Gibson | |
777 | 4d8d5467 | Benjamin Herrenschmidt | /* Build the interrupt-map, this must matches what is done
|
778 | 4d8d5467 | Benjamin Herrenschmidt | * in pci_spapr_map_irq
|
779 | 4d8d5467 | Benjamin Herrenschmidt | */
|
780 | 4d8d5467 | Benjamin Herrenschmidt | _FDT(fdt_setprop(fdt, bus_off, "interrupt-map-mask",
|
781 | 4d8d5467 | Benjamin Herrenschmidt | &interrupt_map_mask, sizeof(interrupt_map_mask)));
|
782 | 7fb0bd34 | David Gibson | for (i = 0; i < PCI_SLOT_MAX; i++) { |
783 | 7fb0bd34 | David Gibson | for (j = 0; j < PCI_NUM_PINS; j++) { |
784 | 7fb0bd34 | David Gibson | uint32_t *irqmap = interrupt_map[i*PCI_NUM_PINS + j]; |
785 | 7fb0bd34 | David Gibson | int lsi_num = pci_spapr_swizzle(i, j);
|
786 | 7fb0bd34 | David Gibson | |
787 | 7fb0bd34 | David Gibson | irqmap[0] = cpu_to_be32(b_ddddd(i)|b_fff(0)); |
788 | 7fb0bd34 | David Gibson | irqmap[1] = 0; |
789 | 7fb0bd34 | David Gibson | irqmap[2] = 0; |
790 | 7fb0bd34 | David Gibson | irqmap[3] = cpu_to_be32(j+1); |
791 | 7fb0bd34 | David Gibson | irqmap[4] = cpu_to_be32(xics_phandle);
|
792 | a307d594 | Alexey Kardashevskiy | irqmap[5] = cpu_to_be32(phb->lsi_table[lsi_num].irq);
|
793 | 7fb0bd34 | David Gibson | irqmap[6] = cpu_to_be32(0x8); |
794 | 7fb0bd34 | David Gibson | } |
795 | 3384f95c | David Gibson | } |
796 | 3384f95c | David Gibson | /* Write interrupt map */
|
797 | 3384f95c | David Gibson | _FDT(fdt_setprop(fdt, bus_off, "interrupt-map", &interrupt_map,
|
798 | 7fb0bd34 | David Gibson | sizeof(interrupt_map)));
|
799 | 3384f95c | David Gibson | |
800 | 5c4cbcf2 | Alexey Kardashevskiy | spapr_dma_dt(fdt, bus_off, "ibm,dma-window",
|
801 | 5c4cbcf2 | Alexey Kardashevskiy | phb->dma_liobn, phb->dma_window_start, |
802 | 5c4cbcf2 | Alexey Kardashevskiy | phb->dma_window_size); |
803 | edded454 | David Gibson | |
804 | 3384f95c | David Gibson | return 0; |
805 | 3384f95c | David Gibson | } |
806 | 298a9710 | David Gibson | |
807 | fa28f71b | Alexey Kardashevskiy | void spapr_pci_rtas_init(void) |
808 | fa28f71b | Alexey Kardashevskiy | { |
809 | fa28f71b | Alexey Kardashevskiy | spapr_rtas_register("read-pci-config", rtas_read_pci_config);
|
810 | fa28f71b | Alexey Kardashevskiy | spapr_rtas_register("write-pci-config", rtas_write_pci_config);
|
811 | fa28f71b | Alexey Kardashevskiy | spapr_rtas_register("ibm,read-pci-config", rtas_ibm_read_pci_config);
|
812 | fa28f71b | Alexey Kardashevskiy | spapr_rtas_register("ibm,write-pci-config", rtas_ibm_write_pci_config);
|
813 | 0ee2c058 | Alexey Kardashevskiy | if (msi_supported) {
|
814 | 0ee2c058 | Alexey Kardashevskiy | spapr_rtas_register("ibm,query-interrupt-source-number",
|
815 | 0ee2c058 | Alexey Kardashevskiy | rtas_ibm_query_interrupt_source_number); |
816 | 0ee2c058 | Alexey Kardashevskiy | spapr_rtas_register("ibm,change-msi", rtas_ibm_change_msi);
|
817 | 0ee2c058 | Alexey Kardashevskiy | } |
818 | fa28f71b | Alexey Kardashevskiy | } |
819 | fa28f71b | Alexey Kardashevskiy | |
820 | 8c9f64df | Andreas Färber | static void spapr_pci_register_types(void) |
821 | 298a9710 | David Gibson | { |
822 | 298a9710 | David Gibson | type_register_static(&spapr_phb_info); |
823 | 298a9710 | David Gibson | } |
824 | 8c9f64df | Andreas Färber | |
825 | 8c9f64df | Andreas Färber | type_init(spapr_pci_register_types) |