Revision 9aa5b158 target-ppc/mmu_helper.c

b/target-ppc/mmu_helper.c
347 347
    ppc6xx_tlb_invalidate_virt2(env, eaddr, is_code, 0);
348 348
}
349 349

  
350
void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way, int is_code,
351
                      target_ulong pte0, target_ulong pte1)
350
static void ppc6xx_tlb_store(CPUPPCState *env, target_ulong EPN, int way,
351
                             int is_code, target_ulong pte0, target_ulong pte1)
352 352
{
353 353
    ppc6xx_tlb_t *tlb;
354 354
    int nr;
......
712 712
    return NULL;
713 713
}
714 714

  
715
void ppc_slb_invalidate_all(CPUPPCState *env)
715
/*****************************************************************************/
716
/* SPR accesses */
717

  
718
void helper_slbia(CPUPPCState *env)
716 719
{
717 720
    int n, do_invalidate;
718 721

  
......
735 738
    }
736 739
}
737 740

  
738
void ppc_slb_invalidate_one(CPUPPCState *env, uint64_t T0)
741
void helper_slbie(CPUPPCState *env, target_ulong addr)
739 742
{
740 743
    ppc_slb_t *slb;
741 744

  
742
    slb = slb_lookup(env, T0);
745
    slb = slb_lookup(env, addr);
743 746
    if (!slb) {
744 747
        return;
745 748
    }
......
781 784
    return 0;
782 785
}
783 786

  
784
int ppc_load_slb_esid(CPUPPCState *env, target_ulong rb, target_ulong *rt)
787
static int ppc_load_slb_esid(CPUPPCState *env, target_ulong rb,
788
                             target_ulong *rt)
785 789
{
786 790
    int slot = rb & 0xfff;
787 791
    ppc_slb_t *slb = &env->slb[slot];
......
794 798
    return 0;
795 799
}
796 800

  
797
int ppc_load_slb_vsid(CPUPPCState *env, target_ulong rb, target_ulong *rt)
801
static int ppc_load_slb_vsid(CPUPPCState *env, target_ulong rb,
802
                             target_ulong *rt)
798 803
{
799 804
    int slot = rb & 0xfff;
800 805
    ppc_slb_t *slb = &env->slb[slot];
......
1003 1008
}
1004 1009

  
1005 1010
/* Generic TLB check function for embedded PowerPC implementations */
1006
int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
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                     target_phys_addr_t *raddrp,
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                     target_ulong address, uint32_t pid, int ext,
1009
                     int i)
1011
static int ppcemb_tlb_check(CPUPPCState *env, ppcemb_tlb_t *tlb,
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                            target_phys_addr_t *raddrp,
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                            target_ulong address, uint32_t pid, int ext,
1014
                            int i)
1010 1015
{
1011 1016
    target_ulong mask;
1012 1017

  
......
1038 1043
}
1039 1044

  
1040 1045
/* Generic TLB search function for PowerPC embedded implementations */
1041
int ppcemb_tlb_search(CPUPPCState *env, target_ulong address, uint32_t pid)
1046
static int ppcemb_tlb_search(CPUPPCState *env, target_ulong address,
1047
                             uint32_t pid)
1042 1048
{
1043 1049
    ppcemb_tlb_t *tlb;
1044 1050
    target_phys_addr_t raddr;
......
2144 2150
             nr, ul == 0 ? 'u' : 'l', value, env->nip);
2145 2151
}
2146 2152

  
2147
void ppc_store_ibatu(CPUPPCState *env, int nr, target_ulong value)
2153
void helper_store_ibatu(CPUPPCState *env, uint32_t nr, target_ulong value)
2148 2154
{
2149 2155
    target_ulong mask;
2150 2156

  
......
2170 2176
    }
2171 2177
}
2172 2178

  
2173
void ppc_store_ibatl(CPUPPCState *env, int nr, target_ulong value)
2179
void helper_store_ibatl(CPUPPCState *env, uint32_t nr, target_ulong value)
2174 2180
{
2175 2181
    dump_store_bat(env, 'I', 1, nr, value);
2176 2182
    env->IBAT[1][nr] = value;
2177 2183
}
2178 2184

  
2179
void ppc_store_dbatu(CPUPPCState *env, int nr, target_ulong value)
2185
void helper_store_dbatu(CPUPPCState *env, uint32_t nr, target_ulong value)
2180 2186
{
2181 2187
    target_ulong mask;
2182 2188

  
......
2202 2208
    }
2203 2209
}
2204 2210

  
2205
void ppc_store_dbatl(CPUPPCState *env, int nr, target_ulong value)
2211
void helper_store_dbatl(CPUPPCState *env, uint32_t nr, target_ulong value)
2206 2212
{
2207 2213
    dump_store_bat(env, 'D', 1, nr, value);
2208 2214
    env->DBAT[1][nr] = value;
2209 2215
}
2210 2216

  
2211
void ppc_store_ibatu_601(CPUPPCState *env, int nr, target_ulong value)
2217
void helper_store_601_batu(CPUPPCState *env, uint32_t nr, target_ulong value)
2212 2218
{
2213 2219
    target_ulong mask;
2214 2220
#if defined(FLUSH_ALL_TLBS)
......
2250 2256
    }
2251 2257
}
2252 2258

  
2253
void ppc_store_ibatl_601(CPUPPCState *env, int nr, target_ulong value)
2259
void helper_store_601_batl(CPUPPCState *env, uint32_t nr, target_ulong value)
2254 2260
{
2255 2261
    target_ulong mask;
2256 2262
#if defined(FLUSH_ALL_TLBS)
......
2446 2452
    }
2447 2453
}
2448 2454

  
2449
#if defined(TARGET_PPC64)
2450
target_ulong ppc_load_sr(CPUPPCState *env, int slb_nr)
2455
/* Segment registers load and store */
2456
target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num)
2451 2457
{
2452
    /* XXX */
2453
    return 0;
2454
}
2458
#if defined(TARGET_PPC64)
2459
    if (env->mmu_model & POWERPC_MMU_64) {
2460
        /* XXX */
2461
        return 0;
2462
    }
2455 2463
#endif
2464
    return env->sr[sr_num];
2465
}
2456 2466

  
2457
void ppc_store_sr(CPUPPCState *env, int srnum, target_ulong value)
2467
void helper_store_sr(CPUPPCState *env, target_ulong srnum, target_ulong value)
2458 2468
{
2459 2469
    LOG_MMU("%s: reg=%d " TARGET_FMT_lx " " TARGET_FMT_lx "\n", __func__,
2460
            srnum, value, env->sr[srnum]);
2470
            (int)srnum, value, env->sr[srnum]);
2461 2471
#if defined(TARGET_PPC64)
2462 2472
    if (env->mmu_model & POWERPC_MMU_64) {
2463 2473
        uint64_t rb = 0, rs = 0;
......
2498 2508
}
2499 2509
#endif /* !defined(CONFIG_USER_ONLY) */
2500 2510

  
2501
/*****************************************************************************/
2502
/* SPR accesses */
2503

  
2504 2511
#if !defined(CONFIG_USER_ONLY)
2505
void helper_store_ibatu(CPUPPCState *env, uint32_t nr, target_ulong val)
2506
{
2507
    ppc_store_ibatu(env, nr, val);
2508
}
2509

  
2510
void helper_store_ibatl(CPUPPCState *env, uint32_t nr, target_ulong val)
2511
{
2512
    ppc_store_ibatl(env, nr, val);
2513
}
2514

  
2515
void helper_store_dbatu(CPUPPCState *env, uint32_t nr, target_ulong val)
2516
{
2517
    ppc_store_dbatu(env, nr, val);
2518
}
2519

  
2520
void helper_store_dbatl(CPUPPCState *env, uint32_t nr, target_ulong val)
2521
{
2522
    ppc_store_dbatl(env, nr, val);
2523
}
2524

  
2525
void helper_store_601_batl(CPUPPCState *env, uint32_t nr, target_ulong val)
2526
{
2527
    ppc_store_ibatl_601(env, nr, val);
2528
}
2529

  
2530
void helper_store_601_batu(CPUPPCState *env, uint32_t nr, target_ulong val)
2531
{
2532
    ppc_store_ibatu_601(env, nr, val);
2533
}
2534

  
2535
/* Segment registers load and store */
2536
target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num)
2537
{
2538
#if defined(TARGET_PPC64)
2539
    if (env->mmu_model & POWERPC_MMU_64) {
2540
        return ppc_load_sr(env, sr_num);
2541
    }
2542
#endif
2543
    return env->sr[sr_num];
2544
}
2545

  
2546
void helper_store_sr(CPUPPCState *env, target_ulong sr_num, target_ulong val)
2547
{
2548
    ppc_store_sr(env, sr_num, val);
2549
}
2550

  
2551 2512
/* SLB management */
2552 2513
#if defined(TARGET_PPC64)
2553 2514
void helper_store_slb(CPUPPCState *env, target_ulong rb, target_ulong rs)
......
2579 2540
    }
2580 2541
    return rt;
2581 2542
}
2582

  
2583
void helper_slbia(CPUPPCState *env)
2584
{
2585
    ppc_slb_invalidate_all(env);
2586
}
2587

  
2588
void helper_slbie(CPUPPCState *env, target_ulong addr)
2589
{
2590
    ppc_slb_invalidate_one(env, addr);
2591
}
2592

  
2593 2543
#endif /* defined(TARGET_PPC64) */
2594 2544

  
2595 2545
/* TLB management */

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