Revision 9af9b330 hw/ioapic.c
b/hw/ioapic.c | ||
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//#define DEBUG_IOAPIC |
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#ifdef DEBUG_IOAPIC |
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#define DPRINTF(fmt, ...) \ |
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do { printf("ioapic: " fmt , ## __VA_ARGS__); } while (0) |
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#else |
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#define DPRINTF(fmt, ...) |
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#endif |
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#define IOAPIC_NUM_PINS 0x18 |
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#define IOAPIC_LVT_MASKED (1<<16) |
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... | ... | |
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* to GSI 2. GSI maps to ioapic 1-1. This is not |
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* the cleanest way of doing it but it should work. */ |
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DPRINTF("%s: %s vec %x\n", __func__, level? "raise" : "lower", vector); |
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if (vector == 0) |
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vector = 2; |
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... | ... | |
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val = s->ioredtbl[index] & 0xffffffff; |
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} |
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} |
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#ifdef DEBUG_IOAPIC |
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printf("I/O APIC read: %08x = %08x\n", s->ioregsel, val); |
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#endif |
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DPRINTF("read: %08x = %08x\n", s->ioregsel, val); |
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} |
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return val; |
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} |
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s->ioregsel = val; |
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return; |
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} else if (addr == 0x10) { |
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#ifdef DEBUG_IOAPIC |
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printf("I/O APIC write: %08x = %08x\n", s->ioregsel, val); |
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#endif |
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DPRINTF("write: %08x = %08x\n", s->ioregsel, val); |
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switch (s->ioregsel) { |
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case 0x00: |
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s->id = (val >> 24) & 0xff; |
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