softmmu: move include files to include/sysemu/
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
misc: move include files to include/qemu/
qom: move include files to include/qom/
exec: move include files to include/exec/
build: kill libdis, move disassemblers to disas/
exec: refactor cpu_restore_state
Refactor common code around calls to cpu_restore_state().
tb_find_pc() has now no external users, make it static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-ppc: Don't use hwaddr to represent hardware state
The hwaddr type is somewhat vaguely defined as being able to contain busaddresses on the widest possible bus in the system. For that reason it'sdiscouraged for representing specific pieces of persistent hardware state,...
TCG: Use gen_opc_instr_start from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG: Use gen_opc_pc from context instead of global variable.
TCG: Use gen_opc_icount from context instead of global variable.
PPC: Fix missing TRACE exception
This patch fixes bug 1031698 :https://bugs.launchpad.net/qemu/+bug/1031698
If we look at the (truncated) translation of the conditional branchinstruction in the test submitted in the bug post, the call to theexception helper is missing in the "bne-false" chunk of translated...
TCG: Use gen_opc_buf from context instead of global variable.
Signed-off-by: Evgeny Voevodin <e.voevodin@samsung.com>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
TCG: Use gen_opc_ptr from context instead of global variable.
disas: avoid using cpu_single_env
Pass around CPUArchState instead of using global cpu_single_env.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Richard Henderson <rth@twiddle.net>Acked-by: Aurelien Jarno <aurelien@aurel32.net>Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn>
Merge branch 'trivial-patches' of git://github.com/stefanha/qemu
ppc: add missing static
Add missing 'static' qualifiers.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Alexander Graf <agraf@suse.de>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
target-ppc: make some functions static
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
target-ppc: Rework storage of VPA registration state
We change the storage of the VPA information to explicitly use fixedsize integer types which will make life easier for syncing this data withKVM, which we will need in future.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>...
target-ppc: Extend FPU state for newer POWER CPUs
This patch adds some extra FPU state to CPUPPCState. Specifically,fpscr is extended to a target_ulong bits, since some recent (64 bit)CPUs now have more status bits than fit inside 32 bits. Also, we add...
cpus: Pass CPUState to [qemu_]cpu_has_work()
For target-mips also change the return type to bool.
Make include paths for cpu-qom.h consistent for alpha and unicore32.
Signed-off-by: Andreas Färber <afaerber@suse.de>[AF: Updated new target-openrisc function accordingly]...
target-ppc: Rename kvm_kick_{env => cpu} and pass PowerPCCPU
Needed for changing qemu_cpu_kick() argument type to CPUState.
Signed-off-by: Andreas Färber <afaerber@suse.de>
cpus: Pass CPUState to qemu_cpu_kick()
CPUArchState is no longer needed there.
target-ppc: Pass PowerPCCPU to powerpc_excp()
Needed for changing cpu_ppc_hypercall() argument type to PowerPCCPU.
target-ppc: Pass PowerPCCPU to cpu_ppc_hypercall
Adapt emulate_spapr_hypercall() accordingly.
Needed for changing spapr_hypercall() argument type to PowerPCCPU.
spapr: Pass PowerPCCPU to spapr_hypercall()
Needed for changing the hypercall handlers' argument type to PowerPCCPU.
Merge branch 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf
PPC: 440: Emulate DCBR0
The DCBR0 register on 440 is used to implement system reset. The sameregister is used on 405 as well, so just reuse the code.
Signed-off-by: Alexander Graf <agraf@suse.de>
With PAPR guests, hypercalls allow registration of the Virtual ProcessorArea (VPA), SLB shadow and dispatch trace log (DTL), each of which allowfor certain communication between the guest and hypervisor. Currently, we...
Drop unnecessary check of TARGET_PHYS_ADDR_SPACE_BITS
For all our PPC targets the physical address space is at least36 bits, so drop an unnecessary preprocessor conditional checkon TARGET_PHYS_ADDR_SPACE_BITS (erroneously introduced as partof the change from target_phys_addr_t to hwaddr). This brings...
target-ppc: rename helper flags
Rename helper flags to the new ones. This is purely a mechanical change,it's possible to use better flags by looking at the helpers.
Cc: Alexander Graf <agraf@suse.de>Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
ppc: avoid buffer overrun: use pstrcpy, not strncpy
A terminal NUL is required by caller's use of strchr.It's better not to use strncpy at all, since there is no needto zero out hundreds of trailing bytes for each iteration.
Signed-off-by: Jim Meyering <meyering@redhat.com>...
PPC: KVM: Fix BAT put
In the sregs API, upper and lower 32bit segments of the BAT registersare swapped when doing a set. Since we need to support old kernels outthere, don't bother to fix it in the kernel, but instead work aroundthe problem in QEMU by swapping on put....
Make target_phys_addr_t 64 bits unconditionally
The hassle and compile time overhead of maintaining both 32-bit and 64-bitcapable source isn't worth the tiny performance advantage which is seen ona minority of configurations. Switch to compiling libhw only once, with...
ppc/pseries: Reset VPA registration on CPU reset
The ppc specific CPU state contains several variables which track theVPA, SLB shadow and dispatch trace log. These are structures sharedbetween OS and hypervisor that are used on the pseries machine to track...
target-ppc: KVM: Fix some kernel version edge cases for kvmppc_reset_htab()
The kvmppc_reset_htab() function invokes the KVM_PPC_ALLOCATE_HTAB vm ioctlto request KVM to allocate and reset a hash page table for the guest - itreturns the size of hash table allocated, or 0 to indicate that qemu needs...
target-ppc: Remove unused power_mode field from cpu state
CPUPPCState includes a variable 'power_mode' which is used nowhere. Thispatch removes it. This includes saving a dummy zero in its place duringvmsave, to avoid breaking the save format.
target-ppc: use the softfloat float32_muladd function
Use the new softfloat float32_muladd() function to implement the vmaddfpand vnmsubfp instructions. As a bonus we can get rid of the call to theHANDLE_NAN3 macro, as the NaN handling is directly done at the softfloat...
target-ppc: get rid of the HANDLE_NAN{1, 2, 3} macros
We can finally get rid of the ugly HANDLE_NAN{1,2,3} macros.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Alexander Graf <agraf@suse.de>
ppc: Make kvm_arch_put_registers() put all the registers
At least when invoked with high enough 'level' arguments,kvm_arch_put_registers() is supposed to copy essentially all the cpu stateas encoded in qemu's internal structures into the kvm state. Currently...
pseries: Add support for new KVM hash table control call
This adds support for then new "reset htab" ioctl which allows qemuto properly cleanup the MMU hash table when the guest is reset. Withthe corresponding kernel support, reset of a guest now works properly....
target-ppc: simplify NaN propagation for vector functions
Commit e024e881bb1a8b5085026589360d26ed97acdd64 provided a pickNaN()function for PowerPC, implementing the correct NaN propagation rules.Therefore there is no need to test the operands manually, we can rely...
target-ppc: use the softfloat min/max functions
Use the new softfloat float32_min() and float32_max() to implement thevminfp and vmaxfp instructions. As a bonus we can get rid of the call tothe HANDLE_NAN2 macro, as the NaN handling is directly done at the...
Emit debug_insn for CPU_LOG_TB_OP_OPT as well.
For all targets that currently call tcg_gen_debug_insn_start,add CPU_LOG_TB_OP_OPT to the condition that gates it.
This is useful for comparing optimization dumps, when thepre-optimization dump is merely noise....
target-ppc: fix altivec instructions
Altivec instructions are not working anymore in PowerPC emulation,following commit d15f74fb, which inverted two registers in the callto helper. Fix that.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Andreas Färber <afaerber@suse.de>...
Merge remote-tracking branch 'agraf/ppc-for-upstream' into staging
win32: provide separate macros for weak decls and definitions
mingw32 seems to want the declaration to also carry the weak attribute.Strangely, gcc on Linux absolutely does not want the declaration to be markedas weak. This may not be the right fix, but it seems to do the trick....
ppc: Fix bug in handling of PAPR hypercall exits
Currently for powerpc, kvm_arch_handle_exit() always returns 1, meaningthat its caller - kvm_cpu_exec() - will always exit immediately afterwardsto the loop in qemu_kvm_cpu_thread_fn().
There's no need to do this. Once we've handled the hypercall there's no...
target-ppc: add implementation of query-cpu-definitions (v2)
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
pseries: Convert sPAPR TCEs to use generic IOMMU infrastructure
The pseries platform already contains an IOMMU implementation, since it isessential for the platform's paravirtualized VIO devices. This IOMMUsupport is currently built into the implementation of the VIO "bus" and...
target-ppc: Fix build with --enable-debug
The order of the arguments was wrong (copy+paste error).
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Alexander Graf <agraf@suse.de>
target-ppc: Fix 2nd parameter for tcg_gen_shri_tl
This fixes a compiler error when QEMU was configured with --enable-debug.
PPC: BookE: Implement EPR SPR
On the e500 series, accessing SPR_EPR magically turns into an access atthat CPU's IACK register on the MPIC. Implement that logic to get kernelsthat make use of that feature work.
PPC: BookE: Make ivpr selectable by CPU type
IVPR can either hold 32 or 64 bit addresses, depending on the CPU type. Letthe CPU initialization function pass in its mask itself, so we can easilyextend it.
PPC: Add e5500 CPU target
This patch adds e5500's CPU initialization to the TCG CPU initializationcode.
PPC: Extract SPR dump generation into its own function
This patch moves the debug #ifdef'ed SPR trace generation into itsown function, so we can call it from multiple places.
PPC: BookE: Support 32 and 64 bit wide MAS2
The MAS registers on BookE are all 32 bit wide, except for MAS2, whichcan hold up to 64 bit on 64 bit capable CPUs. Reflect this in the SPRsetting code, so that the guest can never write invalid values in them....
PPC: BookE206: Bump MAS2 to 64bit
On 64bit capable systems, MAS2 can actually hold a 64bit virtual pageaddress. So increase the mask for its EPN.
PPC: Add some booke SPR defines
The number of SPRs avaiable in different PowerPC chip is still increasing. Adddefinitions for the MAS7_MAS3 SPR and all currently known bits in EPCR.
PPC: Add support for MSR_CM
The BookE variant of MSR_SF is MSR_CM. Implement everything it takes in TCG tosupport running 64bit code with MSR_CM set.
booke_206_tlbwe: Discard invalid bits in MAS2
The size of EPN field in MAS2 depends on page size. This patch adds amask to discard invalid bits in EPN field.
Definition of EPN field from e500v2 RM:EPN Effective page number: Depending on page size, only the bits...
ppc64: Rudimentary Support for extra page sizes on server CPUs
More recent Power server chips (i.e. based on the 64 bit hash MMU)support more than just the traditional 4k and 16M page sizes. Thiscan get quite complicated, because which page sizes are supported,...
ppc: Avoid AREG0 for timebase helpers
Add an explicit CPUPPCState parameter instead of relying on AREG0.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
ppc: Split off misc helpers
Move misc helpers from op_helper.c to misc_helpers.c.
ppc: Avoid AREG0 for misc helpers
ppc: Move misc helpers from helper.c to misc_helper.c
Move more misc helpers from helper.c to misc_helper.c.
ppc: Move load and store helpers, switch to AREG0 free mode
Add an explicit CPUPPCState parameter instead of relying on AREG0and rename op_helper.c (which only contains load and store helpers)to mem_helper.c. Remove AREG0 swapping intlb_fill().
Switch to AREG0 free mode. Use cpu_ld{l,uw}_code in translation...
ppc: Add missing break
Add obviously missing 'break' statement.
ppc: Make hbrev table const
Lookup table 'hbrev' is never written to, so add a 'const' qualifier.
ppc: Avoid AREG0 for MMU etc. helpers
ppc: Avoid a warning with the next patch
When the code is moved together by the next patch, compilerdetects a possible uninitialized variable use. Avoid the warningby initializing the variables.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>...
ppc: Move MMU helpers from helper.c to mmu_helper.c
Move more MMU helpers from helper.c to mmu_helper.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>[update to current helper.c state]...
ppc: Cleanup MMU merge
Remove useless wrappers. In some cases 'int' parameters arechanged to uint32_t.
Make internal functions static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>[agraf: fix kvm compilation]Signed-off-by: Alexander Graf <agraf@suse.de>...
ppc: Split off timebase helpers
Move decrementer and timebase helpers to a dedicated file.
ppc: Move exception helpers from helper.c to excp_helper.c
Move exception helpers from helper.c to excp_helper.c andmake cpu_dump_rfi() static.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>...
ppc: Split FPU and SPE ops
Move FPU and SPE helpers from op_helper.c to fpu_helper.c.
ppc: Avoid AREG0 for FPU and SPE helpers
ppc: Split integer and vector ops
Move integer and vector ops to int_helper.c.
ppc: Avoid AREG0 for integer and vector helpers
ppc: Split MMU etc. helpers from op_helper.c
Move MMU, TLB, SLB and BAT ops to mmu_helper.c.
ppc: Fix coding style in op_helper.c
op_helper.c will be split by the next patches, fixstyle issues before that.
ppc: Split exception helpers
Move exception helpers from op_helper.c to excp_helper.c.
ppc: Avoid AREG0 for exception helpers
ppc: Fix coding style in helper.c
helper.c will be spilt by the next patches, fixstyle issues before that.
qemu-log: use LOG_UNIMP for some target CPU cases
Use LOG_UNIMP for some target CPU cases.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>Acked-by: Alexander Graf <agraf@suse.de>
target-ppc: Unbreak kvm_ppc.c build
The file is located in target-ppc/, not hw/.
Signed-off-by: Andreas Färber <andreas.faerber@web.de>Cc: Paolo Bonzini <pbonzini@redhat.com>Cc: Anthony Liguori <anthony@codemonkey.ws>Cc: Blue Swirl <blauwirbel@gmail.com>...
build: move other target-*/ objects to nested Makefile.objs
build: move libobj-y variable to nested Makefile.objs
build: move obj-TARGET-y variables to nested Makefile.objs
Also drop duplicate occurrence of device-hotplug.o.
Kill off cpu_state_reset()
In commit 1bba0dc932e8826a7d030df3767daf0bc339f9a2 cpu_reset()was renamed to cpu_state_reset(), to allow introducing a new cpu_reset()that would operate on QOM objects.
All callers have been updated except for one in target-mips, so drop all...
target-ppc: Let cpu_ppc_init() return PowerPCCPU
Adapt e500 mpc8544ds machine accordingly.
Turn cpu_init() into a static inline function returning CPUPPCState forbackwards compatibility.
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Alexander Graf <agraf@suse.de>
target-ppc: Some support for dumping TLB_EMB TLBs
Add mmubooke_dump_mmu().
TODO: Add printing of individual flags.
Signed-off-by: François Revol <revol@free.fr>[agraf: fix coding style]Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: Fix up e500 cache size setting
When initializing the e500 code, we need to expose itscache line size for user and system mode, while the mmudetails are only interesting for system emulation.
Split the 2 switch statements apart, allowing us to #ifdef...
target-ppc/machine.c: Drop unnecessary ifdefs
machine.c is only compiled for softmmu targets, so checks for!defined(CONFIG_USER_ONLY) are unnecessary and can be dropped.
Signed-off-by: Juan Quintela <quintela@redhat.com>[AF: Use more verbose commit message suggested by PMM]...
target-ppc: Init dcache and icache size for e500 user mode
commit f7aa558396dd0f6b7a2b22c05cb503c655854102 pulled the dcache and icacheline size initialization inside of a '#if !defined(CONFIG_USER_ONLY)' block.This is not correct because instructions like 'dcbz' need the dcache size...
target-ppc: Fix type casts for w64 (uintptr_t)
This changes nothing for other hosts.
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-ppc: QOM'ify CPU reset
Move code from cpu_state_reset() into ppc_cpu_reset().Reorder #include of helper_regs.h to use it in translate_init.c.
Adjust whitespace and add braces.
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: David Gibson <david@gibson.dropbear.id.au>
target-ppc: Start QOM'ifying CPU init
Move code not dependent on ppc_def_t from cpu_ppc_init() into an initfn.