Revision 9c48dee6

b/hw/slavio_misc.c
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typedef struct APCState {
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    SysBusDevice busdev;
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    MemoryRegion iomem;
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    qemu_irq cpu_halt;
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} APCState;
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......
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    NULL,
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};
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static void apc_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void apc_mem_writeb(void *opaque, target_phys_addr_t addr,
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                           uint64_t val, unsigned size)
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{
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    APCState *s = opaque;
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......
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    qemu_irq_raise(s->cpu_halt);
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}
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static uint32_t apc_mem_readb(void *opaque, target_phys_addr_t addr)
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static uint64_t apc_mem_readb(void *opaque, target_phys_addr_t addr,
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                              unsigned size)
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{
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    uint32_t ret = 0;
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......
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    return ret;
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}
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static CPUReadMemoryFunc * const apc_mem_read[3] = {
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    apc_mem_readb,
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    NULL,
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    NULL,
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};
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static CPUWriteMemoryFunc * const apc_mem_write[3] = {
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    apc_mem_writeb,
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    NULL,
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    NULL,
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static const MemoryRegionOps apc_mem_ops = {
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    .read = apc_mem_readb,
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    .write = apc_mem_writeb,
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    .endianness = DEVICE_NATIVE_ENDIAN,
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    .valid = {
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        .min_access_size = 1,
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        .max_access_size = 1,
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    }
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};
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static uint32_t slavio_sysctrl_mem_readl(void *opaque, target_phys_addr_t addr)
......
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static int apc_init1(SysBusDevice *dev)
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{
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    APCState *s = FROM_SYSBUS(APCState, dev);
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    int io;
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    sysbus_init_irq(dev, &s->cpu_halt);
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    /* Power management (APC) XXX: not a Slavio device */
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    io = cpu_register_io_memory(apc_mem_read, apc_mem_write, s,
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                                DEVICE_NATIVE_ENDIAN);
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    sysbus_init_mmio(dev, MISC_SIZE, io);
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    memory_region_init_io(&s->iomem, &apc_mem_ops, s,
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                          "apc", MISC_SIZE);
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    sysbus_init_mmio_region(dev, &s->iomem);
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    return 0;
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}
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