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1 | 88103cfe | blueswir1 | /* opcodes/i386-dis.c r1.126 */
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2 | dc99065b | bellard | /* Print i386 instructions for GDB, the GNU debugger.
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3 | bc51c5c9 | bellard | Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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4 | 88103cfe | blueswir1 | 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation, Inc.
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5 | dc99065b | bellard | |
6 | c2c73b42 | blueswir1 | This file is part of GDB.
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7 | dc99065b | bellard | |
8 | c2c73b42 | blueswir1 | This program is free software; you can redistribute it and/or modify
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9 | c2c73b42 | blueswir1 | it under the terms of the GNU General Public License as published by
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10 | c2c73b42 | blueswir1 | the Free Software Foundation; either version 2 of the License, or
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11 | c2c73b42 | blueswir1 | (at your option) any later version.
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12 | dc99065b | bellard | |
13 | c2c73b42 | blueswir1 | This program is distributed in the hope that it will be useful,
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14 | c2c73b42 | blueswir1 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 | c2c73b42 | blueswir1 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 | c2c73b42 | blueswir1 | GNU General Public License for more details.
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17 | dc99065b | bellard | |
18 | c2c73b42 | blueswir1 | You should have received a copy of the GNU General Public License
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19 | 8167ee88 | Blue Swirl | along with this program; if not, see <http://www.gnu.org/licenses/>. */
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20 | dc99065b | bellard | |
21 | c2c73b42 | blueswir1 | /* 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
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22 | c2c73b42 | blueswir1 | July 1988
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23 | c2c73b42 | blueswir1 | modified by John Hassey (hassey@dg-rtp.dg.com)
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24 | c2c73b42 | blueswir1 | x86-64 support added by Jan Hubicka (jh@suse.cz)
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25 | c2c73b42 | blueswir1 | VIA PadLock support by Michal Ludvig (mludvig@suse.cz). */
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26 | dc99065b | bellard | |
27 | c2c73b42 | blueswir1 | /* The main tables describing the instructions is essentially a copy
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28 | c2c73b42 | blueswir1 | of the "Opcode Map" chapter (Appendix A) of the Intel 80386
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29 | c2c73b42 | blueswir1 | Programmers Manual. Usually, there is a capital letter, followed
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30 | c2c73b42 | blueswir1 | by a small letter. The capital letter tell the addressing mode,
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31 | c2c73b42 | blueswir1 | and the small letter tells about the operand size. Refer to
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32 | c2c73b42 | blueswir1 | the Intel manual for details. */
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33 | dc99065b | bellard | |
34 | bb0ebb1f | bellard | #include <stdlib.h> |
35 | dc99065b | bellard | #include "dis-asm.h" |
36 | 88103cfe | blueswir1 | /* include/opcode/i386.h r1.78 */
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37 | dc99065b | bellard | |
38 | 88103cfe | blueswir1 | /* opcode/i386.h -- Intel 80386 opcode macros
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39 | 88103cfe | blueswir1 | Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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40 | 88103cfe | blueswir1 | 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
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41 | 88103cfe | blueswir1 | Free Software Foundation, Inc.
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42 | dc99065b | bellard | |
43 | 88103cfe | blueswir1 | This file is part of GAS, the GNU Assembler, and GDB, the GNU Debugger.
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44 | 88103cfe | blueswir1 | |
45 | 88103cfe | blueswir1 | This program is free software; you can redistribute it and/or modify
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46 | 88103cfe | blueswir1 | it under the terms of the GNU General Public License as published by
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47 | 88103cfe | blueswir1 | the Free Software Foundation; either version 2 of the License, or
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48 | 88103cfe | blueswir1 | (at your option) any later version.
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49 | 88103cfe | blueswir1 | |
50 | 88103cfe | blueswir1 | This program is distributed in the hope that it will be useful,
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51 | 88103cfe | blueswir1 | but WITHOUT ANY WARRANTY; without even the implied warranty of
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52 | 88103cfe | blueswir1 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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53 | 88103cfe | blueswir1 | GNU General Public License for more details.
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54 | bc51c5c9 | bellard | |
55 | 88103cfe | blueswir1 | You should have received a copy of the GNU General Public License
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56 | 8167ee88 | Blue Swirl | along with this program; if not, see <http://www.gnu.org/licenses/>. */
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57 | 88103cfe | blueswir1 | |
58 | 88103cfe | blueswir1 | /* The SystemV/386 SVR3.2 assembler, and probably all AT&T derived
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59 | 88103cfe | blueswir1 | ix86 Unix assemblers, generate floating point instructions with
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60 | 88103cfe | blueswir1 | reversed source and destination registers in certain cases.
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61 | 88103cfe | blueswir1 | Unfortunately, gcc and possibly many other programs use this
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62 | 88103cfe | blueswir1 | reversed syntax, so we're stuck with it.
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63 | 88103cfe | blueswir1 | |
64 | 88103cfe | blueswir1 | eg. `fsub %st(3),%st' results in st = st - st(3) as expected, but
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65 | 88103cfe | blueswir1 | `fsub %st,%st(3)' results in st(3) = st - st(3), rather than
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66 | 88103cfe | blueswir1 | the expected st(3) = st(3) - st
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67 | 88103cfe | blueswir1 | |
68 | 88103cfe | blueswir1 | This happens with all the non-commutative arithmetic floating point
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69 | 88103cfe | blueswir1 | operations with two register operands, where the source register is
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70 | 88103cfe | blueswir1 | %st, and destination register is %st(i).
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71 | 88103cfe | blueswir1 | |
72 | 88103cfe | blueswir1 | The affected opcode map is dceX, dcfX, deeX, defX. */
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73 | 88103cfe | blueswir1 | |
74 | 88103cfe | blueswir1 | #ifndef SYSV386_COMPAT
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75 | bc51c5c9 | bellard | /* Set non-zero for broken, compatible instructions. Set to zero for
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76 | 88103cfe | blueswir1 | non-broken opcodes at your peril. gcc generates SystemV/386
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77 | 88103cfe | blueswir1 | compatible instructions. */
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78 | 88103cfe | blueswir1 | #define SYSV386_COMPAT 1 |
79 | 88103cfe | blueswir1 | #endif
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80 | 88103cfe | blueswir1 | #ifndef OLDGCC_COMPAT
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81 | 88103cfe | blueswir1 | /* Set non-zero to cater for old (<= 2.8.1) versions of gcc that could
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82 | 88103cfe | blueswir1 | generate nonsense fsubp, fsubrp, fdivp and fdivrp with operands
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83 | 88103cfe | blueswir1 | reversed. */
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84 | 88103cfe | blueswir1 | #define OLDGCC_COMPAT SYSV386_COMPAT
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85 | bc51c5c9 | bellard | #endif
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86 | bc51c5c9 | bellard | |
87 | 88103cfe | blueswir1 | #define MOV_AX_DISP32 0xa0 |
88 | 88103cfe | blueswir1 | #define POP_SEG_SHORT 0x07 |
89 | 88103cfe | blueswir1 | #define JUMP_PC_RELATIVE 0xeb |
90 | 88103cfe | blueswir1 | #define INT_OPCODE 0xcd |
91 | 88103cfe | blueswir1 | #define INT3_OPCODE 0xcc |
92 | 88103cfe | blueswir1 | /* The opcode for the fwait instruction, which disassembler treats as a
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93 | 88103cfe | blueswir1 | prefix when it can. */
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94 | 88103cfe | blueswir1 | #define FWAIT_OPCODE 0x9b |
95 | 88103cfe | blueswir1 | #define ADDR_PREFIX_OPCODE 0x67 |
96 | 88103cfe | blueswir1 | #define DATA_PREFIX_OPCODE 0x66 |
97 | 88103cfe | blueswir1 | #define LOCK_PREFIX_OPCODE 0xf0 |
98 | 88103cfe | blueswir1 | #define CS_PREFIX_OPCODE 0x2e |
99 | 88103cfe | blueswir1 | #define DS_PREFIX_OPCODE 0x3e |
100 | 88103cfe | blueswir1 | #define ES_PREFIX_OPCODE 0x26 |
101 | 88103cfe | blueswir1 | #define FS_PREFIX_OPCODE 0x64 |
102 | 88103cfe | blueswir1 | #define GS_PREFIX_OPCODE 0x65 |
103 | 88103cfe | blueswir1 | #define SS_PREFIX_OPCODE 0x36 |
104 | 88103cfe | blueswir1 | #define REPNE_PREFIX_OPCODE 0xf2 |
105 | 88103cfe | blueswir1 | #define REPE_PREFIX_OPCODE 0xf3 |
106 | 88103cfe | blueswir1 | |
107 | 88103cfe | blueswir1 | #define TWO_BYTE_OPCODE_ESCAPE 0x0f |
108 | 88103cfe | blueswir1 | #define NOP_OPCODE (char) 0x90 |
109 | 88103cfe | blueswir1 | |
110 | 88103cfe | blueswir1 | /* register numbers */
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111 | 88103cfe | blueswir1 | #define EBP_REG_NUM 5 |
112 | 88103cfe | blueswir1 | #define ESP_REG_NUM 4 |
113 | 88103cfe | blueswir1 | |
114 | 88103cfe | blueswir1 | /* modrm_byte.regmem for twobyte escape */
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115 | 88103cfe | blueswir1 | #define ESCAPE_TO_TWO_BYTE_ADDRESSING ESP_REG_NUM
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116 | 88103cfe | blueswir1 | /* index_base_byte.index for no index register addressing */
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117 | 88103cfe | blueswir1 | #define NO_INDEX_REGISTER ESP_REG_NUM
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118 | 88103cfe | blueswir1 | /* index_base_byte.base for no base register addressing */
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119 | 88103cfe | blueswir1 | #define NO_BASE_REGISTER EBP_REG_NUM
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120 | 88103cfe | blueswir1 | #define NO_BASE_REGISTER_16 6 |
121 | 88103cfe | blueswir1 | |
122 | 88103cfe | blueswir1 | /* modrm.mode = REGMEM_FIELD_HAS_REG when a register is in there */
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123 | 88103cfe | blueswir1 | #define REGMEM_FIELD_HAS_REG 0x3/* always = 0x3 */ |
124 | 88103cfe | blueswir1 | #define REGMEM_FIELD_HAS_MEM (~REGMEM_FIELD_HAS_REG)
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125 | 88103cfe | blueswir1 | |
126 | 88103cfe | blueswir1 | /* x86-64 extension prefix. */
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127 | 88103cfe | blueswir1 | #define REX_OPCODE 0x40 |
128 | 88103cfe | blueswir1 | |
129 | 88103cfe | blueswir1 | /* Indicates 64 bit operand size. */
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130 | 88103cfe | blueswir1 | #define REX_W 8 |
131 | 88103cfe | blueswir1 | /* High extension to reg field of modrm byte. */
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132 | 88103cfe | blueswir1 | #define REX_R 4 |
133 | 88103cfe | blueswir1 | /* High extension to SIB index field. */
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134 | 88103cfe | blueswir1 | #define REX_X 2 |
135 | 88103cfe | blueswir1 | /* High extension to base field of modrm or SIB, or reg field of opcode. */
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136 | 88103cfe | blueswir1 | #define REX_B 1 |
137 | 88103cfe | blueswir1 | |
138 | 88103cfe | blueswir1 | /* max operands per insn */
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139 | 88103cfe | blueswir1 | #define MAX_OPERANDS 4 |
140 | 88103cfe | blueswir1 | |
141 | 88103cfe | blueswir1 | /* max immediates per insn (lcall, ljmp, insertq, extrq) */
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142 | 88103cfe | blueswir1 | #define MAX_IMMEDIATE_OPERANDS 2 |
143 | 88103cfe | blueswir1 | |
144 | 88103cfe | blueswir1 | /* max memory refs per insn (string ops) */
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145 | 88103cfe | blueswir1 | #define MAX_MEMORY_OPERANDS 2 |
146 | 88103cfe | blueswir1 | |
147 | 88103cfe | blueswir1 | /* max size of insn mnemonics. */
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148 | 88103cfe | blueswir1 | #define MAX_MNEM_SIZE 16 |
149 | 88103cfe | blueswir1 | |
150 | 88103cfe | blueswir1 | /* max size of register name in insn mnemonics. */
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151 | 88103cfe | blueswir1 | #define MAX_REG_NAME_SIZE 8 |
152 | 88103cfe | blueswir1 | |
153 | 88103cfe | blueswir1 | /* opcodes/i386-dis.c r1.126 */
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154 | 88103cfe | blueswir1 | #include "qemu-common.h" |
155 | 88103cfe | blueswir1 | |
156 | 88103cfe | blueswir1 | #include <setjmp.h> |
157 | 88103cfe | blueswir1 | |
158 | c2c73b42 | blueswir1 | static int fetch_data (struct disassemble_info *, bfd_byte *); |
159 | c2c73b42 | blueswir1 | static void ckprefix (void); |
160 | c2c73b42 | blueswir1 | static const char *prefix_name (int, int); |
161 | c2c73b42 | blueswir1 | static int print_insn (bfd_vma, disassemble_info *); |
162 | c2c73b42 | blueswir1 | static void dofloat (int); |
163 | c2c73b42 | blueswir1 | static void OP_ST (int, int); |
164 | c2c73b42 | blueswir1 | static void OP_STi (int, int); |
165 | c2c73b42 | blueswir1 | static int putop (const char *, int); |
166 | c2c73b42 | blueswir1 | static void oappend (const char *); |
167 | c2c73b42 | blueswir1 | static void append_seg (void); |
168 | c2c73b42 | blueswir1 | static void OP_indirE (int, int); |
169 | c2c73b42 | blueswir1 | static void print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp); |
170 | 88103cfe | blueswir1 | static void print_displacement (char *, bfd_vma); |
171 | c2c73b42 | blueswir1 | static void OP_E (int, int); |
172 | c2c73b42 | blueswir1 | static void OP_G (int, int); |
173 | c2c73b42 | blueswir1 | static bfd_vma get64 (void); |
174 | c2c73b42 | blueswir1 | static bfd_signed_vma get32 (void); |
175 | c2c73b42 | blueswir1 | static bfd_signed_vma get32s (void); |
176 | c2c73b42 | blueswir1 | static int get16 (void); |
177 | c2c73b42 | blueswir1 | static void set_op (bfd_vma, int); |
178 | c2c73b42 | blueswir1 | static void OP_REG (int, int); |
179 | c2c73b42 | blueswir1 | static void OP_IMREG (int, int); |
180 | c2c73b42 | blueswir1 | static void OP_I (int, int); |
181 | c2c73b42 | blueswir1 | static void OP_I64 (int, int); |
182 | c2c73b42 | blueswir1 | static void OP_sI (int, int); |
183 | c2c73b42 | blueswir1 | static void OP_J (int, int); |
184 | c2c73b42 | blueswir1 | static void OP_SEG (int, int); |
185 | c2c73b42 | blueswir1 | static void OP_DIR (int, int); |
186 | c2c73b42 | blueswir1 | static void OP_OFF (int, int); |
187 | c2c73b42 | blueswir1 | static void OP_OFF64 (int, int); |
188 | c2c73b42 | blueswir1 | static void ptr_reg (int, int); |
189 | c2c73b42 | blueswir1 | static void OP_ESreg (int, int); |
190 | c2c73b42 | blueswir1 | static void OP_DSreg (int, int); |
191 | c2c73b42 | blueswir1 | static void OP_C (int, int); |
192 | c2c73b42 | blueswir1 | static void OP_D (int, int); |
193 | c2c73b42 | blueswir1 | static void OP_T (int, int); |
194 | 88103cfe | blueswir1 | static void OP_R (int, int); |
195 | c2c73b42 | blueswir1 | static void OP_MMX (int, int); |
196 | c2c73b42 | blueswir1 | static void OP_XMM (int, int); |
197 | c2c73b42 | blueswir1 | static void OP_EM (int, int); |
198 | c2c73b42 | blueswir1 | static void OP_EX (int, int); |
199 | 88103cfe | blueswir1 | static void OP_EMC (int,int); |
200 | 88103cfe | blueswir1 | static void OP_MXC (int,int); |
201 | c2c73b42 | blueswir1 | static void OP_MS (int, int); |
202 | c2c73b42 | blueswir1 | static void OP_XS (int, int); |
203 | c2c73b42 | blueswir1 | static void OP_M (int, int); |
204 | c2c73b42 | blueswir1 | static void OP_VMX (int, int); |
205 | c2c73b42 | blueswir1 | static void OP_0fae (int, int); |
206 | c2c73b42 | blueswir1 | static void OP_0f07 (int, int); |
207 | 88103cfe | blueswir1 | static void NOP_Fixup1 (int, int); |
208 | 88103cfe | blueswir1 | static void NOP_Fixup2 (int, int); |
209 | c2c73b42 | blueswir1 | static void OP_3DNowSuffix (int, int); |
210 | c2c73b42 | blueswir1 | static void OP_SIMD_Suffix (int, int); |
211 | c2c73b42 | blueswir1 | static void SIMD_Fixup (int, int); |
212 | c2c73b42 | blueswir1 | static void PNI_Fixup (int, int); |
213 | c2c73b42 | blueswir1 | static void SVME_Fixup (int, int); |
214 | c2c73b42 | blueswir1 | static void INVLPG_Fixup (int, int); |
215 | c2c73b42 | blueswir1 | static void BadOp (void); |
216 | c2c73b42 | blueswir1 | static void VMX_Fixup (int, int); |
217 | c2c73b42 | blueswir1 | static void REP_Fixup (int, int); |
218 | 88103cfe | blueswir1 | static void CMPXCHG8B_Fixup (int, int); |
219 | 88103cfe | blueswir1 | static void XMM_Fixup (int, int); |
220 | 88103cfe | blueswir1 | static void CRC32_Fixup (int, int); |
221 | dc99065b | bellard | |
222 | bc51c5c9 | bellard | struct dis_private {
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223 | dc99065b | bellard | /* Points to first byte not fetched. */
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224 | dc99065b | bellard | bfd_byte *max_fetched; |
225 | 88103cfe | blueswir1 | bfd_byte the_buffer[MAX_MNEM_SIZE]; |
226 | dc99065b | bellard | bfd_vma insn_start; |
227 | bc51c5c9 | bellard | int orig_sizeflag;
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228 | dc99065b | bellard | jmp_buf bailout; |
229 | dc99065b | bellard | }; |
230 | dc99065b | bellard | |
231 | c2c73b42 | blueswir1 | enum address_mode
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232 | c2c73b42 | blueswir1 | { |
233 | c2c73b42 | blueswir1 | mode_16bit, |
234 | c2c73b42 | blueswir1 | mode_32bit, |
235 | c2c73b42 | blueswir1 | mode_64bit |
236 | c2c73b42 | blueswir1 | }; |
237 | c2c73b42 | blueswir1 | |
238 | c2c73b42 | blueswir1 | static enum address_mode address_mode; |
239 | bc51c5c9 | bellard | |
240 | bc51c5c9 | bellard | /* Flags for the prefixes for the current instruction. See below. */
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241 | bc51c5c9 | bellard | static int prefixes; |
242 | bc51c5c9 | bellard | |
243 | bc51c5c9 | bellard | /* REX prefix the current instruction. See below. */
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244 | bc51c5c9 | bellard | static int rex; |
245 | bc51c5c9 | bellard | /* Bits of REX we've already used. */
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246 | bc51c5c9 | bellard | static int rex_used; |
247 | bc51c5c9 | bellard | /* Mark parts used in the REX prefix. When we are testing for
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248 | bc51c5c9 | bellard | empty prefix (for 8bit register REX extension), just mask it
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249 | bc51c5c9 | bellard | out. Otherwise test for REX bit is excuse for existence of REX
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250 | bc51c5c9 | bellard | only in case value is nonzero. */
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251 | bc51c5c9 | bellard | #define USED_REX(value) \
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252 | bc51c5c9 | bellard | { \ |
253 | bc51c5c9 | bellard | if (value) \
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254 | 88103cfe | blueswir1 | { \ |
255 | 88103cfe | blueswir1 | if ((rex & value)) \
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256 | 88103cfe | blueswir1 | rex_used |= (value) | REX_OPCODE; \ |
257 | 88103cfe | blueswir1 | } \ |
258 | bc51c5c9 | bellard | else \
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259 | 88103cfe | blueswir1 | rex_used |= REX_OPCODE; \ |
260 | bc51c5c9 | bellard | } |
261 | bc51c5c9 | bellard | |
262 | bc51c5c9 | bellard | /* Flags for prefixes which we somehow handled when printing the
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263 | bc51c5c9 | bellard | current instruction. */
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264 | bc51c5c9 | bellard | static int used_prefixes; |
265 | bc51c5c9 | bellard | |
266 | bc51c5c9 | bellard | /* Flags stored in PREFIXES. */
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267 | bc51c5c9 | bellard | #define PREFIX_REPZ 1 |
268 | bc51c5c9 | bellard | #define PREFIX_REPNZ 2 |
269 | bc51c5c9 | bellard | #define PREFIX_LOCK 4 |
270 | bc51c5c9 | bellard | #define PREFIX_CS 8 |
271 | bc51c5c9 | bellard | #define PREFIX_SS 0x10 |
272 | bc51c5c9 | bellard | #define PREFIX_DS 0x20 |
273 | bc51c5c9 | bellard | #define PREFIX_ES 0x40 |
274 | bc51c5c9 | bellard | #define PREFIX_FS 0x80 |
275 | bc51c5c9 | bellard | #define PREFIX_GS 0x100 |
276 | bc51c5c9 | bellard | #define PREFIX_DATA 0x200 |
277 | bc51c5c9 | bellard | #define PREFIX_ADDR 0x400 |
278 | bc51c5c9 | bellard | #define PREFIX_FWAIT 0x800 |
279 | bc51c5c9 | bellard | |
280 | dc99065b | bellard | /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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281 | dc99065b | bellard | to ADDR (exclusive) are valid. Returns 1 for success, longjmps
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282 | dc99065b | bellard | on error. */
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283 | dc99065b | bellard | #define FETCH_DATA(info, addr) \
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284 | bc51c5c9 | bellard | ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
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285 | dc99065b | bellard | ? 1 : fetch_data ((info), (addr)))
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286 | dc99065b | bellard | |
287 | dc99065b | bellard | static int |
288 | c2c73b42 | blueswir1 | fetch_data (struct disassemble_info *info, bfd_byte *addr)
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289 | dc99065b | bellard | { |
290 | dc99065b | bellard | int status;
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291 | bc51c5c9 | bellard | struct dis_private *priv = (struct dis_private *) info->private_data; |
292 | dc99065b | bellard | bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); |
293 | dc99065b | bellard | |
294 | 88103cfe | blueswir1 | if (addr <= priv->the_buffer + MAX_MNEM_SIZE)
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295 | c2c73b42 | blueswir1 | status = (*info->read_memory_func) (start, |
296 | c2c73b42 | blueswir1 | priv->max_fetched, |
297 | c2c73b42 | blueswir1 | addr - priv->max_fetched, |
298 | c2c73b42 | blueswir1 | info); |
299 | c2c73b42 | blueswir1 | else
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300 | c2c73b42 | blueswir1 | status = -1;
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301 | dc99065b | bellard | if (status != 0) |
302 | dc99065b | bellard | { |
303 | bc51c5c9 | bellard | /* If we did manage to read at least one byte, then
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304 | c2c73b42 | blueswir1 | print_insn_i386 will do something sensible. Otherwise, print
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305 | c2c73b42 | blueswir1 | an error. We do that here because this is where we know
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306 | c2c73b42 | blueswir1 | STATUS. */
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307 | bc51c5c9 | bellard | if (priv->max_fetched == priv->the_buffer)
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308 | bc51c5c9 | bellard | (*info->memory_error_func) (status, start, info); |
309 | dc99065b | bellard | longjmp (priv->bailout, 1);
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310 | dc99065b | bellard | } |
311 | dc99065b | bellard | else
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312 | dc99065b | bellard | priv->max_fetched = addr; |
313 | dc99065b | bellard | return 1; |
314 | dc99065b | bellard | } |
315 | dc99065b | bellard | |
316 | 88103cfe | blueswir1 | #define XX { NULL, 0 } |
317 | 88103cfe | blueswir1 | |
318 | 88103cfe | blueswir1 | #define Eb { OP_E, b_mode }
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319 | 88103cfe | blueswir1 | #define Ev { OP_E, v_mode }
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320 | 88103cfe | blueswir1 | #define Ed { OP_E, d_mode }
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321 | 88103cfe | blueswir1 | #define Edq { OP_E, dq_mode }
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322 | 88103cfe | blueswir1 | #define Edqw { OP_E, dqw_mode }
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323 | 88103cfe | blueswir1 | #define Edqb { OP_E, dqb_mode }
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324 | 88103cfe | blueswir1 | #define Edqd { OP_E, dqd_mode }
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325 | 88103cfe | blueswir1 | #define indirEv { OP_indirE, stack_v_mode }
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326 | 88103cfe | blueswir1 | #define indirEp { OP_indirE, f_mode }
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327 | 88103cfe | blueswir1 | #define stackEv { OP_E, stack_v_mode }
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328 | 88103cfe | blueswir1 | #define Em { OP_E, m_mode }
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329 | 88103cfe | blueswir1 | #define Ew { OP_E, w_mode }
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330 | 88103cfe | blueswir1 | #define M { OP_M, 0 } /* lea, lgdt, etc. */ |
331 | 88103cfe | blueswir1 | #define Ma { OP_M, v_mode }
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332 | 88103cfe | blueswir1 | #define Mp { OP_M, f_mode } /* 32 or 48 bit memory operand for LDS, LES etc */ |
333 | 88103cfe | blueswir1 | #define Mq { OP_M, q_mode }
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334 | 88103cfe | blueswir1 | #define Gb { OP_G, b_mode }
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335 | 88103cfe | blueswir1 | #define Gv { OP_G, v_mode }
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336 | 88103cfe | blueswir1 | #define Gd { OP_G, d_mode }
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337 | 88103cfe | blueswir1 | #define Gdq { OP_G, dq_mode }
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338 | 88103cfe | blueswir1 | #define Gm { OP_G, m_mode }
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339 | 88103cfe | blueswir1 | #define Gw { OP_G, w_mode }
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340 | 88103cfe | blueswir1 | #define Rd { OP_R, d_mode }
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341 | 88103cfe | blueswir1 | #define Rm { OP_R, m_mode }
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342 | 88103cfe | blueswir1 | #define Ib { OP_I, b_mode }
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343 | 88103cfe | blueswir1 | #define sIb { OP_sI, b_mode } /* sign extened byte */ |
344 | 88103cfe | blueswir1 | #define Iv { OP_I, v_mode }
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345 | 88103cfe | blueswir1 | #define Iq { OP_I, q_mode }
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346 | 88103cfe | blueswir1 | #define Iv64 { OP_I64, v_mode }
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347 | 88103cfe | blueswir1 | #define Iw { OP_I, w_mode }
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348 | 88103cfe | blueswir1 | #define I1 { OP_I, const_1_mode }
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349 | 88103cfe | blueswir1 | #define Jb { OP_J, b_mode }
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350 | 88103cfe | blueswir1 | #define Jv { OP_J, v_mode }
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351 | 88103cfe | blueswir1 | #define Cm { OP_C, m_mode }
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352 | 88103cfe | blueswir1 | #define Dm { OP_D, m_mode }
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353 | 88103cfe | blueswir1 | #define Td { OP_T, d_mode }
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354 | 88103cfe | blueswir1 | |
355 | 88103cfe | blueswir1 | #define RMeAX { OP_REG, eAX_reg }
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356 | 88103cfe | blueswir1 | #define RMeBX { OP_REG, eBX_reg }
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357 | 88103cfe | blueswir1 | #define RMeCX { OP_REG, eCX_reg }
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358 | 88103cfe | blueswir1 | #define RMeDX { OP_REG, eDX_reg }
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359 | 88103cfe | blueswir1 | #define RMeSP { OP_REG, eSP_reg }
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360 | 88103cfe | blueswir1 | #define RMeBP { OP_REG, eBP_reg }
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361 | 88103cfe | blueswir1 | #define RMeSI { OP_REG, eSI_reg }
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362 | 88103cfe | blueswir1 | #define RMeDI { OP_REG, eDI_reg }
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363 | 88103cfe | blueswir1 | #define RMrAX { OP_REG, rAX_reg }
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364 | 88103cfe | blueswir1 | #define RMrBX { OP_REG, rBX_reg }
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365 | 88103cfe | blueswir1 | #define RMrCX { OP_REG, rCX_reg }
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366 | 88103cfe | blueswir1 | #define RMrDX { OP_REG, rDX_reg }
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367 | 88103cfe | blueswir1 | #define RMrSP { OP_REG, rSP_reg }
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368 | 88103cfe | blueswir1 | #define RMrBP { OP_REG, rBP_reg }
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369 | 88103cfe | blueswir1 | #define RMrSI { OP_REG, rSI_reg }
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370 | 88103cfe | blueswir1 | #define RMrDI { OP_REG, rDI_reg }
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371 | 88103cfe | blueswir1 | #define RMAL { OP_REG, al_reg }
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372 | 88103cfe | blueswir1 | #define RMAL { OP_REG, al_reg }
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373 | 88103cfe | blueswir1 | #define RMCL { OP_REG, cl_reg }
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374 | 88103cfe | blueswir1 | #define RMDL { OP_REG, dl_reg }
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375 | 88103cfe | blueswir1 | #define RMBL { OP_REG, bl_reg }
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376 | 88103cfe | blueswir1 | #define RMAH { OP_REG, ah_reg }
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377 | 88103cfe | blueswir1 | #define RMCH { OP_REG, ch_reg }
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378 | 88103cfe | blueswir1 | #define RMDH { OP_REG, dh_reg }
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379 | 88103cfe | blueswir1 | #define RMBH { OP_REG, bh_reg }
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380 | 88103cfe | blueswir1 | #define RMAX { OP_REG, ax_reg }
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381 | 88103cfe | blueswir1 | #define RMDX { OP_REG, dx_reg }
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382 | 88103cfe | blueswir1 | |
383 | 88103cfe | blueswir1 | #define eAX { OP_IMREG, eAX_reg }
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384 | 88103cfe | blueswir1 | #define eBX { OP_IMREG, eBX_reg }
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385 | 88103cfe | blueswir1 | #define eCX { OP_IMREG, eCX_reg }
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386 | 88103cfe | blueswir1 | #define eDX { OP_IMREG, eDX_reg }
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387 | 88103cfe | blueswir1 | #define eSP { OP_IMREG, eSP_reg }
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388 | 88103cfe | blueswir1 | #define eBP { OP_IMREG, eBP_reg }
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389 | 88103cfe | blueswir1 | #define eSI { OP_IMREG, eSI_reg }
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390 | 88103cfe | blueswir1 | #define eDI { OP_IMREG, eDI_reg }
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391 | 88103cfe | blueswir1 | #define AL { OP_IMREG, al_reg }
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392 | 88103cfe | blueswir1 | #define CL { OP_IMREG, cl_reg }
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393 | 88103cfe | blueswir1 | #define DL { OP_IMREG, dl_reg }
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394 | 88103cfe | blueswir1 | #define BL { OP_IMREG, bl_reg }
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395 | 88103cfe | blueswir1 | #define AH { OP_IMREG, ah_reg }
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396 | 88103cfe | blueswir1 | #define CH { OP_IMREG, ch_reg }
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397 | 88103cfe | blueswir1 | #define DH { OP_IMREG, dh_reg }
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398 | 88103cfe | blueswir1 | #define BH { OP_IMREG, bh_reg }
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399 | 88103cfe | blueswir1 | #define AX { OP_IMREG, ax_reg }
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400 | 88103cfe | blueswir1 | #define DX { OP_IMREG, dx_reg }
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401 | 88103cfe | blueswir1 | #define zAX { OP_IMREG, z_mode_ax_reg }
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402 | 88103cfe | blueswir1 | #define indirDX { OP_IMREG, indir_dx_reg }
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403 | 88103cfe | blueswir1 | |
404 | 88103cfe | blueswir1 | #define Sw { OP_SEG, w_mode }
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405 | 88103cfe | blueswir1 | #define Sv { OP_SEG, v_mode }
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406 | 88103cfe | blueswir1 | #define Ap { OP_DIR, 0 } |
407 | 88103cfe | blueswir1 | #define Ob { OP_OFF64, b_mode }
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408 | 88103cfe | blueswir1 | #define Ov { OP_OFF64, v_mode }
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409 | 88103cfe | blueswir1 | #define Xb { OP_DSreg, eSI_reg }
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410 | 88103cfe | blueswir1 | #define Xv { OP_DSreg, eSI_reg }
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411 | 88103cfe | blueswir1 | #define Xz { OP_DSreg, eSI_reg }
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412 | 88103cfe | blueswir1 | #define Yb { OP_ESreg, eDI_reg }
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413 | 88103cfe | blueswir1 | #define Yv { OP_ESreg, eDI_reg }
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414 | 88103cfe | blueswir1 | #define DSBX { OP_DSreg, eBX_reg }
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415 | 88103cfe | blueswir1 | |
416 | 88103cfe | blueswir1 | #define es { OP_REG, es_reg }
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417 | 88103cfe | blueswir1 | #define ss { OP_REG, ss_reg }
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418 | 88103cfe | blueswir1 | #define cs { OP_REG, cs_reg }
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419 | 88103cfe | blueswir1 | #define ds { OP_REG, ds_reg }
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420 | 88103cfe | blueswir1 | #define fs { OP_REG, fs_reg }
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421 | 88103cfe | blueswir1 | #define gs { OP_REG, gs_reg }
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422 | 88103cfe | blueswir1 | |
423 | 88103cfe | blueswir1 | #define MX { OP_MMX, 0 } |
424 | 88103cfe | blueswir1 | #define XM { OP_XMM, 0 } |
425 | 88103cfe | blueswir1 | #define EM { OP_EM, v_mode }
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426 | 88103cfe | blueswir1 | #define EMd { OP_EM, d_mode }
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427 | 88103cfe | blueswir1 | #define EMq { OP_EM, q_mode }
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428 | 88103cfe | blueswir1 | #define EXd { OP_EX, d_mode }
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429 | 88103cfe | blueswir1 | #define EXq { OP_EX, q_mode }
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430 | 88103cfe | blueswir1 | #define EXx { OP_EX, x_mode }
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431 | 88103cfe | blueswir1 | #define MS { OP_MS, v_mode }
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432 | 88103cfe | blueswir1 | #define XS { OP_XS, v_mode }
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433 | 88103cfe | blueswir1 | #define EMC { OP_EMC, v_mode }
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434 | 88103cfe | blueswir1 | #define MXC { OP_MXC, 0 } |
435 | 88103cfe | blueswir1 | #define VM { OP_VMX, q_mode }
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436 | 88103cfe | blueswir1 | #define OPSUF { OP_3DNowSuffix, 0 } |
437 | 88103cfe | blueswir1 | #define OPSIMD { OP_SIMD_Suffix, 0 } |
438 | 88103cfe | blueswir1 | #define XMM0 { XMM_Fixup, 0 } |
439 | bc51c5c9 | bellard | |
440 | c2c73b42 | blueswir1 | /* Used handle "rep" prefix for string instructions. */
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441 | 88103cfe | blueswir1 | #define Xbr { REP_Fixup, eSI_reg }
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442 | 88103cfe | blueswir1 | #define Xvr { REP_Fixup, eSI_reg }
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443 | 88103cfe | blueswir1 | #define Ybr { REP_Fixup, eDI_reg }
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444 | 88103cfe | blueswir1 | #define Yvr { REP_Fixup, eDI_reg }
|
445 | 88103cfe | blueswir1 | #define Yzr { REP_Fixup, eDI_reg }
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446 | 88103cfe | blueswir1 | #define indirDXr { REP_Fixup, indir_dx_reg }
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447 | 88103cfe | blueswir1 | #define ALr { REP_Fixup, al_reg }
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448 | 88103cfe | blueswir1 | #define eAXr { REP_Fixup, eAX_reg }
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449 | 88103cfe | blueswir1 | |
450 | 88103cfe | blueswir1 | #define cond_jump_flag { NULL, cond_jump_mode } |
451 | 88103cfe | blueswir1 | #define loop_jcxz_flag { NULL, loop_jcxz_mode } |
452 | bc51c5c9 | bellard | |
453 | bc51c5c9 | bellard | /* bits in sizeflag */
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454 | bc51c5c9 | bellard | #define SUFFIX_ALWAYS 4 |
455 | bc51c5c9 | bellard | #define AFLAG 2 |
456 | bc51c5c9 | bellard | #define DFLAG 1 |
457 | dc99065b | bellard | |
458 | bc51c5c9 | bellard | #define b_mode 1 /* byte operand */ |
459 | bc51c5c9 | bellard | #define v_mode 2 /* operand size depends on prefixes */ |
460 | bc51c5c9 | bellard | #define w_mode 3 /* word operand */ |
461 | bc51c5c9 | bellard | #define d_mode 4 /* double word operand */ |
462 | bc51c5c9 | bellard | #define q_mode 5 /* quad word operand */ |
463 | c2c73b42 | blueswir1 | #define t_mode 6 /* ten-byte operand */ |
464 | c2c73b42 | blueswir1 | #define x_mode 7 /* 16-byte XMM operand */ |
465 | c2c73b42 | blueswir1 | #define m_mode 8 /* d_mode in 32bit, q_mode in 64bit mode. */ |
466 | c2c73b42 | blueswir1 | #define cond_jump_mode 9 |
467 | c2c73b42 | blueswir1 | #define loop_jcxz_mode 10 |
468 | c2c73b42 | blueswir1 | #define dq_mode 11 /* operand size depends on REX prefixes. */ |
469 | c2c73b42 | blueswir1 | #define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */ |
470 | c2c73b42 | blueswir1 | #define f_mode 13 /* 4- or 6-byte pointer operand */ |
471 | c2c73b42 | blueswir1 | #define const_1_mode 14 |
472 | c2c73b42 | blueswir1 | #define stack_v_mode 15 /* v_mode for stack-related opcodes. */ |
473 | 88103cfe | blueswir1 | #define z_mode 16 /* non-quad operand size depends on prefixes */ |
474 | 88103cfe | blueswir1 | #define o_mode 17 /* 16-byte operand */ |
475 | 88103cfe | blueswir1 | #define dqb_mode 18 /* registers like dq_mode, memory like b_mode. */ |
476 | 88103cfe | blueswir1 | #define dqd_mode 19 /* registers like dq_mode, memory like d_mode. */ |
477 | dc99065b | bellard | |
478 | dc99065b | bellard | #define es_reg 100 |
479 | dc99065b | bellard | #define cs_reg 101 |
480 | dc99065b | bellard | #define ss_reg 102 |
481 | dc99065b | bellard | #define ds_reg 103 |
482 | dc99065b | bellard | #define fs_reg 104 |
483 | dc99065b | bellard | #define gs_reg 105 |
484 | dc99065b | bellard | |
485 | bc51c5c9 | bellard | #define eAX_reg 108 |
486 | bc51c5c9 | bellard | #define eCX_reg 109 |
487 | bc51c5c9 | bellard | #define eDX_reg 110 |
488 | bc51c5c9 | bellard | #define eBX_reg 111 |
489 | bc51c5c9 | bellard | #define eSP_reg 112 |
490 | bc51c5c9 | bellard | #define eBP_reg 113 |
491 | bc51c5c9 | bellard | #define eSI_reg 114 |
492 | bc51c5c9 | bellard | #define eDI_reg 115 |
493 | dc99065b | bellard | |
494 | dc99065b | bellard | #define al_reg 116 |
495 | dc99065b | bellard | #define cl_reg 117 |
496 | dc99065b | bellard | #define dl_reg 118 |
497 | dc99065b | bellard | #define bl_reg 119 |
498 | dc99065b | bellard | #define ah_reg 120 |
499 | dc99065b | bellard | #define ch_reg 121 |
500 | dc99065b | bellard | #define dh_reg 122 |
501 | dc99065b | bellard | #define bh_reg 123 |
502 | dc99065b | bellard | |
503 | dc99065b | bellard | #define ax_reg 124 |
504 | dc99065b | bellard | #define cx_reg 125 |
505 | dc99065b | bellard | #define dx_reg 126 |
506 | dc99065b | bellard | #define bx_reg 127 |
507 | dc99065b | bellard | #define sp_reg 128 |
508 | dc99065b | bellard | #define bp_reg 129 |
509 | dc99065b | bellard | #define si_reg 130 |
510 | dc99065b | bellard | #define di_reg 131 |
511 | dc99065b | bellard | |
512 | bc51c5c9 | bellard | #define rAX_reg 132 |
513 | bc51c5c9 | bellard | #define rCX_reg 133 |
514 | bc51c5c9 | bellard | #define rDX_reg 134 |
515 | bc51c5c9 | bellard | #define rBX_reg 135 |
516 | bc51c5c9 | bellard | #define rSP_reg 136 |
517 | bc51c5c9 | bellard | #define rBP_reg 137 |
518 | bc51c5c9 | bellard | #define rSI_reg 138 |
519 | bc51c5c9 | bellard | #define rDI_reg 139 |
520 | bc51c5c9 | bellard | |
521 | 88103cfe | blueswir1 | #define z_mode_ax_reg 149 |
522 | dc99065b | bellard | #define indir_dx_reg 150 |
523 | dc99065b | bellard | |
524 | bc51c5c9 | bellard | #define FLOATCODE 1 |
525 | bc51c5c9 | bellard | #define USE_GROUPS 2 |
526 | bc51c5c9 | bellard | #define USE_PREFIX_USER_TABLE 3 |
527 | bc51c5c9 | bellard | #define X86_64_SPECIAL 4 |
528 | c2c73b42 | blueswir1 | #define IS_3BYTE_OPCODE 5 |
529 | bc51c5c9 | bellard | |
530 | 88103cfe | blueswir1 | #define FLOAT NULL, { { NULL, FLOATCODE } } |
531 | 88103cfe | blueswir1 | |
532 | 88103cfe | blueswir1 | #define GRP1a NULL, { { NULL, USE_GROUPS }, { NULL, 0 } } |
533 | 88103cfe | blueswir1 | #define GRP1b NULL, { { NULL, USE_GROUPS }, { NULL, 1 } } |
534 | 88103cfe | blueswir1 | #define GRP1S NULL, { { NULL, USE_GROUPS }, { NULL, 2 } } |
535 | 88103cfe | blueswir1 | #define GRP1Ss NULL, { { NULL, USE_GROUPS }, { NULL, 3 } } |
536 | 88103cfe | blueswir1 | #define GRP2b NULL, { { NULL, USE_GROUPS }, { NULL, 4 } } |
537 | 88103cfe | blueswir1 | #define GRP2S NULL, { { NULL, USE_GROUPS }, { NULL, 5 } } |
538 | 88103cfe | blueswir1 | #define GRP2b_one NULL, { { NULL, USE_GROUPS }, { NULL, 6 } } |
539 | 88103cfe | blueswir1 | #define GRP2S_one NULL, { { NULL, USE_GROUPS }, { NULL, 7 } } |
540 | 88103cfe | blueswir1 | #define GRP2b_cl NULL, { { NULL, USE_GROUPS }, { NULL, 8 } } |
541 | 88103cfe | blueswir1 | #define GRP2S_cl NULL, { { NULL, USE_GROUPS }, { NULL, 9 } } |
542 | 88103cfe | blueswir1 | #define GRP3b NULL, { { NULL, USE_GROUPS }, { NULL, 10 } } |
543 | 88103cfe | blueswir1 | #define GRP3S NULL, { { NULL, USE_GROUPS }, { NULL, 11 } } |
544 | 88103cfe | blueswir1 | #define GRP4 NULL, { { NULL, USE_GROUPS }, { NULL, 12 } } |
545 | 88103cfe | blueswir1 | #define GRP5 NULL, { { NULL, USE_GROUPS }, { NULL, 13 } } |
546 | 88103cfe | blueswir1 | #define GRP6 NULL, { { NULL, USE_GROUPS }, { NULL, 14 } } |
547 | 88103cfe | blueswir1 | #define GRP7 NULL, { { NULL, USE_GROUPS }, { NULL, 15 } } |
548 | 88103cfe | blueswir1 | #define GRP8 NULL, { { NULL, USE_GROUPS }, { NULL, 16 } } |
549 | 88103cfe | blueswir1 | #define GRP9 NULL, { { NULL, USE_GROUPS }, { NULL, 17 } } |
550 | 88103cfe | blueswir1 | #define GRP11_C6 NULL, { { NULL, USE_GROUPS }, { NULL, 18 } } |
551 | 88103cfe | blueswir1 | #define GRP11_C7 NULL, { { NULL, USE_GROUPS }, { NULL, 19 } } |
552 | 88103cfe | blueswir1 | #define GRP12 NULL, { { NULL, USE_GROUPS }, { NULL, 20 } } |
553 | 88103cfe | blueswir1 | #define GRP13 NULL, { { NULL, USE_GROUPS }, { NULL, 21 } } |
554 | 88103cfe | blueswir1 | #define GRP14 NULL, { { NULL, USE_GROUPS }, { NULL, 22 } } |
555 | 88103cfe | blueswir1 | #define GRP15 NULL, { { NULL, USE_GROUPS }, { NULL, 23 } } |
556 | 88103cfe | blueswir1 | #define GRP16 NULL, { { NULL, USE_GROUPS }, { NULL, 24 } } |
557 | 88103cfe | blueswir1 | #define GRPAMD NULL, { { NULL, USE_GROUPS }, { NULL, 25 } } |
558 | 88103cfe | blueswir1 | #define GRPPADLCK1 NULL, { { NULL, USE_GROUPS }, { NULL, 26 } } |
559 | 88103cfe | blueswir1 | #define GRPPADLCK2 NULL, { { NULL, USE_GROUPS }, { NULL, 27 } } |
560 | 88103cfe | blueswir1 | |
561 | 88103cfe | blueswir1 | #define PREGRP0 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 0 } } |
562 | 88103cfe | blueswir1 | #define PREGRP1 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 1 } } |
563 | 88103cfe | blueswir1 | #define PREGRP2 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 2 } } |
564 | 88103cfe | blueswir1 | #define PREGRP3 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 3 } } |
565 | 88103cfe | blueswir1 | #define PREGRP4 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 4 } } |
566 | 88103cfe | blueswir1 | #define PREGRP5 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 5 } } |
567 | 88103cfe | blueswir1 | #define PREGRP6 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 6 } } |
568 | 88103cfe | blueswir1 | #define PREGRP7 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 7 } } |
569 | 88103cfe | blueswir1 | #define PREGRP8 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 8 } } |
570 | 88103cfe | blueswir1 | #define PREGRP9 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 9 } } |
571 | 88103cfe | blueswir1 | #define PREGRP10 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 10 } } |
572 | 88103cfe | blueswir1 | #define PREGRP11 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 11 } } |
573 | 88103cfe | blueswir1 | #define PREGRP12 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 12 } } |
574 | 88103cfe | blueswir1 | #define PREGRP13 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 13 } } |
575 | 88103cfe | blueswir1 | #define PREGRP14 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 14 } } |
576 | 88103cfe | blueswir1 | #define PREGRP15 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 15 } } |
577 | 88103cfe | blueswir1 | #define PREGRP16 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 16 } } |
578 | 88103cfe | blueswir1 | #define PREGRP17 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 17 } } |
579 | 88103cfe | blueswir1 | #define PREGRP18 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 18 } } |
580 | 88103cfe | blueswir1 | #define PREGRP19 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 19 } } |
581 | 88103cfe | blueswir1 | #define PREGRP20 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 20 } } |
582 | 88103cfe | blueswir1 | #define PREGRP21 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 21 } } |
583 | 88103cfe | blueswir1 | #define PREGRP22 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 22 } } |
584 | 88103cfe | blueswir1 | #define PREGRP23 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 23 } } |
585 | 88103cfe | blueswir1 | #define PREGRP24 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 24 } } |
586 | 88103cfe | blueswir1 | #define PREGRP25 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 25 } } |
587 | 88103cfe | blueswir1 | #define PREGRP26 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 26 } } |
588 | 88103cfe | blueswir1 | #define PREGRP27 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 27 } } |
589 | 88103cfe | blueswir1 | #define PREGRP28 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 28 } } |
590 | 88103cfe | blueswir1 | #define PREGRP29 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 29 } } |
591 | 88103cfe | blueswir1 | #define PREGRP30 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 30 } } |
592 | 88103cfe | blueswir1 | #define PREGRP31 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 31 } } |
593 | 88103cfe | blueswir1 | #define PREGRP32 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 32 } } |
594 | 88103cfe | blueswir1 | #define PREGRP33 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 33 } } |
595 | 88103cfe | blueswir1 | #define PREGRP34 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 34 } } |
596 | 88103cfe | blueswir1 | #define PREGRP35 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 35 } } |
597 | 88103cfe | blueswir1 | #define PREGRP36 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 36 } } |
598 | 88103cfe | blueswir1 | #define PREGRP37 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 37 } } |
599 | 88103cfe | blueswir1 | #define PREGRP38 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 38 } } |
600 | 88103cfe | blueswir1 | #define PREGRP39 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 39 } } |
601 | 88103cfe | blueswir1 | #define PREGRP40 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 40 } } |
602 | 88103cfe | blueswir1 | #define PREGRP41 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 41 } } |
603 | 88103cfe | blueswir1 | #define PREGRP42 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 42 } } |
604 | 88103cfe | blueswir1 | #define PREGRP43 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 43 } } |
605 | 88103cfe | blueswir1 | #define PREGRP44 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 44 } } |
606 | 88103cfe | blueswir1 | #define PREGRP45 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 45 } } |
607 | 88103cfe | blueswir1 | #define PREGRP46 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 46 } } |
608 | 88103cfe | blueswir1 | #define PREGRP47 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 47 } } |
609 | 88103cfe | blueswir1 | #define PREGRP48 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 48 } } |
610 | 88103cfe | blueswir1 | #define PREGRP49 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 49 } } |
611 | 88103cfe | blueswir1 | #define PREGRP50 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 50 } } |
612 | 88103cfe | blueswir1 | #define PREGRP51 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 51 } } |
613 | 88103cfe | blueswir1 | #define PREGRP52 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 52 } } |
614 | 88103cfe | blueswir1 | #define PREGRP53 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 53 } } |
615 | 88103cfe | blueswir1 | #define PREGRP54 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 54 } } |
616 | 88103cfe | blueswir1 | #define PREGRP55 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 55 } } |
617 | 88103cfe | blueswir1 | #define PREGRP56 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 56 } } |
618 | 88103cfe | blueswir1 | #define PREGRP57 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 57 } } |
619 | 88103cfe | blueswir1 | #define PREGRP58 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 58 } } |
620 | 88103cfe | blueswir1 | #define PREGRP59 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 59 } } |
621 | 88103cfe | blueswir1 | #define PREGRP60 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 60 } } |
622 | 88103cfe | blueswir1 | #define PREGRP61 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 61 } } |
623 | 88103cfe | blueswir1 | #define PREGRP62 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 62 } } |
624 | 88103cfe | blueswir1 | #define PREGRP63 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 63 } } |
625 | 88103cfe | blueswir1 | #define PREGRP64 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 64 } } |
626 | 88103cfe | blueswir1 | #define PREGRP65 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 65 } } |
627 | 88103cfe | blueswir1 | #define PREGRP66 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 66 } } |
628 | 88103cfe | blueswir1 | #define PREGRP67 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 67 } } |
629 | 88103cfe | blueswir1 | #define PREGRP68 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 68 } } |
630 | 88103cfe | blueswir1 | #define PREGRP69 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 69 } } |
631 | 88103cfe | blueswir1 | #define PREGRP70 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 70 } } |
632 | 88103cfe | blueswir1 | #define PREGRP71 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 71 } } |
633 | 88103cfe | blueswir1 | #define PREGRP72 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 72 } } |
634 | 88103cfe | blueswir1 | #define PREGRP73 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 73 } } |
635 | 88103cfe | blueswir1 | #define PREGRP74 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 74 } } |
636 | 88103cfe | blueswir1 | #define PREGRP75 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 75 } } |
637 | 88103cfe | blueswir1 | #define PREGRP76 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 76 } } |
638 | 88103cfe | blueswir1 | #define PREGRP77 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 77 } } |
639 | 88103cfe | blueswir1 | #define PREGRP78 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 78 } } |
640 | 88103cfe | blueswir1 | #define PREGRP79 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 79 } } |
641 | 88103cfe | blueswir1 | #define PREGRP80 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 80 } } |
642 | 88103cfe | blueswir1 | #define PREGRP81 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 81 } } |
643 | 88103cfe | blueswir1 | #define PREGRP82 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 82 } } |
644 | 88103cfe | blueswir1 | #define PREGRP83 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 83 } } |
645 | 88103cfe | blueswir1 | #define PREGRP84 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 84 } } |
646 | 88103cfe | blueswir1 | #define PREGRP85 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 85 } } |
647 | 88103cfe | blueswir1 | #define PREGRP86 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 86 } } |
648 | 88103cfe | blueswir1 | #define PREGRP87 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 87 } } |
649 | 88103cfe | blueswir1 | #define PREGRP88 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 88 } } |
650 | 88103cfe | blueswir1 | #define PREGRP89 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 89 } } |
651 | 88103cfe | blueswir1 | #define PREGRP90 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 90 } } |
652 | 88103cfe | blueswir1 | #define PREGRP91 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 91 } } |
653 | 88103cfe | blueswir1 | #define PREGRP92 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 92 } } |
654 | 88103cfe | blueswir1 | #define PREGRP93 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 93 } } |
655 | 88103cfe | blueswir1 | #define PREGRP94 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 94 } } |
656 | 88103cfe | blueswir1 | #define PREGRP95 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 95 } } |
657 | 88103cfe | blueswir1 | #define PREGRP96 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 96 } } |
658 | 88103cfe | blueswir1 | #define PREGRP97 NULL, { { NULL, USE_PREFIX_USER_TABLE }, { NULL, 97 } } |
659 | 88103cfe | blueswir1 | |
660 | 88103cfe | blueswir1 | |
661 | 88103cfe | blueswir1 | #define X86_64_0 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 0 } } |
662 | 88103cfe | blueswir1 | #define X86_64_1 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 1 } } |
663 | 88103cfe | blueswir1 | #define X86_64_2 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 2 } } |
664 | 88103cfe | blueswir1 | #define X86_64_3 NULL, { { NULL, X86_64_SPECIAL }, { NULL, 3 } } |
665 | 88103cfe | blueswir1 | |
666 | 88103cfe | blueswir1 | #define THREE_BYTE_0 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 0 } } |
667 | 88103cfe | blueswir1 | #define THREE_BYTE_1 NULL, { { NULL, IS_3BYTE_OPCODE }, { NULL, 1 } } |
668 | c2c73b42 | blueswir1 | |
669 | c2c73b42 | blueswir1 | typedef void (*op_rtn) (int bytemode, int sizeflag); |
670 | dc99065b | bellard | |
671 | dc99065b | bellard | struct dis386 {
|
672 | bc51c5c9 | bellard | const char *name; |
673 | 88103cfe | blueswir1 | struct
|
674 | 88103cfe | blueswir1 | { |
675 | 88103cfe | blueswir1 | op_rtn rtn; |
676 | 88103cfe | blueswir1 | int bytemode;
|
677 | 88103cfe | blueswir1 | } op[MAX_OPERANDS]; |
678 | dc99065b | bellard | }; |
679 | dc99065b | bellard | |
680 | bc51c5c9 | bellard | /* Upper case letters in the instruction names here are macros.
|
681 | bc51c5c9 | bellard | 'A' => print 'b' if no register operands or suffix_always is true
|
682 | bc51c5c9 | bellard | 'B' => print 'b' if suffix_always is true
|
683 | c2c73b42 | blueswir1 | 'C' => print 's' or 'l' ('w' or 'd' in Intel mode) depending on operand
|
684 | c2c73b42 | blueswir1 | . size prefix
|
685 | 88103cfe | blueswir1 | 'D' => print 'w' if no register operands or 'w', 'l' or 'q', if
|
686 | 88103cfe | blueswir1 | . suffix_always is true
|
687 | bc51c5c9 | bellard | 'E' => print 'e' if 32-bit form of jcxz
|
688 | bc51c5c9 | bellard | 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
|
689 | 88103cfe | blueswir1 | 'G' => print 'w' or 'l' depending on operand size prefix (i/o insns)
|
690 | bc51c5c9 | bellard | 'H' => print ",pt" or ",pn" branch hint
|
691 | c2c73b42 | blueswir1 | 'I' => honor following macro letter even in Intel mode (implemented only
|
692 | c2c73b42 | blueswir1 | . for some of the macro letters)
|
693 | c2c73b42 | blueswir1 | 'J' => print 'l'
|
694 | 88103cfe | blueswir1 | 'K' => print 'd' or 'q' if rex prefix is present.
|
695 | bc51c5c9 | bellard | 'L' => print 'l' if suffix_always is true
|
696 | bc51c5c9 | bellard | 'N' => print 'n' if instruction has no wait "prefix"
|
697 | 88103cfe | blueswir1 | 'O' => print 'd' or 'o' (or 'q' in Intel mode)
|
698 | bc51c5c9 | bellard | 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
|
699 | bc51c5c9 | bellard | . or suffix_always is true. print 'q' if rex prefix is present.
|
700 | bc51c5c9 | bellard | 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
|
701 | bc51c5c9 | bellard | . is true
|
702 | 88103cfe | blueswir1 | 'R' => print 'w', 'l' or 'q' ('d' for 'l' and 'e' in Intel mode)
|
703 | bc51c5c9 | bellard | 'S' => print 'w', 'l' or 'q' if suffix_always is true
|
704 | bc51c5c9 | bellard | 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
|
705 | bc51c5c9 | bellard | 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
|
706 | c2c73b42 | blueswir1 | 'V' => print 'q' in 64bit mode and behave as 'S' otherwise
|
707 | 88103cfe | blueswir1 | 'W' => print 'b', 'w' or 'l' ('d' in Intel mode)
|
708 | c2c73b42 | blueswir1 | 'X' => print 's', 'd' depending on data16 prefix (for XMM)
|
709 | bc51c5c9 | bellard | 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
|
710 | c2c73b42 | blueswir1 | 'Z' => print 'q' in 64bit mode and behave as 'L' otherwise
|
711 | bc51c5c9 | bellard | |
712 | bc51c5c9 | bellard | Many of the above letters print nothing in Intel mode. See "putop"
|
713 | bc51c5c9 | bellard | for the details.
|
714 | bc51c5c9 | bellard | |
715 | bc51c5c9 | bellard | Braces '{' and '}', and vertical bars '|', indicate alternative
|
716 | bc51c5c9 | bellard | mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
|
717 | bc51c5c9 | bellard | modes. In cases where there are only two alternatives, the X86_64
|
718 | bc51c5c9 | bellard | instruction is reserved, and "(bad)" is printed.
|
719 | bc51c5c9 | bellard | */
|
720 | bc51c5c9 | bellard | |
721 | bc51c5c9 | bellard | static const struct dis386 dis386[] = { |
722 | dc99065b | bellard | /* 00 */
|
723 | 88103cfe | blueswir1 | { "addB", { Eb, Gb } },
|
724 | 88103cfe | blueswir1 | { "addS", { Ev, Gv } },
|
725 | 88103cfe | blueswir1 | { "addB", { Gb, Eb } },
|
726 | 88103cfe | blueswir1 | { "addS", { Gv, Ev } },
|
727 | 88103cfe | blueswir1 | { "addB", { AL, Ib } },
|
728 | 88103cfe | blueswir1 | { "addS", { eAX, Iv } },
|
729 | 88103cfe | blueswir1 | { "push{T|}", { es } },
|
730 | 88103cfe | blueswir1 | { "pop{T|}", { es } },
|
731 | dc99065b | bellard | /* 08 */
|
732 | 88103cfe | blueswir1 | { "orB", { Eb, Gb } },
|
733 | 88103cfe | blueswir1 | { "orS", { Ev, Gv } },
|
734 | 88103cfe | blueswir1 | { "orB", { Gb, Eb } },
|
735 | 88103cfe | blueswir1 | { "orS", { Gv, Ev } },
|
736 | 88103cfe | blueswir1 | { "orB", { AL, Ib } },
|
737 | 88103cfe | blueswir1 | { "orS", { eAX, Iv } },
|
738 | 88103cfe | blueswir1 | { "push{T|}", { cs } },
|
739 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* 0x0f extended opcode escape */ |
740 | dc99065b | bellard | /* 10 */
|
741 | 88103cfe | blueswir1 | { "adcB", { Eb, Gb } },
|
742 | 88103cfe | blueswir1 | { "adcS", { Ev, Gv } },
|
743 | 88103cfe | blueswir1 | { "adcB", { Gb, Eb } },
|
744 | 88103cfe | blueswir1 | { "adcS", { Gv, Ev } },
|
745 | 88103cfe | blueswir1 | { "adcB", { AL, Ib } },
|
746 | 88103cfe | blueswir1 | { "adcS", { eAX, Iv } },
|
747 | 88103cfe | blueswir1 | { "push{T|}", { ss } },
|
748 | 88103cfe | blueswir1 | { "pop{T|}", { ss } },
|
749 | dc99065b | bellard | /* 18 */
|
750 | 88103cfe | blueswir1 | { "sbbB", { Eb, Gb } },
|
751 | 88103cfe | blueswir1 | { "sbbS", { Ev, Gv } },
|
752 | 88103cfe | blueswir1 | { "sbbB", { Gb, Eb } },
|
753 | 88103cfe | blueswir1 | { "sbbS", { Gv, Ev } },
|
754 | 88103cfe | blueswir1 | { "sbbB", { AL, Ib } },
|
755 | 88103cfe | blueswir1 | { "sbbS", { eAX, Iv } },
|
756 | 88103cfe | blueswir1 | { "push{T|}", { ds } },
|
757 | 88103cfe | blueswir1 | { "pop{T|}", { ds } },
|
758 | dc99065b | bellard | /* 20 */
|
759 | 88103cfe | blueswir1 | { "andB", { Eb, Gb } },
|
760 | 88103cfe | blueswir1 | { "andS", { Ev, Gv } },
|
761 | 88103cfe | blueswir1 | { "andB", { Gb, Eb } },
|
762 | 88103cfe | blueswir1 | { "andS", { Gv, Ev } },
|
763 | 88103cfe | blueswir1 | { "andB", { AL, Ib } },
|
764 | 88103cfe | blueswir1 | { "andS", { eAX, Iv } },
|
765 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* SEG ES prefix */ |
766 | 88103cfe | blueswir1 | { "daa{|}", { XX } },
|
767 | dc99065b | bellard | /* 28 */
|
768 | 88103cfe | blueswir1 | { "subB", { Eb, Gb } },
|
769 | 88103cfe | blueswir1 | { "subS", { Ev, Gv } },
|
770 | 88103cfe | blueswir1 | { "subB", { Gb, Eb } },
|
771 | 88103cfe | blueswir1 | { "subS", { Gv, Ev } },
|
772 | 88103cfe | blueswir1 | { "subB", { AL, Ib } },
|
773 | 88103cfe | blueswir1 | { "subS", { eAX, Iv } },
|
774 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* SEG CS prefix */ |
775 | 88103cfe | blueswir1 | { "das{|}", { XX } },
|
776 | dc99065b | bellard | /* 30 */
|
777 | 88103cfe | blueswir1 | { "xorB", { Eb, Gb } },
|
778 | 88103cfe | blueswir1 | { "xorS", { Ev, Gv } },
|
779 | 88103cfe | blueswir1 | { "xorB", { Gb, Eb } },
|
780 | 88103cfe | blueswir1 | { "xorS", { Gv, Ev } },
|
781 | 88103cfe | blueswir1 | { "xorB", { AL, Ib } },
|
782 | 88103cfe | blueswir1 | { "xorS", { eAX, Iv } },
|
783 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* SEG SS prefix */ |
784 | 88103cfe | blueswir1 | { "aaa{|}", { XX } },
|
785 | dc99065b | bellard | /* 38 */
|
786 | 88103cfe | blueswir1 | { "cmpB", { Eb, Gb } },
|
787 | 88103cfe | blueswir1 | { "cmpS", { Ev, Gv } },
|
788 | 88103cfe | blueswir1 | { "cmpB", { Gb, Eb } },
|
789 | 88103cfe | blueswir1 | { "cmpS", { Gv, Ev } },
|
790 | 88103cfe | blueswir1 | { "cmpB", { AL, Ib } },
|
791 | 88103cfe | blueswir1 | { "cmpS", { eAX, Iv } },
|
792 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* SEG DS prefix */ |
793 | 88103cfe | blueswir1 | { "aas{|}", { XX } },
|
794 | dc99065b | bellard | /* 40 */
|
795 | 88103cfe | blueswir1 | { "inc{S|}", { RMeAX } },
|
796 | 88103cfe | blueswir1 | { "inc{S|}", { RMeCX } },
|
797 | 88103cfe | blueswir1 | { "inc{S|}", { RMeDX } },
|
798 | 88103cfe | blueswir1 | { "inc{S|}", { RMeBX } },
|
799 | 88103cfe | blueswir1 | { "inc{S|}", { RMeSP } },
|
800 | 88103cfe | blueswir1 | { "inc{S|}", { RMeBP } },
|
801 | 88103cfe | blueswir1 | { "inc{S|}", { RMeSI } },
|
802 | 88103cfe | blueswir1 | { "inc{S|}", { RMeDI } },
|
803 | dc99065b | bellard | /* 48 */
|
804 | 88103cfe | blueswir1 | { "dec{S|}", { RMeAX } },
|
805 | 88103cfe | blueswir1 | { "dec{S|}", { RMeCX } },
|
806 | 88103cfe | blueswir1 | { "dec{S|}", { RMeDX } },
|
807 | 88103cfe | blueswir1 | { "dec{S|}", { RMeBX } },
|
808 | 88103cfe | blueswir1 | { "dec{S|}", { RMeSP } },
|
809 | 88103cfe | blueswir1 | { "dec{S|}", { RMeBP } },
|
810 | 88103cfe | blueswir1 | { "dec{S|}", { RMeSI } },
|
811 | 88103cfe | blueswir1 | { "dec{S|}", { RMeDI } },
|
812 | dc99065b | bellard | /* 50 */
|
813 | 88103cfe | blueswir1 | { "pushV", { RMrAX } },
|
814 | 88103cfe | blueswir1 | { "pushV", { RMrCX } },
|
815 | 88103cfe | blueswir1 | { "pushV", { RMrDX } },
|
816 | 88103cfe | blueswir1 | { "pushV", { RMrBX } },
|
817 | 88103cfe | blueswir1 | { "pushV", { RMrSP } },
|
818 | 88103cfe | blueswir1 | { "pushV", { RMrBP } },
|
819 | 88103cfe | blueswir1 | { "pushV", { RMrSI } },
|
820 | 88103cfe | blueswir1 | { "pushV", { RMrDI } },
|
821 | dc99065b | bellard | /* 58 */
|
822 | 88103cfe | blueswir1 | { "popV", { RMrAX } },
|
823 | 88103cfe | blueswir1 | { "popV", { RMrCX } },
|
824 | 88103cfe | blueswir1 | { "popV", { RMrDX } },
|
825 | 88103cfe | blueswir1 | { "popV", { RMrBX } },
|
826 | 88103cfe | blueswir1 | { "popV", { RMrSP } },
|
827 | 88103cfe | blueswir1 | { "popV", { RMrBP } },
|
828 | 88103cfe | blueswir1 | { "popV", { RMrSI } },
|
829 | 88103cfe | blueswir1 | { "popV", { RMrDI } },
|
830 | dc99065b | bellard | /* 60 */
|
831 | bc51c5c9 | bellard | { X86_64_0 }, |
832 | 88103cfe | blueswir1 | { X86_64_1 }, |
833 | 88103cfe | blueswir1 | { X86_64_2 }, |
834 | 88103cfe | blueswir1 | { X86_64_3 }, |
835 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* seg fs */ |
836 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* seg gs */ |
837 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* op size prefix */ |
838 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* adr size prefix */ |
839 | dc99065b | bellard | /* 68 */
|
840 | 88103cfe | blueswir1 | { "pushT", { Iq } },
|
841 | 88103cfe | blueswir1 | { "imulS", { Gv, Ev, Iv } },
|
842 | 88103cfe | blueswir1 | { "pushT", { sIb } },
|
843 | 88103cfe | blueswir1 | { "imulS", { Gv, Ev, sIb } },
|
844 | 88103cfe | blueswir1 | { "ins{b||b|}", { Ybr, indirDX } },
|
845 | 88103cfe | blueswir1 | { "ins{R||G|}", { Yzr, indirDX } },
|
846 | 88103cfe | blueswir1 | { "outs{b||b|}", { indirDXr, Xb } },
|
847 | 88103cfe | blueswir1 | { "outs{R||G|}", { indirDXr, Xz } },
|
848 | dc99065b | bellard | /* 70 */
|
849 | 88103cfe | blueswir1 | { "joH", { Jb, XX, cond_jump_flag } },
|
850 | 88103cfe | blueswir1 | { "jnoH", { Jb, XX, cond_jump_flag } },
|
851 | 88103cfe | blueswir1 | { "jbH", { Jb, XX, cond_jump_flag } },
|
852 | 88103cfe | blueswir1 | { "jaeH", { Jb, XX, cond_jump_flag } },
|
853 | 88103cfe | blueswir1 | { "jeH", { Jb, XX, cond_jump_flag } },
|
854 | 88103cfe | blueswir1 | { "jneH", { Jb, XX, cond_jump_flag } },
|
855 | 88103cfe | blueswir1 | { "jbeH", { Jb, XX, cond_jump_flag } },
|
856 | 88103cfe | blueswir1 | { "jaH", { Jb, XX, cond_jump_flag } },
|
857 | dc99065b | bellard | /* 78 */
|
858 | 88103cfe | blueswir1 | { "jsH", { Jb, XX, cond_jump_flag } },
|
859 | 88103cfe | blueswir1 | { "jnsH", { Jb, XX, cond_jump_flag } },
|
860 | 88103cfe | blueswir1 | { "jpH", { Jb, XX, cond_jump_flag } },
|
861 | 88103cfe | blueswir1 | { "jnpH", { Jb, XX, cond_jump_flag } },
|
862 | 88103cfe | blueswir1 | { "jlH", { Jb, XX, cond_jump_flag } },
|
863 | 88103cfe | blueswir1 | { "jgeH", { Jb, XX, cond_jump_flag } },
|
864 | 88103cfe | blueswir1 | { "jleH", { Jb, XX, cond_jump_flag } },
|
865 | 88103cfe | blueswir1 | { "jgH", { Jb, XX, cond_jump_flag } },
|
866 | dc99065b | bellard | /* 80 */
|
867 | dc99065b | bellard | { GRP1b }, |
868 | dc99065b | bellard | { GRP1S }, |
869 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
870 | dc99065b | bellard | { GRP1Ss }, |
871 | 88103cfe | blueswir1 | { "testB", { Eb, Gb } },
|
872 | 88103cfe | blueswir1 | { "testS", { Ev, Gv } },
|
873 | 88103cfe | blueswir1 | { "xchgB", { Eb, Gb } },
|
874 | 88103cfe | blueswir1 | { "xchgS", { Ev, Gv } },
|
875 | dc99065b | bellard | /* 88 */
|
876 | 88103cfe | blueswir1 | { "movB", { Eb, Gb } },
|
877 | 88103cfe | blueswir1 | { "movS", { Ev, Gv } },
|
878 | 88103cfe | blueswir1 | { "movB", { Gb, Eb } },
|
879 | 88103cfe | blueswir1 | { "movS", { Gv, Ev } },
|
880 | 88103cfe | blueswir1 | { "movD", { Sv, Sw } },
|
881 | 88103cfe | blueswir1 | { "leaS", { Gv, M } },
|
882 | 88103cfe | blueswir1 | { "movD", { Sw, Sv } },
|
883 | 88103cfe | blueswir1 | { GRP1a }, |
884 | dc99065b | bellard | /* 90 */
|
885 | 88103cfe | blueswir1 | { PREGRP38 }, |
886 | 88103cfe | blueswir1 | { "xchgS", { RMeCX, eAX } },
|
887 | 88103cfe | blueswir1 | { "xchgS", { RMeDX, eAX } },
|
888 | 88103cfe | blueswir1 | { "xchgS", { RMeBX, eAX } },
|
889 | 88103cfe | blueswir1 | { "xchgS", { RMeSP, eAX } },
|
890 | 88103cfe | blueswir1 | { "xchgS", { RMeBP, eAX } },
|
891 | 88103cfe | blueswir1 | { "xchgS", { RMeSI, eAX } },
|
892 | 88103cfe | blueswir1 | { "xchgS", { RMeDI, eAX } },
|
893 | dc99065b | bellard | /* 98 */
|
894 | 88103cfe | blueswir1 | { "cW{t||t|}R", { XX } },
|
895 | 88103cfe | blueswir1 | { "cR{t||t|}O", { XX } },
|
896 | 88103cfe | blueswir1 | { "Jcall{T|}", { Ap } },
|
897 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* fwait */ |
898 | 88103cfe | blueswir1 | { "pushfT", { XX } },
|
899 | 88103cfe | blueswir1 | { "popfT", { XX } },
|
900 | 88103cfe | blueswir1 | { "sahf{|}", { XX } },
|
901 | 88103cfe | blueswir1 | { "lahf{|}", { XX } },
|
902 | dc99065b | bellard | /* a0 */
|
903 | 88103cfe | blueswir1 | { "movB", { AL, Ob } },
|
904 | 88103cfe | blueswir1 | { "movS", { eAX, Ov } },
|
905 | 88103cfe | blueswir1 | { "movB", { Ob, AL } },
|
906 | 88103cfe | blueswir1 | { "movS", { Ov, eAX } },
|
907 | 88103cfe | blueswir1 | { "movs{b||b|}", { Ybr, Xb } },
|
908 | 88103cfe | blueswir1 | { "movs{R||R|}", { Yvr, Xv } },
|
909 | 88103cfe | blueswir1 | { "cmps{b||b|}", { Xb, Yb } },
|
910 | 88103cfe | blueswir1 | { "cmps{R||R|}", { Xv, Yv } },
|
911 | dc99065b | bellard | /* a8 */
|
912 | 88103cfe | blueswir1 | { "testB", { AL, Ib } },
|
913 | 88103cfe | blueswir1 | { "testS", { eAX, Iv } },
|
914 | 88103cfe | blueswir1 | { "stosB", { Ybr, AL } },
|
915 | 88103cfe | blueswir1 | { "stosS", { Yvr, eAX } },
|
916 | 88103cfe | blueswir1 | { "lodsB", { ALr, Xb } },
|
917 | 88103cfe | blueswir1 | { "lodsS", { eAXr, Xv } },
|
918 | 88103cfe | blueswir1 | { "scasB", { AL, Yb } },
|
919 | 88103cfe | blueswir1 | { "scasS", { eAX, Yv } },
|
920 | dc99065b | bellard | /* b0 */
|
921 | 88103cfe | blueswir1 | { "movB", { RMAL, Ib } },
|
922 | 88103cfe | blueswir1 | { "movB", { RMCL, Ib } },
|
923 | 88103cfe | blueswir1 | { "movB", { RMDL, Ib } },
|
924 | 88103cfe | blueswir1 | { "movB", { RMBL, Ib } },
|
925 | 88103cfe | blueswir1 | { "movB", { RMAH, Ib } },
|
926 | 88103cfe | blueswir1 | { "movB", { RMCH, Ib } },
|
927 | 88103cfe | blueswir1 | { "movB", { RMDH, Ib } },
|
928 | 88103cfe | blueswir1 | { "movB", { RMBH, Ib } },
|
929 | dc99065b | bellard | /* b8 */
|
930 | 88103cfe | blueswir1 | { "movS", { RMeAX, Iv64 } },
|
931 | 88103cfe | blueswir1 | { "movS", { RMeCX, Iv64 } },
|
932 | 88103cfe | blueswir1 | { "movS", { RMeDX, Iv64 } },
|
933 | 88103cfe | blueswir1 | { "movS", { RMeBX, Iv64 } },
|
934 | 88103cfe | blueswir1 | { "movS", { RMeSP, Iv64 } },
|
935 | 88103cfe | blueswir1 | { "movS", { RMeBP, Iv64 } },
|
936 | 88103cfe | blueswir1 | { "movS", { RMeSI, Iv64 } },
|
937 | 88103cfe | blueswir1 | { "movS", { RMeDI, Iv64 } },
|
938 | dc99065b | bellard | /* c0 */
|
939 | dc99065b | bellard | { GRP2b }, |
940 | dc99065b | bellard | { GRP2S }, |
941 | 88103cfe | blueswir1 | { "retT", { Iw } },
|
942 | 88103cfe | blueswir1 | { "retT", { XX } },
|
943 | 88103cfe | blueswir1 | { "les{S|}", { Gv, Mp } },
|
944 | 88103cfe | blueswir1 | { "ldsS", { Gv, Mp } },
|
945 | 88103cfe | blueswir1 | { GRP11_C6 }, |
946 | 88103cfe | blueswir1 | { GRP11_C7 }, |
947 | dc99065b | bellard | /* c8 */
|
948 | 88103cfe | blueswir1 | { "enterT", { Iw, Ib } },
|
949 | 88103cfe | blueswir1 | { "leaveT", { XX } },
|
950 | 88103cfe | blueswir1 | { "lretP", { Iw } },
|
951 | 88103cfe | blueswir1 | { "lretP", { XX } },
|
952 | 88103cfe | blueswir1 | { "int3", { XX } },
|
953 | 88103cfe | blueswir1 | { "int", { Ib } },
|
954 | 88103cfe | blueswir1 | { "into{|}", { XX } },
|
955 | 88103cfe | blueswir1 | { "iretP", { XX } },
|
956 | dc99065b | bellard | /* d0 */
|
957 | dc99065b | bellard | { GRP2b_one }, |
958 | dc99065b | bellard | { GRP2S_one }, |
959 | dc99065b | bellard | { GRP2b_cl }, |
960 | dc99065b | bellard | { GRP2S_cl }, |
961 | 88103cfe | blueswir1 | { "aam{|}", { sIb } },
|
962 | 88103cfe | blueswir1 | { "aad{|}", { sIb } },
|
963 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
964 | 88103cfe | blueswir1 | { "xlat", { DSBX } },
|
965 | dc99065b | bellard | /* d8 */
|
966 | dc99065b | bellard | { FLOAT }, |
967 | dc99065b | bellard | { FLOAT }, |
968 | dc99065b | bellard | { FLOAT }, |
969 | dc99065b | bellard | { FLOAT }, |
970 | dc99065b | bellard | { FLOAT }, |
971 | dc99065b | bellard | { FLOAT }, |
972 | dc99065b | bellard | { FLOAT }, |
973 | dc99065b | bellard | { FLOAT }, |
974 | dc99065b | bellard | /* e0 */
|
975 | 88103cfe | blueswir1 | { "loopneFH", { Jb, XX, loop_jcxz_flag } },
|
976 | 88103cfe | blueswir1 | { "loopeFH", { Jb, XX, loop_jcxz_flag } },
|
977 | 88103cfe | blueswir1 | { "loopFH", { Jb, XX, loop_jcxz_flag } },
|
978 | 88103cfe | blueswir1 | { "jEcxzH", { Jb, XX, loop_jcxz_flag } },
|
979 | 88103cfe | blueswir1 | { "inB", { AL, Ib } },
|
980 | 88103cfe | blueswir1 | { "inG", { zAX, Ib } },
|
981 | 88103cfe | blueswir1 | { "outB", { Ib, AL } },
|
982 | 88103cfe | blueswir1 | { "outG", { Ib, zAX } },
|
983 | dc99065b | bellard | /* e8 */
|
984 | 88103cfe | blueswir1 | { "callT", { Jv } },
|
985 | 88103cfe | blueswir1 | { "jmpT", { Jv } },
|
986 | 88103cfe | blueswir1 | { "Jjmp{T|}", { Ap } },
|
987 | 88103cfe | blueswir1 | { "jmp", { Jb } },
|
988 | 88103cfe | blueswir1 | { "inB", { AL, indirDX } },
|
989 | 88103cfe | blueswir1 | { "inG", { zAX, indirDX } },
|
990 | 88103cfe | blueswir1 | { "outB", { indirDX, AL } },
|
991 | 88103cfe | blueswir1 | { "outG", { indirDX, zAX } },
|
992 | dc99065b | bellard | /* f0 */
|
993 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* lock prefix */ |
994 | 88103cfe | blueswir1 | { "icebp", { XX } },
|
995 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* repne */ |
996 | 88103cfe | blueswir1 | { "(bad)", { XX } }, /* repz */ |
997 | 88103cfe | blueswir1 | { "hlt", { XX } },
|
998 | 88103cfe | blueswir1 | { "cmc", { XX } },
|
999 | dc99065b | bellard | { GRP3b }, |
1000 | dc99065b | bellard | { GRP3S }, |
1001 | dc99065b | bellard | /* f8 */
|
1002 | 88103cfe | blueswir1 | { "clc", { XX } },
|
1003 | 88103cfe | blueswir1 | { "stc", { XX } },
|
1004 | 88103cfe | blueswir1 | { "cli", { XX } },
|
1005 | 88103cfe | blueswir1 | { "sti", { XX } },
|
1006 | 88103cfe | blueswir1 | { "cld", { XX } },
|
1007 | 88103cfe | blueswir1 | { "std", { XX } },
|
1008 | dc99065b | bellard | { GRP4 }, |
1009 | dc99065b | bellard | { GRP5 }, |
1010 | dc99065b | bellard | }; |
1011 | dc99065b | bellard | |
1012 | bc51c5c9 | bellard | static const struct dis386 dis386_twobyte[] = { |
1013 | dc99065b | bellard | /* 00 */
|
1014 | dc99065b | bellard | { GRP6 }, |
1015 | dc99065b | bellard | { GRP7 }, |
1016 | 88103cfe | blueswir1 | { "larS", { Gv, Ew } },
|
1017 | 88103cfe | blueswir1 | { "lslS", { Gv, Ew } },
|
1018 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1019 | 88103cfe | blueswir1 | { "syscall", { XX } },
|
1020 | 88103cfe | blueswir1 | { "clts", { XX } },
|
1021 | 88103cfe | blueswir1 | { "sysretP", { XX } },
|
1022 | dc99065b | bellard | /* 08 */
|
1023 | 88103cfe | blueswir1 | { "invd", { XX } },
|
1024 | 88103cfe | blueswir1 | { "wbinvd", { XX } },
|
1025 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1026 | 88103cfe | blueswir1 | { "ud2a", { XX } },
|
1027 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1028 | bc51c5c9 | bellard | { GRPAMD }, |
1029 | 88103cfe | blueswir1 | { "femms", { XX } },
|
1030 | 88103cfe | blueswir1 | { "", { MX, EM, OPSUF } }, /* See OP_3DNowSuffix. */ |
1031 | dc99065b | bellard | /* 10 */
|
1032 | bc51c5c9 | bellard | { PREGRP8 }, |
1033 | bc51c5c9 | bellard | { PREGRP9 }, |
1034 | c2c73b42 | blueswir1 | { PREGRP30 }, |
1035 | 88103cfe | blueswir1 | { "movlpX", { EXq, XM, { SIMD_Fixup, 'h' } } }, |
1036 | 88103cfe | blueswir1 | { "unpcklpX", { XM, EXq } },
|
1037 | 88103cfe | blueswir1 | { "unpckhpX", { XM, EXq } },
|
1038 | c2c73b42 | blueswir1 | { PREGRP31 }, |
1039 | 88103cfe | blueswir1 | { "movhpX", { EXq, XM, { SIMD_Fixup, 'l' } } }, |
1040 | dc99065b | bellard | /* 18 */
|
1041 | 88103cfe | blueswir1 | { GRP16 }, |
1042 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1043 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1044 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1045 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1046 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1047 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1048 | 88103cfe | blueswir1 | { "nopQ", { Ev } },
|
1049 | dc99065b | bellard | /* 20 */
|
1050 | 88103cfe | blueswir1 | { "movZ", { Rm, Cm } },
|
1051 | 88103cfe | blueswir1 | { "movZ", { Rm, Dm } },
|
1052 | 88103cfe | blueswir1 | { "movZ", { Cm, Rm } },
|
1053 | 88103cfe | blueswir1 | { "movZ", { Dm, Rm } },
|
1054 | 88103cfe | blueswir1 | { "movL", { Rd, Td } },
|
1055 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1056 | 88103cfe | blueswir1 | { "movL", { Td, Rd } },
|
1057 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1058 | dc99065b | bellard | /* 28 */
|
1059 | 88103cfe | blueswir1 | { "movapX", { XM, EXx } },
|
1060 | 88103cfe | blueswir1 | { "movapX", { EXx, XM } },
|
1061 | bc51c5c9 | bellard | { PREGRP2 }, |
1062 | 88103cfe | blueswir1 | { PREGRP33 }, |
1063 | bc51c5c9 | bellard | { PREGRP4 }, |
1064 | bc51c5c9 | bellard | { PREGRP3 }, |
1065 | 88103cfe | blueswir1 | { PREGRP93 }, |
1066 | 88103cfe | blueswir1 | { PREGRP94 }, |
1067 | dc99065b | bellard | /* 30 */
|
1068 | 88103cfe | blueswir1 | { "wrmsr", { XX } },
|
1069 | 88103cfe | blueswir1 | { "rdtsc", { XX } },
|
1070 | 88103cfe | blueswir1 | { "rdmsr", { XX } },
|
1071 | 88103cfe | blueswir1 | { "rdpmc", { XX } },
|
1072 | 88103cfe | blueswir1 | { "sysenter", { XX } },
|
1073 | 88103cfe | blueswir1 | { "sysexit", { XX } },
|
1074 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1075 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1076 | dc99065b | bellard | /* 38 */
|
1077 | c2c73b42 | blueswir1 | { THREE_BYTE_0 }, |
1078 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1079 | c2c73b42 | blueswir1 | { THREE_BYTE_1 }, |
1080 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1081 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1082 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1083 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1084 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1085 | dc99065b | bellard | /* 40 */
|
1086 | 88103cfe | blueswir1 | { "cmovo", { Gv, Ev } },
|
1087 | 88103cfe | blueswir1 | { "cmovno", { Gv, Ev } },
|
1088 | 88103cfe | blueswir1 | { "cmovb", { Gv, Ev } },
|
1089 | 88103cfe | blueswir1 | { "cmovae", { Gv, Ev } },
|
1090 | 88103cfe | blueswir1 | { "cmove", { Gv, Ev } },
|
1091 | 88103cfe | blueswir1 | { "cmovne", { Gv, Ev } },
|
1092 | 88103cfe | blueswir1 | { "cmovbe", { Gv, Ev } },
|
1093 | 88103cfe | blueswir1 | { "cmova", { Gv, Ev } },
|
1094 | dc99065b | bellard | /* 48 */
|
1095 | 88103cfe | blueswir1 | { "cmovs", { Gv, Ev } },
|
1096 | 88103cfe | blueswir1 | { "cmovns", { Gv, Ev } },
|
1097 | 88103cfe | blueswir1 | { "cmovp", { Gv, Ev } },
|
1098 | 88103cfe | blueswir1 | { "cmovnp", { Gv, Ev } },
|
1099 | 88103cfe | blueswir1 | { "cmovl", { Gv, Ev } },
|
1100 | 88103cfe | blueswir1 | { "cmovge", { Gv, Ev } },
|
1101 | 88103cfe | blueswir1 | { "cmovle", { Gv, Ev } },
|
1102 | 88103cfe | blueswir1 | { "cmovg", { Gv, Ev } },
|
1103 | dc99065b | bellard | /* 50 */
|
1104 | 88103cfe | blueswir1 | { "movmskpX", { Gdq, XS } },
|
1105 | bc51c5c9 | bellard | { PREGRP13 }, |
1106 | bc51c5c9 | bellard | { PREGRP12 }, |
1107 | bc51c5c9 | bellard | { PREGRP11 }, |
1108 | 88103cfe | blueswir1 | { "andpX", { XM, EXx } },
|
1109 | 88103cfe | blueswir1 | { "andnpX", { XM, EXx } },
|
1110 | 88103cfe | blueswir1 | { "orpX", { XM, EXx } },
|
1111 | 88103cfe | blueswir1 | { "xorpX", { XM, EXx } },
|
1112 | dc99065b | bellard | /* 58 */
|
1113 | bc51c5c9 | bellard | { PREGRP0 }, |
1114 | bc51c5c9 | bellard | { PREGRP10 }, |
1115 | bc51c5c9 | bellard | { PREGRP17 }, |
1116 | bc51c5c9 | bellard | { PREGRP16 }, |
1117 | bc51c5c9 | bellard | { PREGRP14 }, |
1118 | bc51c5c9 | bellard | { PREGRP7 }, |
1119 | bc51c5c9 | bellard | { PREGRP5 }, |
1120 | bc51c5c9 | bellard | { PREGRP6 }, |
1121 | dc99065b | bellard | /* 60 */
|
1122 | 88103cfe | blueswir1 | { PREGRP95 }, |
1123 | 88103cfe | blueswir1 | { PREGRP96 }, |
1124 | 88103cfe | blueswir1 | { PREGRP97 }, |
1125 | 88103cfe | blueswir1 | { "packsswb", { MX, EM } },
|
1126 | 88103cfe | blueswir1 | { "pcmpgtb", { MX, EM } },
|
1127 | 88103cfe | blueswir1 | { "pcmpgtw", { MX, EM } },
|
1128 | 88103cfe | blueswir1 | { "pcmpgtd", { MX, EM } },
|
1129 | 88103cfe | blueswir1 | { "packuswb", { MX, EM } },
|
1130 | dc99065b | bellard | /* 68 */
|
1131 | 88103cfe | blueswir1 | { "punpckhbw", { MX, EM } },
|
1132 | 88103cfe | blueswir1 | { "punpckhwd", { MX, EM } },
|
1133 | 88103cfe | blueswir1 | { "punpckhdq", { MX, EM } },
|
1134 | 88103cfe | blueswir1 | { "packssdw", { MX, EM } },
|
1135 | bc51c5c9 | bellard | { PREGRP26 }, |
1136 | bc51c5c9 | bellard | { PREGRP24 }, |
1137 | 88103cfe | blueswir1 | { "movd", { MX, Edq } },
|
1138 | bc51c5c9 | bellard | { PREGRP19 }, |
1139 | dc99065b | bellard | /* 70 */
|
1140 | bc51c5c9 | bellard | { PREGRP22 }, |
1141 | dc99065b | bellard | { GRP12 }, |
1142 | 88103cfe | blueswir1 | { GRP13 }, |
1143 | 88103cfe | blueswir1 | { GRP14 }, |
1144 | 88103cfe | blueswir1 | { "pcmpeqb", { MX, EM } },
|
1145 | 88103cfe | blueswir1 | { "pcmpeqw", { MX, EM } },
|
1146 | 88103cfe | blueswir1 | { "pcmpeqd", { MX, EM } },
|
1147 | 88103cfe | blueswir1 | { "emms", { XX } },
|
1148 | dc99065b | bellard | /* 78 */
|
1149 | 88103cfe | blueswir1 | { PREGRP34 }, |
1150 | 88103cfe | blueswir1 | { PREGRP35 }, |
1151 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1152 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1153 | c2c73b42 | blueswir1 | { PREGRP28 }, |
1154 | c2c73b42 | blueswir1 | { PREGRP29 }, |
1155 | bc51c5c9 | bellard | { PREGRP23 }, |
1156 | bc51c5c9 | bellard | { PREGRP20 }, |
1157 | dc99065b | bellard | /* 80 */
|
1158 | 88103cfe | blueswir1 | { "joH", { Jv, XX, cond_jump_flag } },
|
1159 | 88103cfe | blueswir1 | { "jnoH", { Jv, XX, cond_jump_flag } },
|
1160 | 88103cfe | blueswir1 | { "jbH", { Jv, XX, cond_jump_flag } },
|
1161 | 88103cfe | blueswir1 | { "jaeH", { Jv, XX, cond_jump_flag } },
|
1162 | 88103cfe | blueswir1 | { "jeH", { Jv, XX, cond_jump_flag } },
|
1163 | 88103cfe | blueswir1 | { "jneH", { Jv, XX, cond_jump_flag } },
|
1164 | 88103cfe | blueswir1 | { "jbeH", { Jv, XX, cond_jump_flag } },
|
1165 | 88103cfe | blueswir1 | { "jaH", { Jv, XX, cond_jump_flag } },
|
1166 | dc99065b | bellard | /* 88 */
|
1167 | 88103cfe | blueswir1 | { "jsH", { Jv, XX, cond_jump_flag } },
|
1168 | 88103cfe | blueswir1 | { "jnsH", { Jv, XX, cond_jump_flag } },
|
1169 | 88103cfe | blueswir1 | { "jpH", { Jv, XX, cond_jump_flag } },
|
1170 | 88103cfe | blueswir1 | { "jnpH", { Jv, XX, cond_jump_flag } },
|
1171 | 88103cfe | blueswir1 | { "jlH", { Jv, XX, cond_jump_flag } },
|
1172 | 88103cfe | blueswir1 | { "jgeH", { Jv, XX, cond_jump_flag } },
|
1173 | 88103cfe | blueswir1 | { "jleH", { Jv, XX, cond_jump_flag } },
|
1174 | 88103cfe | blueswir1 | { "jgH", { Jv, XX, cond_jump_flag } },
|
1175 | dc99065b | bellard | /* 90 */
|
1176 | 88103cfe | blueswir1 | { "seto", { Eb } },
|
1177 | 88103cfe | blueswir1 | { "setno", { Eb } },
|
1178 | 88103cfe | blueswir1 | { "setb", { Eb } },
|
1179 | 88103cfe | blueswir1 | { "setae", { Eb } },
|
1180 | 88103cfe | blueswir1 | { "sete", { Eb } },
|
1181 | 88103cfe | blueswir1 | { "setne", { Eb } },
|
1182 | 88103cfe | blueswir1 | { "setbe", { Eb } },
|
1183 | 88103cfe | blueswir1 | { "seta", { Eb } },
|
1184 | dc99065b | bellard | /* 98 */
|
1185 | 88103cfe | blueswir1 | { "sets", { Eb } },
|
1186 | 88103cfe | blueswir1 | { "setns", { Eb } },
|
1187 | 88103cfe | blueswir1 | { "setp", { Eb } },
|
1188 | 88103cfe | blueswir1 | { "setnp", { Eb } },
|
1189 | 88103cfe | blueswir1 | { "setl", { Eb } },
|
1190 | 88103cfe | blueswir1 | { "setge", { Eb } },
|
1191 | 88103cfe | blueswir1 | { "setle", { Eb } },
|
1192 | 88103cfe | blueswir1 | { "setg", { Eb } },
|
1193 | dc99065b | bellard | /* a0 */
|
1194 | 88103cfe | blueswir1 | { "pushT", { fs } },
|
1195 | 88103cfe | blueswir1 | { "popT", { fs } },
|
1196 | 88103cfe | blueswir1 | { "cpuid", { XX } },
|
1197 | 88103cfe | blueswir1 | { "btS", { Ev, Gv } },
|
1198 | 88103cfe | blueswir1 | { "shldS", { Ev, Gv, Ib } },
|
1199 | 88103cfe | blueswir1 | { "shldS", { Ev, Gv, CL } },
|
1200 | c2c73b42 | blueswir1 | { GRPPADLCK2 }, |
1201 | c2c73b42 | blueswir1 | { GRPPADLCK1 }, |
1202 | dc99065b | bellard | /* a8 */
|
1203 | 88103cfe | blueswir1 | { "pushT", { gs } },
|
1204 | 88103cfe | blueswir1 | { "popT", { gs } },
|
1205 | 88103cfe | blueswir1 | { "rsm", { XX } },
|
1206 | 88103cfe | blueswir1 | { "btsS", { Ev, Gv } },
|
1207 | 88103cfe | blueswir1 | { "shrdS", { Ev, Gv, Ib } },
|
1208 | 88103cfe | blueswir1 | { "shrdS", { Ev, Gv, CL } },
|
1209 | 88103cfe | blueswir1 | { GRP15 }, |
1210 | 88103cfe | blueswir1 | { "imulS", { Gv, Ev } },
|
1211 | dc99065b | bellard | /* b0 */
|
1212 | 88103cfe | blueswir1 | { "cmpxchgB", { Eb, Gb } },
|
1213 | 88103cfe | blueswir1 | { "cmpxchgS", { Ev, Gv } },
|
1214 | 88103cfe | blueswir1 | { "lssS", { Gv, Mp } },
|
1215 | 88103cfe | blueswir1 | { "btrS", { Ev, Gv } },
|
1216 | 88103cfe | blueswir1 | { "lfsS", { Gv, Mp } },
|
1217 | 88103cfe | blueswir1 | { "lgsS", { Gv, Mp } },
|
1218 | 88103cfe | blueswir1 | { "movz{bR|x|bR|x}", { Gv, Eb } },
|
1219 | 88103cfe | blueswir1 | { "movz{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movzww ! */ |
1220 | dc99065b | bellard | /* b8 */
|
1221 | 88103cfe | blueswir1 | { PREGRP37 }, |
1222 | 88103cfe | blueswir1 | { "ud2b", { XX } },
|
1223 | dc99065b | bellard | { GRP8 }, |
1224 | 88103cfe | blueswir1 | { "btcS", { Ev, Gv } },
|
1225 | 88103cfe | blueswir1 | { "bsfS", { Gv, Ev } },
|
1226 | 88103cfe | blueswir1 | { PREGRP36 }, |
1227 | 88103cfe | blueswir1 | { "movs{bR|x|bR|x}", { Gv, Eb } },
|
1228 | 88103cfe | blueswir1 | { "movs{wR|x|wR|x}", { Gv, Ew } }, /* yes, there really is movsww ! */ |
1229 | dc99065b | bellard | /* c0 */
|
1230 | 88103cfe | blueswir1 | { "xaddB", { Eb, Gb } },
|
1231 | 88103cfe | blueswir1 | { "xaddS", { Ev, Gv } },
|
1232 | bc51c5c9 | bellard | { PREGRP1 }, |
1233 | 88103cfe | blueswir1 | { "movntiS", { Ev, Gv } },
|
1234 | 88103cfe | blueswir1 | { "pinsrw", { MX, Edqw, Ib } },
|
1235 | 88103cfe | blueswir1 | { "pextrw", { Gdq, MS, Ib } },
|
1236 | 88103cfe | blueswir1 | { "shufpX", { XM, EXx, Ib } },
|
1237 | bc51c5c9 | bellard | { GRP9 }, |
1238 | dc99065b | bellard | /* c8 */
|
1239 | 88103cfe | blueswir1 | { "bswap", { RMeAX } },
|
1240 | 88103cfe | blueswir1 | { "bswap", { RMeCX } },
|
1241 | 88103cfe | blueswir1 | { "bswap", { RMeDX } },
|
1242 | 88103cfe | blueswir1 | { "bswap", { RMeBX } },
|
1243 | 88103cfe | blueswir1 | { "bswap", { RMeSP } },
|
1244 | 88103cfe | blueswir1 | { "bswap", { RMeBP } },
|
1245 | 88103cfe | blueswir1 | { "bswap", { RMeSI } },
|
1246 | 88103cfe | blueswir1 | { "bswap", { RMeDI } },
|
1247 | dc99065b | bellard | /* d0 */
|
1248 | c2c73b42 | blueswir1 | { PREGRP27 }, |
1249 | 88103cfe | blueswir1 | { "psrlw", { MX, EM } },
|
1250 | 88103cfe | blueswir1 | { "psrld", { MX, EM } },
|
1251 | 88103cfe | blueswir1 | { "psrlq", { MX, EM } },
|
1252 | 88103cfe | blueswir1 | { "paddq", { MX, EM } },
|
1253 | 88103cfe | blueswir1 | { "pmullw", { MX, EM } },
|
1254 | bc51c5c9 | bellard | { PREGRP21 }, |
1255 | 88103cfe | blueswir1 | { "pmovmskb", { Gdq, MS } },
|
1256 | dc99065b | bellard | /* d8 */
|
1257 | 88103cfe | blueswir1 | { "psubusb", { MX, EM } },
|
1258 | 88103cfe | blueswir1 | { "psubusw", { MX, EM } },
|
1259 | 88103cfe | blueswir1 | { "pminub", { MX, EM } },
|
1260 | 88103cfe | blueswir1 | { "pand", { MX, EM } },
|
1261 | 88103cfe | blueswir1 | { "paddusb", { MX, EM } },
|
1262 | 88103cfe | blueswir1 | { "paddusw", { MX, EM } },
|
1263 | 88103cfe | blueswir1 | { "pmaxub", { MX, EM } },
|
1264 | 88103cfe | blueswir1 | { "pandn", { MX, EM } },
|
1265 | dc99065b | bellard | /* e0 */
|
1266 | 88103cfe | blueswir1 | { "pavgb", { MX, EM } },
|
1267 | 88103cfe | blueswir1 | { "psraw", { MX, EM } },
|
1268 | 88103cfe | blueswir1 | { "psrad", { MX, EM } },
|
1269 | 88103cfe | blueswir1 | { "pavgw", { MX, EM } },
|
1270 | 88103cfe | blueswir1 | { "pmulhuw", { MX, EM } },
|
1271 | 88103cfe | blueswir1 | { "pmulhw", { MX, EM } },
|
1272 | bc51c5c9 | bellard | { PREGRP15 }, |
1273 | bc51c5c9 | bellard | { PREGRP25 }, |
1274 | dc99065b | bellard | /* e8 */
|
1275 | 88103cfe | blueswir1 | { "psubsb", { MX, EM } },
|
1276 | 88103cfe | blueswir1 | { "psubsw", { MX, EM } },
|
1277 | 88103cfe | blueswir1 | { "pminsw", { MX, EM } },
|
1278 | 88103cfe | blueswir1 | { "por", { MX, EM } },
|
1279 | 88103cfe | blueswir1 | { "paddsb", { MX, EM } },
|
1280 | 88103cfe | blueswir1 | { "paddsw", { MX, EM } },
|
1281 | 88103cfe | blueswir1 | { "pmaxsw", { MX, EM } },
|
1282 | 88103cfe | blueswir1 | { "pxor", { MX, EM } },
|
1283 | dc99065b | bellard | /* f0 */
|
1284 | c2c73b42 | blueswir1 | { PREGRP32 }, |
1285 | 88103cfe | blueswir1 | { "psllw", { MX, EM } },
|
1286 | 88103cfe | blueswir1 | { "pslld", { MX, EM } },
|
1287 | 88103cfe | blueswir1 | { "psllq", { MX, EM } },
|
1288 | 88103cfe | blueswir1 | { "pmuludq", { MX, EM } },
|
1289 | 88103cfe | blueswir1 | { "pmaddwd", { MX, EM } },
|
1290 | 88103cfe | blueswir1 | { "psadbw", { MX, EM } },
|
1291 | bc51c5c9 | bellard | { PREGRP18 }, |
1292 | dc99065b | bellard | /* f8 */
|
1293 | 88103cfe | blueswir1 | { "psubb", { MX, EM } },
|
1294 | 88103cfe | blueswir1 | { "psubw", { MX, EM } },
|
1295 | 88103cfe | blueswir1 | { "psubd", { MX, EM } },
|
1296 | 88103cfe | blueswir1 | { "psubq", { MX, EM } },
|
1297 | 88103cfe | blueswir1 | { "paddb", { MX, EM } },
|
1298 | 88103cfe | blueswir1 | { "paddw", { MX, EM } },
|
1299 | 88103cfe | blueswir1 | { "paddd", { MX, EM } },
|
1300 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1301 | dc99065b | bellard | }; |
1302 | dc99065b | bellard | |
1303 | dc99065b | bellard | static const unsigned char onebyte_has_modrm[256] = { |
1304 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1305 | bc51c5c9 | bellard | /* ------------------------------- */
|
1306 | bc51c5c9 | bellard | /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ |
1307 | bc51c5c9 | bellard | /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ |
1308 | bc51c5c9 | bellard | /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ |
1309 | bc51c5c9 | bellard | /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ |
1310 | bc51c5c9 | bellard | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ |
1311 | bc51c5c9 | bellard | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ |
1312 | bc51c5c9 | bellard | /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ |
1313 | bc51c5c9 | bellard | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ |
1314 | bc51c5c9 | bellard | /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ |
1315 | bc51c5c9 | bellard | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ |
1316 | bc51c5c9 | bellard | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ |
1317 | bc51c5c9 | bellard | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ |
1318 | bc51c5c9 | bellard | /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ |
1319 | bc51c5c9 | bellard | /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ |
1320 | bc51c5c9 | bellard | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ |
1321 | bc51c5c9 | bellard | /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ |
1322 | bc51c5c9 | bellard | /* ------------------------------- */
|
1323 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1324 | dc99065b | bellard | }; |
1325 | dc99065b | bellard | |
1326 | dc99065b | bellard | static const unsigned char twobyte_has_modrm[256] = { |
1327 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1328 | bc51c5c9 | bellard | /* ------------------------------- */
|
1329 | bc51c5c9 | bellard | /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ |
1330 | 88103cfe | blueswir1 | /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,1, /* 1f */ |
1331 | bc51c5c9 | bellard | /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ |
1332 | c2c73b42 | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ |
1333 | dc99065b | bellard | /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ |
1334 | bc51c5c9 | bellard | /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ |
1335 | bc51c5c9 | bellard | /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ |
1336 | c2c73b42 | blueswir1 | /* 70 */ 1,1,1,1,1,1,1,0,1,1,0,0,1,1,1,1, /* 7f */ |
1337 | dc99065b | bellard | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1338 | dc99065b | bellard | /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ |
1339 | c2c73b42 | blueswir1 | /* a0 */ 0,0,0,1,1,1,1,1,0,0,0,1,1,1,1,1, /* af */ |
1340 | 88103cfe | blueswir1 | /* b0 */ 1,1,1,1,1,1,1,1,1,0,1,1,1,1,1,1, /* bf */ |
1341 | dc99065b | bellard | /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ |
1342 | c2c73b42 | blueswir1 | /* d0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ |
1343 | bc51c5c9 | bellard | /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ |
1344 | c2c73b42 | blueswir1 | /* f0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ |
1345 | bc51c5c9 | bellard | /* ------------------------------- */
|
1346 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1347 | bc51c5c9 | bellard | }; |
1348 | bc51c5c9 | bellard | |
1349 | 88103cfe | blueswir1 | static const unsigned char twobyte_uses_DATA_prefix[256] = { |
1350 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1351 | bc51c5c9 | bellard | /* ------------------------------- */
|
1352 | bc51c5c9 | bellard | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1353 | c2c73b42 | blueswir1 | /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ |
1354 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ |
1355 | c2c73b42 | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,1,0,1,0,0,0,0,0, /* 3f */ |
1356 | bc51c5c9 | bellard | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1357 | bc51c5c9 | bellard | /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ |
1358 | bc51c5c9 | bellard | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ |
1359 | 88103cfe | blueswir1 | /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,1,1, /* 7f */ |
1360 | bc51c5c9 | bellard | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1361 | bc51c5c9 | bellard | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1362 | bc51c5c9 | bellard | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1363 | bc51c5c9 | bellard | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1364 | bc51c5c9 | bellard | /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1365 | c2c73b42 | blueswir1 | /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ |
1366 | bc51c5c9 | bellard | /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ |
1367 | c2c73b42 | blueswir1 | /* f0 */ 1,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ |
1368 | bc51c5c9 | bellard | /* ------------------------------- */
|
1369 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1370 | dc99065b | bellard | }; |
1371 | dc99065b | bellard | |
1372 | 88103cfe | blueswir1 | static const unsigned char twobyte_uses_REPNZ_prefix[256] = { |
1373 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1374 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1375 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1376 | 88103cfe | blueswir1 | /* 10 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ |
1377 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ |
1378 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1379 | 88103cfe | blueswir1 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1380 | 88103cfe | blueswir1 | /* 50 */ 0,1,0,0,0,0,0,0,1,1,1,0,1,1,1,1, /* 5f */ |
1381 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1382 | 88103cfe | blueswir1 | /* 70 */ 1,0,0,0,0,0,0,0,1,1,0,0,1,1,0,0, /* 7f */ |
1383 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1384 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1385 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1386 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1387 | 88103cfe | blueswir1 | /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1388 | 88103cfe | blueswir1 | /* d0 */ 1,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ |
1389 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ |
1390 | 88103cfe | blueswir1 | /* f0 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1391 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1392 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1393 | 88103cfe | blueswir1 | }; |
1394 | 88103cfe | blueswir1 | |
1395 | 88103cfe | blueswir1 | static const unsigned char twobyte_uses_REPZ_prefix[256] = { |
1396 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1397 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1398 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1399 | 88103cfe | blueswir1 | /* 10 */ 1,1,1,0,0,0,1,0,0,0,0,0,0,0,0,0, /* 1f */ |
1400 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,1,1,1,0,0, /* 2f */ |
1401 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1402 | 88103cfe | blueswir1 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1403 | 88103cfe | blueswir1 | /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ |
1404 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,1, /* 6f */ |
1405 | 88103cfe | blueswir1 | /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ |
1406 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1407 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1408 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1409 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,1,0,0,0,0,1,0,0, /* bf */ |
1410 | 88103cfe | blueswir1 | /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1411 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ |
1412 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ |
1413 | 88103cfe | blueswir1 | /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1414 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1415 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1416 | 88103cfe | blueswir1 | }; |
1417 | 88103cfe | blueswir1 | |
1418 | 88103cfe | blueswir1 | /* This is used to determine if opcode 0f 38 XX uses DATA prefix. */
|
1419 | 88103cfe | blueswir1 | static const unsigned char threebyte_0x38_uses_DATA_prefix[256] = { |
1420 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1421 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1422 | 88103cfe | blueswir1 | /* 00 */ 1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0, /* 0f */ |
1423 | 88103cfe | blueswir1 | /* 10 */ 1,0,0,0,1,1,0,1,0,0,0,0,1,1,1,0, /* 1f */ |
1424 | 88103cfe | blueswir1 | /* 20 */ 1,1,1,1,1,1,0,0,1,1,1,1,0,0,0,0, /* 2f */ |
1425 | 88103cfe | blueswir1 | /* 30 */ 1,1,1,1,1,1,0,1,1,1,1,1,1,1,1,1, /* 3f */ |
1426 | 88103cfe | blueswir1 | /* 40 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1427 | 88103cfe | blueswir1 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ |
1428 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1429 | 88103cfe | blueswir1 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ |
1430 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1431 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1432 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1433 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1434 | 88103cfe | blueswir1 | /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1435 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ |
1436 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ |
1437 | 88103cfe | blueswir1 | /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1438 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1439 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1440 | 88103cfe | blueswir1 | }; |
1441 | 88103cfe | blueswir1 | |
1442 | 88103cfe | blueswir1 | /* This is used to determine if opcode 0f 38 XX uses REPNZ prefix. */
|
1443 | 88103cfe | blueswir1 | static const unsigned char threebyte_0x38_uses_REPNZ_prefix[256] = { |
1444 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1445 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1446 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1447 | 88103cfe | blueswir1 | /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ |
1448 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ |
1449 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1450 | 88103cfe | blueswir1 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1451 | 88103cfe | blueswir1 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ |
1452 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1453 | 88103cfe | blueswir1 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ |
1454 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1455 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1456 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1457 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1458 | 88103cfe | blueswir1 | /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1459 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ |
1460 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ |
1461 | 88103cfe | blueswir1 | /* f0 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1462 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1463 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1464 | 88103cfe | blueswir1 | }; |
1465 | 88103cfe | blueswir1 | |
1466 | 88103cfe | blueswir1 | /* This is used to determine if opcode 0f 38 XX uses REPZ prefix. */
|
1467 | 88103cfe | blueswir1 | static const unsigned char threebyte_0x38_uses_REPZ_prefix[256] = { |
1468 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1469 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1470 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1471 | 88103cfe | blueswir1 | /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ |
1472 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ |
1473 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1474 | 88103cfe | blueswir1 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1475 | 88103cfe | blueswir1 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ |
1476 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1477 | 88103cfe | blueswir1 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ |
1478 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1479 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1480 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1481 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1482 | 88103cfe | blueswir1 | /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1483 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ |
1484 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ |
1485 | 88103cfe | blueswir1 | /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1486 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1487 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1488 | 88103cfe | blueswir1 | }; |
1489 | 88103cfe | blueswir1 | |
1490 | 88103cfe | blueswir1 | /* This is used to determine if opcode 0f 3a XX uses DATA prefix. */
|
1491 | 88103cfe | blueswir1 | static const unsigned char threebyte_0x3a_uses_DATA_prefix[256] = { |
1492 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1493 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1494 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,1,1,1,1,1,1,1,1, /* 0f */ |
1495 | 88103cfe | blueswir1 | /* 10 */ 0,0,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* 1f */ |
1496 | 88103cfe | blueswir1 | /* 20 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ |
1497 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1498 | 88103cfe | blueswir1 | /* 40 */ 1,1,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1499 | 88103cfe | blueswir1 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ |
1500 | 88103cfe | blueswir1 | /* 60 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1501 | 88103cfe | blueswir1 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ |
1502 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1503 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1504 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1505 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1506 | 88103cfe | blueswir1 | /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1507 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ |
1508 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ |
1509 | 88103cfe | blueswir1 | /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1510 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1511 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1512 | 88103cfe | blueswir1 | }; |
1513 | 88103cfe | blueswir1 | |
1514 | 88103cfe | blueswir1 | /* This is used to determine if opcode 0f 3a XX uses REPNZ prefix. */
|
1515 | 88103cfe | blueswir1 | static const unsigned char threebyte_0x3a_uses_REPNZ_prefix[256] = { |
1516 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1517 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1518 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1519 | 88103cfe | blueswir1 | /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ |
1520 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ |
1521 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1522 | 88103cfe | blueswir1 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1523 | 88103cfe | blueswir1 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ |
1524 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1525 | 88103cfe | blueswir1 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ |
1526 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1527 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1528 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1529 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1530 | 88103cfe | blueswir1 | /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1531 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ |
1532 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ |
1533 | 88103cfe | blueswir1 | /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1534 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1535 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1536 | 88103cfe | blueswir1 | }; |
1537 | 88103cfe | blueswir1 | |
1538 | 88103cfe | blueswir1 | /* This is used to determine if opcode 0f 3a XX uses REPZ prefix. */
|
1539 | 88103cfe | blueswir1 | static const unsigned char threebyte_0x3a_uses_REPZ_prefix[256] = { |
1540 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1541 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1542 | 88103cfe | blueswir1 | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1543 | 88103cfe | blueswir1 | /* 10 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ |
1544 | 88103cfe | blueswir1 | /* 20 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 2f */ |
1545 | 88103cfe | blueswir1 | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1546 | 88103cfe | blueswir1 | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1547 | 88103cfe | blueswir1 | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 5f */ |
1548 | 88103cfe | blueswir1 | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 6f */ |
1549 | 88103cfe | blueswir1 | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 7f */ |
1550 | 88103cfe | blueswir1 | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1551 | 88103cfe | blueswir1 | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1552 | 88103cfe | blueswir1 | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1553 | 88103cfe | blueswir1 | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1554 | 88103cfe | blueswir1 | /* c0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1555 | 88103cfe | blueswir1 | /* d0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* df */ |
1556 | 88103cfe | blueswir1 | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ef */ |
1557 | 88103cfe | blueswir1 | /* f0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* ff */ |
1558 | 88103cfe | blueswir1 | /* ------------------------------- */
|
1559 | 88103cfe | blueswir1 | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1560 | 88103cfe | blueswir1 | }; |
1561 | 88103cfe | blueswir1 | |
1562 | dc99065b | bellard | static char obuf[100]; |
1563 | dc99065b | bellard | static char *obufp; |
1564 | dc99065b | bellard | static char scratchbuf[100]; |
1565 | dc99065b | bellard | static unsigned char *start_codep; |
1566 | bc51c5c9 | bellard | static unsigned char *insn_codep; |
1567 | dc99065b | bellard | static unsigned char *codep; |
1568 | dc99065b | bellard | static disassemble_info *the_info;
|
1569 | 88103cfe | blueswir1 | static struct |
1570 | 88103cfe | blueswir1 | { |
1571 | 88103cfe | blueswir1 | int mod;
|
1572 | 88103cfe | blueswir1 | int reg;
|
1573 | 88103cfe | blueswir1 | int rm;
|
1574 | 88103cfe | blueswir1 | } |
1575 | 88103cfe | blueswir1 | modrm; |
1576 | bc51c5c9 | bellard | static unsigned char need_modrm; |
1577 | bc51c5c9 | bellard | |
1578 | bc51c5c9 | bellard | /* If we are accessing mod/rm/reg without need_modrm set, then the
|
1579 | bc51c5c9 | bellard | values are stale. Hitting this abort likely indicates that you
|
1580 | bc51c5c9 | bellard | need to update onebyte_has_modrm or twobyte_has_modrm. */
|
1581 | bc51c5c9 | bellard | #define MODRM_CHECK if (!need_modrm) abort () |
1582 | bc51c5c9 | bellard | |
1583 | 7a786a46 | blueswir1 | static const char * const *names64; |
1584 | 7a786a46 | blueswir1 | static const char * const *names32; |
1585 | 7a786a46 | blueswir1 | static const char * const *names16; |
1586 | 7a786a46 | blueswir1 | static const char * const *names8; |
1587 | 7a786a46 | blueswir1 | static const char * const *names8rex; |
1588 | 7a786a46 | blueswir1 | static const char * const *names_seg; |
1589 | 7a786a46 | blueswir1 | static const char * const *index16; |
1590 | bc51c5c9 | bellard | |
1591 | 7a786a46 | blueswir1 | static const char * const intel_names64[] = { |
1592 | bc51c5c9 | bellard | "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", |
1593 | bc51c5c9 | bellard | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" |
1594 | bc51c5c9 | bellard | }; |
1595 | 7a786a46 | blueswir1 | static const char * const intel_names32[] = { |
1596 | bc51c5c9 | bellard | "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", |
1597 | bc51c5c9 | bellard | "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" |
1598 | bc51c5c9 | bellard | }; |
1599 | 7a786a46 | blueswir1 | static const char * const intel_names16[] = { |
1600 | bc51c5c9 | bellard | "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", |
1601 | bc51c5c9 | bellard | "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" |
1602 | bc51c5c9 | bellard | }; |
1603 | 7a786a46 | blueswir1 | static const char * const intel_names8[] = { |
1604 | bc51c5c9 | bellard | "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", |
1605 | bc51c5c9 | bellard | }; |
1606 | 7a786a46 | blueswir1 | static const char * const intel_names8rex[] = { |
1607 | bc51c5c9 | bellard | "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", |
1608 | bc51c5c9 | bellard | "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" |
1609 | bc51c5c9 | bellard | }; |
1610 | 7a786a46 | blueswir1 | static const char * const intel_names_seg[] = { |
1611 | bc51c5c9 | bellard | "es", "cs", "ss", "ds", "fs", "gs", "?", "?", |
1612 | bc51c5c9 | bellard | }; |
1613 | 7a786a46 | blueswir1 | static const char * const intel_index16[] = { |
1614 | bc51c5c9 | bellard | "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" |
1615 | bc51c5c9 | bellard | }; |
1616 | dc99065b | bellard | |
1617 | 7a786a46 | blueswir1 | static const char * const att_names64[] = { |
1618 | bc51c5c9 | bellard | "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", |
1619 | bc51c5c9 | bellard | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" |
1620 | bc51c5c9 | bellard | }; |
1621 | 7a786a46 | blueswir1 | static const char * const att_names32[] = { |
1622 | bc51c5c9 | bellard | "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", |
1623 | bc51c5c9 | bellard | "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" |
1624 | dc99065b | bellard | }; |
1625 | 7a786a46 | blueswir1 | static const char * const att_names16[] = { |
1626 | bc51c5c9 | bellard | "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", |
1627 | bc51c5c9 | bellard | "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" |
1628 | dc99065b | bellard | }; |
1629 | 7a786a46 | blueswir1 | static const char * const att_names8[] = { |
1630 | bc51c5c9 | bellard | "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", |
1631 | dc99065b | bellard | }; |
1632 | 7a786a46 | blueswir1 | static const char * const att_names8rex[] = { |
1633 | bc51c5c9 | bellard | "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", |
1634 | bc51c5c9 | bellard | "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" |
1635 | dc99065b | bellard | }; |
1636 | 7a786a46 | blueswir1 | static const char * const att_names_seg[] = { |
1637 | bc51c5c9 | bellard | "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", |
1638 | bc51c5c9 | bellard | }; |
1639 | 7a786a46 | blueswir1 | static const char * const att_index16[] = { |
1640 | bc51c5c9 | bellard | "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" |
1641 | dc99065b | bellard | }; |
1642 | dc99065b | bellard | |
1643 | bc51c5c9 | bellard | static const struct dis386 grps[][8] = { |
1644 | 88103cfe | blueswir1 | /* GRP1a */
|
1645 | 88103cfe | blueswir1 | { |
1646 | 88103cfe | blueswir1 | { "popU", { stackEv } },
|
1647 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1648 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1649 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1650 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1651 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1652 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1653 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1654 | 88103cfe | blueswir1 | }, |
1655 | dc99065b | bellard | /* GRP1b */
|
1656 | dc99065b | bellard | { |
1657 | 88103cfe | blueswir1 | { "addA", { Eb, Ib } },
|
1658 | 88103cfe | blueswir1 | { "orA", { Eb, Ib } },
|
1659 | 88103cfe | blueswir1 | { "adcA", { Eb, Ib } },
|
1660 | 88103cfe | blueswir1 | { "sbbA", { Eb, Ib } },
|
1661 | 88103cfe | blueswir1 | { "andA", { Eb, Ib } },
|
1662 | 88103cfe | blueswir1 | { "subA", { Eb, Ib } },
|
1663 | 88103cfe | blueswir1 | { "xorA", { Eb, Ib } },
|
1664 | 88103cfe | blueswir1 | { "cmpA", { Eb, Ib } },
|
1665 | dc99065b | bellard | }, |
1666 | dc99065b | bellard | /* GRP1S */
|
1667 | dc99065b | bellard | { |
1668 | 88103cfe | blueswir1 | { "addQ", { Ev, Iv } },
|
1669 | 88103cfe | blueswir1 | { "orQ", { Ev, Iv } },
|
1670 | 88103cfe | blueswir1 | { "adcQ", { Ev, Iv } },
|
1671 | 88103cfe | blueswir1 | { "sbbQ", { Ev, Iv } },
|
1672 | 88103cfe | blueswir1 | { "andQ", { Ev, Iv } },
|
1673 | 88103cfe | blueswir1 | { "subQ", { Ev, Iv } },
|
1674 | 88103cfe | blueswir1 | { "xorQ", { Ev, Iv } },
|
1675 | 88103cfe | blueswir1 | { "cmpQ", { Ev, Iv } },
|
1676 | dc99065b | bellard | }, |
1677 | dc99065b | bellard | /* GRP1Ss */
|
1678 | dc99065b | bellard | { |
1679 | 88103cfe | blueswir1 | { "addQ", { Ev, sIb } },
|
1680 | 88103cfe | blueswir1 | { "orQ", { Ev, sIb } },
|
1681 | 88103cfe | blueswir1 | { "adcQ", { Ev, sIb } },
|
1682 | 88103cfe | blueswir1 | { "sbbQ", { Ev, sIb } },
|
1683 | 88103cfe | blueswir1 | { "andQ", { Ev, sIb } },
|
1684 | 88103cfe | blueswir1 | { "subQ", { Ev, sIb } },
|
1685 | 88103cfe | blueswir1 | { "xorQ", { Ev, sIb } },
|
1686 | 88103cfe | blueswir1 | { "cmpQ", { Ev, sIb } },
|
1687 | dc99065b | bellard | }, |
1688 | dc99065b | bellard | /* GRP2b */
|
1689 | dc99065b | bellard | { |
1690 | 88103cfe | blueswir1 | { "rolA", { Eb, Ib } },
|
1691 | 88103cfe | blueswir1 | { "rorA", { Eb, Ib } },
|
1692 | 88103cfe | blueswir1 | { "rclA", { Eb, Ib } },
|
1693 | 88103cfe | blueswir1 | { "rcrA", { Eb, Ib } },
|
1694 | 88103cfe | blueswir1 | { "shlA", { Eb, Ib } },
|
1695 | 88103cfe | blueswir1 | { "shrA", { Eb, Ib } },
|
1696 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1697 | 88103cfe | blueswir1 | { "sarA", { Eb, Ib } },
|
1698 | dc99065b | bellard | }, |
1699 | dc99065b | bellard | /* GRP2S */
|
1700 | dc99065b | bellard | { |
1701 | 88103cfe | blueswir1 | { "rolQ", { Ev, Ib } },
|
1702 | 88103cfe | blueswir1 | { "rorQ", { Ev, Ib } },
|
1703 | 88103cfe | blueswir1 | { "rclQ", { Ev, Ib } },
|
1704 | 88103cfe | blueswir1 | { "rcrQ", { Ev, Ib } },
|
1705 | 88103cfe | blueswir1 | { "shlQ", { Ev, Ib } },
|
1706 | 88103cfe | blueswir1 | { "shrQ", { Ev, Ib } },
|
1707 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1708 | 88103cfe | blueswir1 | { "sarQ", { Ev, Ib } },
|
1709 | dc99065b | bellard | }, |
1710 | dc99065b | bellard | /* GRP2b_one */
|
1711 | dc99065b | bellard | { |
1712 | 88103cfe | blueswir1 | { "rolA", { Eb, I1 } },
|
1713 | 88103cfe | blueswir1 | { "rorA", { Eb, I1 } },
|
1714 | 88103cfe | blueswir1 | { "rclA", { Eb, I1 } },
|
1715 | 88103cfe | blueswir1 | { "rcrA", { Eb, I1 } },
|
1716 | 88103cfe | blueswir1 | { "shlA", { Eb, I1 } },
|
1717 | 88103cfe | blueswir1 | { "shrA", { Eb, I1 } },
|
1718 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1719 | 88103cfe | blueswir1 | { "sarA", { Eb, I1 } },
|
1720 | dc99065b | bellard | }, |
1721 | dc99065b | bellard | /* GRP2S_one */
|
1722 | dc99065b | bellard | { |
1723 | 88103cfe | blueswir1 | { "rolQ", { Ev, I1 } },
|
1724 | 88103cfe | blueswir1 | { "rorQ", { Ev, I1 } },
|
1725 | 88103cfe | blueswir1 | { "rclQ", { Ev, I1 } },
|
1726 | 88103cfe | blueswir1 | { "rcrQ", { Ev, I1 } },
|
1727 | 88103cfe | blueswir1 | { "shlQ", { Ev, I1 } },
|
1728 | 88103cfe | blueswir1 | { "shrQ", { Ev, I1 } },
|
1729 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1730 | 88103cfe | blueswir1 | { "sarQ", { Ev, I1 } },
|
1731 | dc99065b | bellard | }, |
1732 | dc99065b | bellard | /* GRP2b_cl */
|
1733 | dc99065b | bellard | { |
1734 | 88103cfe | blueswir1 | { "rolA", { Eb, CL } },
|
1735 | 88103cfe | blueswir1 | { "rorA", { Eb, CL } },
|
1736 | 88103cfe | blueswir1 | { "rclA", { Eb, CL } },
|
1737 | 88103cfe | blueswir1 | { "rcrA", { Eb, CL } },
|
1738 | 88103cfe | blueswir1 | { "shlA", { Eb, CL } },
|
1739 | 88103cfe | blueswir1 | { "shrA", { Eb, CL } },
|
1740 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1741 | 88103cfe | blueswir1 | { "sarA", { Eb, CL } },
|
1742 | dc99065b | bellard | }, |
1743 | dc99065b | bellard | /* GRP2S_cl */
|
1744 | dc99065b | bellard | { |
1745 | 88103cfe | blueswir1 | { "rolQ", { Ev, CL } },
|
1746 | 88103cfe | blueswir1 | { "rorQ", { Ev, CL } },
|
1747 | 88103cfe | blueswir1 | { "rclQ", { Ev, CL } },
|
1748 | 88103cfe | blueswir1 | { "rcrQ", { Ev, CL } },
|
1749 | 88103cfe | blueswir1 | { "shlQ", { Ev, CL } },
|
1750 | 88103cfe | blueswir1 | { "shrQ", { Ev, CL } },
|
1751 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1752 | 88103cfe | blueswir1 | { "sarQ", { Ev, CL } },
|
1753 | dc99065b | bellard | }, |
1754 | dc99065b | bellard | /* GRP3b */
|
1755 | dc99065b | bellard | { |
1756 | 88103cfe | blueswir1 | { "testA", { Eb, Ib } },
|
1757 | 88103cfe | blueswir1 | { "(bad)", { Eb } },
|
1758 | 88103cfe | blueswir1 | { "notA", { Eb } },
|
1759 | 88103cfe | blueswir1 | { "negA", { Eb } },
|
1760 | 88103cfe | blueswir1 | { "mulA", { Eb } }, /* Don't print the implicit %al register, */ |
1761 | 88103cfe | blueswir1 | { "imulA", { Eb } }, /* to distinguish these opcodes from other */ |
1762 | 88103cfe | blueswir1 | { "divA", { Eb } }, /* mul/imul opcodes. Do the same for div */ |
1763 | 88103cfe | blueswir1 | { "idivA", { Eb } }, /* and idiv for consistency. */ |
1764 | dc99065b | bellard | }, |
1765 | dc99065b | bellard | /* GRP3S */
|
1766 | dc99065b | bellard | { |
1767 | 88103cfe | blueswir1 | { "testQ", { Ev, Iv } },
|
1768 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1769 | 88103cfe | blueswir1 | { "notQ", { Ev } },
|
1770 | 88103cfe | blueswir1 | { "negQ", { Ev } },
|
1771 | 88103cfe | blueswir1 | { "mulQ", { Ev } }, /* Don't print the implicit register. */ |
1772 | 88103cfe | blueswir1 | { "imulQ", { Ev } },
|
1773 | 88103cfe | blueswir1 | { "divQ", { Ev } },
|
1774 | 88103cfe | blueswir1 | { "idivQ", { Ev } },
|
1775 | dc99065b | bellard | }, |
1776 | dc99065b | bellard | /* GRP4 */
|
1777 | dc99065b | bellard | { |
1778 | 88103cfe | blueswir1 | { "incA", { Eb } },
|
1779 | 88103cfe | blueswir1 | { "decA", { Eb } },
|
1780 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1781 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1782 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1783 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1784 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1785 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1786 | dc99065b | bellard | }, |
1787 | dc99065b | bellard | /* GRP5 */
|
1788 | dc99065b | bellard | { |
1789 | 88103cfe | blueswir1 | { "incQ", { Ev } },
|
1790 | 88103cfe | blueswir1 | { "decQ", { Ev } },
|
1791 | 88103cfe | blueswir1 | { "callT", { indirEv } },
|
1792 | 88103cfe | blueswir1 | { "JcallT", { indirEp } },
|
1793 | 88103cfe | blueswir1 | { "jmpT", { indirEv } },
|
1794 | 88103cfe | blueswir1 | { "JjmpT", { indirEp } },
|
1795 | 88103cfe | blueswir1 | { "pushU", { stackEv } },
|
1796 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1797 | dc99065b | bellard | }, |
1798 | dc99065b | bellard | /* GRP6 */
|
1799 | dc99065b | bellard | { |
1800 | 88103cfe | blueswir1 | { "sldtD", { Sv } },
|
1801 | 88103cfe | blueswir1 | { "strD", { Sv } },
|
1802 | 88103cfe | blueswir1 | { "lldt", { Ew } },
|
1803 | 88103cfe | blueswir1 | { "ltr", { Ew } },
|
1804 | 88103cfe | blueswir1 | { "verr", { Ew } },
|
1805 | 88103cfe | blueswir1 | { "verw", { Ew } },
|
1806 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1807 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1808 | dc99065b | bellard | }, |
1809 | dc99065b | bellard | /* GRP7 */
|
1810 | dc99065b | bellard | { |
1811 | 88103cfe | blueswir1 | { "sgdt{Q|IQ||}", { { VMX_Fixup, 0 } } }, |
1812 | 88103cfe | blueswir1 | { "sidt{Q|IQ||}", { { PNI_Fixup, 0 } } }, |
1813 | 88103cfe | blueswir1 | { "lgdt{Q|Q||}", { M } },
|
1814 | 88103cfe | blueswir1 | { "lidt{Q|Q||}", { { SVME_Fixup, 0 } } }, |
1815 | 88103cfe | blueswir1 | { "smswD", { Sv } },
|
1816 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1817 | 88103cfe | blueswir1 | { "lmsw", { Ew } },
|
1818 | 88103cfe | blueswir1 | { "invlpg", { { INVLPG_Fixup, w_mode } } },
|
1819 | dc99065b | bellard | }, |
1820 | dc99065b | bellard | /* GRP8 */
|
1821 | dc99065b | bellard | { |
1822 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1823 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1824 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1825 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1826 | 88103cfe | blueswir1 | { "btQ", { Ev, Ib } },
|
1827 | 88103cfe | blueswir1 | { "btsQ", { Ev, Ib } },
|
1828 | 88103cfe | blueswir1 | { "btrQ", { Ev, Ib } },
|
1829 | 88103cfe | blueswir1 | { "btcQ", { Ev, Ib } },
|
1830 | dc99065b | bellard | }, |
1831 | dc99065b | bellard | /* GRP9 */
|
1832 | dc99065b | bellard | { |
1833 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1834 | 88103cfe | blueswir1 | { "cmpxchg8b", { { CMPXCHG8B_Fixup, q_mode } } },
|
1835 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1836 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1837 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1838 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1839 | 88103cfe | blueswir1 | { "", { VM } }, /* See OP_VMX. */ |
1840 | 88103cfe | blueswir1 | { "vmptrst", { Mq } },
|
1841 | 88103cfe | blueswir1 | }, |
1842 | 88103cfe | blueswir1 | /* GRP11_C6 */
|
1843 | 88103cfe | blueswir1 | { |
1844 | 88103cfe | blueswir1 | { "movA", { Eb, Ib } },
|
1845 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1846 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1847 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1848 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1849 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1850 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1851 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1852 | 88103cfe | blueswir1 | }, |
1853 | 88103cfe | blueswir1 | /* GRP11_C7 */
|
1854 | 88103cfe | blueswir1 | { |
1855 | 88103cfe | blueswir1 | { "movQ", { Ev, Iv } },
|
1856 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1857 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1858 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1859 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1860 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1861 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1862 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1863 | dc99065b | bellard | }, |
1864 | dc99065b | bellard | /* GRP12 */
|
1865 | dc99065b | bellard | { |
1866 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1867 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1868 | 88103cfe | blueswir1 | { "psrlw", { MS, Ib } },
|
1869 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1870 | 88103cfe | blueswir1 | { "psraw", { MS, Ib } },
|
1871 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1872 | 88103cfe | blueswir1 | { "psllw", { MS, Ib } },
|
1873 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1874 | bc51c5c9 | bellard | }, |
1875 | bc51c5c9 | bellard | /* GRP13 */
|
1876 | bc51c5c9 | bellard | { |
1877 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1878 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1879 | 88103cfe | blueswir1 | { "psrld", { MS, Ib } },
|
1880 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1881 | 88103cfe | blueswir1 | { "psrad", { MS, Ib } },
|
1882 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1883 | 88103cfe | blueswir1 | { "pslld", { MS, Ib } },
|
1884 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1885 | bc51c5c9 | bellard | }, |
1886 | bc51c5c9 | bellard | /* GRP14 */
|
1887 | bc51c5c9 | bellard | { |
1888 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1889 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1890 | 88103cfe | blueswir1 | { "psrlq", { MS, Ib } },
|
1891 | 88103cfe | blueswir1 | { "psrldq", { MS, Ib } },
|
1892 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1893 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1894 | 88103cfe | blueswir1 | { "psllq", { MS, Ib } },
|
1895 | 88103cfe | blueswir1 | { "pslldq", { MS, Ib } },
|
1896 | 88103cfe | blueswir1 | }, |
1897 | 88103cfe | blueswir1 | /* GRP15 */
|
1898 | 88103cfe | blueswir1 | { |
1899 | 88103cfe | blueswir1 | { "fxsave", { Ev } },
|
1900 | 88103cfe | blueswir1 | { "fxrstor", { Ev } },
|
1901 | 88103cfe | blueswir1 | { "ldmxcsr", { Ev } },
|
1902 | 88103cfe | blueswir1 | { "stmxcsr", { Ev } },
|
1903 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1904 | 88103cfe | blueswir1 | { "lfence", { { OP_0fae, 0 } } }, |
1905 | 88103cfe | blueswir1 | { "mfence", { { OP_0fae, 0 } } }, |
1906 | 88103cfe | blueswir1 | { "clflush", { { OP_0fae, 0 } } }, |
1907 | 88103cfe | blueswir1 | }, |
1908 | 88103cfe | blueswir1 | /* GRP16 */
|
1909 | 88103cfe | blueswir1 | { |
1910 | 88103cfe | blueswir1 | { "prefetchnta", { Ev } },
|
1911 | 88103cfe | blueswir1 | { "prefetcht0", { Ev } },
|
1912 | 88103cfe | blueswir1 | { "prefetcht1", { Ev } },
|
1913 | 88103cfe | blueswir1 | { "prefetcht2", { Ev } },
|
1914 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1915 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1916 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1917 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1918 | bc51c5c9 | bellard | }, |
1919 | bc51c5c9 | bellard | /* GRPAMD */
|
1920 | bc51c5c9 | bellard | { |
1921 | 88103cfe | blueswir1 | { "prefetch", { Eb } },
|
1922 | 88103cfe | blueswir1 | { "prefetchw", { Eb } },
|
1923 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1924 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1925 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1926 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1927 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1928 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
1929 | c2c73b42 | blueswir1 | }, |
1930 | c2c73b42 | blueswir1 | /* GRPPADLCK1 */
|
1931 | c2c73b42 | blueswir1 | { |
1932 | 88103cfe | blueswir1 | { "xstore-rng", { { OP_0f07, 0 } } }, |
1933 | 88103cfe | blueswir1 | { "xcrypt-ecb", { { OP_0f07, 0 } } }, |
1934 | 88103cfe | blueswir1 | { "xcrypt-cbc", { { OP_0f07, 0 } } }, |
1935 | 88103cfe | blueswir1 | { "xcrypt-ctr", { { OP_0f07, 0 } } }, |
1936 | 88103cfe | blueswir1 | { "xcrypt-cfb", { { OP_0f07, 0 } } }, |
1937 | 88103cfe | blueswir1 | { "xcrypt-ofb", { { OP_0f07, 0 } } }, |
1938 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1939 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1940 | c2c73b42 | blueswir1 | }, |
1941 | c2c73b42 | blueswir1 | /* GRPPADLCK2 */
|
1942 | c2c73b42 | blueswir1 | { |
1943 | 88103cfe | blueswir1 | { "montmul", { { OP_0f07, 0 } } }, |
1944 | 88103cfe | blueswir1 | { "xsha1", { { OP_0f07, 0 } } }, |
1945 | 88103cfe | blueswir1 | { "xsha256", { { OP_0f07, 0 } } }, |
1946 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1947 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1948 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1949 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1950 | 88103cfe | blueswir1 | { "(bad)", { { OP_0f07, 0 } } }, |
1951 | dc99065b | bellard | } |
1952 | dc99065b | bellard | }; |
1953 | dc99065b | bellard | |
1954 | bc51c5c9 | bellard | static const struct dis386 prefix_user_table[][4] = { |
1955 | bc51c5c9 | bellard | /* PREGRP0 */
|
1956 | bc51c5c9 | bellard | { |
1957 | 88103cfe | blueswir1 | { "addps", { XM, EXx } },
|
1958 | 88103cfe | blueswir1 | { "addss", { XM, EXd } },
|
1959 | 88103cfe | blueswir1 | { "addpd", { XM, EXx } },
|
1960 | 88103cfe | blueswir1 | { "addsd", { XM, EXq } },
|
1961 | bc51c5c9 | bellard | }, |
1962 | bc51c5c9 | bellard | /* PREGRP1 */
|
1963 | bc51c5c9 | bellard | { |
1964 | 88103cfe | blueswir1 | { "", { XM, EXx, OPSIMD } }, /* See OP_SIMD_SUFFIX. */ |
1965 | 88103cfe | blueswir1 | { "", { XM, EXx, OPSIMD } },
|
1966 | 88103cfe | blueswir1 | { "", { XM, EXx, OPSIMD } },
|
1967 | 88103cfe | blueswir1 | { "", { XM, EXx, OPSIMD } },
|
1968 | bc51c5c9 | bellard | }, |
1969 | bc51c5c9 | bellard | /* PREGRP2 */
|
1970 | bc51c5c9 | bellard | { |
1971 | 88103cfe | blueswir1 | { "cvtpi2ps", { XM, EMC } },
|
1972 | 88103cfe | blueswir1 | { "cvtsi2ssY", { XM, Ev } },
|
1973 | 88103cfe | blueswir1 | { "cvtpi2pd", { XM, EMC } },
|
1974 | 88103cfe | blueswir1 | { "cvtsi2sdY", { XM, Ev } },
|
1975 | bc51c5c9 | bellard | }, |
1976 | bc51c5c9 | bellard | /* PREGRP3 */
|
1977 | bc51c5c9 | bellard | { |
1978 | 88103cfe | blueswir1 | { "cvtps2pi", { MXC, EXx } },
|
1979 | 88103cfe | blueswir1 | { "cvtss2siY", { Gv, EXx } },
|
1980 | 88103cfe | blueswir1 | { "cvtpd2pi", { MXC, EXx } },
|
1981 | 88103cfe | blueswir1 | { "cvtsd2siY", { Gv, EXx } },
|
1982 | bc51c5c9 | bellard | }, |
1983 | bc51c5c9 | bellard | /* PREGRP4 */
|
1984 | bc51c5c9 | bellard | { |
1985 | 88103cfe | blueswir1 | { "cvttps2pi", { MXC, EXx } },
|
1986 | 88103cfe | blueswir1 | { "cvttss2siY", { Gv, EXx } },
|
1987 | 88103cfe | blueswir1 | { "cvttpd2pi", { MXC, EXx } },
|
1988 | 88103cfe | blueswir1 | { "cvttsd2siY", { Gv, EXx } },
|
1989 | bc51c5c9 | bellard | }, |
1990 | bc51c5c9 | bellard | /* PREGRP5 */
|
1991 | bc51c5c9 | bellard | { |
1992 | 88103cfe | blueswir1 | { "divps", { XM, EXx } },
|
1993 | 88103cfe | blueswir1 | { "divss", { XM, EXx } },
|
1994 | 88103cfe | blueswir1 | { "divpd", { XM, EXx } },
|
1995 | 88103cfe | blueswir1 | { "divsd", { XM, EXx } },
|
1996 | bc51c5c9 | bellard | }, |
1997 | bc51c5c9 | bellard | /* PREGRP6 */
|
1998 | bc51c5c9 | bellard | { |
1999 | 88103cfe | blueswir1 | { "maxps", { XM, EXx } },
|
2000 | 88103cfe | blueswir1 | { "maxss", { XM, EXx } },
|
2001 | 88103cfe | blueswir1 | { "maxpd", { XM, EXx } },
|
2002 | 88103cfe | blueswir1 | { "maxsd", { XM, EXx } },
|
2003 | bc51c5c9 | bellard | }, |
2004 | bc51c5c9 | bellard | /* PREGRP7 */
|
2005 | bc51c5c9 | bellard | { |
2006 | 88103cfe | blueswir1 | { "minps", { XM, EXx } },
|
2007 | 88103cfe | blueswir1 | { "minss", { XM, EXx } },
|
2008 | 88103cfe | blueswir1 | { "minpd", { XM, EXx } },
|
2009 | 88103cfe | blueswir1 | { "minsd", { XM, EXx } },
|
2010 | bc51c5c9 | bellard | }, |
2011 | bc51c5c9 | bellard | /* PREGRP8 */
|
2012 | bc51c5c9 | bellard | { |
2013 | 88103cfe | blueswir1 | { "movups", { XM, EXx } },
|
2014 | 88103cfe | blueswir1 | { "movss", { XM, EXx } },
|
2015 | 88103cfe | blueswir1 | { "movupd", { XM, EXx } },
|
2016 | 88103cfe | blueswir1 | { "movsd", { XM, EXx } },
|
2017 | bc51c5c9 | bellard | }, |
2018 | bc51c5c9 | bellard | /* PREGRP9 */
|
2019 | bc51c5c9 | bellard | { |
2020 | 88103cfe | blueswir1 | { "movups", { EXx, XM } },
|
2021 | 88103cfe | blueswir1 | { "movss", { EXx, XM } },
|
2022 | 88103cfe | blueswir1 | { "movupd", { EXx, XM } },
|
2023 | 88103cfe | blueswir1 | { "movsd", { EXx, XM } },
|
2024 | bc51c5c9 | bellard | }, |
2025 | bc51c5c9 | bellard | /* PREGRP10 */
|
2026 | bc51c5c9 | bellard | { |
2027 | 88103cfe | blueswir1 | { "mulps", { XM, EXx } },
|
2028 | 88103cfe | blueswir1 | { "mulss", { XM, EXx } },
|
2029 | 88103cfe | blueswir1 | { "mulpd", { XM, EXx } },
|
2030 | 88103cfe | blueswir1 | { "mulsd", { XM, EXx } },
|
2031 | bc51c5c9 | bellard | }, |
2032 | bc51c5c9 | bellard | /* PREGRP11 */
|
2033 | bc51c5c9 | bellard | { |
2034 | 88103cfe | blueswir1 | { "rcpps", { XM, EXx } },
|
2035 | 88103cfe | blueswir1 | { "rcpss", { XM, EXx } },
|
2036 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2037 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2038 | bc51c5c9 | bellard | }, |
2039 | bc51c5c9 | bellard | /* PREGRP12 */
|
2040 | bc51c5c9 | bellard | { |
2041 | 88103cfe | blueswir1 | { "rsqrtps",{ XM, EXx } },
|
2042 | 88103cfe | blueswir1 | { "rsqrtss",{ XM, EXx } },
|
2043 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2044 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2045 | bc51c5c9 | bellard | }, |
2046 | bc51c5c9 | bellard | /* PREGRP13 */
|
2047 | bc51c5c9 | bellard | { |
2048 | 88103cfe | blueswir1 | { "sqrtps", { XM, EXx } },
|
2049 | 88103cfe | blueswir1 | { "sqrtss", { XM, EXx } },
|
2050 | 88103cfe | blueswir1 | { "sqrtpd", { XM, EXx } },
|
2051 | 88103cfe | blueswir1 | { "sqrtsd", { XM, EXx } },
|
2052 | bc51c5c9 | bellard | }, |
2053 | bc51c5c9 | bellard | /* PREGRP14 */
|
2054 | bc51c5c9 | bellard | { |
2055 | 88103cfe | blueswir1 | { "subps", { XM, EXx } },
|
2056 | 88103cfe | blueswir1 | { "subss", { XM, EXx } },
|
2057 | 88103cfe | blueswir1 | { "subpd", { XM, EXx } },
|
2058 | 88103cfe | blueswir1 | { "subsd", { XM, EXx } },
|
2059 | bc51c5c9 | bellard | }, |
2060 | bc51c5c9 | bellard | /* PREGRP15 */
|
2061 | bc51c5c9 | bellard | { |
2062 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2063 | 88103cfe | blueswir1 | { "cvtdq2pd", { XM, EXq } },
|
2064 | 88103cfe | blueswir1 | { "cvttpd2dq", { XM, EXx } },
|
2065 | 88103cfe | blueswir1 | { "cvtpd2dq", { XM, EXx } },
|
2066 | bc51c5c9 | bellard | }, |
2067 | bc51c5c9 | bellard | /* PREGRP16 */
|
2068 | bc51c5c9 | bellard | { |
2069 | 88103cfe | blueswir1 | { "cvtdq2ps", { XM, EXx } },
|
2070 | 88103cfe | blueswir1 | { "cvttps2dq", { XM, EXx } },
|
2071 | 88103cfe | blueswir1 | { "cvtps2dq", { XM, EXx } },
|
2072 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2073 | bc51c5c9 | bellard | }, |
2074 | bc51c5c9 | bellard | /* PREGRP17 */
|
2075 | bc51c5c9 | bellard | { |
2076 | 88103cfe | blueswir1 | { "cvtps2pd", { XM, EXq } },
|
2077 | 88103cfe | blueswir1 | { "cvtss2sd", { XM, EXx } },
|
2078 | 88103cfe | blueswir1 | { "cvtpd2ps", { XM, EXx } },
|
2079 | 88103cfe | blueswir1 | { "cvtsd2ss", { XM, EXx } },
|
2080 | bc51c5c9 | bellard | }, |
2081 | bc51c5c9 | bellard | /* PREGRP18 */
|
2082 | bc51c5c9 | bellard | { |
2083 | 88103cfe | blueswir1 | { "maskmovq", { MX, MS } },
|
2084 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2085 | 88103cfe | blueswir1 | { "maskmovdqu", { XM, XS } },
|
2086 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2087 | bc51c5c9 | bellard | }, |
2088 | bc51c5c9 | bellard | /* PREGRP19 */
|
2089 | bc51c5c9 | bellard | { |
2090 | 88103cfe | blueswir1 | { "movq", { MX, EM } },
|
2091 | 88103cfe | blueswir1 | { "movdqu", { XM, EXx } },
|
2092 | 88103cfe | blueswir1 | { "movdqa", { XM, EXx } },
|
2093 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2094 | bc51c5c9 | bellard | }, |
2095 | bc51c5c9 | bellard | /* PREGRP20 */
|
2096 | bc51c5c9 | bellard | { |
2097 | 88103cfe | blueswir1 | { "movq", { EM, MX } },
|
2098 | 88103cfe | blueswir1 | { "movdqu", { EXx, XM } },
|
2099 | 88103cfe | blueswir1 | { "movdqa", { EXx, XM } },
|
2100 | 88103cfe | blueswir1 | { "(bad)", { EXx, XM } },
|
2101 | bc51c5c9 | bellard | }, |
2102 | bc51c5c9 | bellard | /* PREGRP21 */
|
2103 | bc51c5c9 | bellard | { |
2104 | 88103cfe | blueswir1 | { "(bad)", { EXx, XM } },
|
2105 | 88103cfe | blueswir1 | { "movq2dq",{ XM, MS } },
|
2106 | 88103cfe | blueswir1 | { "movq", { EXx, XM } },
|
2107 | 88103cfe | blueswir1 | { "movdq2q",{ MX, XS } },
|
2108 | bc51c5c9 | bellard | }, |
2109 | bc51c5c9 | bellard | /* PREGRP22 */
|
2110 | bc51c5c9 | bellard | { |
2111 | 88103cfe | blueswir1 | { "pshufw", { MX, EM, Ib } },
|
2112 | 88103cfe | blueswir1 | { "pshufhw",{ XM, EXx, Ib } },
|
2113 | 88103cfe | blueswir1 | { "pshufd", { XM, EXx, Ib } },
|
2114 | 88103cfe | blueswir1 | { "pshuflw",{ XM, EXx, Ib } },
|
2115 | bc51c5c9 | bellard | }, |
2116 | bc51c5c9 | bellard | /* PREGRP23 */
|
2117 | bc51c5c9 | bellard | { |
2118 | 88103cfe | blueswir1 | { "movd", { Edq, MX } },
|
2119 | 88103cfe | blueswir1 | { "movq", { XM, EXx } },
|
2120 | 88103cfe | blueswir1 | { "movd", { Edq, XM } },
|
2121 | 88103cfe | blueswir1 | { "(bad)", { Ed, XM } },
|
2122 | bc51c5c9 | bellard | }, |
2123 | bc51c5c9 | bellard | /* PREGRP24 */
|
2124 | bc51c5c9 | bellard | { |
2125 | 88103cfe | blueswir1 | { "(bad)", { MX, EXx } },
|
2126 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2127 | 88103cfe | blueswir1 | { "punpckhqdq", { XM, EXx } },
|
2128 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2129 | bc51c5c9 | bellard | }, |
2130 | bc51c5c9 | bellard | /* PREGRP25 */
|
2131 | bc51c5c9 | bellard | { |
2132 | 88103cfe | blueswir1 | { "movntq", { EM, MX } },
|
2133 | 88103cfe | blueswir1 | { "(bad)", { EM, XM } },
|
2134 | 88103cfe | blueswir1 | { "movntdq",{ EM, XM } },
|
2135 | 88103cfe | blueswir1 | { "(bad)", { EM, XM } },
|
2136 | bc51c5c9 | bellard | }, |
2137 | bc51c5c9 | bellard | /* PREGRP26 */
|
2138 | bc51c5c9 | bellard | { |
2139 | 88103cfe | blueswir1 | { "(bad)", { MX, EXx } },
|
2140 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2141 | 88103cfe | blueswir1 | { "punpcklqdq", { XM, EXx } },
|
2142 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2143 | bc51c5c9 | bellard | }, |
2144 | c2c73b42 | blueswir1 | /* PREGRP27 */
|
2145 | c2c73b42 | blueswir1 | { |
2146 | 88103cfe | blueswir1 | { "(bad)", { MX, EXx } },
|
2147 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2148 | 88103cfe | blueswir1 | { "addsubpd", { XM, EXx } },
|
2149 | 88103cfe | blueswir1 | { "addsubps", { XM, EXx } },
|
2150 | c2c73b42 | blueswir1 | }, |
2151 | c2c73b42 | blueswir1 | /* PREGRP28 */
|
2152 | c2c73b42 | blueswir1 | { |
2153 | 88103cfe | blueswir1 | { "(bad)", { MX, EXx } },
|
2154 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2155 | 88103cfe | blueswir1 | { "haddpd", { XM, EXx } },
|
2156 | 88103cfe | blueswir1 | { "haddps", { XM, EXx } },
|
2157 | c2c73b42 | blueswir1 | }, |
2158 | c2c73b42 | blueswir1 | /* PREGRP29 */
|
2159 | c2c73b42 | blueswir1 | { |
2160 | 88103cfe | blueswir1 | { "(bad)", { MX, EXx } },
|
2161 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2162 | 88103cfe | blueswir1 | { "hsubpd", { XM, EXx } },
|
2163 | 88103cfe | blueswir1 | { "hsubps", { XM, EXx } },
|
2164 | c2c73b42 | blueswir1 | }, |
2165 | c2c73b42 | blueswir1 | /* PREGRP30 */
|
2166 | c2c73b42 | blueswir1 | { |
2167 | 88103cfe | blueswir1 | { "movlpX", { XM, EXq, { SIMD_Fixup, 'h' } } }, /* really only 2 operands */ |
2168 | 88103cfe | blueswir1 | { "movsldup", { XM, EXx } },
|
2169 | 88103cfe | blueswir1 | { "movlpd", { XM, EXq } },
|
2170 | 88103cfe | blueswir1 | { "movddup", { XM, EXq } },
|
2171 | c2c73b42 | blueswir1 | }, |
2172 | c2c73b42 | blueswir1 | /* PREGRP31 */
|
2173 | c2c73b42 | blueswir1 | { |
2174 | 88103cfe | blueswir1 | { "movhpX", { XM, EXq, { SIMD_Fixup, 'l' } } }, |
2175 | 88103cfe | blueswir1 | { "movshdup", { XM, EXx } },
|
2176 | 88103cfe | blueswir1 | { "movhpd", { XM, EXq } },
|
2177 | 88103cfe | blueswir1 | { "(bad)", { XM, EXq } },
|
2178 | c2c73b42 | blueswir1 | }, |
2179 | c2c73b42 | blueswir1 | /* PREGRP32 */
|
2180 | c2c73b42 | blueswir1 | { |
2181 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2182 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2183 | 88103cfe | blueswir1 | { "(bad)", { XM, EXx } },
|
2184 | 88103cfe | blueswir1 | { "lddqu", { XM, M } },
|
2185 | 88103cfe | blueswir1 | }, |
2186 | 88103cfe | blueswir1 | /* PREGRP33 */
|
2187 | 88103cfe | blueswir1 | { |
2188 | 88103cfe | blueswir1 | {"movntps", { Ev, XM } },
|
2189 | 88103cfe | blueswir1 | {"movntss", { Ev, XM } },
|
2190 | 88103cfe | blueswir1 | {"movntpd", { Ev, XM } },
|
2191 | 88103cfe | blueswir1 | {"movntsd", { Ev, XM } },
|
2192 | 88103cfe | blueswir1 | }, |
2193 | 88103cfe | blueswir1 | |
2194 | 88103cfe | blueswir1 | /* PREGRP34 */
|
2195 | 88103cfe | blueswir1 | { |
2196 | 88103cfe | blueswir1 | {"vmread", { Em, Gm } },
|
2197 | 88103cfe | blueswir1 | {"(bad)", { XX } },
|
2198 | 88103cfe | blueswir1 | {"extrq", { XS, Ib, Ib } },
|
2199 | 88103cfe | blueswir1 | {"insertq", { XM, XS, Ib, Ib } },
|
2200 | 88103cfe | blueswir1 | }, |
2201 | 88103cfe | blueswir1 | |
2202 | 88103cfe | blueswir1 | /* PREGRP35 */
|
2203 | 88103cfe | blueswir1 | { |
2204 | 88103cfe | blueswir1 | {"vmwrite", { Gm, Em } },
|
2205 | 88103cfe | blueswir1 | {"(bad)", { XX } },
|
2206 | 88103cfe | blueswir1 | {"extrq", { XM, XS } },
|
2207 | 88103cfe | blueswir1 | {"insertq", { XM, XS } },
|
2208 | 88103cfe | blueswir1 | }, |
2209 | 88103cfe | blueswir1 | |
2210 | 88103cfe | blueswir1 | /* PREGRP36 */
|
2211 | 88103cfe | blueswir1 | { |
2212 | 88103cfe | blueswir1 | { "bsrS", { Gv, Ev } },
|
2213 | 88103cfe | blueswir1 | { "lzcntS", { Gv, Ev } },
|
2214 | 88103cfe | blueswir1 | { "bsrS", { Gv, Ev } },
|
2215 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2216 | 88103cfe | blueswir1 | }, |
2217 | 88103cfe | blueswir1 | |
2218 | 88103cfe | blueswir1 | /* PREGRP37 */
|
2219 | 88103cfe | blueswir1 | { |
2220 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2221 | 88103cfe | blueswir1 | { "popcntS", { Gv, Ev } },
|
2222 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2223 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2224 | 88103cfe | blueswir1 | }, |
2225 | 88103cfe | blueswir1 | |
2226 | 88103cfe | blueswir1 | /* PREGRP38 */
|
2227 | 88103cfe | blueswir1 | { |
2228 | 88103cfe | blueswir1 | { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
|
2229 | 88103cfe | blueswir1 | { "pause", { XX } },
|
2230 | 88103cfe | blueswir1 | { "xchgS", { { NOP_Fixup1, eAX_reg }, { NOP_Fixup2, eAX_reg } } },
|
2231 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2232 | 88103cfe | blueswir1 | }, |
2233 | 88103cfe | blueswir1 | |
2234 | 88103cfe | blueswir1 | /* PREGRP39 */
|
2235 | 88103cfe | blueswir1 | { |
2236 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2237 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2238 | 88103cfe | blueswir1 | { "pblendvb", {XM, EXx, XMM0 } },
|
2239 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2240 | 88103cfe | blueswir1 | }, |
2241 | 88103cfe | blueswir1 | |
2242 | 88103cfe | blueswir1 | /* PREGRP40 */
|
2243 | 88103cfe | blueswir1 | { |
2244 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2245 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2246 | 88103cfe | blueswir1 | { "blendvps", {XM, EXx, XMM0 } },
|
2247 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2248 | 88103cfe | blueswir1 | }, |
2249 | 88103cfe | blueswir1 | |
2250 | 88103cfe | blueswir1 | /* PREGRP41 */
|
2251 | 88103cfe | blueswir1 | { |
2252 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2253 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2254 | 88103cfe | blueswir1 | { "blendvpd", { XM, EXx, XMM0 } },
|
2255 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2256 | 88103cfe | blueswir1 | }, |
2257 | 88103cfe | blueswir1 | |
2258 | 88103cfe | blueswir1 | /* PREGRP42 */
|
2259 | 88103cfe | blueswir1 | { |
2260 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2261 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2262 | 88103cfe | blueswir1 | { "ptest", { XM, EXx } },
|
2263 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2264 | 88103cfe | blueswir1 | }, |
2265 | 88103cfe | blueswir1 | |
2266 | 88103cfe | blueswir1 | /* PREGRP43 */
|
2267 | 88103cfe | blueswir1 | { |
2268 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2269 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2270 | 88103cfe | blueswir1 | { "pmovsxbw", { XM, EXx } },
|
2271 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2272 | 88103cfe | blueswir1 | }, |
2273 | 88103cfe | blueswir1 | |
2274 | 88103cfe | blueswir1 | /* PREGRP44 */
|
2275 | 88103cfe | blueswir1 | { |
2276 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2277 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2278 | 88103cfe | blueswir1 | { "pmovsxbd", { XM, EXx } },
|
2279 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2280 | 88103cfe | blueswir1 | }, |
2281 | 88103cfe | blueswir1 | |
2282 | 88103cfe | blueswir1 | /* PREGRP45 */
|
2283 | 88103cfe | blueswir1 | { |
2284 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2285 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2286 | 88103cfe | blueswir1 | { "pmovsxbq", { XM, EXx } },
|
2287 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2288 | 88103cfe | blueswir1 | }, |
2289 | 88103cfe | blueswir1 | |
2290 | 88103cfe | blueswir1 | /* PREGRP46 */
|
2291 | 88103cfe | blueswir1 | { |
2292 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2293 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2294 | 88103cfe | blueswir1 | { "pmovsxwd", { XM, EXx } },
|
2295 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2296 | 88103cfe | blueswir1 | }, |
2297 | 88103cfe | blueswir1 | |
2298 | 88103cfe | blueswir1 | /* PREGRP47 */
|
2299 | 88103cfe | blueswir1 | { |
2300 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2301 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2302 | 88103cfe | blueswir1 | { "pmovsxwq", { XM, EXx } },
|
2303 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2304 | 88103cfe | blueswir1 | }, |
2305 | 88103cfe | blueswir1 | |
2306 | 88103cfe | blueswir1 | /* PREGRP48 */
|
2307 | 88103cfe | blueswir1 | { |
2308 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2309 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2310 | 88103cfe | blueswir1 | { "pmovsxdq", { XM, EXx } },
|
2311 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2312 | 88103cfe | blueswir1 | }, |
2313 | 88103cfe | blueswir1 | |
2314 | 88103cfe | blueswir1 | /* PREGRP49 */
|
2315 | 88103cfe | blueswir1 | { |
2316 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2317 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2318 | 88103cfe | blueswir1 | { "pmuldq", { XM, EXx } },
|
2319 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2320 | 88103cfe | blueswir1 | }, |
2321 | 88103cfe | blueswir1 | |
2322 | 88103cfe | blueswir1 | /* PREGRP50 */
|
2323 | 88103cfe | blueswir1 | { |
2324 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2325 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2326 | 88103cfe | blueswir1 | { "pcmpeqq", { XM, EXx } },
|
2327 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2328 | 88103cfe | blueswir1 | }, |
2329 | 88103cfe | blueswir1 | |
2330 | 88103cfe | blueswir1 | /* PREGRP51 */
|
2331 | 88103cfe | blueswir1 | { |
2332 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2333 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2334 | 88103cfe | blueswir1 | { "movntdqa", { XM, EM } },
|
2335 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2336 | 88103cfe | blueswir1 | }, |
2337 | 88103cfe | blueswir1 | |
2338 | 88103cfe | blueswir1 | /* PREGRP52 */
|
2339 | 88103cfe | blueswir1 | { |
2340 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2341 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2342 | 88103cfe | blueswir1 | { "packusdw", { XM, EXx } },
|
2343 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2344 | 88103cfe | blueswir1 | }, |
2345 | 88103cfe | blueswir1 | |
2346 | 88103cfe | blueswir1 | /* PREGRP53 */
|
2347 | 88103cfe | blueswir1 | { |
2348 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2349 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2350 | 88103cfe | blueswir1 | { "pmovzxbw", { XM, EXx } },
|
2351 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2352 | 88103cfe | blueswir1 | }, |
2353 | 88103cfe | blueswir1 | |
2354 | 88103cfe | blueswir1 | /* PREGRP54 */
|
2355 | 88103cfe | blueswir1 | { |
2356 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2357 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2358 | 88103cfe | blueswir1 | { "pmovzxbd", { XM, EXx } },
|
2359 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2360 | 88103cfe | blueswir1 | }, |
2361 | 88103cfe | blueswir1 | |
2362 | 88103cfe | blueswir1 | /* PREGRP55 */
|
2363 | 88103cfe | blueswir1 | { |
2364 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2365 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2366 | 88103cfe | blueswir1 | { "pmovzxbq", { XM, EXx } },
|
2367 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2368 | 88103cfe | blueswir1 | }, |
2369 | 88103cfe | blueswir1 | |
2370 | 88103cfe | blueswir1 | /* PREGRP56 */
|
2371 | 88103cfe | blueswir1 | { |
2372 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2373 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2374 | 88103cfe | blueswir1 | { "pmovzxwd", { XM, EXx } },
|
2375 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2376 | 88103cfe | blueswir1 | }, |
2377 | 88103cfe | blueswir1 | |
2378 | 88103cfe | blueswir1 | /* PREGRP57 */
|
2379 | 88103cfe | blueswir1 | { |
2380 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2381 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2382 | 88103cfe | blueswir1 | { "pmovzxwq", { XM, EXx } },
|
2383 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2384 | 88103cfe | blueswir1 | }, |
2385 | 88103cfe | blueswir1 | |
2386 | 88103cfe | blueswir1 | /* PREGRP58 */
|
2387 | 88103cfe | blueswir1 | { |
2388 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2389 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2390 | 88103cfe | blueswir1 | { "pmovzxdq", { XM, EXx } },
|
2391 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2392 | 88103cfe | blueswir1 | }, |
2393 | 88103cfe | blueswir1 | |
2394 | 88103cfe | blueswir1 | /* PREGRP59 */
|
2395 | 88103cfe | blueswir1 | { |
2396 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2397 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2398 | 88103cfe | blueswir1 | { "pminsb", { XM, EXx } },
|
2399 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2400 | 88103cfe | blueswir1 | }, |
2401 | 88103cfe | blueswir1 | |
2402 | 88103cfe | blueswir1 | /* PREGRP60 */
|
2403 | 88103cfe | blueswir1 | { |
2404 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2405 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2406 | 88103cfe | blueswir1 | { "pminsd", { XM, EXx } },
|
2407 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2408 | 88103cfe | blueswir1 | }, |
2409 | 88103cfe | blueswir1 | |
2410 | 88103cfe | blueswir1 | /* PREGRP61 */
|
2411 | 88103cfe | blueswir1 | { |
2412 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2413 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2414 | 88103cfe | blueswir1 | { "pminuw", { XM, EXx } },
|
2415 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2416 | 88103cfe | blueswir1 | }, |
2417 | 88103cfe | blueswir1 | |
2418 | 88103cfe | blueswir1 | /* PREGRP62 */
|
2419 | 88103cfe | blueswir1 | { |
2420 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2421 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2422 | 88103cfe | blueswir1 | { "pminud", { XM, EXx } },
|
2423 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2424 | 88103cfe | blueswir1 | }, |
2425 | 88103cfe | blueswir1 | |
2426 | 88103cfe | blueswir1 | /* PREGRP63 */
|
2427 | 88103cfe | blueswir1 | { |
2428 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2429 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2430 | 88103cfe | blueswir1 | { "pmaxsb", { XM, EXx } },
|
2431 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2432 | 88103cfe | blueswir1 | }, |
2433 | 88103cfe | blueswir1 | |
2434 | 88103cfe | blueswir1 | /* PREGRP64 */
|
2435 | 88103cfe | blueswir1 | { |
2436 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2437 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2438 | 88103cfe | blueswir1 | { "pmaxsd", { XM, EXx } },
|
2439 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2440 | 88103cfe | blueswir1 | }, |
2441 | 88103cfe | blueswir1 | |
2442 | 88103cfe | blueswir1 | /* PREGRP65 */
|
2443 | 88103cfe | blueswir1 | { |
2444 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2445 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2446 | 88103cfe | blueswir1 | { "pmaxuw", { XM, EXx } },
|
2447 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2448 | 88103cfe | blueswir1 | }, |
2449 | 88103cfe | blueswir1 | |
2450 | 88103cfe | blueswir1 | /* PREGRP66 */
|
2451 | 88103cfe | blueswir1 | { |
2452 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2453 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2454 | 88103cfe | blueswir1 | { "pmaxud", { XM, EXx } },
|
2455 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2456 | 88103cfe | blueswir1 | }, |
2457 | 88103cfe | blueswir1 | |
2458 | 88103cfe | blueswir1 | /* PREGRP67 */
|
2459 | 88103cfe | blueswir1 | { |
2460 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2461 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2462 | 88103cfe | blueswir1 | { "pmulld", { XM, EXx } },
|
2463 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2464 | 88103cfe | blueswir1 | }, |
2465 | 88103cfe | blueswir1 | |
2466 | 88103cfe | blueswir1 | /* PREGRP68 */
|
2467 | 88103cfe | blueswir1 | { |
2468 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2469 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2470 | 88103cfe | blueswir1 | { "phminposuw", { XM, EXx } },
|
2471 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2472 | 88103cfe | blueswir1 | }, |
2473 | 88103cfe | blueswir1 | |
2474 | 88103cfe | blueswir1 | /* PREGRP69 */
|
2475 | 88103cfe | blueswir1 | { |
2476 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2477 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2478 | 88103cfe | blueswir1 | { "roundps", { XM, EXx, Ib } },
|
2479 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2480 | 88103cfe | blueswir1 | }, |
2481 | 88103cfe | blueswir1 | |
2482 | 88103cfe | blueswir1 | /* PREGRP70 */
|
2483 | 88103cfe | blueswir1 | { |
2484 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2485 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2486 | 88103cfe | blueswir1 | { "roundpd", { XM, EXx, Ib } },
|
2487 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2488 | 88103cfe | blueswir1 | }, |
2489 | 88103cfe | blueswir1 | |
2490 | 88103cfe | blueswir1 | /* PREGRP71 */
|
2491 | 88103cfe | blueswir1 | { |
2492 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2493 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2494 | 88103cfe | blueswir1 | { "roundss", { XM, EXx, Ib } },
|
2495 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2496 | 88103cfe | blueswir1 | }, |
2497 | 88103cfe | blueswir1 | |
2498 | 88103cfe | blueswir1 | /* PREGRP72 */
|
2499 | 88103cfe | blueswir1 | { |
2500 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2501 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2502 | 88103cfe | blueswir1 | { "roundsd", { XM, EXx, Ib } },
|
2503 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2504 | 88103cfe | blueswir1 | }, |
2505 | 88103cfe | blueswir1 | |
2506 | 88103cfe | blueswir1 | /* PREGRP73 */
|
2507 | 88103cfe | blueswir1 | { |
2508 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2509 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2510 | 88103cfe | blueswir1 | { "blendps", { XM, EXx, Ib } },
|
2511 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2512 | 88103cfe | blueswir1 | }, |
2513 | 88103cfe | blueswir1 | |
2514 | 88103cfe | blueswir1 | /* PREGRP74 */
|
2515 | 88103cfe | blueswir1 | { |
2516 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2517 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2518 | 88103cfe | blueswir1 | { "blendpd", { XM, EXx, Ib } },
|
2519 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2520 | 88103cfe | blueswir1 | }, |
2521 | 88103cfe | blueswir1 | |
2522 | 88103cfe | blueswir1 | /* PREGRP75 */
|
2523 | 88103cfe | blueswir1 | { |
2524 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2525 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2526 | 88103cfe | blueswir1 | { "pblendw", { XM, EXx, Ib } },
|
2527 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2528 | 88103cfe | blueswir1 | }, |
2529 | 88103cfe | blueswir1 | |
2530 | 88103cfe | blueswir1 | /* PREGRP76 */
|
2531 | 88103cfe | blueswir1 | { |
2532 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2533 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2534 | 88103cfe | blueswir1 | { "pextrb", { Edqb, XM, Ib } },
|
2535 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2536 | 88103cfe | blueswir1 | }, |
2537 | 88103cfe | blueswir1 | |
2538 | 88103cfe | blueswir1 | /* PREGRP77 */
|
2539 | 88103cfe | blueswir1 | { |
2540 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2541 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2542 | 88103cfe | blueswir1 | { "pextrw", { Edqw, XM, Ib } },
|
2543 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2544 | 88103cfe | blueswir1 | }, |
2545 | 88103cfe | blueswir1 | |
2546 | 88103cfe | blueswir1 | /* PREGRP78 */
|
2547 | 88103cfe | blueswir1 | { |
2548 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2549 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2550 | 88103cfe | blueswir1 | { "pextrK", { Edq, XM, Ib } },
|
2551 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2552 | 88103cfe | blueswir1 | }, |
2553 | 88103cfe | blueswir1 | |
2554 | 88103cfe | blueswir1 | /* PREGRP79 */
|
2555 | 88103cfe | blueswir1 | { |
2556 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2557 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2558 | 88103cfe | blueswir1 | { "extractps", { Edqd, XM, Ib } },
|
2559 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2560 | 88103cfe | blueswir1 | }, |
2561 | 88103cfe | blueswir1 | |
2562 | 88103cfe | blueswir1 | /* PREGRP80 */
|
2563 | 88103cfe | blueswir1 | { |
2564 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2565 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2566 | 88103cfe | blueswir1 | { "pinsrb", { XM, Edqb, Ib } },
|
2567 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2568 | 88103cfe | blueswir1 | }, |
2569 | 88103cfe | blueswir1 | |
2570 | 88103cfe | blueswir1 | /* PREGRP81 */
|
2571 | 88103cfe | blueswir1 | { |
2572 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2573 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2574 | 88103cfe | blueswir1 | { "insertps", { XM, EXx, Ib } },
|
2575 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2576 | 88103cfe | blueswir1 | }, |
2577 | 88103cfe | blueswir1 | |
2578 | 88103cfe | blueswir1 | /* PREGRP82 */
|
2579 | 88103cfe | blueswir1 | { |
2580 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2581 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2582 | 88103cfe | blueswir1 | { "pinsrK", { XM, Edq, Ib } },
|
2583 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2584 | 88103cfe | blueswir1 | }, |
2585 | 88103cfe | blueswir1 | |
2586 | 88103cfe | blueswir1 | /* PREGRP83 */
|
2587 | 88103cfe | blueswir1 | { |
2588 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2589 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2590 | 88103cfe | blueswir1 | { "dpps", { XM, EXx, Ib } },
|
2591 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2592 | 88103cfe | blueswir1 | }, |
2593 | 88103cfe | blueswir1 | |
2594 | 88103cfe | blueswir1 | /* PREGRP84 */
|
2595 | 88103cfe | blueswir1 | { |
2596 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2597 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2598 | 88103cfe | blueswir1 | { "dppd", { XM, EXx, Ib } },
|
2599 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2600 | 88103cfe | blueswir1 | }, |
2601 | 88103cfe | blueswir1 | |
2602 | 88103cfe | blueswir1 | /* PREGRP85 */
|
2603 | 88103cfe | blueswir1 | { |
2604 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2605 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2606 | 88103cfe | blueswir1 | { "mpsadbw", { XM, EXx, Ib } },
|
2607 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2608 | 88103cfe | blueswir1 | }, |
2609 | 88103cfe | blueswir1 | |
2610 | 88103cfe | blueswir1 | /* PREGRP86 */
|
2611 | 88103cfe | blueswir1 | { |
2612 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2613 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2614 | 88103cfe | blueswir1 | { "pcmpgtq", { XM, EXx } },
|
2615 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2616 | 88103cfe | blueswir1 | }, |
2617 | 88103cfe | blueswir1 | |
2618 | 88103cfe | blueswir1 | /* PREGRP87 */
|
2619 | 88103cfe | blueswir1 | { |
2620 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2621 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2622 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2623 | 88103cfe | blueswir1 | { "crc32", { Gdq, { CRC32_Fixup, b_mode } } },
|
2624 | 88103cfe | blueswir1 | }, |
2625 | 88103cfe | blueswir1 | |
2626 | 88103cfe | blueswir1 | /* PREGRP88 */
|
2627 | 88103cfe | blueswir1 | { |
2628 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2629 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2630 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2631 | 88103cfe | blueswir1 | { "crc32", { Gdq, { CRC32_Fixup, v_mode } } },
|
2632 | 88103cfe | blueswir1 | }, |
2633 | 88103cfe | blueswir1 | |
2634 | 88103cfe | blueswir1 | /* PREGRP89 */
|
2635 | 88103cfe | blueswir1 | { |
2636 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2637 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2638 | 88103cfe | blueswir1 | { "pcmpestrm", { XM, EXx, Ib } },
|
2639 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2640 | 88103cfe | blueswir1 | }, |
2641 | 88103cfe | blueswir1 | |
2642 | 88103cfe | blueswir1 | /* PREGRP90 */
|
2643 | 88103cfe | blueswir1 | { |
2644 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2645 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2646 | 88103cfe | blueswir1 | { "pcmpestri", { XM, EXx, Ib } },
|
2647 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2648 | 88103cfe | blueswir1 | }, |
2649 | 88103cfe | blueswir1 | |
2650 | 88103cfe | blueswir1 | /* PREGRP91 */
|
2651 | 88103cfe | blueswir1 | { |
2652 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2653 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2654 | 88103cfe | blueswir1 | { "pcmpistrm", { XM, EXx, Ib } },
|
2655 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2656 | 88103cfe | blueswir1 | }, |
2657 | 88103cfe | blueswir1 | |
2658 | 88103cfe | blueswir1 | /* PREGRP92 */
|
2659 | 88103cfe | blueswir1 | { |
2660 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2661 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2662 | 88103cfe | blueswir1 | { "pcmpistri", { XM, EXx, Ib } },
|
2663 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2664 | 88103cfe | blueswir1 | }, |
2665 | 88103cfe | blueswir1 | |
2666 | 88103cfe | blueswir1 | /* PREGRP93 */
|
2667 | 88103cfe | blueswir1 | { |
2668 | 88103cfe | blueswir1 | { "ucomiss",{ XM, EXd } },
|
2669 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2670 | 88103cfe | blueswir1 | { "ucomisd",{ XM, EXq } },
|
2671 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2672 | 88103cfe | blueswir1 | }, |
2673 | 88103cfe | blueswir1 | |
2674 | 88103cfe | blueswir1 | /* PREGRP94 */
|
2675 | 88103cfe | blueswir1 | { |
2676 | 88103cfe | blueswir1 | { "comiss", { XM, EXd } },
|
2677 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2678 | 88103cfe | blueswir1 | { "comisd", { XM, EXq } },
|
2679 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2680 | 88103cfe | blueswir1 | }, |
2681 | 88103cfe | blueswir1 | |
2682 | 88103cfe | blueswir1 | /* PREGRP95 */
|
2683 | 88103cfe | blueswir1 | { |
2684 | 88103cfe | blueswir1 | { "punpcklbw",{ MX, EMd } },
|
2685 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2686 | 88103cfe | blueswir1 | { "punpcklbw",{ MX, EMq } },
|
2687 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2688 | 88103cfe | blueswir1 | }, |
2689 | 88103cfe | blueswir1 | |
2690 | 88103cfe | blueswir1 | /* PREGRP96 */
|
2691 | 88103cfe | blueswir1 | { |
2692 | 88103cfe | blueswir1 | { "punpcklwd",{ MX, EMd } },
|
2693 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2694 | 88103cfe | blueswir1 | { "punpcklwd",{ MX, EMq } },
|
2695 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2696 | 88103cfe | blueswir1 | }, |
2697 | 88103cfe | blueswir1 | |
2698 | 88103cfe | blueswir1 | /* PREGRP97 */
|
2699 | 88103cfe | blueswir1 | { |
2700 | 88103cfe | blueswir1 | { "punpckldq",{ MX, EMd } },
|
2701 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2702 | 88103cfe | blueswir1 | { "punpckldq",{ MX, EMq } },
|
2703 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2704 | c2c73b42 | blueswir1 | }, |
2705 | bc51c5c9 | bellard | }; |
2706 | dc99065b | bellard | |
2707 | bc51c5c9 | bellard | static const struct dis386 x86_64_table[][2] = { |
2708 | bc51c5c9 | bellard | { |
2709 | 88103cfe | blueswir1 | { "pusha{P|}", { XX } },
|
2710 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2711 | 88103cfe | blueswir1 | }, |
2712 | 88103cfe | blueswir1 | { |
2713 | 88103cfe | blueswir1 | { "popa{P|}", { XX } },
|
2714 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2715 | 88103cfe | blueswir1 | }, |
2716 | 88103cfe | blueswir1 | { |
2717 | 88103cfe | blueswir1 | { "bound{S|}", { Gv, Ma } },
|
2718 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2719 | 88103cfe | blueswir1 | }, |
2720 | 88103cfe | blueswir1 | { |
2721 | 88103cfe | blueswir1 | { "arpl", { Ew, Gw } },
|
2722 | 88103cfe | blueswir1 | { "movs{||lq|xd}", { Gv, Ed } },
|
2723 | bc51c5c9 | bellard | }, |
2724 | bc51c5c9 | bellard | }; |
2725 | bc51c5c9 | bellard | |
2726 | 88103cfe | blueswir1 | static const struct dis386 three_byte_table[][256] = { |
2727 | c2c73b42 | blueswir1 | /* THREE_BYTE_0 */
|
2728 | c2c73b42 | blueswir1 | { |
2729 | 88103cfe | blueswir1 | /* 00 */
|
2730 | 88103cfe | blueswir1 | { "pshufb", { MX, EM } },
|
2731 | 88103cfe | blueswir1 | { "phaddw", { MX, EM } },
|
2732 | 88103cfe | blueswir1 | { "phaddd", { MX, EM } },
|
2733 | 88103cfe | blueswir1 | { "phaddsw", { MX, EM } },
|
2734 | 88103cfe | blueswir1 | { "pmaddubsw", { MX, EM } },
|
2735 | 88103cfe | blueswir1 | { "phsubw", { MX, EM } },
|
2736 | 88103cfe | blueswir1 | { "phsubd", { MX, EM } },
|
2737 | 88103cfe | blueswir1 | { "phsubsw", { MX, EM } },
|
2738 | 88103cfe | blueswir1 | /* 08 */
|
2739 | 88103cfe | blueswir1 | { "psignb", { MX, EM } },
|
2740 | 88103cfe | blueswir1 | { "psignw", { MX, EM } },
|
2741 | 88103cfe | blueswir1 | { "psignd", { MX, EM } },
|
2742 | 88103cfe | blueswir1 | { "pmulhrsw", { MX, EM } },
|
2743 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2744 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2745 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2746 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2747 | 88103cfe | blueswir1 | /* 10 */
|
2748 | 88103cfe | blueswir1 | { PREGRP39 }, |
2749 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2750 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2751 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2752 | 88103cfe | blueswir1 | { PREGRP40 }, |
2753 | 88103cfe | blueswir1 | { PREGRP41 }, |
2754 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2755 | 88103cfe | blueswir1 | { PREGRP42 }, |
2756 | 88103cfe | blueswir1 | /* 18 */
|
2757 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2758 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2759 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2760 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2761 | 88103cfe | blueswir1 | { "pabsb", { MX, EM } },
|
2762 | 88103cfe | blueswir1 | { "pabsw", { MX, EM } },
|
2763 | 88103cfe | blueswir1 | { "pabsd", { MX, EM } },
|
2764 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2765 | 88103cfe | blueswir1 | /* 20 */
|
2766 | 88103cfe | blueswir1 | { PREGRP43 }, |
2767 | 88103cfe | blueswir1 | { PREGRP44 }, |
2768 | 88103cfe | blueswir1 | { PREGRP45 }, |
2769 | 88103cfe | blueswir1 | { PREGRP46 }, |
2770 | 88103cfe | blueswir1 | { PREGRP47 }, |
2771 | 88103cfe | blueswir1 | { PREGRP48 }, |
2772 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2773 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2774 | 88103cfe | blueswir1 | /* 28 */
|
2775 | 88103cfe | blueswir1 | { PREGRP49 }, |
2776 | 88103cfe | blueswir1 | { PREGRP50 }, |
2777 | 88103cfe | blueswir1 | { PREGRP51 }, |
2778 | 88103cfe | blueswir1 | { PREGRP52 }, |
2779 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2780 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2781 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2782 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2783 | 88103cfe | blueswir1 | /* 30 */
|
2784 | 88103cfe | blueswir1 | { PREGRP53 }, |
2785 | 88103cfe | blueswir1 | { PREGRP54 }, |
2786 | 88103cfe | blueswir1 | { PREGRP55 }, |
2787 | 88103cfe | blueswir1 | { PREGRP56 }, |
2788 | 88103cfe | blueswir1 | { PREGRP57 }, |
2789 | 88103cfe | blueswir1 | { PREGRP58 }, |
2790 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2791 | 88103cfe | blueswir1 | { PREGRP86 }, |
2792 | 88103cfe | blueswir1 | /* 38 */
|
2793 | 88103cfe | blueswir1 | { PREGRP59 }, |
2794 | 88103cfe | blueswir1 | { PREGRP60 }, |
2795 | 88103cfe | blueswir1 | { PREGRP61 }, |
2796 | 88103cfe | blueswir1 | { PREGRP62 }, |
2797 | 88103cfe | blueswir1 | { PREGRP63 }, |
2798 | 88103cfe | blueswir1 | { PREGRP64 }, |
2799 | 88103cfe | blueswir1 | { PREGRP65 }, |
2800 | 88103cfe | blueswir1 | { PREGRP66 }, |
2801 | 88103cfe | blueswir1 | /* 40 */
|
2802 | 88103cfe | blueswir1 | { PREGRP67 }, |
2803 | 88103cfe | blueswir1 | { PREGRP68 }, |
2804 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2805 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2806 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2807 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2808 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2809 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2810 | 88103cfe | blueswir1 | /* 48 */
|
2811 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2812 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2813 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2814 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2815 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2816 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2817 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2818 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2819 | 88103cfe | blueswir1 | /* 50 */
|
2820 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2821 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2822 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2823 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2824 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2825 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2826 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2827 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2828 | 88103cfe | blueswir1 | /* 58 */
|
2829 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2830 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2831 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2832 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2833 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2834 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2835 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2836 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2837 | 88103cfe | blueswir1 | /* 60 */
|
2838 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2839 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2840 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2841 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2842 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2843 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2844 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2845 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2846 | 88103cfe | blueswir1 | /* 68 */
|
2847 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2848 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2849 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2850 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2851 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2852 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2853 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2854 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2855 | 88103cfe | blueswir1 | /* 70 */
|
2856 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2857 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2858 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2859 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2860 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2861 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2862 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2863 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2864 | 88103cfe | blueswir1 | /* 78 */
|
2865 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2866 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2867 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2868 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2869 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2870 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2871 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2872 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2873 | 88103cfe | blueswir1 | /* 80 */
|
2874 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2875 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2876 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2877 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2878 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2879 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2880 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2881 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2882 | 88103cfe | blueswir1 | /* 88 */
|
2883 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2884 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2885 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2886 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2887 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2888 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2889 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2890 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2891 | 88103cfe | blueswir1 | /* 90 */
|
2892 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2893 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2894 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2895 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2896 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2897 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2898 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2899 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2900 | 88103cfe | blueswir1 | /* 98 */
|
2901 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2902 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2903 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2904 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2905 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2906 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2907 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2908 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2909 | 88103cfe | blueswir1 | /* a0 */
|
2910 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2911 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2912 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2913 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2914 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2915 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2916 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2917 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2918 | 88103cfe | blueswir1 | /* a8 */
|
2919 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2920 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2921 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2922 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2923 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2924 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2925 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2926 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2927 | 88103cfe | blueswir1 | /* b0 */
|
2928 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2929 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2930 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2931 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2932 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2933 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2934 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2935 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2936 | 88103cfe | blueswir1 | /* b8 */
|
2937 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2938 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2939 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2940 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2941 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2942 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2943 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2944 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2945 | 88103cfe | blueswir1 | /* c0 */
|
2946 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2947 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2948 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2949 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2950 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2951 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2952 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2953 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2954 | 88103cfe | blueswir1 | /* c8 */
|
2955 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2956 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2957 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2958 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2959 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2960 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2961 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2962 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2963 | 88103cfe | blueswir1 | /* d0 */
|
2964 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2965 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2966 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2967 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2968 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2969 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2970 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2971 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2972 | 88103cfe | blueswir1 | /* d8 */
|
2973 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2974 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2975 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2976 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2977 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2978 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2979 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2980 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2981 | 88103cfe | blueswir1 | /* e0 */
|
2982 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2983 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2984 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2985 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2986 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2987 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2988 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2989 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2990 | 88103cfe | blueswir1 | /* e8 */
|
2991 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2992 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2993 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2994 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2995 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2996 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2997 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2998 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
2999 | 88103cfe | blueswir1 | /* f0 */
|
3000 | 88103cfe | blueswir1 | { PREGRP87 }, |
3001 | 88103cfe | blueswir1 | { PREGRP88 }, |
3002 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3003 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3004 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3005 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3006 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3007 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3008 | 88103cfe | blueswir1 | /* f8 */
|
3009 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3010 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3011 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3012 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3013 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3014 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3015 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3016 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3017 | c2c73b42 | blueswir1 | }, |
3018 | c2c73b42 | blueswir1 | /* THREE_BYTE_1 */
|
3019 | c2c73b42 | blueswir1 | { |
3020 | 88103cfe | blueswir1 | /* 00 */
|
3021 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3022 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3023 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3024 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3025 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3026 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3027 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3028 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3029 | 88103cfe | blueswir1 | /* 08 */
|
3030 | 88103cfe | blueswir1 | { PREGRP69 }, |
3031 | 88103cfe | blueswir1 | { PREGRP70 }, |
3032 | 88103cfe | blueswir1 | { PREGRP71 }, |
3033 | 88103cfe | blueswir1 | { PREGRP72 }, |
3034 | 88103cfe | blueswir1 | { PREGRP73 }, |
3035 | 88103cfe | blueswir1 | { PREGRP74 }, |
3036 | 88103cfe | blueswir1 | { PREGRP75 }, |
3037 | 88103cfe | blueswir1 | { "palignr", { MX, EM, Ib } },
|
3038 | 88103cfe | blueswir1 | /* 10 */
|
3039 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3040 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3041 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3042 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3043 | 88103cfe | blueswir1 | { PREGRP76 }, |
3044 | 88103cfe | blueswir1 | { PREGRP77 }, |
3045 | 88103cfe | blueswir1 | { PREGRP78 }, |
3046 | 88103cfe | blueswir1 | { PREGRP79 }, |
3047 | 88103cfe | blueswir1 | /* 18 */
|
3048 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3049 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3050 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3051 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3052 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3053 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3054 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3055 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3056 | 88103cfe | blueswir1 | /* 20 */
|
3057 | 88103cfe | blueswir1 | { PREGRP80 }, |
3058 | 88103cfe | blueswir1 | { PREGRP81 }, |
3059 | 88103cfe | blueswir1 | { PREGRP82 }, |
3060 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3061 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3062 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3063 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3064 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3065 | 88103cfe | blueswir1 | /* 28 */
|
3066 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3067 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3068 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3069 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3070 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3071 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3072 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3073 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3074 | 88103cfe | blueswir1 | /* 30 */
|
3075 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3076 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3077 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3078 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3079 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3080 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3081 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3082 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3083 | 88103cfe | blueswir1 | /* 38 */
|
3084 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3085 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3086 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3087 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3088 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3089 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3090 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3091 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3092 | 88103cfe | blueswir1 | /* 40 */
|
3093 | 88103cfe | blueswir1 | { PREGRP83 }, |
3094 | 88103cfe | blueswir1 | { PREGRP84 }, |
3095 | 88103cfe | blueswir1 | { PREGRP85 }, |
3096 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3097 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3098 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3099 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3100 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3101 | 88103cfe | blueswir1 | /* 48 */
|
3102 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3103 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3104 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3105 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3106 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3107 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3108 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3109 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3110 | 88103cfe | blueswir1 | /* 50 */
|
3111 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3112 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3113 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3114 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3115 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3116 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3117 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3118 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3119 | 88103cfe | blueswir1 | /* 58 */
|
3120 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3121 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3122 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3123 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3124 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3125 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3126 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3127 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3128 | 88103cfe | blueswir1 | /* 60 */
|
3129 | 88103cfe | blueswir1 | { PREGRP89 }, |
3130 | 88103cfe | blueswir1 | { PREGRP90 }, |
3131 | 88103cfe | blueswir1 | { PREGRP91 }, |
3132 | 88103cfe | blueswir1 | { PREGRP92 }, |
3133 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3134 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3135 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3136 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3137 | 88103cfe | blueswir1 | /* 68 */
|
3138 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3139 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3140 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3141 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3142 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3143 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3144 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3145 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3146 | 88103cfe | blueswir1 | /* 70 */
|
3147 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3148 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3149 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3150 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3151 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3152 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3153 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3154 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3155 | 88103cfe | blueswir1 | /* 78 */
|
3156 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3157 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3158 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3159 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3160 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3161 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3162 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3163 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3164 | 88103cfe | blueswir1 | /* 80 */
|
3165 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3166 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3167 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3168 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3169 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3170 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3171 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3172 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3173 | 88103cfe | blueswir1 | /* 88 */
|
3174 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3175 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3176 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3177 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3178 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3179 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3180 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3181 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3182 | 88103cfe | blueswir1 | /* 90 */
|
3183 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3184 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3185 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3186 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3187 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3188 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3189 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3190 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3191 | 88103cfe | blueswir1 | /* 98 */
|
3192 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3193 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3194 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3195 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3196 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3197 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3198 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3199 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3200 | 88103cfe | blueswir1 | /* a0 */
|
3201 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3202 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3203 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3204 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3205 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3206 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3207 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3208 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3209 | 88103cfe | blueswir1 | /* a8 */
|
3210 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3211 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3212 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3213 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3214 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3215 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3216 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3217 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3218 | 88103cfe | blueswir1 | /* b0 */
|
3219 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3220 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3221 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3222 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3223 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3224 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3225 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3226 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3227 | 88103cfe | blueswir1 | /* b8 */
|
3228 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3229 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3230 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3231 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3232 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3233 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3234 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3235 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3236 | 88103cfe | blueswir1 | /* c0 */
|
3237 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3238 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3239 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3240 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3241 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3242 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3243 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3244 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3245 | 88103cfe | blueswir1 | /* c8 */
|
3246 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3247 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3248 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3249 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3250 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3251 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3252 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3253 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3254 | 88103cfe | blueswir1 | /* d0 */
|
3255 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3256 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3257 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3258 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3259 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3260 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3261 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3262 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3263 | 88103cfe | blueswir1 | /* d8 */
|
3264 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3265 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3266 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3267 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3268 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3269 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3270 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3271 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3272 | 88103cfe | blueswir1 | /* e0 */
|
3273 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3274 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3275 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3276 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3277 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3278 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3279 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3280 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3281 | 88103cfe | blueswir1 | /* e8 */
|
3282 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3283 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3284 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3285 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3286 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3287 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3288 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3289 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3290 | 88103cfe | blueswir1 | /* f0 */
|
3291 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3292 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3293 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3294 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3295 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3296 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3297 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3298 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3299 | 88103cfe | blueswir1 | /* f8 */
|
3300 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3301 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3302 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3303 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3304 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3305 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3306 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3307 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
3308 | 88103cfe | blueswir1 | } |
3309 | c2c73b42 | blueswir1 | }; |
3310 | c2c73b42 | blueswir1 | |
3311 | bc51c5c9 | bellard | #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") |
3312 | dc99065b | bellard | |
3313 | dc99065b | bellard | static void |
3314 | c2c73b42 | blueswir1 | ckprefix (void)
|
3315 | dc99065b | bellard | { |
3316 | bc51c5c9 | bellard | int newrex;
|
3317 | bc51c5c9 | bellard | rex = 0;
|
3318 | dc99065b | bellard | prefixes = 0;
|
3319 | bc51c5c9 | bellard | used_prefixes = 0;
|
3320 | bc51c5c9 | bellard | rex_used = 0;
|
3321 | dc99065b | bellard | while (1) |
3322 | dc99065b | bellard | { |
3323 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3324 | bc51c5c9 | bellard | newrex = 0;
|
3325 | dc99065b | bellard | switch (*codep)
|
3326 | dc99065b | bellard | { |
3327 | bc51c5c9 | bellard | /* REX prefixes family. */
|
3328 | bc51c5c9 | bellard | case 0x40: |
3329 | bc51c5c9 | bellard | case 0x41: |
3330 | bc51c5c9 | bellard | case 0x42: |
3331 | bc51c5c9 | bellard | case 0x43: |
3332 | bc51c5c9 | bellard | case 0x44: |
3333 | bc51c5c9 | bellard | case 0x45: |
3334 | bc51c5c9 | bellard | case 0x46: |
3335 | bc51c5c9 | bellard | case 0x47: |
3336 | bc51c5c9 | bellard | case 0x48: |
3337 | bc51c5c9 | bellard | case 0x49: |
3338 | bc51c5c9 | bellard | case 0x4a: |
3339 | bc51c5c9 | bellard | case 0x4b: |
3340 | bc51c5c9 | bellard | case 0x4c: |
3341 | bc51c5c9 | bellard | case 0x4d: |
3342 | bc51c5c9 | bellard | case 0x4e: |
3343 | bc51c5c9 | bellard | case 0x4f: |
3344 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
3345 | bc51c5c9 | bellard | newrex = *codep; |
3346 | bc51c5c9 | bellard | else
|
3347 | bc51c5c9 | bellard | return;
|
3348 | bc51c5c9 | bellard | break;
|
3349 | dc99065b | bellard | case 0xf3: |
3350 | dc99065b | bellard | prefixes |= PREFIX_REPZ; |
3351 | dc99065b | bellard | break;
|
3352 | dc99065b | bellard | case 0xf2: |
3353 | dc99065b | bellard | prefixes |= PREFIX_REPNZ; |
3354 | dc99065b | bellard | break;
|
3355 | dc99065b | bellard | case 0xf0: |
3356 | dc99065b | bellard | prefixes |= PREFIX_LOCK; |
3357 | dc99065b | bellard | break;
|
3358 | dc99065b | bellard | case 0x2e: |
3359 | dc99065b | bellard | prefixes |= PREFIX_CS; |
3360 | dc99065b | bellard | break;
|
3361 | dc99065b | bellard | case 0x36: |
3362 | dc99065b | bellard | prefixes |= PREFIX_SS; |
3363 | dc99065b | bellard | break;
|
3364 | dc99065b | bellard | case 0x3e: |
3365 | dc99065b | bellard | prefixes |= PREFIX_DS; |
3366 | dc99065b | bellard | break;
|
3367 | dc99065b | bellard | case 0x26: |
3368 | dc99065b | bellard | prefixes |= PREFIX_ES; |
3369 | dc99065b | bellard | break;
|
3370 | dc99065b | bellard | case 0x64: |
3371 | dc99065b | bellard | prefixes |= PREFIX_FS; |
3372 | dc99065b | bellard | break;
|
3373 | dc99065b | bellard | case 0x65: |
3374 | dc99065b | bellard | prefixes |= PREFIX_GS; |
3375 | dc99065b | bellard | break;
|
3376 | dc99065b | bellard | case 0x66: |
3377 | dc99065b | bellard | prefixes |= PREFIX_DATA; |
3378 | dc99065b | bellard | break;
|
3379 | dc99065b | bellard | case 0x67: |
3380 | bc51c5c9 | bellard | prefixes |= PREFIX_ADDR; |
3381 | dc99065b | bellard | break;
|
3382 | bc51c5c9 | bellard | case FWAIT_OPCODE:
|
3383 | bc51c5c9 | bellard | /* fwait is really an instruction. If there are prefixes
|
3384 | bc51c5c9 | bellard | before the fwait, they belong to the fwait, *not* to the
|
3385 | bc51c5c9 | bellard | following instruction. */
|
3386 | c2c73b42 | blueswir1 | if (prefixes || rex)
|
3387 | bc51c5c9 | bellard | { |
3388 | bc51c5c9 | bellard | prefixes |= PREFIX_FWAIT; |
3389 | bc51c5c9 | bellard | codep++; |
3390 | bc51c5c9 | bellard | return;
|
3391 | bc51c5c9 | bellard | } |
3392 | bc51c5c9 | bellard | prefixes = PREFIX_FWAIT; |
3393 | dc99065b | bellard | break;
|
3394 | dc99065b | bellard | default:
|
3395 | dc99065b | bellard | return;
|
3396 | dc99065b | bellard | } |
3397 | bc51c5c9 | bellard | /* Rex is ignored when followed by another prefix. */
|
3398 | bc51c5c9 | bellard | if (rex)
|
3399 | bc51c5c9 | bellard | { |
3400 | c2c73b42 | blueswir1 | rex_used = rex; |
3401 | c2c73b42 | blueswir1 | return;
|
3402 | bc51c5c9 | bellard | } |
3403 | bc51c5c9 | bellard | rex = newrex; |
3404 | dc99065b | bellard | codep++; |
3405 | dc99065b | bellard | } |
3406 | dc99065b | bellard | } |
3407 | dc99065b | bellard | |
3408 | bc51c5c9 | bellard | /* Return the name of the prefix byte PREF, or NULL if PREF is not a
|
3409 | bc51c5c9 | bellard | prefix byte. */
|
3410 | bc51c5c9 | bellard | |
3411 | bc51c5c9 | bellard | static const char * |
3412 | c2c73b42 | blueswir1 | prefix_name (int pref, int sizeflag) |
3413 | bc51c5c9 | bellard | { |
3414 | 88103cfe | blueswir1 | static const char * const rexes [16] = |
3415 | 88103cfe | blueswir1 | { |
3416 | 88103cfe | blueswir1 | "rex", /* 0x40 */ |
3417 | 88103cfe | blueswir1 | "rex.B", /* 0x41 */ |
3418 | 88103cfe | blueswir1 | "rex.X", /* 0x42 */ |
3419 | 88103cfe | blueswir1 | "rex.XB", /* 0x43 */ |
3420 | 88103cfe | blueswir1 | "rex.R", /* 0x44 */ |
3421 | 88103cfe | blueswir1 | "rex.RB", /* 0x45 */ |
3422 | 88103cfe | blueswir1 | "rex.RX", /* 0x46 */ |
3423 | 88103cfe | blueswir1 | "rex.RXB", /* 0x47 */ |
3424 | 88103cfe | blueswir1 | "rex.W", /* 0x48 */ |
3425 | 88103cfe | blueswir1 | "rex.WB", /* 0x49 */ |
3426 | 88103cfe | blueswir1 | "rex.WX", /* 0x4a */ |
3427 | 88103cfe | blueswir1 | "rex.WXB", /* 0x4b */ |
3428 | 88103cfe | blueswir1 | "rex.WR", /* 0x4c */ |
3429 | 88103cfe | blueswir1 | "rex.WRB", /* 0x4d */ |
3430 | 88103cfe | blueswir1 | "rex.WRX", /* 0x4e */ |
3431 | 88103cfe | blueswir1 | "rex.WRXB", /* 0x4f */ |
3432 | 88103cfe | blueswir1 | }; |
3433 | 88103cfe | blueswir1 | |
3434 | bc51c5c9 | bellard | switch (pref)
|
3435 | bc51c5c9 | bellard | { |
3436 | bc51c5c9 | bellard | /* REX prefixes family. */
|
3437 | bc51c5c9 | bellard | case 0x40: |
3438 | bc51c5c9 | bellard | case 0x41: |
3439 | bc51c5c9 | bellard | case 0x42: |
3440 | bc51c5c9 | bellard | case 0x43: |
3441 | bc51c5c9 | bellard | case 0x44: |
3442 | bc51c5c9 | bellard | case 0x45: |
3443 | bc51c5c9 | bellard | case 0x46: |
3444 | bc51c5c9 | bellard | case 0x47: |
3445 | bc51c5c9 | bellard | case 0x48: |
3446 | bc51c5c9 | bellard | case 0x49: |
3447 | bc51c5c9 | bellard | case 0x4a: |
3448 | bc51c5c9 | bellard | case 0x4b: |
3449 | bc51c5c9 | bellard | case 0x4c: |
3450 | bc51c5c9 | bellard | case 0x4d: |
3451 | bc51c5c9 | bellard | case 0x4e: |
3452 | bc51c5c9 | bellard | case 0x4f: |
3453 | 88103cfe | blueswir1 | return rexes [pref - 0x40]; |
3454 | bc51c5c9 | bellard | case 0xf3: |
3455 | bc51c5c9 | bellard | return "repz"; |
3456 | bc51c5c9 | bellard | case 0xf2: |
3457 | bc51c5c9 | bellard | return "repnz"; |
3458 | bc51c5c9 | bellard | case 0xf0: |
3459 | bc51c5c9 | bellard | return "lock"; |
3460 | bc51c5c9 | bellard | case 0x2e: |
3461 | bc51c5c9 | bellard | return "cs"; |
3462 | bc51c5c9 | bellard | case 0x36: |
3463 | bc51c5c9 | bellard | return "ss"; |
3464 | bc51c5c9 | bellard | case 0x3e: |
3465 | bc51c5c9 | bellard | return "ds"; |
3466 | bc51c5c9 | bellard | case 0x26: |
3467 | bc51c5c9 | bellard | return "es"; |
3468 | bc51c5c9 | bellard | case 0x64: |
3469 | bc51c5c9 | bellard | return "fs"; |
3470 | bc51c5c9 | bellard | case 0x65: |
3471 | bc51c5c9 | bellard | return "gs"; |
3472 | bc51c5c9 | bellard | case 0x66: |
3473 | bc51c5c9 | bellard | return (sizeflag & DFLAG) ? "data16" : "data32"; |
3474 | bc51c5c9 | bellard | case 0x67: |
3475 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
3476 | c2c73b42 | blueswir1 | return (sizeflag & AFLAG) ? "addr32" : "addr64"; |
3477 | bc51c5c9 | bellard | else
|
3478 | c2c73b42 | blueswir1 | return (sizeflag & AFLAG) ? "addr16" : "addr32"; |
3479 | bc51c5c9 | bellard | case FWAIT_OPCODE:
|
3480 | bc51c5c9 | bellard | return "fwait"; |
3481 | bc51c5c9 | bellard | default:
|
3482 | bc51c5c9 | bellard | return NULL; |
3483 | bc51c5c9 | bellard | } |
3484 | bc51c5c9 | bellard | } |
3485 | dc99065b | bellard | |
3486 | 88103cfe | blueswir1 | static char op_out[MAX_OPERANDS][100]; |
3487 | 88103cfe | blueswir1 | static int op_ad, op_index[MAX_OPERANDS]; |
3488 | c2c73b42 | blueswir1 | static int two_source_ops; |
3489 | 88103cfe | blueswir1 | static bfd_vma op_address[MAX_OPERANDS];
|
3490 | 88103cfe | blueswir1 | static bfd_vma op_riprel[MAX_OPERANDS];
|
3491 | bc51c5c9 | bellard | static bfd_vma start_pc;
|
3492 | 88103cfe | blueswir1 | |
3493 | dc99065b | bellard | /*
|
3494 | dc99065b | bellard | * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
|
3495 | dc99065b | bellard | * (see topic "Redundant prefixes" in the "Differences from 8086"
|
3496 | dc99065b | bellard | * section of the "Virtual 8086 Mode" chapter.)
|
3497 | dc99065b | bellard | * 'pc' should be the address of this instruction, it will
|
3498 | dc99065b | bellard | * be used to print the target address if this is a relative jump or call
|
3499 | dc99065b | bellard | * The function returns the length of this instruction in bytes.
|
3500 | dc99065b | bellard | */
|
3501 | dc99065b | bellard | |
3502 | c2c73b42 | blueswir1 | static char intel_syntax; |
3503 | bc51c5c9 | bellard | static char open_char; |
3504 | bc51c5c9 | bellard | static char close_char; |
3505 | bc51c5c9 | bellard | static char separator_char; |
3506 | bc51c5c9 | bellard | static char scale_char; |
3507 | bc51c5c9 | bellard | |
3508 | dc99065b | bellard | int
|
3509 | c2c73b42 | blueswir1 | print_insn_i386 (bfd_vma pc, disassemble_info *info) |
3510 | bc51c5c9 | bellard | { |
3511 | bc51c5c9 | bellard | intel_syntax = -1;
|
3512 | bc51c5c9 | bellard | |
3513 | bc51c5c9 | bellard | return print_insn (pc, info);
|
3514 | bc51c5c9 | bellard | } |
3515 | bc51c5c9 | bellard | |
3516 | bc51c5c9 | bellard | static int |
3517 | c2c73b42 | blueswir1 | print_insn (bfd_vma pc, disassemble_info *info) |
3518 | dc99065b | bellard | { |
3519 | bc51c5c9 | bellard | const struct dis386 *dp; |
3520 | dc99065b | bellard | int i;
|
3521 | 88103cfe | blueswir1 | char *op_txt[MAX_OPERANDS];
|
3522 | dc99065b | bellard | int needcomma;
|
3523 | 88103cfe | blueswir1 | unsigned char uses_DATA_prefix, uses_LOCK_prefix; |
3524 | 88103cfe | blueswir1 | unsigned char uses_REPNZ_prefix, uses_REPZ_prefix; |
3525 | bc51c5c9 | bellard | int sizeflag;
|
3526 | bc51c5c9 | bellard | const char *p; |
3527 | dc99065b | bellard | struct dis_private priv;
|
3528 | 88103cfe | blueswir1 | unsigned char op; |
3529 | dc99065b | bellard | |
3530 | c2c73b42 | blueswir1 | if (info->mach == bfd_mach_x86_64_intel_syntax
|
3531 | c2c73b42 | blueswir1 | || info->mach == bfd_mach_x86_64) |
3532 | c2c73b42 | blueswir1 | address_mode = mode_64bit; |
3533 | c2c73b42 | blueswir1 | else
|
3534 | c2c73b42 | blueswir1 | address_mode = mode_32bit; |
3535 | bc51c5c9 | bellard | |
3536 | c2c73b42 | blueswir1 | if (intel_syntax == (char) -1) |
3537 | bc51c5c9 | bellard | intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax |
3538 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64_intel_syntax); |
3539 | bc51c5c9 | bellard | |
3540 | bc51c5c9 | bellard | if (info->mach == bfd_mach_i386_i386
|
3541 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64 |
3542 | bc51c5c9 | bellard | || info->mach == bfd_mach_i386_i386_intel_syntax |
3543 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64_intel_syntax) |
3544 | bc51c5c9 | bellard | priv.orig_sizeflag = AFLAG | DFLAG; |
3545 | bc51c5c9 | bellard | else if (info->mach == bfd_mach_i386_i8086) |
3546 | bc51c5c9 | bellard | priv.orig_sizeflag = 0;
|
3547 | bc51c5c9 | bellard | else
|
3548 | bc51c5c9 | bellard | abort (); |
3549 | bc51c5c9 | bellard | |
3550 | bc51c5c9 | bellard | for (p = info->disassembler_options; p != NULL; ) |
3551 | bc51c5c9 | bellard | { |
3552 | bc51c5c9 | bellard | if (strncmp (p, "x86-64", 6) == 0) |
3553 | bc51c5c9 | bellard | { |
3554 | c2c73b42 | blueswir1 | address_mode = mode_64bit; |
3555 | bc51c5c9 | bellard | priv.orig_sizeflag = AFLAG | DFLAG; |
3556 | bc51c5c9 | bellard | } |
3557 | bc51c5c9 | bellard | else if (strncmp (p, "i386", 4) == 0) |
3558 | bc51c5c9 | bellard | { |
3559 | c2c73b42 | blueswir1 | address_mode = mode_32bit; |
3560 | bc51c5c9 | bellard | priv.orig_sizeflag = AFLAG | DFLAG; |
3561 | bc51c5c9 | bellard | } |
3562 | bc51c5c9 | bellard | else if (strncmp (p, "i8086", 5) == 0) |
3563 | bc51c5c9 | bellard | { |
3564 | c2c73b42 | blueswir1 | address_mode = mode_16bit; |
3565 | bc51c5c9 | bellard | priv.orig_sizeflag = 0;
|
3566 | bc51c5c9 | bellard | } |
3567 | bc51c5c9 | bellard | else if (strncmp (p, "intel", 5) == 0) |
3568 | bc51c5c9 | bellard | { |
3569 | bc51c5c9 | bellard | intel_syntax = 1;
|
3570 | bc51c5c9 | bellard | } |
3571 | bc51c5c9 | bellard | else if (strncmp (p, "att", 3) == 0) |
3572 | bc51c5c9 | bellard | { |
3573 | bc51c5c9 | bellard | intel_syntax = 0;
|
3574 | bc51c5c9 | bellard | } |
3575 | bc51c5c9 | bellard | else if (strncmp (p, "addr", 4) == 0) |
3576 | bc51c5c9 | bellard | { |
3577 | 88103cfe | blueswir1 | if (address_mode == mode_64bit)
|
3578 | 88103cfe | blueswir1 | { |
3579 | 88103cfe | blueswir1 | if (p[4] == '3' && p[5] == '2') |
3580 | 88103cfe | blueswir1 | priv.orig_sizeflag &= ~AFLAG; |
3581 | 88103cfe | blueswir1 | else if (p[4] == '6' && p[5] == '4') |
3582 | 88103cfe | blueswir1 | priv.orig_sizeflag |= AFLAG; |
3583 | 88103cfe | blueswir1 | } |
3584 | 88103cfe | blueswir1 | else
|
3585 | 88103cfe | blueswir1 | { |
3586 | 88103cfe | blueswir1 | if (p[4] == '1' && p[5] == '6') |
3587 | 88103cfe | blueswir1 | priv.orig_sizeflag &= ~AFLAG; |
3588 | 88103cfe | blueswir1 | else if (p[4] == '3' && p[5] == '2') |
3589 | 88103cfe | blueswir1 | priv.orig_sizeflag |= AFLAG; |
3590 | 88103cfe | blueswir1 | } |
3591 | bc51c5c9 | bellard | } |
3592 | bc51c5c9 | bellard | else if (strncmp (p, "data", 4) == 0) |
3593 | bc51c5c9 | bellard | { |
3594 | bc51c5c9 | bellard | if (p[4] == '1' && p[5] == '6') |
3595 | bc51c5c9 | bellard | priv.orig_sizeflag &= ~DFLAG; |
3596 | bc51c5c9 | bellard | else if (p[4] == '3' && p[5] == '2') |
3597 | bc51c5c9 | bellard | priv.orig_sizeflag |= DFLAG; |
3598 | bc51c5c9 | bellard | } |
3599 | bc51c5c9 | bellard | else if (strncmp (p, "suffix", 6) == 0) |
3600 | bc51c5c9 | bellard | priv.orig_sizeflag |= SUFFIX_ALWAYS; |
3601 | bc51c5c9 | bellard | |
3602 | bc51c5c9 | bellard | p = strchr (p, ',');
|
3603 | bc51c5c9 | bellard | if (p != NULL) |
3604 | bc51c5c9 | bellard | p++; |
3605 | bc51c5c9 | bellard | } |
3606 | bc51c5c9 | bellard | |
3607 | bc51c5c9 | bellard | if (intel_syntax)
|
3608 | bc51c5c9 | bellard | { |
3609 | bc51c5c9 | bellard | names64 = intel_names64; |
3610 | bc51c5c9 | bellard | names32 = intel_names32; |
3611 | bc51c5c9 | bellard | names16 = intel_names16; |
3612 | bc51c5c9 | bellard | names8 = intel_names8; |
3613 | bc51c5c9 | bellard | names8rex = intel_names8rex; |
3614 | bc51c5c9 | bellard | names_seg = intel_names_seg; |
3615 | bc51c5c9 | bellard | index16 = intel_index16; |
3616 | bc51c5c9 | bellard | open_char = '[';
|
3617 | bc51c5c9 | bellard | close_char = ']';
|
3618 | bc51c5c9 | bellard | separator_char = '+';
|
3619 | bc51c5c9 | bellard | scale_char = '*';
|
3620 | bc51c5c9 | bellard | } |
3621 | bc51c5c9 | bellard | else
|
3622 | bc51c5c9 | bellard | { |
3623 | bc51c5c9 | bellard | names64 = att_names64; |
3624 | bc51c5c9 | bellard | names32 = att_names32; |
3625 | bc51c5c9 | bellard | names16 = att_names16; |
3626 | bc51c5c9 | bellard | names8 = att_names8; |
3627 | bc51c5c9 | bellard | names8rex = att_names8rex; |
3628 | bc51c5c9 | bellard | names_seg = att_names_seg; |
3629 | bc51c5c9 | bellard | index16 = att_index16; |
3630 | bc51c5c9 | bellard | open_char = '(';
|
3631 | bc51c5c9 | bellard | close_char = ')';
|
3632 | bc51c5c9 | bellard | separator_char = ',';
|
3633 | bc51c5c9 | bellard | scale_char = ',';
|
3634 | bc51c5c9 | bellard | } |
3635 | bc51c5c9 | bellard | |
3636 | bc51c5c9 | bellard | /* The output looks better if we put 7 bytes on a line, since that
|
3637 | bc51c5c9 | bellard | puts most long word instructions on a single line. */
|
3638 | bc51c5c9 | bellard | info->bytes_per_line = 7;
|
3639 | dc99065b | bellard | |
3640 | c2c73b42 | blueswir1 | info->private_data = &priv; |
3641 | dc99065b | bellard | priv.max_fetched = priv.the_buffer; |
3642 | dc99065b | bellard | priv.insn_start = pc; |
3643 | dc99065b | bellard | |
3644 | dc99065b | bellard | obuf[0] = 0; |
3645 | 88103cfe | blueswir1 | for (i = 0; i < MAX_OPERANDS; ++i) |
3646 | 88103cfe | blueswir1 | { |
3647 | 88103cfe | blueswir1 | op_out[i][0] = 0; |
3648 | 88103cfe | blueswir1 | op_index[i] = -1;
|
3649 | 88103cfe | blueswir1 | } |
3650 | dc99065b | bellard | |
3651 | dc99065b | bellard | the_info = info; |
3652 | dc99065b | bellard | start_pc = pc; |
3653 | bc51c5c9 | bellard | start_codep = priv.the_buffer; |
3654 | bc51c5c9 | bellard | codep = priv.the_buffer; |
3655 | bc51c5c9 | bellard | |
3656 | bc51c5c9 | bellard | if (setjmp (priv.bailout) != 0) |
3657 | bc51c5c9 | bellard | { |
3658 | bc51c5c9 | bellard | const char *name; |
3659 | bc51c5c9 | bellard | |
3660 | bc51c5c9 | bellard | /* Getting here means we tried for data but didn't get it. That
|
3661 | bc51c5c9 | bellard | means we have an incomplete instruction of some sort. Just
|
3662 | bc51c5c9 | bellard | print the first byte as a prefix or a .byte pseudo-op. */
|
3663 | bc51c5c9 | bellard | if (codep > priv.the_buffer)
|
3664 | bc51c5c9 | bellard | { |
3665 | bc51c5c9 | bellard | name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
|
3666 | bc51c5c9 | bellard | if (name != NULL) |
3667 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s", name);
|
3668 | bc51c5c9 | bellard | else
|
3669 | bc51c5c9 | bellard | { |
3670 | bc51c5c9 | bellard | /* Just print the first byte as a .byte instruction. */
|
3671 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, ".byte 0x%x",
|
3672 | bc51c5c9 | bellard | (unsigned int) priv.the_buffer[0]); |
3673 | bc51c5c9 | bellard | } |
3674 | bc51c5c9 | bellard | |
3675 | bc51c5c9 | bellard | return 1; |
3676 | bc51c5c9 | bellard | } |
3677 | bc51c5c9 | bellard | |
3678 | bc51c5c9 | bellard | return -1; |
3679 | bc51c5c9 | bellard | } |
3680 | bc51c5c9 | bellard | |
3681 | bc51c5c9 | bellard | obufp = obuf; |
3682 | dc99065b | bellard | ckprefix (); |
3683 | dc99065b | bellard | |
3684 | bc51c5c9 | bellard | insn_codep = codep; |
3685 | bc51c5c9 | bellard | sizeflag = priv.orig_sizeflag; |
3686 | bc51c5c9 | bellard | |
3687 | dc99065b | bellard | FETCH_DATA (info, codep + 1);
|
3688 | bc51c5c9 | bellard | two_source_ops = (*codep == 0x62) || (*codep == 0xc8); |
3689 | bc51c5c9 | bellard | |
3690 | c2c73b42 | blueswir1 | if (((prefixes & PREFIX_FWAIT)
|
3691 | c2c73b42 | blueswir1 | && ((*codep < 0xd8) || (*codep > 0xdf))) |
3692 | c2c73b42 | blueswir1 | || (rex && rex_used)) |
3693 | dc99065b | bellard | { |
3694 | bc51c5c9 | bellard | const char *name; |
3695 | bc51c5c9 | bellard | |
3696 | c2c73b42 | blueswir1 | /* fwait not followed by floating point instruction, or rex followed
|
3697 | c2c73b42 | blueswir1 | by other prefixes. Print the first prefix. */
|
3698 | bc51c5c9 | bellard | name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
|
3699 | bc51c5c9 | bellard | if (name == NULL) |
3700 | bc51c5c9 | bellard | name = INTERNAL_DISASSEMBLER_ERROR; |
3701 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s", name);
|
3702 | bc51c5c9 | bellard | return 1; |
3703 | dc99065b | bellard | } |
3704 | bc51c5c9 | bellard | |
3705 | 88103cfe | blueswir1 | op = 0;
|
3706 | dc99065b | bellard | if (*codep == 0x0f) |
3707 | dc99065b | bellard | { |
3708 | 88103cfe | blueswir1 | unsigned char threebyte; |
3709 | dc99065b | bellard | FETCH_DATA (info, codep + 2);
|
3710 | 88103cfe | blueswir1 | threebyte = *++codep; |
3711 | 88103cfe | blueswir1 | dp = &dis386_twobyte[threebyte]; |
3712 | dc99065b | bellard | need_modrm = twobyte_has_modrm[*codep]; |
3713 | 88103cfe | blueswir1 | uses_DATA_prefix = twobyte_uses_DATA_prefix[*codep]; |
3714 | 88103cfe | blueswir1 | uses_REPNZ_prefix = twobyte_uses_REPNZ_prefix[*codep]; |
3715 | 88103cfe | blueswir1 | uses_REPZ_prefix = twobyte_uses_REPZ_prefix[*codep]; |
3716 | c2c73b42 | blueswir1 | uses_LOCK_prefix = (*codep & ~0x02) == 0x20; |
3717 | 88103cfe | blueswir1 | codep++; |
3718 | 88103cfe | blueswir1 | if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) |
3719 | 88103cfe | blueswir1 | { |
3720 | 88103cfe | blueswir1 | FETCH_DATA (info, codep + 2);
|
3721 | 88103cfe | blueswir1 | op = *codep++; |
3722 | 88103cfe | blueswir1 | switch (threebyte)
|
3723 | 88103cfe | blueswir1 | { |
3724 | 88103cfe | blueswir1 | case 0x38: |
3725 | 88103cfe | blueswir1 | uses_DATA_prefix = threebyte_0x38_uses_DATA_prefix[op]; |
3726 | 88103cfe | blueswir1 | uses_REPNZ_prefix = threebyte_0x38_uses_REPNZ_prefix[op]; |
3727 | 88103cfe | blueswir1 | uses_REPZ_prefix = threebyte_0x38_uses_REPZ_prefix[op]; |
3728 | 88103cfe | blueswir1 | break;
|
3729 | 88103cfe | blueswir1 | case 0x3a: |
3730 | 88103cfe | blueswir1 | uses_DATA_prefix = threebyte_0x3a_uses_DATA_prefix[op]; |
3731 | 88103cfe | blueswir1 | uses_REPNZ_prefix = threebyte_0x3a_uses_REPNZ_prefix[op]; |
3732 | 88103cfe | blueswir1 | uses_REPZ_prefix = threebyte_0x3a_uses_REPZ_prefix[op]; |
3733 | 88103cfe | blueswir1 | break;
|
3734 | 88103cfe | blueswir1 | default:
|
3735 | 88103cfe | blueswir1 | break;
|
3736 | 88103cfe | blueswir1 | } |
3737 | 88103cfe | blueswir1 | } |
3738 | dc99065b | bellard | } |
3739 | dc99065b | bellard | else
|
3740 | dc99065b | bellard | { |
3741 | dc99065b | bellard | dp = &dis386[*codep]; |
3742 | dc99065b | bellard | need_modrm = onebyte_has_modrm[*codep]; |
3743 | 88103cfe | blueswir1 | uses_DATA_prefix = 0;
|
3744 | 88103cfe | blueswir1 | uses_REPNZ_prefix = 0;
|
3745 | 88103cfe | blueswir1 | /* pause is 0xf3 0x90. */
|
3746 | 88103cfe | blueswir1 | uses_REPZ_prefix = *codep == 0x90;
|
3747 | c2c73b42 | blueswir1 | uses_LOCK_prefix = 0;
|
3748 | 88103cfe | blueswir1 | codep++; |
3749 | dc99065b | bellard | } |
3750 | dc99065b | bellard | |
3751 | 88103cfe | blueswir1 | if (!uses_REPZ_prefix && (prefixes & PREFIX_REPZ))
|
3752 | bc51c5c9 | bellard | { |
3753 | bc51c5c9 | bellard | oappend ("repz ");
|
3754 | bc51c5c9 | bellard | used_prefixes |= PREFIX_REPZ; |
3755 | bc51c5c9 | bellard | } |
3756 | 88103cfe | blueswir1 | if (!uses_REPNZ_prefix && (prefixes & PREFIX_REPNZ))
|
3757 | bc51c5c9 | bellard | { |
3758 | bc51c5c9 | bellard | oappend ("repnz ");
|
3759 | bc51c5c9 | bellard | used_prefixes |= PREFIX_REPNZ; |
3760 | bc51c5c9 | bellard | } |
3761 | 88103cfe | blueswir1 | |
3762 | c2c73b42 | blueswir1 | if (!uses_LOCK_prefix && (prefixes & PREFIX_LOCK))
|
3763 | bc51c5c9 | bellard | { |
3764 | bc51c5c9 | bellard | oappend ("lock ");
|
3765 | bc51c5c9 | bellard | used_prefixes |= PREFIX_LOCK; |
3766 | bc51c5c9 | bellard | } |
3767 | bc51c5c9 | bellard | |
3768 | bc51c5c9 | bellard | if (prefixes & PREFIX_ADDR)
|
3769 | bc51c5c9 | bellard | { |
3770 | bc51c5c9 | bellard | sizeflag ^= AFLAG; |
3771 | 88103cfe | blueswir1 | if (dp->op[2].bytemode != loop_jcxz_mode || intel_syntax) |
3772 | bc51c5c9 | bellard | { |
3773 | c2c73b42 | blueswir1 | if ((sizeflag & AFLAG) || address_mode == mode_64bit)
|
3774 | bc51c5c9 | bellard | oappend ("addr32 ");
|
3775 | bc51c5c9 | bellard | else
|
3776 | bc51c5c9 | bellard | oappend ("addr16 ");
|
3777 | bc51c5c9 | bellard | used_prefixes |= PREFIX_ADDR; |
3778 | bc51c5c9 | bellard | } |
3779 | bc51c5c9 | bellard | } |
3780 | bc51c5c9 | bellard | |
3781 | 88103cfe | blueswir1 | if (!uses_DATA_prefix && (prefixes & PREFIX_DATA))
|
3782 | bc51c5c9 | bellard | { |
3783 | bc51c5c9 | bellard | sizeflag ^= DFLAG; |
3784 | 88103cfe | blueswir1 | if (dp->op[2].bytemode == cond_jump_mode |
3785 | 88103cfe | blueswir1 | && dp->op[0].bytemode == v_mode
|
3786 | bc51c5c9 | bellard | && !intel_syntax) |
3787 | bc51c5c9 | bellard | { |
3788 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
3789 | bc51c5c9 | bellard | oappend ("data32 ");
|
3790 | bc51c5c9 | bellard | else
|
3791 | bc51c5c9 | bellard | oappend ("data16 ");
|
3792 | bc51c5c9 | bellard | used_prefixes |= PREFIX_DATA; |
3793 | bc51c5c9 | bellard | } |
3794 | bc51c5c9 | bellard | } |
3795 | bc51c5c9 | bellard | |
3796 | 88103cfe | blueswir1 | if (dp->name == NULL && dp->op[0].bytemode == IS_3BYTE_OPCODE) |
3797 | c2c73b42 | blueswir1 | { |
3798 | 88103cfe | blueswir1 | dp = &three_byte_table[dp->op[1].bytemode][op];
|
3799 | 88103cfe | blueswir1 | modrm.mod = (*codep >> 6) & 3; |
3800 | 88103cfe | blueswir1 | modrm.reg = (*codep >> 3) & 7; |
3801 | 88103cfe | blueswir1 | modrm.rm = *codep & 7;
|
3802 | c2c73b42 | blueswir1 | } |
3803 | c2c73b42 | blueswir1 | else if (need_modrm) |
3804 | dc99065b | bellard | { |
3805 | dc99065b | bellard | FETCH_DATA (info, codep + 1);
|
3806 | 88103cfe | blueswir1 | modrm.mod = (*codep >> 6) & 3; |
3807 | 88103cfe | blueswir1 | modrm.reg = (*codep >> 3) & 7; |
3808 | 88103cfe | blueswir1 | modrm.rm = *codep & 7;
|
3809 | dc99065b | bellard | } |
3810 | dc99065b | bellard | |
3811 | 88103cfe | blueswir1 | if (dp->name == NULL && dp->op[0].bytemode == FLOATCODE) |
3812 | dc99065b | bellard | { |
3813 | bc51c5c9 | bellard | dofloat (sizeflag); |
3814 | dc99065b | bellard | } |
3815 | dc99065b | bellard | else
|
3816 | dc99065b | bellard | { |
3817 | bc51c5c9 | bellard | int index;
|
3818 | dc99065b | bellard | if (dp->name == NULL) |
3819 | bc51c5c9 | bellard | { |
3820 | 88103cfe | blueswir1 | switch (dp->op[0].bytemode) |
3821 | bc51c5c9 | bellard | { |
3822 | bc51c5c9 | bellard | case USE_GROUPS:
|
3823 | 88103cfe | blueswir1 | dp = &grps[dp->op[1].bytemode][modrm.reg];
|
3824 | bc51c5c9 | bellard | break;
|
3825 | bc51c5c9 | bellard | |
3826 | bc51c5c9 | bellard | case USE_PREFIX_USER_TABLE:
|
3827 | bc51c5c9 | bellard | index = 0;
|
3828 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPZ); |
3829 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPZ)
|
3830 | bc51c5c9 | bellard | index = 1;
|
3831 | bc51c5c9 | bellard | else
|
3832 | bc51c5c9 | bellard | { |
3833 | 88103cfe | blueswir1 | /* We should check PREFIX_REPNZ and PREFIX_REPZ
|
3834 | 88103cfe | blueswir1 | before PREFIX_DATA. */
|
3835 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_REPNZ); |
3836 | 88103cfe | blueswir1 | if (prefixes & PREFIX_REPNZ)
|
3837 | 88103cfe | blueswir1 | index = 3;
|
3838 | bc51c5c9 | bellard | else
|
3839 | bc51c5c9 | bellard | { |
3840 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
3841 | 88103cfe | blueswir1 | if (prefixes & PREFIX_DATA)
|
3842 | 88103cfe | blueswir1 | index = 2;
|
3843 | bc51c5c9 | bellard | } |
3844 | bc51c5c9 | bellard | } |
3845 | 88103cfe | blueswir1 | dp = &prefix_user_table[dp->op[1].bytemode][index];
|
3846 | bc51c5c9 | bellard | break;
|
3847 | bc51c5c9 | bellard | |
3848 | bc51c5c9 | bellard | case X86_64_SPECIAL:
|
3849 | c2c73b42 | blueswir1 | index = address_mode == mode_64bit ? 1 : 0; |
3850 | 88103cfe | blueswir1 | dp = &x86_64_table[dp->op[1].bytemode][index];
|
3851 | bc51c5c9 | bellard | break;
|
3852 | bc51c5c9 | bellard | |
3853 | bc51c5c9 | bellard | default:
|
3854 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
3855 | bc51c5c9 | bellard | break;
|
3856 | bc51c5c9 | bellard | } |
3857 | bc51c5c9 | bellard | } |
3858 | bc51c5c9 | bellard | |
3859 | bc51c5c9 | bellard | if (putop (dp->name, sizeflag) == 0) |
3860 | 88103cfe | blueswir1 | { |
3861 | 88103cfe | blueswir1 | for (i = 0; i < MAX_OPERANDS; ++i) |
3862 | 88103cfe | blueswir1 | { |
3863 | 88103cfe | blueswir1 | obufp = op_out[i]; |
3864 | 88103cfe | blueswir1 | op_ad = MAX_OPERANDS - 1 - i;
|
3865 | 88103cfe | blueswir1 | if (dp->op[i].rtn)
|
3866 | 88103cfe | blueswir1 | (*dp->op[i].rtn) (dp->op[i].bytemode, sizeflag); |
3867 | 88103cfe | blueswir1 | } |
3868 | bc51c5c9 | bellard | } |
3869 | bc51c5c9 | bellard | } |
3870 | bc51c5c9 | bellard | |
3871 | bc51c5c9 | bellard | /* See if any prefixes were not used. If so, print the first one
|
3872 | bc51c5c9 | bellard | separately. If we don't do this, we'll wind up printing an
|
3873 | bc51c5c9 | bellard | instruction stream which does not precisely correspond to the
|
3874 | bc51c5c9 | bellard | bytes we are disassembling. */
|
3875 | bc51c5c9 | bellard | if ((prefixes & ~used_prefixes) != 0) |
3876 | bc51c5c9 | bellard | { |
3877 | bc51c5c9 | bellard | const char *name; |
3878 | bc51c5c9 | bellard | |
3879 | bc51c5c9 | bellard | name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
|
3880 | bc51c5c9 | bellard | if (name == NULL) |
3881 | bc51c5c9 | bellard | name = INTERNAL_DISASSEMBLER_ERROR; |
3882 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s", name);
|
3883 | bc51c5c9 | bellard | return 1; |
3884 | bc51c5c9 | bellard | } |
3885 | bc51c5c9 | bellard | if (rex & ~rex_used)
|
3886 | bc51c5c9 | bellard | { |
3887 | bc51c5c9 | bellard | const char *name; |
3888 | bc51c5c9 | bellard | name = prefix_name (rex | 0x40, priv.orig_sizeflag);
|
3889 | bc51c5c9 | bellard | if (name == NULL) |
3890 | bc51c5c9 | bellard | name = INTERNAL_DISASSEMBLER_ERROR; |
3891 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s ", name);
|
3892 | dc99065b | bellard | } |
3893 | bc51c5c9 | bellard | |
3894 | dc99065b | bellard | obufp = obuf + strlen (obuf); |
3895 | dc99065b | bellard | for (i = strlen (obuf); i < 6; i++) |
3896 | dc99065b | bellard | oappend (" ");
|
3897 | dc99065b | bellard | oappend (" ");
|
3898 | dc99065b | bellard | (*info->fprintf_func) (info->stream, "%s", obuf);
|
3899 | bc51c5c9 | bellard | |
3900 | bc51c5c9 | bellard | /* The enter and bound instructions are printed with operands in the same
|
3901 | bc51c5c9 | bellard | order as the intel book; everything else is printed in reverse order. */
|
3902 | bc51c5c9 | bellard | if (intel_syntax || two_source_ops)
|
3903 | dc99065b | bellard | { |
3904 | 88103cfe | blueswir1 | bfd_vma riprel; |
3905 | 88103cfe | blueswir1 | |
3906 | 88103cfe | blueswir1 | for (i = 0; i < MAX_OPERANDS; ++i) |
3907 | 88103cfe | blueswir1 | op_txt[i] = op_out[i]; |
3908 | 88103cfe | blueswir1 | |
3909 | 88103cfe | blueswir1 | for (i = 0; i < (MAX_OPERANDS >> 1); ++i) |
3910 | 88103cfe | blueswir1 | { |
3911 | 88103cfe | blueswir1 | op_ad = op_index[i]; |
3912 | 88103cfe | blueswir1 | op_index[i] = op_index[MAX_OPERANDS - 1 - i];
|
3913 | 88103cfe | blueswir1 | op_index[MAX_OPERANDS - 1 - i] = op_ad;
|
3914 | 88103cfe | blueswir1 | riprel = op_riprel[i]; |
3915 | 88103cfe | blueswir1 | op_riprel[i] = op_riprel [MAX_OPERANDS - 1 - i];
|
3916 | 88103cfe | blueswir1 | op_riprel[MAX_OPERANDS - 1 - i] = riprel;
|
3917 | 88103cfe | blueswir1 | } |
3918 | dc99065b | bellard | } |
3919 | dc99065b | bellard | else
|
3920 | dc99065b | bellard | { |
3921 | 88103cfe | blueswir1 | for (i = 0; i < MAX_OPERANDS; ++i) |
3922 | 88103cfe | blueswir1 | op_txt[MAX_OPERANDS - 1 - i] = op_out[i];
|
3923 | dc99065b | bellard | } |
3924 | 88103cfe | blueswir1 | |
3925 | dc99065b | bellard | needcomma = 0;
|
3926 | 88103cfe | blueswir1 | for (i = 0; i < MAX_OPERANDS; ++i) |
3927 | 88103cfe | blueswir1 | if (*op_txt[i])
|
3928 | 88103cfe | blueswir1 | { |
3929 | 88103cfe | blueswir1 | if (needcomma)
|
3930 | 88103cfe | blueswir1 | (*info->fprintf_func) (info->stream, ",");
|
3931 | 88103cfe | blueswir1 | if (op_index[i] != -1 && !op_riprel[i]) |
3932 | 88103cfe | blueswir1 | (*info->print_address_func) ((bfd_vma) op_address[op_index[i]], info); |
3933 | 88103cfe | blueswir1 | else
|
3934 | 88103cfe | blueswir1 | (*info->fprintf_func) (info->stream, "%s", op_txt[i]);
|
3935 | 88103cfe | blueswir1 | needcomma = 1;
|
3936 | 88103cfe | blueswir1 | } |
3937 | 88103cfe | blueswir1 | |
3938 | 88103cfe | blueswir1 | for (i = 0; i < MAX_OPERANDS; i++) |
3939 | bc51c5c9 | bellard | if (op_index[i] != -1 && op_riprel[i]) |
3940 | bc51c5c9 | bellard | { |
3941 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, " # ");
|
3942 | bc51c5c9 | bellard | (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep |
3943 | bc51c5c9 | bellard | + op_address[op_index[i]]), info); |
3944 | 88103cfe | blueswir1 | break;
|
3945 | bc51c5c9 | bellard | } |
3946 | bc51c5c9 | bellard | return codep - priv.the_buffer;
|
3947 | dc99065b | bellard | } |
3948 | dc99065b | bellard | |
3949 | bc51c5c9 | bellard | static const char *float_mem[] = { |
3950 | dc99065b | bellard | /* d8 */
|
3951 | bc51c5c9 | bellard | "fadd{s||s|}",
|
3952 | bc51c5c9 | bellard | "fmul{s||s|}",
|
3953 | bc51c5c9 | bellard | "fcom{s||s|}",
|
3954 | bc51c5c9 | bellard | "fcomp{s||s|}",
|
3955 | bc51c5c9 | bellard | "fsub{s||s|}",
|
3956 | bc51c5c9 | bellard | "fsubr{s||s|}",
|
3957 | bc51c5c9 | bellard | "fdiv{s||s|}",
|
3958 | bc51c5c9 | bellard | "fdivr{s||s|}",
|
3959 | c2c73b42 | blueswir1 | /* d9 */
|
3960 | bc51c5c9 | bellard | "fld{s||s|}",
|
3961 | dc99065b | bellard | "(bad)",
|
3962 | bc51c5c9 | bellard | "fst{s||s|}",
|
3963 | bc51c5c9 | bellard | "fstp{s||s|}",
|
3964 | c2c73b42 | blueswir1 | "fldenvIC",
|
3965 | dc99065b | bellard | "fldcw",
|
3966 | c2c73b42 | blueswir1 | "fNstenvIC",
|
3967 | dc99065b | bellard | "fNstcw",
|
3968 | dc99065b | bellard | /* da */
|
3969 | bc51c5c9 | bellard | "fiadd{l||l|}",
|
3970 | bc51c5c9 | bellard | "fimul{l||l|}",
|
3971 | bc51c5c9 | bellard | "ficom{l||l|}",
|
3972 | bc51c5c9 | bellard | "ficomp{l||l|}",
|
3973 | bc51c5c9 | bellard | "fisub{l||l|}",
|
3974 | bc51c5c9 | bellard | "fisubr{l||l|}",
|
3975 | bc51c5c9 | bellard | "fidiv{l||l|}",
|
3976 | bc51c5c9 | bellard | "fidivr{l||l|}",
|
3977 | dc99065b | bellard | /* db */
|
3978 | bc51c5c9 | bellard | "fild{l||l|}",
|
3979 | c2c73b42 | blueswir1 | "fisttp{l||l|}",
|
3980 | bc51c5c9 | bellard | "fist{l||l|}",
|
3981 | bc51c5c9 | bellard | "fistp{l||l|}",
|
3982 | dc99065b | bellard | "(bad)",
|
3983 | bc51c5c9 | bellard | "fld{t||t|}",
|
3984 | dc99065b | bellard | "(bad)",
|
3985 | bc51c5c9 | bellard | "fstp{t||t|}",
|
3986 | dc99065b | bellard | /* dc */
|
3987 | bc51c5c9 | bellard | "fadd{l||l|}",
|
3988 | bc51c5c9 | bellard | "fmul{l||l|}",
|
3989 | bc51c5c9 | bellard | "fcom{l||l|}",
|
3990 | bc51c5c9 | bellard | "fcomp{l||l|}",
|
3991 | bc51c5c9 | bellard | "fsub{l||l|}",
|
3992 | bc51c5c9 | bellard | "fsubr{l||l|}",
|
3993 | bc51c5c9 | bellard | "fdiv{l||l|}",
|
3994 | bc51c5c9 | bellard | "fdivr{l||l|}",
|
3995 | dc99065b | bellard | /* dd */
|
3996 | bc51c5c9 | bellard | "fld{l||l|}",
|
3997 | c2c73b42 | blueswir1 | "fisttp{ll||ll|}",
|
3998 | bc51c5c9 | bellard | "fst{l||l|}",
|
3999 | bc51c5c9 | bellard | "fstp{l||l|}",
|
4000 | c2c73b42 | blueswir1 | "frstorIC",
|
4001 | dc99065b | bellard | "(bad)",
|
4002 | c2c73b42 | blueswir1 | "fNsaveIC",
|
4003 | dc99065b | bellard | "fNstsw",
|
4004 | dc99065b | bellard | /* de */
|
4005 | dc99065b | bellard | "fiadd",
|
4006 | dc99065b | bellard | "fimul",
|
4007 | dc99065b | bellard | "ficom",
|
4008 | dc99065b | bellard | "ficomp",
|
4009 | dc99065b | bellard | "fisub",
|
4010 | dc99065b | bellard | "fisubr",
|
4011 | dc99065b | bellard | "fidiv",
|
4012 | dc99065b | bellard | "fidivr",
|
4013 | dc99065b | bellard | /* df */
|
4014 | dc99065b | bellard | "fild",
|
4015 | c2c73b42 | blueswir1 | "fisttp",
|
4016 | dc99065b | bellard | "fist",
|
4017 | dc99065b | bellard | "fistp",
|
4018 | dc99065b | bellard | "fbld",
|
4019 | bc51c5c9 | bellard | "fild{ll||ll|}",
|
4020 | dc99065b | bellard | "fbstp",
|
4021 | c2c73b42 | blueswir1 | "fistp{ll||ll|}",
|
4022 | c2c73b42 | blueswir1 | }; |
4023 | c2c73b42 | blueswir1 | |
4024 | c2c73b42 | blueswir1 | static const unsigned char float_mem_mode[] = { |
4025 | c2c73b42 | blueswir1 | /* d8 */
|
4026 | c2c73b42 | blueswir1 | d_mode, |
4027 | c2c73b42 | blueswir1 | d_mode, |
4028 | c2c73b42 | blueswir1 | d_mode, |
4029 | c2c73b42 | blueswir1 | d_mode, |
4030 | c2c73b42 | blueswir1 | d_mode, |
4031 | c2c73b42 | blueswir1 | d_mode, |
4032 | c2c73b42 | blueswir1 | d_mode, |
4033 | c2c73b42 | blueswir1 | d_mode, |
4034 | c2c73b42 | blueswir1 | /* d9 */
|
4035 | c2c73b42 | blueswir1 | d_mode, |
4036 | c2c73b42 | blueswir1 | 0,
|
4037 | c2c73b42 | blueswir1 | d_mode, |
4038 | c2c73b42 | blueswir1 | d_mode, |
4039 | c2c73b42 | blueswir1 | 0,
|
4040 | c2c73b42 | blueswir1 | w_mode, |
4041 | c2c73b42 | blueswir1 | 0,
|
4042 | c2c73b42 | blueswir1 | w_mode, |
4043 | c2c73b42 | blueswir1 | /* da */
|
4044 | c2c73b42 | blueswir1 | d_mode, |
4045 | c2c73b42 | blueswir1 | d_mode, |
4046 | c2c73b42 | blueswir1 | d_mode, |
4047 | c2c73b42 | blueswir1 | d_mode, |
4048 | c2c73b42 | blueswir1 | d_mode, |
4049 | c2c73b42 | blueswir1 | d_mode, |
4050 | c2c73b42 | blueswir1 | d_mode, |
4051 | c2c73b42 | blueswir1 | d_mode, |
4052 | c2c73b42 | blueswir1 | /* db */
|
4053 | c2c73b42 | blueswir1 | d_mode, |
4054 | c2c73b42 | blueswir1 | d_mode, |
4055 | c2c73b42 | blueswir1 | d_mode, |
4056 | c2c73b42 | blueswir1 | d_mode, |
4057 | c2c73b42 | blueswir1 | 0,
|
4058 | c2c73b42 | blueswir1 | t_mode, |
4059 | c2c73b42 | blueswir1 | 0,
|
4060 | c2c73b42 | blueswir1 | t_mode, |
4061 | c2c73b42 | blueswir1 | /* dc */
|
4062 | c2c73b42 | blueswir1 | q_mode, |
4063 | c2c73b42 | blueswir1 | q_mode, |
4064 | c2c73b42 | blueswir1 | q_mode, |
4065 | c2c73b42 | blueswir1 | q_mode, |
4066 | c2c73b42 | blueswir1 | q_mode, |
4067 | c2c73b42 | blueswir1 | q_mode, |
4068 | c2c73b42 | blueswir1 | q_mode, |
4069 | c2c73b42 | blueswir1 | q_mode, |
4070 | c2c73b42 | blueswir1 | /* dd */
|
4071 | c2c73b42 | blueswir1 | q_mode, |
4072 | c2c73b42 | blueswir1 | q_mode, |
4073 | c2c73b42 | blueswir1 | q_mode, |
4074 | c2c73b42 | blueswir1 | q_mode, |
4075 | c2c73b42 | blueswir1 | 0,
|
4076 | c2c73b42 | blueswir1 | 0,
|
4077 | c2c73b42 | blueswir1 | 0,
|
4078 | c2c73b42 | blueswir1 | w_mode, |
4079 | c2c73b42 | blueswir1 | /* de */
|
4080 | c2c73b42 | blueswir1 | w_mode, |
4081 | c2c73b42 | blueswir1 | w_mode, |
4082 | c2c73b42 | blueswir1 | w_mode, |
4083 | c2c73b42 | blueswir1 | w_mode, |
4084 | c2c73b42 | blueswir1 | w_mode, |
4085 | c2c73b42 | blueswir1 | w_mode, |
4086 | c2c73b42 | blueswir1 | w_mode, |
4087 | c2c73b42 | blueswir1 | w_mode, |
4088 | c2c73b42 | blueswir1 | /* df */
|
4089 | c2c73b42 | blueswir1 | w_mode, |
4090 | c2c73b42 | blueswir1 | w_mode, |
4091 | c2c73b42 | blueswir1 | w_mode, |
4092 | c2c73b42 | blueswir1 | w_mode, |
4093 | c2c73b42 | blueswir1 | t_mode, |
4094 | c2c73b42 | blueswir1 | q_mode, |
4095 | c2c73b42 | blueswir1 | t_mode, |
4096 | c2c73b42 | blueswir1 | q_mode |
4097 | dc99065b | bellard | }; |
4098 | dc99065b | bellard | |
4099 | 88103cfe | blueswir1 | #define ST { OP_ST, 0 } |
4100 | 88103cfe | blueswir1 | #define STi { OP_STi, 0 } |
4101 | dc99065b | bellard | |
4102 | 88103cfe | blueswir1 | #define FGRPd9_2 NULL, { { NULL, 0 } } |
4103 | 88103cfe | blueswir1 | #define FGRPd9_4 NULL, { { NULL, 1 } } |
4104 | 88103cfe | blueswir1 | #define FGRPd9_5 NULL, { { NULL, 2 } } |
4105 | 88103cfe | blueswir1 | #define FGRPd9_6 NULL, { { NULL, 3 } } |
4106 | 88103cfe | blueswir1 | #define FGRPd9_7 NULL, { { NULL, 4 } } |
4107 | 88103cfe | blueswir1 | #define FGRPda_5 NULL, { { NULL, 5 } } |
4108 | 88103cfe | blueswir1 | #define FGRPdb_4 NULL, { { NULL, 6 } } |
4109 | 88103cfe | blueswir1 | #define FGRPde_3 NULL, { { NULL, 7 } } |
4110 | 88103cfe | blueswir1 | #define FGRPdf_4 NULL, { { NULL, 8 } } |
4111 | bc51c5c9 | bellard | |
4112 | bc51c5c9 | bellard | static const struct dis386 float_reg[][8] = { |
4113 | dc99065b | bellard | /* d8 */
|
4114 | dc99065b | bellard | { |
4115 | 88103cfe | blueswir1 | { "fadd", { ST, STi } },
|
4116 | 88103cfe | blueswir1 | { "fmul", { ST, STi } },
|
4117 | 88103cfe | blueswir1 | { "fcom", { STi } },
|
4118 | 88103cfe | blueswir1 | { "fcomp", { STi } },
|
4119 | 88103cfe | blueswir1 | { "fsub", { ST, STi } },
|
4120 | 88103cfe | blueswir1 | { "fsubr", { ST, STi } },
|
4121 | 88103cfe | blueswir1 | { "fdiv", { ST, STi } },
|
4122 | 88103cfe | blueswir1 | { "fdivr", { ST, STi } },
|
4123 | dc99065b | bellard | }, |
4124 | dc99065b | bellard | /* d9 */
|
4125 | dc99065b | bellard | { |
4126 | 88103cfe | blueswir1 | { "fld", { STi } },
|
4127 | 88103cfe | blueswir1 | { "fxch", { STi } },
|
4128 | dc99065b | bellard | { FGRPd9_2 }, |
4129 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4130 | dc99065b | bellard | { FGRPd9_4 }, |
4131 | dc99065b | bellard | { FGRPd9_5 }, |
4132 | dc99065b | bellard | { FGRPd9_6 }, |
4133 | dc99065b | bellard | { FGRPd9_7 }, |
4134 | dc99065b | bellard | }, |
4135 | dc99065b | bellard | /* da */
|
4136 | dc99065b | bellard | { |
4137 | 88103cfe | blueswir1 | { "fcmovb", { ST, STi } },
|
4138 | 88103cfe | blueswir1 | { "fcmove", { ST, STi } },
|
4139 | 88103cfe | blueswir1 | { "fcmovbe",{ ST, STi } },
|
4140 | 88103cfe | blueswir1 | { "fcmovu", { ST, STi } },
|
4141 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4142 | dc99065b | bellard | { FGRPda_5 }, |
4143 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4144 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4145 | dc99065b | bellard | }, |
4146 | dc99065b | bellard | /* db */
|
4147 | dc99065b | bellard | { |
4148 | 88103cfe | blueswir1 | { "fcmovnb",{ ST, STi } },
|
4149 | 88103cfe | blueswir1 | { "fcmovne",{ ST, STi } },
|
4150 | 88103cfe | blueswir1 | { "fcmovnbe",{ ST, STi } },
|
4151 | 88103cfe | blueswir1 | { "fcmovnu",{ ST, STi } },
|
4152 | dc99065b | bellard | { FGRPdb_4 }, |
4153 | 88103cfe | blueswir1 | { "fucomi", { ST, STi } },
|
4154 | 88103cfe | blueswir1 | { "fcomi", { ST, STi } },
|
4155 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4156 | dc99065b | bellard | }, |
4157 | dc99065b | bellard | /* dc */
|
4158 | dc99065b | bellard | { |
4159 | 88103cfe | blueswir1 | { "fadd", { STi, ST } },
|
4160 | 88103cfe | blueswir1 | { "fmul", { STi, ST } },
|
4161 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4162 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4163 | 88103cfe | blueswir1 | #if SYSV386_COMPAT
|
4164 | 88103cfe | blueswir1 | { "fsub", { STi, ST } },
|
4165 | 88103cfe | blueswir1 | { "fsubr", { STi, ST } },
|
4166 | 88103cfe | blueswir1 | { "fdiv", { STi, ST } },
|
4167 | 88103cfe | blueswir1 | { "fdivr", { STi, ST } },
|
4168 | bc51c5c9 | bellard | #else
|
4169 | 88103cfe | blueswir1 | { "fsubr", { STi, ST } },
|
4170 | 88103cfe | blueswir1 | { "fsub", { STi, ST } },
|
4171 | 88103cfe | blueswir1 | { "fdivr", { STi, ST } },
|
4172 | 88103cfe | blueswir1 | { "fdiv", { STi, ST } },
|
4173 | bc51c5c9 | bellard | #endif
|
4174 | dc99065b | bellard | }, |
4175 | dc99065b | bellard | /* dd */
|
4176 | dc99065b | bellard | { |
4177 | 88103cfe | blueswir1 | { "ffree", { STi } },
|
4178 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4179 | 88103cfe | blueswir1 | { "fst", { STi } },
|
4180 | 88103cfe | blueswir1 | { "fstp", { STi } },
|
4181 | 88103cfe | blueswir1 | { "fucom", { STi } },
|
4182 | 88103cfe | blueswir1 | { "fucomp", { STi } },
|
4183 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4184 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4185 | dc99065b | bellard | }, |
4186 | dc99065b | bellard | /* de */
|
4187 | dc99065b | bellard | { |
4188 | 88103cfe | blueswir1 | { "faddp", { STi, ST } },
|
4189 | 88103cfe | blueswir1 | { "fmulp", { STi, ST } },
|
4190 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4191 | dc99065b | bellard | { FGRPde_3 }, |
4192 | 88103cfe | blueswir1 | #if SYSV386_COMPAT
|
4193 | 88103cfe | blueswir1 | { "fsubp", { STi, ST } },
|
4194 | 88103cfe | blueswir1 | { "fsubrp", { STi, ST } },
|
4195 | 88103cfe | blueswir1 | { "fdivp", { STi, ST } },
|
4196 | 88103cfe | blueswir1 | { "fdivrp", { STi, ST } },
|
4197 | bc51c5c9 | bellard | #else
|
4198 | 88103cfe | blueswir1 | { "fsubrp", { STi, ST } },
|
4199 | 88103cfe | blueswir1 | { "fsubp", { STi, ST } },
|
4200 | 88103cfe | blueswir1 | { "fdivrp", { STi, ST } },
|
4201 | 88103cfe | blueswir1 | { "fdivp", { STi, ST } },
|
4202 | bc51c5c9 | bellard | #endif
|
4203 | dc99065b | bellard | }, |
4204 | dc99065b | bellard | /* df */
|
4205 | dc99065b | bellard | { |
4206 | 88103cfe | blueswir1 | { "ffreep", { STi } },
|
4207 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4208 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4209 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4210 | dc99065b | bellard | { FGRPdf_4 }, |
4211 | 88103cfe | blueswir1 | { "fucomip", { ST, STi } },
|
4212 | 88103cfe | blueswir1 | { "fcomip", { ST, STi } },
|
4213 | 88103cfe | blueswir1 | { "(bad)", { XX } },
|
4214 | dc99065b | bellard | }, |
4215 | dc99065b | bellard | }; |
4216 | dc99065b | bellard | |
4217 | 4c7d9dc7 | ths | static const char *fgrps[][8] = { |
4218 | dc99065b | bellard | /* d9_2 0 */
|
4219 | dc99065b | bellard | { |
4220 | dc99065b | bellard | "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
4221 | dc99065b | bellard | }, |
4222 | dc99065b | bellard | |
4223 | dc99065b | bellard | /* d9_4 1 */
|
4224 | dc99065b | bellard | { |
4225 | dc99065b | bellard | "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", |
4226 | dc99065b | bellard | }, |
4227 | dc99065b | bellard | |
4228 | dc99065b | bellard | /* d9_5 2 */
|
4229 | dc99065b | bellard | { |
4230 | dc99065b | bellard | "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", |
4231 | dc99065b | bellard | }, |
4232 | dc99065b | bellard | |
4233 | dc99065b | bellard | /* d9_6 3 */
|
4234 | dc99065b | bellard | { |
4235 | dc99065b | bellard | "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", |
4236 | dc99065b | bellard | }, |
4237 | dc99065b | bellard | |
4238 | dc99065b | bellard | /* d9_7 4 */
|
4239 | dc99065b | bellard | { |
4240 | dc99065b | bellard | "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", |
4241 | dc99065b | bellard | }, |
4242 | dc99065b | bellard | |
4243 | dc99065b | bellard | /* da_5 5 */
|
4244 | dc99065b | bellard | { |
4245 | dc99065b | bellard | "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
4246 | dc99065b | bellard | }, |
4247 | dc99065b | bellard | |
4248 | dc99065b | bellard | /* db_4 6 */
|
4249 | dc99065b | bellard | { |
4250 | dc99065b | bellard | "feni(287 only)","fdisi(287 only)","fNclex","fNinit", |
4251 | dc99065b | bellard | "fNsetpm(287 only)","(bad)","(bad)","(bad)", |
4252 | dc99065b | bellard | }, |
4253 | dc99065b | bellard | |
4254 | dc99065b | bellard | /* de_3 7 */
|
4255 | dc99065b | bellard | { |
4256 | dc99065b | bellard | "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
4257 | dc99065b | bellard | }, |
4258 | dc99065b | bellard | |
4259 | dc99065b | bellard | /* df_4 8 */
|
4260 | dc99065b | bellard | { |
4261 | dc99065b | bellard | "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
4262 | dc99065b | bellard | }, |
4263 | dc99065b | bellard | }; |
4264 | dc99065b | bellard | |
4265 | dc99065b | bellard | static void |
4266 | c2c73b42 | blueswir1 | dofloat (int sizeflag)
|
4267 | dc99065b | bellard | { |
4268 | bc51c5c9 | bellard | const struct dis386 *dp; |
4269 | dc99065b | bellard | unsigned char floatop; |
4270 | bc51c5c9 | bellard | |
4271 | dc99065b | bellard | floatop = codep[-1];
|
4272 | bc51c5c9 | bellard | |
4273 | 88103cfe | blueswir1 | if (modrm.mod != 3) |
4274 | dc99065b | bellard | { |
4275 | 88103cfe | blueswir1 | int fp_indx = (floatop - 0xd8) * 8 + modrm.reg; |
4276 | c2c73b42 | blueswir1 | |
4277 | c2c73b42 | blueswir1 | putop (float_mem[fp_indx], sizeflag); |
4278 | 88103cfe | blueswir1 | obufp = op_out[0];
|
4279 | c2c73b42 | blueswir1 | op_ad = 2;
|
4280 | c2c73b42 | blueswir1 | OP_E (float_mem_mode[fp_indx], sizeflag); |
4281 | dc99065b | bellard | return;
|
4282 | dc99065b | bellard | } |
4283 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
4284 | bc51c5c9 | bellard | MODRM_CHECK; |
4285 | dc99065b | bellard | codep++; |
4286 | bc51c5c9 | bellard | |
4287 | 88103cfe | blueswir1 | dp = &float_reg[floatop - 0xd8][modrm.reg];
|
4288 | dc99065b | bellard | if (dp->name == NULL) |
4289 | dc99065b | bellard | { |
4290 | 88103cfe | blueswir1 | putop (fgrps[dp->op[0].bytemode][modrm.rm], sizeflag);
|
4291 | bc51c5c9 | bellard | |
4292 | bc51c5c9 | bellard | /* Instruction fnstsw is only one with strange arg. */
|
4293 | bc51c5c9 | bellard | if (floatop == 0xdf && codep[-1] == 0xe0) |
4294 | 88103cfe | blueswir1 | pstrcpy (op_out[0], sizeof(op_out[0]), names16[0]); |
4295 | dc99065b | bellard | } |
4296 | dc99065b | bellard | else
|
4297 | dc99065b | bellard | { |
4298 | bc51c5c9 | bellard | putop (dp->name, sizeflag); |
4299 | bc51c5c9 | bellard | |
4300 | 88103cfe | blueswir1 | obufp = op_out[0];
|
4301 | c2c73b42 | blueswir1 | op_ad = 2;
|
4302 | 88103cfe | blueswir1 | if (dp->op[0].rtn) |
4303 | 88103cfe | blueswir1 | (*dp->op[0].rtn) (dp->op[0].bytemode, sizeflag); |
4304 | c2c73b42 | blueswir1 | |
4305 | 88103cfe | blueswir1 | obufp = op_out[1];
|
4306 | c2c73b42 | blueswir1 | op_ad = 1;
|
4307 | 88103cfe | blueswir1 | if (dp->op[1].rtn) |
4308 | 88103cfe | blueswir1 | (*dp->op[1].rtn) (dp->op[1].bytemode, sizeflag); |
4309 | dc99065b | bellard | } |
4310 | dc99065b | bellard | } |
4311 | dc99065b | bellard | |
4312 | bc51c5c9 | bellard | static void |
4313 | c2c73b42 | blueswir1 | OP_ST (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
4314 | dc99065b | bellard | { |
4315 | c2c73b42 | blueswir1 | oappend ("%st" + intel_syntax);
|
4316 | dc99065b | bellard | } |
4317 | dc99065b | bellard | |
4318 | bc51c5c9 | bellard | static void |
4319 | c2c73b42 | blueswir1 | OP_STi (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
4320 | dc99065b | bellard | { |
4321 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%st(%d)", modrm.rm); |
4322 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
4323 | dc99065b | bellard | } |
4324 | dc99065b | bellard | |
4325 | bc51c5c9 | bellard | /* Capital letters in template are macros. */
|
4326 | bc51c5c9 | bellard | static int |
4327 | c2c73b42 | blueswir1 | putop (const char *template, int sizeflag) |
4328 | dc99065b | bellard | { |
4329 | bc51c5c9 | bellard | const char *p; |
4330 | c2c73b42 | blueswir1 | int alt = 0; |
4331 | bc51c5c9 | bellard | |
4332 | dc99065b | bellard | for (p = template; *p; p++)
|
4333 | dc99065b | bellard | { |
4334 | dc99065b | bellard | switch (*p)
|
4335 | dc99065b | bellard | { |
4336 | dc99065b | bellard | default:
|
4337 | dc99065b | bellard | *obufp++ = *p; |
4338 | dc99065b | bellard | break;
|
4339 | bc51c5c9 | bellard | case '{': |
4340 | bc51c5c9 | bellard | alt = 0;
|
4341 | bc51c5c9 | bellard | if (intel_syntax)
|
4342 | bc51c5c9 | bellard | alt += 1;
|
4343 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
4344 | bc51c5c9 | bellard | alt += 2;
|
4345 | bc51c5c9 | bellard | while (alt != 0) |
4346 | bc51c5c9 | bellard | { |
4347 | bc51c5c9 | bellard | while (*++p != '|') |
4348 | bc51c5c9 | bellard | { |
4349 | bc51c5c9 | bellard | if (*p == '}') |
4350 | bc51c5c9 | bellard | { |
4351 | bc51c5c9 | bellard | /* Alternative not valid. */
|
4352 | 363a37d5 | blueswir1 | pstrcpy (obuf, sizeof(obuf), "(bad)"); |
4353 | bc51c5c9 | bellard | obufp = obuf + 5;
|
4354 | bc51c5c9 | bellard | return 1; |
4355 | bc51c5c9 | bellard | } |
4356 | bc51c5c9 | bellard | else if (*p == '\0') |
4357 | bc51c5c9 | bellard | abort (); |
4358 | bc51c5c9 | bellard | } |
4359 | bc51c5c9 | bellard | alt--; |
4360 | bc51c5c9 | bellard | } |
4361 | c2c73b42 | blueswir1 | /* Fall through. */
|
4362 | c2c73b42 | blueswir1 | case 'I': |
4363 | c2c73b42 | blueswir1 | alt = 1;
|
4364 | c2c73b42 | blueswir1 | continue;
|
4365 | bc51c5c9 | bellard | case '|': |
4366 | bc51c5c9 | bellard | while (*++p != '}') |
4367 | bc51c5c9 | bellard | { |
4368 | bc51c5c9 | bellard | if (*p == '\0') |
4369 | bc51c5c9 | bellard | abort (); |
4370 | bc51c5c9 | bellard | } |
4371 | bc51c5c9 | bellard | break;
|
4372 | bc51c5c9 | bellard | case '}': |
4373 | bc51c5c9 | bellard | break;
|
4374 | bc51c5c9 | bellard | case 'A': |
4375 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4376 | c2c73b42 | blueswir1 | break;
|
4377 | 88103cfe | blueswir1 | if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) |
4378 | bc51c5c9 | bellard | *obufp++ = 'b';
|
4379 | bc51c5c9 | bellard | break;
|
4380 | bc51c5c9 | bellard | case 'B': |
4381 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4382 | c2c73b42 | blueswir1 | break;
|
4383 | bc51c5c9 | bellard | if (sizeflag & SUFFIX_ALWAYS)
|
4384 | bc51c5c9 | bellard | *obufp++ = 'b';
|
4385 | bc51c5c9 | bellard | break;
|
4386 | c2c73b42 | blueswir1 | case 'C': |
4387 | c2c73b42 | blueswir1 | if (intel_syntax && !alt)
|
4388 | c2c73b42 | blueswir1 | break;
|
4389 | c2c73b42 | blueswir1 | if ((prefixes & PREFIX_DATA) || (sizeflag & SUFFIX_ALWAYS))
|
4390 | c2c73b42 | blueswir1 | { |
4391 | c2c73b42 | blueswir1 | if (sizeflag & DFLAG)
|
4392 | c2c73b42 | blueswir1 | *obufp++ = intel_syntax ? 'd' : 'l'; |
4393 | c2c73b42 | blueswir1 | else
|
4394 | c2c73b42 | blueswir1 | *obufp++ = intel_syntax ? 'w' : 's'; |
4395 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4396 | c2c73b42 | blueswir1 | } |
4397 | c2c73b42 | blueswir1 | break;
|
4398 | 88103cfe | blueswir1 | case 'D': |
4399 | 88103cfe | blueswir1 | if (intel_syntax || !(sizeflag & SUFFIX_ALWAYS))
|
4400 | 88103cfe | blueswir1 | break;
|
4401 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4402 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
4403 | 88103cfe | blueswir1 | { |
4404 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4405 | 88103cfe | blueswir1 | *obufp++ = 'q';
|
4406 | 88103cfe | blueswir1 | else if (sizeflag & DFLAG) |
4407 | 88103cfe | blueswir1 | *obufp++ = intel_syntax ? 'd' : 'l'; |
4408 | 88103cfe | blueswir1 | else
|
4409 | 88103cfe | blueswir1 | *obufp++ = 'w';
|
4410 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4411 | 88103cfe | blueswir1 | } |
4412 | 88103cfe | blueswir1 | else
|
4413 | 88103cfe | blueswir1 | *obufp++ = 'w';
|
4414 | 88103cfe | blueswir1 | break;
|
4415 | bc51c5c9 | bellard | case 'E': /* For jcxz/jecxz */ |
4416 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
4417 | bc51c5c9 | bellard | { |
4418 | bc51c5c9 | bellard | if (sizeflag & AFLAG)
|
4419 | bc51c5c9 | bellard | *obufp++ = 'r';
|
4420 | bc51c5c9 | bellard | else
|
4421 | bc51c5c9 | bellard | *obufp++ = 'e';
|
4422 | bc51c5c9 | bellard | } |
4423 | bc51c5c9 | bellard | else
|
4424 | bc51c5c9 | bellard | if (sizeflag & AFLAG)
|
4425 | bc51c5c9 | bellard | *obufp++ = 'e';
|
4426 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_ADDR); |
4427 | bc51c5c9 | bellard | break;
|
4428 | bc51c5c9 | bellard | case 'F': |
4429 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4430 | c2c73b42 | blueswir1 | break;
|
4431 | bc51c5c9 | bellard | if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
|
4432 | bc51c5c9 | bellard | { |
4433 | bc51c5c9 | bellard | if (sizeflag & AFLAG)
|
4434 | c2c73b42 | blueswir1 | *obufp++ = address_mode == mode_64bit ? 'q' : 'l'; |
4435 | bc51c5c9 | bellard | else
|
4436 | c2c73b42 | blueswir1 | *obufp++ = address_mode == mode_64bit ? 'l' : 'w'; |
4437 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_ADDR); |
4438 | bc51c5c9 | bellard | } |
4439 | bc51c5c9 | bellard | break;
|
4440 | 88103cfe | blueswir1 | case 'G': |
4441 | 88103cfe | blueswir1 | if (intel_syntax || (obufp[-1] != 's' && !(sizeflag & SUFFIX_ALWAYS))) |
4442 | 88103cfe | blueswir1 | break;
|
4443 | 88103cfe | blueswir1 | if ((rex & REX_W) || (sizeflag & DFLAG))
|
4444 | 88103cfe | blueswir1 | *obufp++ = 'l';
|
4445 | 88103cfe | blueswir1 | else
|
4446 | 88103cfe | blueswir1 | *obufp++ = 'w';
|
4447 | 88103cfe | blueswir1 | if (!(rex & REX_W))
|
4448 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4449 | 88103cfe | blueswir1 | break;
|
4450 | bc51c5c9 | bellard | case 'H': |
4451 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4452 | c2c73b42 | blueswir1 | break;
|
4453 | bc51c5c9 | bellard | if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
|
4454 | bc51c5c9 | bellard | || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) |
4455 | bc51c5c9 | bellard | { |
4456 | bc51c5c9 | bellard | used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); |
4457 | bc51c5c9 | bellard | *obufp++ = ',';
|
4458 | bc51c5c9 | bellard | *obufp++ = 'p';
|
4459 | bc51c5c9 | bellard | if (prefixes & PREFIX_DS)
|
4460 | bc51c5c9 | bellard | *obufp++ = 't';
|
4461 | bc51c5c9 | bellard | else
|
4462 | bc51c5c9 | bellard | *obufp++ = 'n';
|
4463 | bc51c5c9 | bellard | } |
4464 | bc51c5c9 | bellard | break;
|
4465 | c2c73b42 | blueswir1 | case 'J': |
4466 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4467 | c2c73b42 | blueswir1 | break;
|
4468 | c2c73b42 | blueswir1 | *obufp++ = 'l';
|
4469 | c2c73b42 | blueswir1 | break;
|
4470 | 88103cfe | blueswir1 | case 'K': |
4471 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4472 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4473 | 88103cfe | blueswir1 | *obufp++ = 'q';
|
4474 | 88103cfe | blueswir1 | else
|
4475 | 88103cfe | blueswir1 | *obufp++ = 'd';
|
4476 | 88103cfe | blueswir1 | break;
|
4477 | c2c73b42 | blueswir1 | case 'Z': |
4478 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4479 | c2c73b42 | blueswir1 | break;
|
4480 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & SUFFIX_ALWAYS))
|
4481 | c2c73b42 | blueswir1 | { |
4482 | c2c73b42 | blueswir1 | *obufp++ = 'q';
|
4483 | c2c73b42 | blueswir1 | break;
|
4484 | c2c73b42 | blueswir1 | } |
4485 | c2c73b42 | blueswir1 | /* Fall through. */
|
4486 | bc51c5c9 | bellard | case 'L': |
4487 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4488 | c2c73b42 | blueswir1 | break;
|
4489 | bc51c5c9 | bellard | if (sizeflag & SUFFIX_ALWAYS)
|
4490 | bc51c5c9 | bellard | *obufp++ = 'l';
|
4491 | dc99065b | bellard | break;
|
4492 | dc99065b | bellard | case 'N': |
4493 | dc99065b | bellard | if ((prefixes & PREFIX_FWAIT) == 0) |
4494 | dc99065b | bellard | *obufp++ = 'n';
|
4495 | bc51c5c9 | bellard | else
|
4496 | bc51c5c9 | bellard | used_prefixes |= PREFIX_FWAIT; |
4497 | bc51c5c9 | bellard | break;
|
4498 | bc51c5c9 | bellard | case 'O': |
4499 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4500 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4501 | bc51c5c9 | bellard | *obufp++ = 'o';
|
4502 | 88103cfe | blueswir1 | else if (intel_syntax && (sizeflag & DFLAG)) |
4503 | 88103cfe | blueswir1 | *obufp++ = 'q';
|
4504 | bc51c5c9 | bellard | else
|
4505 | bc51c5c9 | bellard | *obufp++ = 'd';
|
4506 | 88103cfe | blueswir1 | if (!(rex & REX_W))
|
4507 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4508 | bc51c5c9 | bellard | break;
|
4509 | bc51c5c9 | bellard | case 'T': |
4510 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4511 | c2c73b42 | blueswir1 | break;
|
4512 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
4513 | bc51c5c9 | bellard | { |
4514 | bc51c5c9 | bellard | *obufp++ = 'q';
|
4515 | bc51c5c9 | bellard | break;
|
4516 | bc51c5c9 | bellard | } |
4517 | bc51c5c9 | bellard | /* Fall through. */
|
4518 | bc51c5c9 | bellard | case 'P': |
4519 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4520 | c2c73b42 | blueswir1 | break;
|
4521 | bc51c5c9 | bellard | if ((prefixes & PREFIX_DATA)
|
4522 | 88103cfe | blueswir1 | || (rex & REX_W) |
4523 | bc51c5c9 | bellard | || (sizeflag & SUFFIX_ALWAYS)) |
4524 | bc51c5c9 | bellard | { |
4525 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4526 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4527 | bc51c5c9 | bellard | *obufp++ = 'q';
|
4528 | bc51c5c9 | bellard | else
|
4529 | bc51c5c9 | bellard | { |
4530 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
4531 | bc51c5c9 | bellard | *obufp++ = 'l';
|
4532 | bc51c5c9 | bellard | else
|
4533 | bc51c5c9 | bellard | *obufp++ = 'w';
|
4534 | bc51c5c9 | bellard | } |
4535 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4536 | bc51c5c9 | bellard | } |
4537 | bc51c5c9 | bellard | break;
|
4538 | bc51c5c9 | bellard | case 'U': |
4539 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4540 | c2c73b42 | blueswir1 | break;
|
4541 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
4542 | bc51c5c9 | bellard | { |
4543 | 88103cfe | blueswir1 | if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) |
4544 | c2c73b42 | blueswir1 | *obufp++ = 'q';
|
4545 | bc51c5c9 | bellard | break;
|
4546 | bc51c5c9 | bellard | } |
4547 | bc51c5c9 | bellard | /* Fall through. */
|
4548 | bc51c5c9 | bellard | case 'Q': |
4549 | c2c73b42 | blueswir1 | if (intel_syntax && !alt)
|
4550 | c2c73b42 | blueswir1 | break;
|
4551 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4552 | 88103cfe | blueswir1 | if (modrm.mod != 3 || (sizeflag & SUFFIX_ALWAYS)) |
4553 | bc51c5c9 | bellard | { |
4554 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4555 | bc51c5c9 | bellard | *obufp++ = 'q';
|
4556 | bc51c5c9 | bellard | else
|
4557 | bc51c5c9 | bellard | { |
4558 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
4559 | c2c73b42 | blueswir1 | *obufp++ = intel_syntax ? 'd' : 'l'; |
4560 | bc51c5c9 | bellard | else
|
4561 | bc51c5c9 | bellard | *obufp++ = 'w';
|
4562 | bc51c5c9 | bellard | } |
4563 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4564 | bc51c5c9 | bellard | } |
4565 | bc51c5c9 | bellard | break;
|
4566 | bc51c5c9 | bellard | case 'R': |
4567 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4568 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4569 | 88103cfe | blueswir1 | *obufp++ = 'q';
|
4570 | 88103cfe | blueswir1 | else if (sizeflag & DFLAG) |
4571 | bc51c5c9 | bellard | { |
4572 | 88103cfe | blueswir1 | if (intel_syntax)
|
4573 | bc51c5c9 | bellard | *obufp++ = 'd';
|
4574 | bc51c5c9 | bellard | else
|
4575 | 88103cfe | blueswir1 | *obufp++ = 'l';
|
4576 | bc51c5c9 | bellard | } |
4577 | bc51c5c9 | bellard | else
|
4578 | 88103cfe | blueswir1 | *obufp++ = 'w';
|
4579 | 88103cfe | blueswir1 | if (intel_syntax && !p[1] |
4580 | 88103cfe | blueswir1 | && ((rex & REX_W) || (sizeflag & DFLAG))) |
4581 | 88103cfe | blueswir1 | *obufp++ = 'e';
|
4582 | 88103cfe | blueswir1 | if (!(rex & REX_W))
|
4583 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
4584 | dc99065b | bellard | break;
|
4585 | c2c73b42 | blueswir1 | case 'V': |
4586 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4587 | c2c73b42 | blueswir1 | break;
|
4588 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
4589 | c2c73b42 | blueswir1 | { |
4590 | c2c73b42 | blueswir1 | if (sizeflag & SUFFIX_ALWAYS)
|
4591 | c2c73b42 | blueswir1 | *obufp++ = 'q';
|
4592 | c2c73b42 | blueswir1 | break;
|
4593 | c2c73b42 | blueswir1 | } |
4594 | c2c73b42 | blueswir1 | /* Fall through. */
|
4595 | dc99065b | bellard | case 'S': |
4596 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4597 | c2c73b42 | blueswir1 | break;
|
4598 | bc51c5c9 | bellard | if (sizeflag & SUFFIX_ALWAYS)
|
4599 | bc51c5c9 | bellard | { |
4600 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4601 | bc51c5c9 | bellard | *obufp++ = 'q';
|
4602 | bc51c5c9 | bellard | else
|
4603 | bc51c5c9 | bellard | { |
4604 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
4605 | bc51c5c9 | bellard | *obufp++ = 'l';
|
4606 | bc51c5c9 | bellard | else
|
4607 | bc51c5c9 | bellard | *obufp++ = 'w';
|
4608 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
4609 | bc51c5c9 | bellard | } |
4610 | bc51c5c9 | bellard | } |
4611 | bc51c5c9 | bellard | break;
|
4612 | bc51c5c9 | bellard | case 'X': |
4613 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
4614 | bc51c5c9 | bellard | *obufp++ = 'd';
|
4615 | dc99065b | bellard | else
|
4616 | bc51c5c9 | bellard | *obufp++ = 's';
|
4617 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4618 | bc51c5c9 | bellard | break;
|
4619 | bc51c5c9 | bellard | case 'Y': |
4620 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4621 | c2c73b42 | blueswir1 | break;
|
4622 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4623 | bc51c5c9 | bellard | { |
4624 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4625 | bc51c5c9 | bellard | *obufp++ = 'q';
|
4626 | bc51c5c9 | bellard | } |
4627 | dc99065b | bellard | break;
|
4628 | bc51c5c9 | bellard | /* implicit operand size 'l' for i386 or 'q' for x86-64 */
|
4629 | dc99065b | bellard | case 'W': |
4630 | dc99065b | bellard | /* operand size flag for cwtl, cbtw */
|
4631 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4632 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4633 | 88103cfe | blueswir1 | { |
4634 | 88103cfe | blueswir1 | if (intel_syntax)
|
4635 | 88103cfe | blueswir1 | *obufp++ = 'd';
|
4636 | 88103cfe | blueswir1 | else
|
4637 | 88103cfe | blueswir1 | *obufp++ = 'l';
|
4638 | 88103cfe | blueswir1 | } |
4639 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
4640 | dc99065b | bellard | *obufp++ = 'w';
|
4641 | dc99065b | bellard | else
|
4642 | dc99065b | bellard | *obufp++ = 'b';
|
4643 | 88103cfe | blueswir1 | if (!(rex & REX_W))
|
4644 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
4645 | dc99065b | bellard | break;
|
4646 | dc99065b | bellard | } |
4647 | c2c73b42 | blueswir1 | alt = 0;
|
4648 | dc99065b | bellard | } |
4649 | dc99065b | bellard | *obufp = 0;
|
4650 | bc51c5c9 | bellard | return 0; |
4651 | dc99065b | bellard | } |
4652 | dc99065b | bellard | |
4653 | dc99065b | bellard | static void |
4654 | c2c73b42 | blueswir1 | oappend (const char *s) |
4655 | dc99065b | bellard | { |
4656 | 4d5e2b3c | blueswir1 | strcpy (obufp, s); |
4657 | dc99065b | bellard | obufp += strlen (s); |
4658 | dc99065b | bellard | } |
4659 | dc99065b | bellard | |
4660 | dc99065b | bellard | static void |
4661 | c2c73b42 | blueswir1 | append_seg (void)
|
4662 | dc99065b | bellard | { |
4663 | dc99065b | bellard | if (prefixes & PREFIX_CS)
|
4664 | bc51c5c9 | bellard | { |
4665 | bc51c5c9 | bellard | used_prefixes |= PREFIX_CS; |
4666 | bc51c5c9 | bellard | oappend ("%cs:" + intel_syntax);
|
4667 | bc51c5c9 | bellard | } |
4668 | dc99065b | bellard | if (prefixes & PREFIX_DS)
|
4669 | bc51c5c9 | bellard | { |
4670 | bc51c5c9 | bellard | used_prefixes |= PREFIX_DS; |
4671 | bc51c5c9 | bellard | oappend ("%ds:" + intel_syntax);
|
4672 | bc51c5c9 | bellard | } |
4673 | dc99065b | bellard | if (prefixes & PREFIX_SS)
|
4674 | bc51c5c9 | bellard | { |
4675 | bc51c5c9 | bellard | used_prefixes |= PREFIX_SS; |
4676 | bc51c5c9 | bellard | oappend ("%ss:" + intel_syntax);
|
4677 | bc51c5c9 | bellard | } |
4678 | dc99065b | bellard | if (prefixes & PREFIX_ES)
|
4679 | bc51c5c9 | bellard | { |
4680 | bc51c5c9 | bellard | used_prefixes |= PREFIX_ES; |
4681 | bc51c5c9 | bellard | oappend ("%es:" + intel_syntax);
|
4682 | bc51c5c9 | bellard | } |
4683 | dc99065b | bellard | if (prefixes & PREFIX_FS)
|
4684 | bc51c5c9 | bellard | { |
4685 | bc51c5c9 | bellard | used_prefixes |= PREFIX_FS; |
4686 | bc51c5c9 | bellard | oappend ("%fs:" + intel_syntax);
|
4687 | bc51c5c9 | bellard | } |
4688 | dc99065b | bellard | if (prefixes & PREFIX_GS)
|
4689 | bc51c5c9 | bellard | { |
4690 | bc51c5c9 | bellard | used_prefixes |= PREFIX_GS; |
4691 | bc51c5c9 | bellard | oappend ("%gs:" + intel_syntax);
|
4692 | bc51c5c9 | bellard | } |
4693 | dc99065b | bellard | } |
4694 | dc99065b | bellard | |
4695 | bc51c5c9 | bellard | static void |
4696 | c2c73b42 | blueswir1 | OP_indirE (int bytemode, int sizeflag) |
4697 | dc99065b | bellard | { |
4698 | bc51c5c9 | bellard | if (!intel_syntax)
|
4699 | bc51c5c9 | bellard | oappend ("*");
|
4700 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
4701 | dc99065b | bellard | } |
4702 | dc99065b | bellard | |
4703 | bc51c5c9 | bellard | static void |
4704 | 363a37d5 | blueswir1 | print_operand_value (char *buf, size_t bufsize, int hex, bfd_vma disp) |
4705 | bc51c5c9 | bellard | { |
4706 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
4707 | bc51c5c9 | bellard | { |
4708 | bc51c5c9 | bellard | if (hex)
|
4709 | bc51c5c9 | bellard | { |
4710 | bc51c5c9 | bellard | char tmp[30]; |
4711 | bc51c5c9 | bellard | int i;
|
4712 | bc51c5c9 | bellard | buf[0] = '0'; |
4713 | bc51c5c9 | bellard | buf[1] = 'x'; |
4714 | 363a37d5 | blueswir1 | snprintf_vma (tmp, sizeof(tmp), disp);
|
4715 | bc51c5c9 | bellard | for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); |
4716 | 363a37d5 | blueswir1 | pstrcpy (buf + 2, bufsize - 2, tmp + i); |
4717 | bc51c5c9 | bellard | } |
4718 | bc51c5c9 | bellard | else
|
4719 | bc51c5c9 | bellard | { |
4720 | bc51c5c9 | bellard | bfd_signed_vma v = disp; |
4721 | bc51c5c9 | bellard | char tmp[30]; |
4722 | bc51c5c9 | bellard | int i;
|
4723 | bc51c5c9 | bellard | if (v < 0) |
4724 | bc51c5c9 | bellard | { |
4725 | bc51c5c9 | bellard | *(buf++) = '-';
|
4726 | bc51c5c9 | bellard | v = -disp; |
4727 | bc51c5c9 | bellard | /* Check for possible overflow on 0x8000000000000000. */
|
4728 | bc51c5c9 | bellard | if (v < 0) |
4729 | bc51c5c9 | bellard | { |
4730 | 363a37d5 | blueswir1 | pstrcpy (buf, bufsize, "9223372036854775808");
|
4731 | bc51c5c9 | bellard | return;
|
4732 | bc51c5c9 | bellard | } |
4733 | bc51c5c9 | bellard | } |
4734 | bc51c5c9 | bellard | if (!v)
|
4735 | bc51c5c9 | bellard | { |
4736 | 363a37d5 | blueswir1 | pstrcpy (buf, bufsize, "0");
|
4737 | bc51c5c9 | bellard | return;
|
4738 | bc51c5c9 | bellard | } |
4739 | bc51c5c9 | bellard | |
4740 | bc51c5c9 | bellard | i = 0;
|
4741 | bc51c5c9 | bellard | tmp[29] = 0; |
4742 | bc51c5c9 | bellard | while (v)
|
4743 | bc51c5c9 | bellard | { |
4744 | bc51c5c9 | bellard | tmp[28 - i] = (v % 10) + '0'; |
4745 | bc51c5c9 | bellard | v /= 10;
|
4746 | bc51c5c9 | bellard | i++; |
4747 | bc51c5c9 | bellard | } |
4748 | 363a37d5 | blueswir1 | pstrcpy (buf, bufsize, tmp + 29 - i);
|
4749 | bc51c5c9 | bellard | } |
4750 | bc51c5c9 | bellard | } |
4751 | bc51c5c9 | bellard | else
|
4752 | bc51c5c9 | bellard | { |
4753 | bc51c5c9 | bellard | if (hex)
|
4754 | 363a37d5 | blueswir1 | snprintf (buf, bufsize, "0x%x", (unsigned int) disp); |
4755 | bc51c5c9 | bellard | else
|
4756 | 363a37d5 | blueswir1 | snprintf (buf, bufsize, "%d", (int) disp); |
4757 | bc51c5c9 | bellard | } |
4758 | bc51c5c9 | bellard | } |
4759 | bc51c5c9 | bellard | |
4760 | 88103cfe | blueswir1 | /* Put DISP in BUF as signed hex number. */
|
4761 | 88103cfe | blueswir1 | |
4762 | 88103cfe | blueswir1 | static void |
4763 | 88103cfe | blueswir1 | print_displacement (char *buf, bfd_vma disp)
|
4764 | 88103cfe | blueswir1 | { |
4765 | 88103cfe | blueswir1 | bfd_signed_vma val = disp; |
4766 | 88103cfe | blueswir1 | char tmp[30]; |
4767 | 88103cfe | blueswir1 | int i, j = 0; |
4768 | 88103cfe | blueswir1 | |
4769 | 88103cfe | blueswir1 | if (val < 0) |
4770 | 88103cfe | blueswir1 | { |
4771 | 88103cfe | blueswir1 | buf[j++] = '-';
|
4772 | 88103cfe | blueswir1 | val = -disp; |
4773 | 88103cfe | blueswir1 | |
4774 | 88103cfe | blueswir1 | /* Check for possible overflow. */
|
4775 | 88103cfe | blueswir1 | if (val < 0) |
4776 | 88103cfe | blueswir1 | { |
4777 | 88103cfe | blueswir1 | switch (address_mode)
|
4778 | 88103cfe | blueswir1 | { |
4779 | 88103cfe | blueswir1 | case mode_64bit:
|
4780 | 88103cfe | blueswir1 | strcpy (buf + j, "0x8000000000000000");
|
4781 | 88103cfe | blueswir1 | break;
|
4782 | 88103cfe | blueswir1 | case mode_32bit:
|
4783 | 88103cfe | blueswir1 | strcpy (buf + j, "0x80000000");
|
4784 | 88103cfe | blueswir1 | break;
|
4785 | 88103cfe | blueswir1 | case mode_16bit:
|
4786 | 88103cfe | blueswir1 | strcpy (buf + j, "0x8000");
|
4787 | 88103cfe | blueswir1 | break;
|
4788 | 88103cfe | blueswir1 | } |
4789 | 88103cfe | blueswir1 | return;
|
4790 | 88103cfe | blueswir1 | } |
4791 | 88103cfe | blueswir1 | } |
4792 | 88103cfe | blueswir1 | |
4793 | 88103cfe | blueswir1 | buf[j++] = '0';
|
4794 | 88103cfe | blueswir1 | buf[j++] = 'x';
|
4795 | 88103cfe | blueswir1 | |
4796 | 88103cfe | blueswir1 | snprintf_vma (tmp, sizeof(tmp), val);
|
4797 | 88103cfe | blueswir1 | for (i = 0; tmp[i] == '0'; i++) |
4798 | 88103cfe | blueswir1 | continue;
|
4799 | 88103cfe | blueswir1 | if (tmp[i] == '\0') |
4800 | 88103cfe | blueswir1 | i--; |
4801 | 88103cfe | blueswir1 | strcpy (buf + j, tmp + i); |
4802 | 88103cfe | blueswir1 | } |
4803 | 88103cfe | blueswir1 | |
4804 | bc51c5c9 | bellard | static void |
4805 | c2c73b42 | blueswir1 | intel_operand_size (int bytemode, int sizeflag) |
4806 | c2c73b42 | blueswir1 | { |
4807 | c2c73b42 | blueswir1 | switch (bytemode)
|
4808 | c2c73b42 | blueswir1 | { |
4809 | c2c73b42 | blueswir1 | case b_mode:
|
4810 | 88103cfe | blueswir1 | case dqb_mode:
|
4811 | c2c73b42 | blueswir1 | oappend ("BYTE PTR ");
|
4812 | c2c73b42 | blueswir1 | break;
|
4813 | c2c73b42 | blueswir1 | case w_mode:
|
4814 | c2c73b42 | blueswir1 | case dqw_mode:
|
4815 | c2c73b42 | blueswir1 | oappend ("WORD PTR ");
|
4816 | c2c73b42 | blueswir1 | break;
|
4817 | c2c73b42 | blueswir1 | case stack_v_mode:
|
4818 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
4819 | c2c73b42 | blueswir1 | { |
4820 | c2c73b42 | blueswir1 | oappend ("QWORD PTR ");
|
4821 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4822 | c2c73b42 | blueswir1 | break;
|
4823 | c2c73b42 | blueswir1 | } |
4824 | c2c73b42 | blueswir1 | /* FALLTHRU */
|
4825 | c2c73b42 | blueswir1 | case v_mode:
|
4826 | c2c73b42 | blueswir1 | case dq_mode:
|
4827 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4828 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4829 | c2c73b42 | blueswir1 | oappend ("QWORD PTR ");
|
4830 | c2c73b42 | blueswir1 | else if ((sizeflag & DFLAG) || bytemode == dq_mode) |
4831 | c2c73b42 | blueswir1 | oappend ("DWORD PTR ");
|
4832 | c2c73b42 | blueswir1 | else
|
4833 | c2c73b42 | blueswir1 | oappend ("WORD PTR ");
|
4834 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4835 | c2c73b42 | blueswir1 | break;
|
4836 | 88103cfe | blueswir1 | case z_mode:
|
4837 | 88103cfe | blueswir1 | if ((rex & REX_W) || (sizeflag & DFLAG))
|
4838 | 88103cfe | blueswir1 | *obufp++ = 'D';
|
4839 | 88103cfe | blueswir1 | oappend ("WORD PTR ");
|
4840 | 88103cfe | blueswir1 | if (!(rex & REX_W))
|
4841 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4842 | 88103cfe | blueswir1 | break;
|
4843 | c2c73b42 | blueswir1 | case d_mode:
|
4844 | 88103cfe | blueswir1 | case dqd_mode:
|
4845 | c2c73b42 | blueswir1 | oappend ("DWORD PTR ");
|
4846 | c2c73b42 | blueswir1 | break;
|
4847 | c2c73b42 | blueswir1 | case q_mode:
|
4848 | c2c73b42 | blueswir1 | oappend ("QWORD PTR ");
|
4849 | c2c73b42 | blueswir1 | break;
|
4850 | c2c73b42 | blueswir1 | case m_mode:
|
4851 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
4852 | c2c73b42 | blueswir1 | oappend ("QWORD PTR ");
|
4853 | c2c73b42 | blueswir1 | else
|
4854 | c2c73b42 | blueswir1 | oappend ("DWORD PTR ");
|
4855 | c2c73b42 | blueswir1 | break;
|
4856 | c2c73b42 | blueswir1 | case f_mode:
|
4857 | c2c73b42 | blueswir1 | if (sizeflag & DFLAG)
|
4858 | c2c73b42 | blueswir1 | oappend ("FWORD PTR ");
|
4859 | c2c73b42 | blueswir1 | else
|
4860 | c2c73b42 | blueswir1 | oappend ("DWORD PTR ");
|
4861 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4862 | c2c73b42 | blueswir1 | break;
|
4863 | c2c73b42 | blueswir1 | case t_mode:
|
4864 | c2c73b42 | blueswir1 | oappend ("TBYTE PTR ");
|
4865 | c2c73b42 | blueswir1 | break;
|
4866 | c2c73b42 | blueswir1 | case x_mode:
|
4867 | c2c73b42 | blueswir1 | oappend ("XMMWORD PTR ");
|
4868 | c2c73b42 | blueswir1 | break;
|
4869 | 88103cfe | blueswir1 | case o_mode:
|
4870 | 88103cfe | blueswir1 | oappend ("OWORD PTR ");
|
4871 | 88103cfe | blueswir1 | break;
|
4872 | c2c73b42 | blueswir1 | default:
|
4873 | c2c73b42 | blueswir1 | break;
|
4874 | c2c73b42 | blueswir1 | } |
4875 | c2c73b42 | blueswir1 | } |
4876 | c2c73b42 | blueswir1 | |
4877 | c2c73b42 | blueswir1 | static void |
4878 | c2c73b42 | blueswir1 | OP_E (int bytemode, int sizeflag) |
4879 | dc99065b | bellard | { |
4880 | bc51c5c9 | bellard | bfd_vma disp; |
4881 | bc51c5c9 | bellard | int add = 0; |
4882 | bc51c5c9 | bellard | int riprel = 0; |
4883 | 88103cfe | blueswir1 | USED_REX (REX_B); |
4884 | 88103cfe | blueswir1 | if (rex & REX_B)
|
4885 | bc51c5c9 | bellard | add += 8;
|
4886 | dc99065b | bellard | |
4887 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
4888 | bc51c5c9 | bellard | MODRM_CHECK; |
4889 | dc99065b | bellard | codep++; |
4890 | dc99065b | bellard | |
4891 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
4892 | dc99065b | bellard | { |
4893 | dc99065b | bellard | switch (bytemode)
|
4894 | dc99065b | bellard | { |
4895 | dc99065b | bellard | case b_mode:
|
4896 | bc51c5c9 | bellard | USED_REX (0);
|
4897 | bc51c5c9 | bellard | if (rex)
|
4898 | 88103cfe | blueswir1 | oappend (names8rex[modrm.rm + add]); |
4899 | bc51c5c9 | bellard | else
|
4900 | 88103cfe | blueswir1 | oappend (names8[modrm.rm + add]); |
4901 | dc99065b | bellard | break;
|
4902 | dc99065b | bellard | case w_mode:
|
4903 | 88103cfe | blueswir1 | oappend (names16[modrm.rm + add]); |
4904 | bc51c5c9 | bellard | break;
|
4905 | bc51c5c9 | bellard | case d_mode:
|
4906 | 88103cfe | blueswir1 | oappend (names32[modrm.rm + add]); |
4907 | bc51c5c9 | bellard | break;
|
4908 | bc51c5c9 | bellard | case q_mode:
|
4909 | 88103cfe | blueswir1 | oappend (names64[modrm.rm + add]); |
4910 | bc51c5c9 | bellard | break;
|
4911 | bc51c5c9 | bellard | case m_mode:
|
4912 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
4913 | 88103cfe | blueswir1 | oappend (names64[modrm.rm + add]); |
4914 | bc51c5c9 | bellard | else
|
4915 | 88103cfe | blueswir1 | oappend (names32[modrm.rm + add]); |
4916 | dc99065b | bellard | break;
|
4917 | c2c73b42 | blueswir1 | case stack_v_mode:
|
4918 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
4919 | c2c73b42 | blueswir1 | { |
4920 | 88103cfe | blueswir1 | oappend (names64[modrm.rm + add]); |
4921 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
4922 | c2c73b42 | blueswir1 | break;
|
4923 | c2c73b42 | blueswir1 | } |
4924 | c2c73b42 | blueswir1 | bytemode = v_mode; |
4925 | c2c73b42 | blueswir1 | /* FALLTHRU */
|
4926 | dc99065b | bellard | case v_mode:
|
4927 | c2c73b42 | blueswir1 | case dq_mode:
|
4928 | 88103cfe | blueswir1 | case dqb_mode:
|
4929 | 88103cfe | blueswir1 | case dqd_mode:
|
4930 | c2c73b42 | blueswir1 | case dqw_mode:
|
4931 | 88103cfe | blueswir1 | USED_REX (REX_W); |
4932 | 88103cfe | blueswir1 | if (rex & REX_W)
|
4933 | 88103cfe | blueswir1 | oappend (names64[modrm.rm + add]); |
4934 | c2c73b42 | blueswir1 | else if ((sizeflag & DFLAG) || bytemode != v_mode) |
4935 | 88103cfe | blueswir1 | oappend (names32[modrm.rm + add]); |
4936 | dc99065b | bellard | else
|
4937 | 88103cfe | blueswir1 | oappend (names16[modrm.rm + add]); |
4938 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
4939 | bc51c5c9 | bellard | break;
|
4940 | bc51c5c9 | bellard | case 0: |
4941 | dc99065b | bellard | break;
|
4942 | dc99065b | bellard | default:
|
4943 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
4944 | dc99065b | bellard | break;
|
4945 | dc99065b | bellard | } |
4946 | bc51c5c9 | bellard | return;
|
4947 | dc99065b | bellard | } |
4948 | dc99065b | bellard | |
4949 | dc99065b | bellard | disp = 0;
|
4950 | c2c73b42 | blueswir1 | if (intel_syntax)
|
4951 | c2c73b42 | blueswir1 | intel_operand_size (bytemode, sizeflag); |
4952 | bc51c5c9 | bellard | append_seg (); |
4953 | dc99065b | bellard | |
4954 | 88103cfe | blueswir1 | if ((sizeflag & AFLAG) || address_mode == mode_64bit)
|
4955 | dc99065b | bellard | { |
4956 | 88103cfe | blueswir1 | /* 32/64 bit address mode */
|
4957 | 88103cfe | blueswir1 | int havedisp;
|
4958 | dc99065b | bellard | int havesib;
|
4959 | dc99065b | bellard | int havebase;
|
4960 | dc99065b | bellard | int base;
|
4961 | dc99065b | bellard | int index = 0; |
4962 | dc99065b | bellard | int scale = 0; |
4963 | dc99065b | bellard | |
4964 | dc99065b | bellard | havesib = 0;
|
4965 | dc99065b | bellard | havebase = 1;
|
4966 | 88103cfe | blueswir1 | base = modrm.rm; |
4967 | dc99065b | bellard | |
4968 | dc99065b | bellard | if (base == 4) |
4969 | dc99065b | bellard | { |
4970 | dc99065b | bellard | havesib = 1;
|
4971 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
4972 | dc99065b | bellard | index = (*codep >> 3) & 7; |
4973 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit || index != 0x4) |
4974 | c2c73b42 | blueswir1 | /* When INDEX == 0x4 in 32 bit mode, SCALE is ignored. */
|
4975 | c2c73b42 | blueswir1 | scale = (*codep >> 6) & 3; |
4976 | dc99065b | bellard | base = *codep & 7;
|
4977 | 88103cfe | blueswir1 | USED_REX (REX_X); |
4978 | 88103cfe | blueswir1 | if (rex & REX_X)
|
4979 | bc51c5c9 | bellard | index += 8;
|
4980 | dc99065b | bellard | codep++; |
4981 | dc99065b | bellard | } |
4982 | c2c73b42 | blueswir1 | base += add; |
4983 | dc99065b | bellard | |
4984 | 88103cfe | blueswir1 | switch (modrm.mod)
|
4985 | dc99065b | bellard | { |
4986 | dc99065b | bellard | case 0: |
4987 | bc51c5c9 | bellard | if ((base & 7) == 5) |
4988 | dc99065b | bellard | { |
4989 | dc99065b | bellard | havebase = 0;
|
4990 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && !havesib)
|
4991 | bc51c5c9 | bellard | riprel = 1;
|
4992 | bc51c5c9 | bellard | disp = get32s (); |
4993 | dc99065b | bellard | } |
4994 | dc99065b | bellard | break;
|
4995 | dc99065b | bellard | case 1: |
4996 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
4997 | dc99065b | bellard | disp = *codep++; |
4998 | dc99065b | bellard | if ((disp & 0x80) != 0) |
4999 | dc99065b | bellard | disp -= 0x100;
|
5000 | dc99065b | bellard | break;
|
5001 | dc99065b | bellard | case 2: |
5002 | bc51c5c9 | bellard | disp = get32s (); |
5003 | dc99065b | bellard | break;
|
5004 | dc99065b | bellard | } |
5005 | dc99065b | bellard | |
5006 | 88103cfe | blueswir1 | havedisp = havebase || (havesib && (index != 4 || scale != 0)); |
5007 | 88103cfe | blueswir1 | |
5008 | bc51c5c9 | bellard | if (!intel_syntax)
|
5009 | 88103cfe | blueswir1 | if (modrm.mod != 0 || (base & 7) == 5) |
5010 | c2c73b42 | blueswir1 | { |
5011 | 88103cfe | blueswir1 | if (havedisp || riprel)
|
5012 | 88103cfe | blueswir1 | print_displacement (scratchbuf, disp); |
5013 | 88103cfe | blueswir1 | else
|
5014 | 88103cfe | blueswir1 | print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp); |
5015 | c2c73b42 | blueswir1 | oappend (scratchbuf); |
5016 | bc51c5c9 | bellard | if (riprel)
|
5017 | bc51c5c9 | bellard | { |
5018 | bc51c5c9 | bellard | set_op (disp, 1);
|
5019 | bc51c5c9 | bellard | oappend ("(%rip)");
|
5020 | bc51c5c9 | bellard | } |
5021 | c2c73b42 | blueswir1 | } |
5022 | dc99065b | bellard | |
5023 | 88103cfe | blueswir1 | if (havedisp || (intel_syntax && riprel))
|
5024 | dc99065b | bellard | { |
5025 | bc51c5c9 | bellard | *obufp++ = open_char; |
5026 | bc51c5c9 | bellard | if (intel_syntax && riprel)
|
5027 | 88103cfe | blueswir1 | { |
5028 | 88103cfe | blueswir1 | set_op (disp, 1);
|
5029 | 88103cfe | blueswir1 | oappend ("rip");
|
5030 | 88103cfe | blueswir1 | } |
5031 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5032 | dc99065b | bellard | if (havebase)
|
5033 | c2c73b42 | blueswir1 | oappend (address_mode == mode_64bit && (sizeflag & AFLAG) |
5034 | bc51c5c9 | bellard | ? names64[base] : names32[base]); |
5035 | dc99065b | bellard | if (havesib)
|
5036 | dc99065b | bellard | { |
5037 | dc99065b | bellard | if (index != 4) |
5038 | dc99065b | bellard | { |
5039 | c2c73b42 | blueswir1 | if (!intel_syntax || havebase)
|
5040 | c2c73b42 | blueswir1 | { |
5041 | c2c73b42 | blueswir1 | *obufp++ = separator_char; |
5042 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5043 | c2c73b42 | blueswir1 | } |
5044 | c2c73b42 | blueswir1 | oappend (address_mode == mode_64bit && (sizeflag & AFLAG) |
5045 | c2c73b42 | blueswir1 | ? names64[index] : names32[index]); |
5046 | c2c73b42 | blueswir1 | } |
5047 | c2c73b42 | blueswir1 | if (scale != 0 || (!intel_syntax && index != 4)) |
5048 | c2c73b42 | blueswir1 | { |
5049 | c2c73b42 | blueswir1 | *obufp++ = scale_char; |
5050 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5051 | c2c73b42 | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%d", 1 << scale); |
5052 | dc99065b | bellard | oappend (scratchbuf); |
5053 | dc99065b | bellard | } |
5054 | dc99065b | bellard | } |
5055 | 88103cfe | blueswir1 | if (intel_syntax
|
5056 | 88103cfe | blueswir1 | && (disp || modrm.mod != 0 || (base & 7) == 5)) |
5057 | c2c73b42 | blueswir1 | { |
5058 | 88103cfe | blueswir1 | if ((bfd_signed_vma) disp >= 0) |
5059 | c2c73b42 | blueswir1 | { |
5060 | c2c73b42 | blueswir1 | *obufp++ = '+';
|
5061 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5062 | c2c73b42 | blueswir1 | } |
5063 | 88103cfe | blueswir1 | else if (modrm.mod != 1) |
5064 | c2c73b42 | blueswir1 | { |
5065 | c2c73b42 | blueswir1 | *obufp++ = '-';
|
5066 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5067 | c2c73b42 | blueswir1 | disp = - (bfd_signed_vma) disp; |
5068 | c2c73b42 | blueswir1 | } |
5069 | c2c73b42 | blueswir1 | |
5070 | 88103cfe | blueswir1 | print_displacement (scratchbuf, disp); |
5071 | c2c73b42 | blueswir1 | oappend (scratchbuf); |
5072 | c2c73b42 | blueswir1 | } |
5073 | bc51c5c9 | bellard | |
5074 | bc51c5c9 | bellard | *obufp++ = close_char; |
5075 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5076 | dc99065b | bellard | } |
5077 | bc51c5c9 | bellard | else if (intel_syntax) |
5078 | c2c73b42 | blueswir1 | { |
5079 | 88103cfe | blueswir1 | if (modrm.mod != 0 || (base & 7) == 5) |
5080 | c2c73b42 | blueswir1 | { |
5081 | bc51c5c9 | bellard | if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
5082 | bc51c5c9 | bellard | | PREFIX_ES | PREFIX_FS | PREFIX_GS)) |
5083 | bc51c5c9 | bellard | ; |
5084 | bc51c5c9 | bellard | else
|
5085 | bc51c5c9 | bellard | { |
5086 | bc51c5c9 | bellard | oappend (names_seg[ds_reg - es_reg]); |
5087 | bc51c5c9 | bellard | oappend (":");
|
5088 | bc51c5c9 | bellard | } |
5089 | c2c73b42 | blueswir1 | print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp); |
5090 | c2c73b42 | blueswir1 | oappend (scratchbuf); |
5091 | c2c73b42 | blueswir1 | } |
5092 | c2c73b42 | blueswir1 | } |
5093 | dc99065b | bellard | } |
5094 | dc99065b | bellard | else
|
5095 | dc99065b | bellard | { /* 16 bit address mode */
|
5096 | 88103cfe | blueswir1 | switch (modrm.mod)
|
5097 | dc99065b | bellard | { |
5098 | dc99065b | bellard | case 0: |
5099 | 88103cfe | blueswir1 | if (modrm.rm == 6) |
5100 | dc99065b | bellard | { |
5101 | dc99065b | bellard | disp = get16 (); |
5102 | dc99065b | bellard | if ((disp & 0x8000) != 0) |
5103 | dc99065b | bellard | disp -= 0x10000;
|
5104 | dc99065b | bellard | } |
5105 | dc99065b | bellard | break;
|
5106 | dc99065b | bellard | case 1: |
5107 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
5108 | dc99065b | bellard | disp = *codep++; |
5109 | dc99065b | bellard | if ((disp & 0x80) != 0) |
5110 | dc99065b | bellard | disp -= 0x100;
|
5111 | dc99065b | bellard | break;
|
5112 | dc99065b | bellard | case 2: |
5113 | dc99065b | bellard | disp = get16 (); |
5114 | dc99065b | bellard | if ((disp & 0x8000) != 0) |
5115 | dc99065b | bellard | disp -= 0x10000;
|
5116 | dc99065b | bellard | break;
|
5117 | dc99065b | bellard | } |
5118 | dc99065b | bellard | |
5119 | bc51c5c9 | bellard | if (!intel_syntax)
|
5120 | 88103cfe | blueswir1 | if (modrm.mod != 0 || modrm.rm == 6) |
5121 | c2c73b42 | blueswir1 | { |
5122 | 88103cfe | blueswir1 | print_displacement (scratchbuf, disp); |
5123 | c2c73b42 | blueswir1 | oappend (scratchbuf); |
5124 | c2c73b42 | blueswir1 | } |
5125 | dc99065b | bellard | |
5126 | 88103cfe | blueswir1 | if (modrm.mod != 0 || modrm.rm != 6) |
5127 | dc99065b | bellard | { |
5128 | bc51c5c9 | bellard | *obufp++ = open_char; |
5129 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5130 | 88103cfe | blueswir1 | oappend (index16[modrm.rm]); |
5131 | 88103cfe | blueswir1 | if (intel_syntax
|
5132 | 88103cfe | blueswir1 | && (disp || modrm.mod != 0 || modrm.rm == 6)) |
5133 | c2c73b42 | blueswir1 | { |
5134 | 88103cfe | blueswir1 | if ((bfd_signed_vma) disp >= 0) |
5135 | c2c73b42 | blueswir1 | { |
5136 | c2c73b42 | blueswir1 | *obufp++ = '+';
|
5137 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5138 | c2c73b42 | blueswir1 | } |
5139 | 88103cfe | blueswir1 | else if (modrm.mod != 1) |
5140 | c2c73b42 | blueswir1 | { |
5141 | c2c73b42 | blueswir1 | *obufp++ = '-';
|
5142 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5143 | c2c73b42 | blueswir1 | disp = - (bfd_signed_vma) disp; |
5144 | c2c73b42 | blueswir1 | } |
5145 | c2c73b42 | blueswir1 | |
5146 | 88103cfe | blueswir1 | print_displacement (scratchbuf, disp); |
5147 | c2c73b42 | blueswir1 | oappend (scratchbuf); |
5148 | c2c73b42 | blueswir1 | } |
5149 | c2c73b42 | blueswir1 | |
5150 | c2c73b42 | blueswir1 | *obufp++ = close_char; |
5151 | c2c73b42 | blueswir1 | *obufp = '\0';
|
5152 | c2c73b42 | blueswir1 | } |
5153 | c2c73b42 | blueswir1 | else if (intel_syntax) |
5154 | c2c73b42 | blueswir1 | { |
5155 | c2c73b42 | blueswir1 | if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
5156 | c2c73b42 | blueswir1 | | PREFIX_ES | PREFIX_FS | PREFIX_GS)) |
5157 | c2c73b42 | blueswir1 | ; |
5158 | c2c73b42 | blueswir1 | else
|
5159 | c2c73b42 | blueswir1 | { |
5160 | c2c73b42 | blueswir1 | oappend (names_seg[ds_reg - es_reg]); |
5161 | c2c73b42 | blueswir1 | oappend (":");
|
5162 | c2c73b42 | blueswir1 | } |
5163 | c2c73b42 | blueswir1 | print_operand_value (scratchbuf, sizeof(scratchbuf), 1, |
5164 | c2c73b42 | blueswir1 | disp & 0xffff);
|
5165 | c2c73b42 | blueswir1 | oappend (scratchbuf); |
5166 | dc99065b | bellard | } |
5167 | dc99065b | bellard | } |
5168 | dc99065b | bellard | } |
5169 | dc99065b | bellard | |
5170 | bc51c5c9 | bellard | static void |
5171 | c2c73b42 | blueswir1 | OP_G (int bytemode, int sizeflag) |
5172 | dc99065b | bellard | { |
5173 | bc51c5c9 | bellard | int add = 0; |
5174 | 88103cfe | blueswir1 | USED_REX (REX_R); |
5175 | 88103cfe | blueswir1 | if (rex & REX_R)
|
5176 | bc51c5c9 | bellard | add += 8;
|
5177 | bc51c5c9 | bellard | switch (bytemode)
|
5178 | dc99065b | bellard | { |
5179 | dc99065b | bellard | case b_mode:
|
5180 | bc51c5c9 | bellard | USED_REX (0);
|
5181 | bc51c5c9 | bellard | if (rex)
|
5182 | 88103cfe | blueswir1 | oappend (names8rex[modrm.reg + add]); |
5183 | bc51c5c9 | bellard | else
|
5184 | 88103cfe | blueswir1 | oappend (names8[modrm.reg + add]); |
5185 | dc99065b | bellard | break;
|
5186 | dc99065b | bellard | case w_mode:
|
5187 | 88103cfe | blueswir1 | oappend (names16[modrm.reg + add]); |
5188 | dc99065b | bellard | break;
|
5189 | dc99065b | bellard | case d_mode:
|
5190 | 88103cfe | blueswir1 | oappend (names32[modrm.reg + add]); |
5191 | bc51c5c9 | bellard | break;
|
5192 | bc51c5c9 | bellard | case q_mode:
|
5193 | 88103cfe | blueswir1 | oappend (names64[modrm.reg + add]); |
5194 | dc99065b | bellard | break;
|
5195 | dc99065b | bellard | case v_mode:
|
5196 | c2c73b42 | blueswir1 | case dq_mode:
|
5197 | 88103cfe | blueswir1 | case dqb_mode:
|
5198 | 88103cfe | blueswir1 | case dqd_mode:
|
5199 | c2c73b42 | blueswir1 | case dqw_mode:
|
5200 | 88103cfe | blueswir1 | USED_REX (REX_W); |
5201 | 88103cfe | blueswir1 | if (rex & REX_W)
|
5202 | 88103cfe | blueswir1 | oappend (names64[modrm.reg + add]); |
5203 | c2c73b42 | blueswir1 | else if ((sizeflag & DFLAG) || bytemode != v_mode) |
5204 | 88103cfe | blueswir1 | oappend (names32[modrm.reg + add]); |
5205 | dc99065b | bellard | else
|
5206 | 88103cfe | blueswir1 | oappend (names16[modrm.reg + add]); |
5207 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5208 | dc99065b | bellard | break;
|
5209 | c2c73b42 | blueswir1 | case m_mode:
|
5210 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
5211 | 88103cfe | blueswir1 | oappend (names64[modrm.reg + add]); |
5212 | c2c73b42 | blueswir1 | else
|
5213 | 88103cfe | blueswir1 | oappend (names32[modrm.reg + add]); |
5214 | c2c73b42 | blueswir1 | break;
|
5215 | dc99065b | bellard | default:
|
5216 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
5217 | dc99065b | bellard | break;
|
5218 | dc99065b | bellard | } |
5219 | dc99065b | bellard | } |
5220 | dc99065b | bellard | |
5221 | bc51c5c9 | bellard | static bfd_vma
|
5222 | c2c73b42 | blueswir1 | get64 (void)
|
5223 | bc51c5c9 | bellard | { |
5224 | bc51c5c9 | bellard | bfd_vma x; |
5225 | bc51c5c9 | bellard | #ifdef BFD64
|
5226 | bc51c5c9 | bellard | unsigned int a; |
5227 | bc51c5c9 | bellard | unsigned int b; |
5228 | bc51c5c9 | bellard | |
5229 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 8);
|
5230 | bc51c5c9 | bellard | a = *codep++ & 0xff;
|
5231 | bc51c5c9 | bellard | a |= (*codep++ & 0xff) << 8; |
5232 | bc51c5c9 | bellard | a |= (*codep++ & 0xff) << 16; |
5233 | bc51c5c9 | bellard | a |= (*codep++ & 0xff) << 24; |
5234 | bc51c5c9 | bellard | b = *codep++ & 0xff;
|
5235 | bc51c5c9 | bellard | b |= (*codep++ & 0xff) << 8; |
5236 | bc51c5c9 | bellard | b |= (*codep++ & 0xff) << 16; |
5237 | bc51c5c9 | bellard | b |= (*codep++ & 0xff) << 24; |
5238 | bc51c5c9 | bellard | x = a + ((bfd_vma) b << 32);
|
5239 | bc51c5c9 | bellard | #else
|
5240 | bc51c5c9 | bellard | abort (); |
5241 | bc51c5c9 | bellard | x = 0;
|
5242 | bc51c5c9 | bellard | #endif
|
5243 | bc51c5c9 | bellard | return x;
|
5244 | bc51c5c9 | bellard | } |
5245 | bc51c5c9 | bellard | |
5246 | bc51c5c9 | bellard | static bfd_signed_vma
|
5247 | c2c73b42 | blueswir1 | get32 (void)
|
5248 | dc99065b | bellard | { |
5249 | bc51c5c9 | bellard | bfd_signed_vma x = 0;
|
5250 | dc99065b | bellard | |
5251 | dc99065b | bellard | FETCH_DATA (the_info, codep + 4);
|
5252 | bc51c5c9 | bellard | x = *codep++ & (bfd_signed_vma) 0xff;
|
5253 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; |
5254 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; |
5255 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; |
5256 | bc51c5c9 | bellard | return x;
|
5257 | bc51c5c9 | bellard | } |
5258 | bc51c5c9 | bellard | |
5259 | bc51c5c9 | bellard | static bfd_signed_vma
|
5260 | c2c73b42 | blueswir1 | get32s (void)
|
5261 | bc51c5c9 | bellard | { |
5262 | bc51c5c9 | bellard | bfd_signed_vma x = 0;
|
5263 | bc51c5c9 | bellard | |
5264 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 4);
|
5265 | bc51c5c9 | bellard | x = *codep++ & (bfd_signed_vma) 0xff;
|
5266 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; |
5267 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; |
5268 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; |
5269 | bc51c5c9 | bellard | |
5270 | bc51c5c9 | bellard | x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); |
5271 | bc51c5c9 | bellard | |
5272 | bc51c5c9 | bellard | return x;
|
5273 | dc99065b | bellard | } |
5274 | dc99065b | bellard | |
5275 | dc99065b | bellard | static int |
5276 | c2c73b42 | blueswir1 | get16 (void)
|
5277 | dc99065b | bellard | { |
5278 | dc99065b | bellard | int x = 0; |
5279 | dc99065b | bellard | |
5280 | dc99065b | bellard | FETCH_DATA (the_info, codep + 2);
|
5281 | dc99065b | bellard | x = *codep++ & 0xff;
|
5282 | dc99065b | bellard | x |= (*codep++ & 0xff) << 8; |
5283 | bc51c5c9 | bellard | return x;
|
5284 | dc99065b | bellard | } |
5285 | dc99065b | bellard | |
5286 | dc99065b | bellard | static void |
5287 | c2c73b42 | blueswir1 | set_op (bfd_vma op, int riprel)
|
5288 | dc99065b | bellard | { |
5289 | dc99065b | bellard | op_index[op_ad] = op_ad; |
5290 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
5291 | bc51c5c9 | bellard | { |
5292 | bc51c5c9 | bellard | op_address[op_ad] = op; |
5293 | bc51c5c9 | bellard | op_riprel[op_ad] = riprel; |
5294 | bc51c5c9 | bellard | } |
5295 | bc51c5c9 | bellard | else
|
5296 | bc51c5c9 | bellard | { |
5297 | bc51c5c9 | bellard | /* Mask to get a 32-bit address. */
|
5298 | bc51c5c9 | bellard | op_address[op_ad] = op & 0xffffffff;
|
5299 | bc51c5c9 | bellard | op_riprel[op_ad] = riprel & 0xffffffff;
|
5300 | bc51c5c9 | bellard | } |
5301 | dc99065b | bellard | } |
5302 | dc99065b | bellard | |
5303 | bc51c5c9 | bellard | static void |
5304 | c2c73b42 | blueswir1 | OP_REG (int code, int sizeflag) |
5305 | bc51c5c9 | bellard | { |
5306 | bc51c5c9 | bellard | const char *s; |
5307 | bc51c5c9 | bellard | int add = 0; |
5308 | 88103cfe | blueswir1 | USED_REX (REX_B); |
5309 | 88103cfe | blueswir1 | if (rex & REX_B)
|
5310 | bc51c5c9 | bellard | add = 8;
|
5311 | bc51c5c9 | bellard | |
5312 | bc51c5c9 | bellard | switch (code)
|
5313 | bc51c5c9 | bellard | { |
5314 | bc51c5c9 | bellard | case ax_reg: case cx_reg: case dx_reg: case bx_reg: |
5315 | bc51c5c9 | bellard | case sp_reg: case bp_reg: case si_reg: case di_reg: |
5316 | bc51c5c9 | bellard | s = names16[code - ax_reg + add]; |
5317 | bc51c5c9 | bellard | break;
|
5318 | bc51c5c9 | bellard | case es_reg: case ss_reg: case cs_reg: |
5319 | bc51c5c9 | bellard | case ds_reg: case fs_reg: case gs_reg: |
5320 | bc51c5c9 | bellard | s = names_seg[code - es_reg + add]; |
5321 | bc51c5c9 | bellard | break;
|
5322 | bc51c5c9 | bellard | case al_reg: case ah_reg: case cl_reg: case ch_reg: |
5323 | bc51c5c9 | bellard | case dl_reg: case dh_reg: case bl_reg: case bh_reg: |
5324 | bc51c5c9 | bellard | USED_REX (0);
|
5325 | bc51c5c9 | bellard | if (rex)
|
5326 | bc51c5c9 | bellard | s = names8rex[code - al_reg + add]; |
5327 | bc51c5c9 | bellard | else
|
5328 | bc51c5c9 | bellard | s = names8[code - al_reg]; |
5329 | bc51c5c9 | bellard | break;
|
5330 | bc51c5c9 | bellard | case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: |
5331 | bc51c5c9 | bellard | case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: |
5332 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit && (sizeflag & DFLAG))
|
5333 | bc51c5c9 | bellard | { |
5334 | bc51c5c9 | bellard | s = names64[code - rAX_reg + add]; |
5335 | bc51c5c9 | bellard | break;
|
5336 | bc51c5c9 | bellard | } |
5337 | bc51c5c9 | bellard | code += eAX_reg - rAX_reg; |
5338 | bc51c5c9 | bellard | /* Fall through. */
|
5339 | bc51c5c9 | bellard | case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: |
5340 | bc51c5c9 | bellard | case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: |
5341 | 88103cfe | blueswir1 | USED_REX (REX_W); |
5342 | 88103cfe | blueswir1 | if (rex & REX_W)
|
5343 | bc51c5c9 | bellard | s = names64[code - eAX_reg + add]; |
5344 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
5345 | bc51c5c9 | bellard | s = names32[code - eAX_reg + add]; |
5346 | bc51c5c9 | bellard | else
|
5347 | bc51c5c9 | bellard | s = names16[code - eAX_reg + add]; |
5348 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5349 | bc51c5c9 | bellard | break;
|
5350 | bc51c5c9 | bellard | default:
|
5351 | bc51c5c9 | bellard | s = INTERNAL_DISASSEMBLER_ERROR; |
5352 | bc51c5c9 | bellard | break;
|
5353 | bc51c5c9 | bellard | } |
5354 | bc51c5c9 | bellard | oappend (s); |
5355 | bc51c5c9 | bellard | } |
5356 | bc51c5c9 | bellard | |
5357 | bc51c5c9 | bellard | static void |
5358 | c2c73b42 | blueswir1 | OP_IMREG (int code, int sizeflag) |
5359 | dc99065b | bellard | { |
5360 | bc51c5c9 | bellard | const char *s; |
5361 | bc51c5c9 | bellard | |
5362 | bc51c5c9 | bellard | switch (code)
|
5363 | dc99065b | bellard | { |
5364 | bc51c5c9 | bellard | case indir_dx_reg:
|
5365 | bc51c5c9 | bellard | if (intel_syntax)
|
5366 | 88103cfe | blueswir1 | s = "dx";
|
5367 | bc51c5c9 | bellard | else
|
5368 | c2c73b42 | blueswir1 | s = "(%dx)";
|
5369 | bc51c5c9 | bellard | break;
|
5370 | bc51c5c9 | bellard | case ax_reg: case cx_reg: case dx_reg: case bx_reg: |
5371 | bc51c5c9 | bellard | case sp_reg: case bp_reg: case si_reg: case di_reg: |
5372 | bc51c5c9 | bellard | s = names16[code - ax_reg]; |
5373 | bc51c5c9 | bellard | break;
|
5374 | bc51c5c9 | bellard | case es_reg: case ss_reg: case cs_reg: |
5375 | bc51c5c9 | bellard | case ds_reg: case fs_reg: case gs_reg: |
5376 | bc51c5c9 | bellard | s = names_seg[code - es_reg]; |
5377 | bc51c5c9 | bellard | break;
|
5378 | bc51c5c9 | bellard | case al_reg: case ah_reg: case cl_reg: case ch_reg: |
5379 | bc51c5c9 | bellard | case dl_reg: case dh_reg: case bl_reg: case bh_reg: |
5380 | bc51c5c9 | bellard | USED_REX (0);
|
5381 | bc51c5c9 | bellard | if (rex)
|
5382 | bc51c5c9 | bellard | s = names8rex[code - al_reg]; |
5383 | bc51c5c9 | bellard | else
|
5384 | bc51c5c9 | bellard | s = names8[code - al_reg]; |
5385 | bc51c5c9 | bellard | break;
|
5386 | bc51c5c9 | bellard | case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: |
5387 | bc51c5c9 | bellard | case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: |
5388 | 88103cfe | blueswir1 | USED_REX (REX_W); |
5389 | 88103cfe | blueswir1 | if (rex & REX_W)
|
5390 | bc51c5c9 | bellard | s = names64[code - eAX_reg]; |
5391 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
5392 | dc99065b | bellard | s = names32[code - eAX_reg]; |
5393 | dc99065b | bellard | else
|
5394 | dc99065b | bellard | s = names16[code - eAX_reg]; |
5395 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5396 | dc99065b | bellard | break;
|
5397 | 88103cfe | blueswir1 | case z_mode_ax_reg:
|
5398 | 88103cfe | blueswir1 | if ((rex & REX_W) || (sizeflag & DFLAG))
|
5399 | 88103cfe | blueswir1 | s = *names32; |
5400 | 88103cfe | blueswir1 | else
|
5401 | 88103cfe | blueswir1 | s = *names16; |
5402 | 88103cfe | blueswir1 | if (!(rex & REX_W))
|
5403 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
5404 | 88103cfe | blueswir1 | break;
|
5405 | dc99065b | bellard | default:
|
5406 | bc51c5c9 | bellard | s = INTERNAL_DISASSEMBLER_ERROR; |
5407 | dc99065b | bellard | break;
|
5408 | dc99065b | bellard | } |
5409 | dc99065b | bellard | oappend (s); |
5410 | dc99065b | bellard | } |
5411 | dc99065b | bellard | |
5412 | bc51c5c9 | bellard | static void |
5413 | c2c73b42 | blueswir1 | OP_I (int bytemode, int sizeflag) |
5414 | bc51c5c9 | bellard | { |
5415 | bc51c5c9 | bellard | bfd_signed_vma op; |
5416 | bc51c5c9 | bellard | bfd_signed_vma mask = -1;
|
5417 | bc51c5c9 | bellard | |
5418 | bc51c5c9 | bellard | switch (bytemode)
|
5419 | bc51c5c9 | bellard | { |
5420 | bc51c5c9 | bellard | case b_mode:
|
5421 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 1);
|
5422 | bc51c5c9 | bellard | op = *codep++; |
5423 | bc51c5c9 | bellard | mask = 0xff;
|
5424 | bc51c5c9 | bellard | break;
|
5425 | bc51c5c9 | bellard | case q_mode:
|
5426 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
5427 | bc51c5c9 | bellard | { |
5428 | bc51c5c9 | bellard | op = get32s (); |
5429 | bc51c5c9 | bellard | break;
|
5430 | bc51c5c9 | bellard | } |
5431 | bc51c5c9 | bellard | /* Fall through. */
|
5432 | bc51c5c9 | bellard | case v_mode:
|
5433 | 88103cfe | blueswir1 | USED_REX (REX_W); |
5434 | 88103cfe | blueswir1 | if (rex & REX_W)
|
5435 | bc51c5c9 | bellard | op = get32s (); |
5436 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
5437 | bc51c5c9 | bellard | { |
5438 | bc51c5c9 | bellard | op = get32 (); |
5439 | bc51c5c9 | bellard | mask = 0xffffffff;
|
5440 | bc51c5c9 | bellard | } |
5441 | bc51c5c9 | bellard | else
|
5442 | bc51c5c9 | bellard | { |
5443 | bc51c5c9 | bellard | op = get16 (); |
5444 | bc51c5c9 | bellard | mask = 0xfffff;
|
5445 | bc51c5c9 | bellard | } |
5446 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5447 | bc51c5c9 | bellard | break;
|
5448 | bc51c5c9 | bellard | case w_mode:
|
5449 | bc51c5c9 | bellard | mask = 0xfffff;
|
5450 | bc51c5c9 | bellard | op = get16 (); |
5451 | bc51c5c9 | bellard | break;
|
5452 | c2c73b42 | blueswir1 | case const_1_mode:
|
5453 | c2c73b42 | blueswir1 | if (intel_syntax)
|
5454 | c2c73b42 | blueswir1 | oappend ("1");
|
5455 | c2c73b42 | blueswir1 | return;
|
5456 | bc51c5c9 | bellard | default:
|
5457 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
5458 | bc51c5c9 | bellard | return;
|
5459 | bc51c5c9 | bellard | } |
5460 | bc51c5c9 | bellard | |
5461 | bc51c5c9 | bellard | op &= mask; |
5462 | bc51c5c9 | bellard | scratchbuf[0] = '$'; |
5463 | 363a37d5 | blueswir1 | print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op); |
5464 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5465 | bc51c5c9 | bellard | scratchbuf[0] = '\0'; |
5466 | bc51c5c9 | bellard | } |
5467 | bc51c5c9 | bellard | |
5468 | bc51c5c9 | bellard | static void |
5469 | c2c73b42 | blueswir1 | OP_I64 (int bytemode, int sizeflag) |
5470 | dc99065b | bellard | { |
5471 | bc51c5c9 | bellard | bfd_signed_vma op; |
5472 | bc51c5c9 | bellard | bfd_signed_vma mask = -1;
|
5473 | bc51c5c9 | bellard | |
5474 | c2c73b42 | blueswir1 | if (address_mode != mode_64bit)
|
5475 | bc51c5c9 | bellard | { |
5476 | bc51c5c9 | bellard | OP_I (bytemode, sizeflag); |
5477 | bc51c5c9 | bellard | return;
|
5478 | bc51c5c9 | bellard | } |
5479 | bc51c5c9 | bellard | |
5480 | bc51c5c9 | bellard | switch (bytemode)
|
5481 | dc99065b | bellard | { |
5482 | dc99065b | bellard | case b_mode:
|
5483 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
5484 | bc51c5c9 | bellard | op = *codep++; |
5485 | bc51c5c9 | bellard | mask = 0xff;
|
5486 | dc99065b | bellard | break;
|
5487 | dc99065b | bellard | case v_mode:
|
5488 | 88103cfe | blueswir1 | USED_REX (REX_W); |
5489 | 88103cfe | blueswir1 | if (rex & REX_W)
|
5490 | bc51c5c9 | bellard | op = get64 (); |
5491 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
5492 | bc51c5c9 | bellard | { |
5493 | bc51c5c9 | bellard | op = get32 (); |
5494 | bc51c5c9 | bellard | mask = 0xffffffff;
|
5495 | bc51c5c9 | bellard | } |
5496 | dc99065b | bellard | else
|
5497 | bc51c5c9 | bellard | { |
5498 | bc51c5c9 | bellard | op = get16 (); |
5499 | bc51c5c9 | bellard | mask = 0xfffff;
|
5500 | bc51c5c9 | bellard | } |
5501 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5502 | dc99065b | bellard | break;
|
5503 | dc99065b | bellard | case w_mode:
|
5504 | bc51c5c9 | bellard | mask = 0xfffff;
|
5505 | dc99065b | bellard | op = get16 (); |
5506 | dc99065b | bellard | break;
|
5507 | dc99065b | bellard | default:
|
5508 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
5509 | bc51c5c9 | bellard | return;
|
5510 | dc99065b | bellard | } |
5511 | bc51c5c9 | bellard | |
5512 | bc51c5c9 | bellard | op &= mask; |
5513 | bc51c5c9 | bellard | scratchbuf[0] = '$'; |
5514 | 363a37d5 | blueswir1 | print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op); |
5515 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5516 | bc51c5c9 | bellard | scratchbuf[0] = '\0'; |
5517 | dc99065b | bellard | } |
5518 | dc99065b | bellard | |
5519 | bc51c5c9 | bellard | static void |
5520 | c2c73b42 | blueswir1 | OP_sI (int bytemode, int sizeflag) |
5521 | dc99065b | bellard | { |
5522 | bc51c5c9 | bellard | bfd_signed_vma op; |
5523 | bc51c5c9 | bellard | bfd_signed_vma mask = -1;
|
5524 | bc51c5c9 | bellard | |
5525 | bc51c5c9 | bellard | switch (bytemode)
|
5526 | dc99065b | bellard | { |
5527 | dc99065b | bellard | case b_mode:
|
5528 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
5529 | dc99065b | bellard | op = *codep++; |
5530 | dc99065b | bellard | if ((op & 0x80) != 0) |
5531 | dc99065b | bellard | op -= 0x100;
|
5532 | bc51c5c9 | bellard | mask = 0xffffffff;
|
5533 | dc99065b | bellard | break;
|
5534 | dc99065b | bellard | case v_mode:
|
5535 | 88103cfe | blueswir1 | USED_REX (REX_W); |
5536 | 88103cfe | blueswir1 | if (rex & REX_W)
|
5537 | bc51c5c9 | bellard | op = get32s (); |
5538 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
5539 | bc51c5c9 | bellard | { |
5540 | bc51c5c9 | bellard | op = get32s (); |
5541 | bc51c5c9 | bellard | mask = 0xffffffff;
|
5542 | bc51c5c9 | bellard | } |
5543 | dc99065b | bellard | else
|
5544 | dc99065b | bellard | { |
5545 | bc51c5c9 | bellard | mask = 0xffffffff;
|
5546 | bc51c5c9 | bellard | op = get16 (); |
5547 | dc99065b | bellard | if ((op & 0x8000) != 0) |
5548 | dc99065b | bellard | op -= 0x10000;
|
5549 | dc99065b | bellard | } |
5550 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5551 | dc99065b | bellard | break;
|
5552 | dc99065b | bellard | case w_mode:
|
5553 | dc99065b | bellard | op = get16 (); |
5554 | bc51c5c9 | bellard | mask = 0xffffffff;
|
5555 | dc99065b | bellard | if ((op & 0x8000) != 0) |
5556 | dc99065b | bellard | op -= 0x10000;
|
5557 | dc99065b | bellard | break;
|
5558 | dc99065b | bellard | default:
|
5559 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
5560 | bc51c5c9 | bellard | return;
|
5561 | dc99065b | bellard | } |
5562 | bc51c5c9 | bellard | |
5563 | bc51c5c9 | bellard | scratchbuf[0] = '$'; |
5564 | 363a37d5 | blueswir1 | print_operand_value (scratchbuf + 1, sizeof(scratchbuf) - 1, 1, op); |
5565 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5566 | dc99065b | bellard | } |
5567 | dc99065b | bellard | |
5568 | bc51c5c9 | bellard | static void |
5569 | c2c73b42 | blueswir1 | OP_J (int bytemode, int sizeflag) |
5570 | dc99065b | bellard | { |
5571 | bc51c5c9 | bellard | bfd_vma disp; |
5572 | bc51c5c9 | bellard | bfd_vma mask = -1;
|
5573 | 88103cfe | blueswir1 | bfd_vma segment = 0;
|
5574 | bc51c5c9 | bellard | |
5575 | bc51c5c9 | bellard | switch (bytemode)
|
5576 | dc99065b | bellard | { |
5577 | dc99065b | bellard | case b_mode:
|
5578 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
5579 | dc99065b | bellard | disp = *codep++; |
5580 | dc99065b | bellard | if ((disp & 0x80) != 0) |
5581 | dc99065b | bellard | disp -= 0x100;
|
5582 | dc99065b | bellard | break;
|
5583 | dc99065b | bellard | case v_mode:
|
5584 | 88103cfe | blueswir1 | if ((sizeflag & DFLAG) || (rex & REX_W))
|
5585 | bc51c5c9 | bellard | disp = get32s (); |
5586 | dc99065b | bellard | else
|
5587 | dc99065b | bellard | { |
5588 | dc99065b | bellard | disp = get16 (); |
5589 | 88103cfe | blueswir1 | if ((disp & 0x8000) != 0) |
5590 | 88103cfe | blueswir1 | disp -= 0x10000;
|
5591 | 88103cfe | blueswir1 | /* In 16bit mode, address is wrapped around at 64k within
|
5592 | 88103cfe | blueswir1 | the same segment. Otherwise, a data16 prefix on a jump
|
5593 | 88103cfe | blueswir1 | instruction means that the pc is masked to 16 bits after
|
5594 | 88103cfe | blueswir1 | the displacement is added! */
|
5595 | dc99065b | bellard | mask = 0xffff;
|
5596 | 88103cfe | blueswir1 | if ((prefixes & PREFIX_DATA) == 0) |
5597 | 88103cfe | blueswir1 | segment = ((start_pc + codep - start_codep) |
5598 | 88103cfe | blueswir1 | & ~((bfd_vma) 0xffff));
|
5599 | dc99065b | bellard | } |
5600 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
5601 | dc99065b | bellard | break;
|
5602 | dc99065b | bellard | default:
|
5603 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
5604 | bc51c5c9 | bellard | return;
|
5605 | dc99065b | bellard | } |
5606 | 88103cfe | blueswir1 | disp = ((start_pc + codep - start_codep + disp) & mask) | segment; |
5607 | bc51c5c9 | bellard | set_op (disp, 0);
|
5608 | 363a37d5 | blueswir1 | print_operand_value (scratchbuf, sizeof(scratchbuf), 1, disp); |
5609 | dc99065b | bellard | oappend (scratchbuf); |
5610 | dc99065b | bellard | } |
5611 | dc99065b | bellard | |
5612 | bc51c5c9 | bellard | static void |
5613 | 88103cfe | blueswir1 | OP_SEG (int bytemode, int sizeflag) |
5614 | dc99065b | bellard | { |
5615 | 88103cfe | blueswir1 | if (bytemode == w_mode)
|
5616 | 88103cfe | blueswir1 | oappend (names_seg[modrm.reg]); |
5617 | 88103cfe | blueswir1 | else
|
5618 | 88103cfe | blueswir1 | OP_E (modrm.mod == 3 ? bytemode : w_mode, sizeflag);
|
5619 | dc99065b | bellard | } |
5620 | dc99065b | bellard | |
5621 | bc51c5c9 | bellard | static void |
5622 | c2c73b42 | blueswir1 | OP_DIR (int dummy ATTRIBUTE_UNUSED, int sizeflag) |
5623 | dc99065b | bellard | { |
5624 | dc99065b | bellard | int seg, offset;
|
5625 | bc51c5c9 | bellard | |
5626 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
5627 | dc99065b | bellard | { |
5628 | bc51c5c9 | bellard | offset = get32 (); |
5629 | bc51c5c9 | bellard | seg = get16 (); |
5630 | dc99065b | bellard | } |
5631 | bc51c5c9 | bellard | else
|
5632 | bc51c5c9 | bellard | { |
5633 | bc51c5c9 | bellard | offset = get16 (); |
5634 | bc51c5c9 | bellard | seg = get16 (); |
5635 | bc51c5c9 | bellard | } |
5636 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5637 | bc51c5c9 | bellard | if (intel_syntax)
|
5638 | c2c73b42 | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "0x%x:0x%x", seg, offset); |
5639 | bc51c5c9 | bellard | else
|
5640 | 363a37d5 | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "$0x%x,$0x%x", seg, offset); |
5641 | bc51c5c9 | bellard | oappend (scratchbuf); |
5642 | dc99065b | bellard | } |
5643 | dc99065b | bellard | |
5644 | bc51c5c9 | bellard | static void |
5645 | c2c73b42 | blueswir1 | OP_OFF (int bytemode, int sizeflag) |
5646 | dc99065b | bellard | { |
5647 | bc51c5c9 | bellard | bfd_vma off; |
5648 | dc99065b | bellard | |
5649 | c2c73b42 | blueswir1 | if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
|
5650 | c2c73b42 | blueswir1 | intel_operand_size (bytemode, sizeflag); |
5651 | bc51c5c9 | bellard | append_seg (); |
5652 | dc99065b | bellard | |
5653 | c2c73b42 | blueswir1 | if ((sizeflag & AFLAG) || address_mode == mode_64bit)
|
5654 | dc99065b | bellard | off = get32 (); |
5655 | dc99065b | bellard | else
|
5656 | dc99065b | bellard | off = get16 (); |
5657 | bc51c5c9 | bellard | |
5658 | bc51c5c9 | bellard | if (intel_syntax)
|
5659 | bc51c5c9 | bellard | { |
5660 | bc51c5c9 | bellard | if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
5661 | c2c73b42 | blueswir1 | | PREFIX_ES | PREFIX_FS | PREFIX_GS))) |
5662 | bc51c5c9 | bellard | { |
5663 | bc51c5c9 | bellard | oappend (names_seg[ds_reg - es_reg]); |
5664 | bc51c5c9 | bellard | oappend (":");
|
5665 | bc51c5c9 | bellard | } |
5666 | bc51c5c9 | bellard | } |
5667 | 363a37d5 | blueswir1 | print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off); |
5668 | dc99065b | bellard | oappend (scratchbuf); |
5669 | dc99065b | bellard | } |
5670 | dc99065b | bellard | |
5671 | bc51c5c9 | bellard | static void |
5672 | c2c73b42 | blueswir1 | OP_OFF64 (int bytemode, int sizeflag) |
5673 | dc99065b | bellard | { |
5674 | bc51c5c9 | bellard | bfd_vma off; |
5675 | bc51c5c9 | bellard | |
5676 | 88103cfe | blueswir1 | if (address_mode != mode_64bit
|
5677 | 88103cfe | blueswir1 | || (prefixes & PREFIX_ADDR)) |
5678 | bc51c5c9 | bellard | { |
5679 | bc51c5c9 | bellard | OP_OFF (bytemode, sizeflag); |
5680 | bc51c5c9 | bellard | return;
|
5681 | bc51c5c9 | bellard | } |
5682 | bc51c5c9 | bellard | |
5683 | c2c73b42 | blueswir1 | if (intel_syntax && (sizeflag & SUFFIX_ALWAYS))
|
5684 | c2c73b42 | blueswir1 | intel_operand_size (bytemode, sizeflag); |
5685 | bc51c5c9 | bellard | append_seg (); |
5686 | bc51c5c9 | bellard | |
5687 | bc51c5c9 | bellard | off = get64 (); |
5688 | bc51c5c9 | bellard | |
5689 | bc51c5c9 | bellard | if (intel_syntax)
|
5690 | bc51c5c9 | bellard | { |
5691 | bc51c5c9 | bellard | if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
5692 | c2c73b42 | blueswir1 | | PREFIX_ES | PREFIX_FS | PREFIX_GS))) |
5693 | bc51c5c9 | bellard | { |
5694 | bc51c5c9 | bellard | oappend (names_seg[ds_reg - es_reg]); |
5695 | bc51c5c9 | bellard | oappend (":");
|
5696 | bc51c5c9 | bellard | } |
5697 | bc51c5c9 | bellard | } |
5698 | 363a37d5 | blueswir1 | print_operand_value (scratchbuf, sizeof(scratchbuf), 1, off); |
5699 | bc51c5c9 | bellard | oappend (scratchbuf); |
5700 | dc99065b | bellard | } |
5701 | dc99065b | bellard | |
5702 | bc51c5c9 | bellard | static void |
5703 | c2c73b42 | blueswir1 | ptr_reg (int code, int sizeflag) |
5704 | bc51c5c9 | bellard | { |
5705 | bc51c5c9 | bellard | const char *s; |
5706 | bc51c5c9 | bellard | |
5707 | c2c73b42 | blueswir1 | *obufp++ = open_char; |
5708 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_ADDR); |
5709 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit)
|
5710 | bc51c5c9 | bellard | { |
5711 | bc51c5c9 | bellard | if (!(sizeflag & AFLAG))
|
5712 | c2c73b42 | blueswir1 | s = names32[code - eAX_reg]; |
5713 | bc51c5c9 | bellard | else
|
5714 | c2c73b42 | blueswir1 | s = names64[code - eAX_reg]; |
5715 | bc51c5c9 | bellard | } |
5716 | bc51c5c9 | bellard | else if (sizeflag & AFLAG) |
5717 | bc51c5c9 | bellard | s = names32[code - eAX_reg]; |
5718 | bc51c5c9 | bellard | else
|
5719 | bc51c5c9 | bellard | s = names16[code - eAX_reg]; |
5720 | bc51c5c9 | bellard | oappend (s); |
5721 | c2c73b42 | blueswir1 | *obufp++ = close_char; |
5722 | c2c73b42 | blueswir1 | *obufp = 0;
|
5723 | bc51c5c9 | bellard | } |
5724 | bc51c5c9 | bellard | |
5725 | bc51c5c9 | bellard | static void |
5726 | c2c73b42 | blueswir1 | OP_ESreg (int code, int sizeflag) |
5727 | bc51c5c9 | bellard | { |
5728 | c2c73b42 | blueswir1 | if (intel_syntax)
|
5729 | 88103cfe | blueswir1 | { |
5730 | 88103cfe | blueswir1 | switch (codep[-1]) |
5731 | 88103cfe | blueswir1 | { |
5732 | 88103cfe | blueswir1 | case 0x6d: /* insw/insl */ |
5733 | 88103cfe | blueswir1 | intel_operand_size (z_mode, sizeflag); |
5734 | 88103cfe | blueswir1 | break;
|
5735 | 88103cfe | blueswir1 | case 0xa5: /* movsw/movsl/movsq */ |
5736 | 88103cfe | blueswir1 | case 0xa7: /* cmpsw/cmpsl/cmpsq */ |
5737 | 88103cfe | blueswir1 | case 0xab: /* stosw/stosl */ |
5738 | 88103cfe | blueswir1 | case 0xaf: /* scasw/scasl */ |
5739 | 88103cfe | blueswir1 | intel_operand_size (v_mode, sizeflag); |
5740 | 88103cfe | blueswir1 | break;
|
5741 | 88103cfe | blueswir1 | default:
|
5742 | 88103cfe | blueswir1 | intel_operand_size (b_mode, sizeflag); |
5743 | 88103cfe | blueswir1 | } |
5744 | 88103cfe | blueswir1 | } |
5745 | bc51c5c9 | bellard | oappend ("%es:" + intel_syntax);
|
5746 | bc51c5c9 | bellard | ptr_reg (code, sizeflag); |
5747 | bc51c5c9 | bellard | } |
5748 | bc51c5c9 | bellard | |
5749 | bc51c5c9 | bellard | static void |
5750 | c2c73b42 | blueswir1 | OP_DSreg (int code, int sizeflag) |
5751 | dc99065b | bellard | { |
5752 | c2c73b42 | blueswir1 | if (intel_syntax)
|
5753 | 88103cfe | blueswir1 | { |
5754 | 88103cfe | blueswir1 | switch (codep[-1]) |
5755 | 88103cfe | blueswir1 | { |
5756 | 88103cfe | blueswir1 | case 0x6f: /* outsw/outsl */ |
5757 | 88103cfe | blueswir1 | intel_operand_size (z_mode, sizeflag); |
5758 | 88103cfe | blueswir1 | break;
|
5759 | 88103cfe | blueswir1 | case 0xa5: /* movsw/movsl/movsq */ |
5760 | 88103cfe | blueswir1 | case 0xa7: /* cmpsw/cmpsl/cmpsq */ |
5761 | 88103cfe | blueswir1 | case 0xad: /* lodsw/lodsl/lodsq */ |
5762 | 88103cfe | blueswir1 | intel_operand_size (v_mode, sizeflag); |
5763 | 88103cfe | blueswir1 | break;
|
5764 | 88103cfe | blueswir1 | default:
|
5765 | 88103cfe | blueswir1 | intel_operand_size (b_mode, sizeflag); |
5766 | 88103cfe | blueswir1 | } |
5767 | 88103cfe | blueswir1 | } |
5768 | dc99065b | bellard | if ((prefixes
|
5769 | dc99065b | bellard | & (PREFIX_CS |
5770 | dc99065b | bellard | | PREFIX_DS |
5771 | dc99065b | bellard | | PREFIX_SS |
5772 | dc99065b | bellard | | PREFIX_ES |
5773 | dc99065b | bellard | | PREFIX_FS |
5774 | dc99065b | bellard | | PREFIX_GS)) == 0)
|
5775 | dc99065b | bellard | prefixes |= PREFIX_DS; |
5776 | bc51c5c9 | bellard | append_seg (); |
5777 | bc51c5c9 | bellard | ptr_reg (code, sizeflag); |
5778 | dc99065b | bellard | } |
5779 | dc99065b | bellard | |
5780 | bc51c5c9 | bellard | static void |
5781 | c2c73b42 | blueswir1 | OP_C (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
5782 | dc99065b | bellard | { |
5783 | bc51c5c9 | bellard | int add = 0; |
5784 | 88103cfe | blueswir1 | if (rex & REX_R)
|
5785 | c2c73b42 | blueswir1 | { |
5786 | 88103cfe | blueswir1 | USED_REX (REX_R); |
5787 | c2c73b42 | blueswir1 | add = 8;
|
5788 | c2c73b42 | blueswir1 | } |
5789 | c2c73b42 | blueswir1 | else if (address_mode != mode_64bit && (prefixes & PREFIX_LOCK)) |
5790 | c2c73b42 | blueswir1 | { |
5791 | c2c73b42 | blueswir1 | used_prefixes |= PREFIX_LOCK; |
5792 | c2c73b42 | blueswir1 | add = 8;
|
5793 | c2c73b42 | blueswir1 | } |
5794 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%cr%d", modrm.reg + add); |
5795 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5796 | dc99065b | bellard | } |
5797 | dc99065b | bellard | |
5798 | bc51c5c9 | bellard | static void |
5799 | c2c73b42 | blueswir1 | OP_D (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
5800 | dc99065b | bellard | { |
5801 | bc51c5c9 | bellard | int add = 0; |
5802 | 88103cfe | blueswir1 | USED_REX (REX_R); |
5803 | 88103cfe | blueswir1 | if (rex & REX_R)
|
5804 | bc51c5c9 | bellard | add = 8;
|
5805 | bc51c5c9 | bellard | if (intel_syntax)
|
5806 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "db%d", modrm.reg + add); |
5807 | bc51c5c9 | bellard | else
|
5808 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%db%d", modrm.reg + add); |
5809 | dc99065b | bellard | oappend (scratchbuf); |
5810 | dc99065b | bellard | } |
5811 | dc99065b | bellard | |
5812 | bc51c5c9 | bellard | static void |
5813 | c2c73b42 | blueswir1 | OP_T (int dummy ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
5814 | dc99065b | bellard | { |
5815 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%tr%d", modrm.reg); |
5816 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5817 | dc99065b | bellard | } |
5818 | dc99065b | bellard | |
5819 | bc51c5c9 | bellard | static void |
5820 | 88103cfe | blueswir1 | OP_R (int bytemode, int sizeflag) |
5821 | dc99065b | bellard | { |
5822 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
5823 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
5824 | bc51c5c9 | bellard | else
|
5825 | bc51c5c9 | bellard | BadOp (); |
5826 | dc99065b | bellard | } |
5827 | dc99065b | bellard | |
5828 | bc51c5c9 | bellard | static void |
5829 | c2c73b42 | blueswir1 | OP_MMX (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
5830 | dc99065b | bellard | { |
5831 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5832 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
5833 | c2c73b42 | blueswir1 | { |
5834 | c2c73b42 | blueswir1 | int add = 0; |
5835 | 88103cfe | blueswir1 | USED_REX (REX_R); |
5836 | 88103cfe | blueswir1 | if (rex & REX_R)
|
5837 | c2c73b42 | blueswir1 | add = 8;
|
5838 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add); |
5839 | c2c73b42 | blueswir1 | } |
5840 | bc51c5c9 | bellard | else
|
5841 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg); |
5842 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5843 | dc99065b | bellard | } |
5844 | dc99065b | bellard | |
5845 | bc51c5c9 | bellard | static void |
5846 | c2c73b42 | blueswir1 | OP_XMM (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
5847 | dc99065b | bellard | { |
5848 | bc51c5c9 | bellard | int add = 0; |
5849 | 88103cfe | blueswir1 | USED_REX (REX_R); |
5850 | 88103cfe | blueswir1 | if (rex & REX_R)
|
5851 | bc51c5c9 | bellard | add = 8;
|
5852 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.reg + add); |
5853 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5854 | dc99065b | bellard | } |
5855 | dc99065b | bellard | |
5856 | bc51c5c9 | bellard | static void |
5857 | c2c73b42 | blueswir1 | OP_EM (int bytemode, int sizeflag) |
5858 | dc99065b | bellard | { |
5859 | 88103cfe | blueswir1 | if (modrm.mod != 3) |
5860 | bc51c5c9 | bellard | { |
5861 | c2c73b42 | blueswir1 | if (intel_syntax && bytemode == v_mode)
|
5862 | c2c73b42 | blueswir1 | { |
5863 | c2c73b42 | blueswir1 | bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; |
5864 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
5865 | c2c73b42 | blueswir1 | } |
5866 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
5867 | bc51c5c9 | bellard | return;
|
5868 | bc51c5c9 | bellard | } |
5869 | dc99065b | bellard | |
5870 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
5871 | bc51c5c9 | bellard | MODRM_CHECK; |
5872 | dc99065b | bellard | codep++; |
5873 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
5874 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
5875 | c2c73b42 | blueswir1 | { |
5876 | c2c73b42 | blueswir1 | int add = 0; |
5877 | c2c73b42 | blueswir1 | |
5878 | 88103cfe | blueswir1 | USED_REX (REX_B); |
5879 | 88103cfe | blueswir1 | if (rex & REX_B)
|
5880 | c2c73b42 | blueswir1 | add = 8;
|
5881 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add); |
5882 | c2c73b42 | blueswir1 | } |
5883 | bc51c5c9 | bellard | else
|
5884 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm); |
5885 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5886 | dc99065b | bellard | } |
5887 | dc99065b | bellard | |
5888 | 88103cfe | blueswir1 | /* cvt* are the only instructions in sse2 which have
|
5889 | 88103cfe | blueswir1 | both SSE and MMX operands and also have 0x66 prefix
|
5890 | 88103cfe | blueswir1 | in their opcode. 0x66 was originally used to differentiate
|
5891 | 88103cfe | blueswir1 | between SSE and MMX instruction(operands). So we have to handle the
|
5892 | 88103cfe | blueswir1 | cvt* separately using OP_EMC and OP_MXC */
|
5893 | bc51c5c9 | bellard | static void |
5894 | 88103cfe | blueswir1 | OP_EMC (int bytemode, int sizeflag) |
5895 | dc99065b | bellard | { |
5896 | 88103cfe | blueswir1 | if (modrm.mod != 3) |
5897 | bc51c5c9 | bellard | { |
5898 | c2c73b42 | blueswir1 | if (intel_syntax && bytemode == v_mode)
|
5899 | c2c73b42 | blueswir1 | { |
5900 | 88103cfe | blueswir1 | bytemode = (prefixes & PREFIX_DATA) ? x_mode : q_mode; |
5901 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
5902 | 88103cfe | blueswir1 | } |
5903 | 88103cfe | blueswir1 | OP_E (bytemode, sizeflag); |
5904 | 88103cfe | blueswir1 | return;
|
5905 | 88103cfe | blueswir1 | } |
5906 | 88103cfe | blueswir1 | |
5907 | 88103cfe | blueswir1 | /* Skip mod/rm byte. */
|
5908 | 88103cfe | blueswir1 | MODRM_CHECK; |
5909 | 88103cfe | blueswir1 | codep++; |
5910 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
5911 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.rm); |
5912 | 88103cfe | blueswir1 | oappend (scratchbuf + intel_syntax); |
5913 | 88103cfe | blueswir1 | } |
5914 | 88103cfe | blueswir1 | |
5915 | 88103cfe | blueswir1 | static void |
5916 | 88103cfe | blueswir1 | OP_MXC (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
5917 | 88103cfe | blueswir1 | { |
5918 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
5919 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%mm%d", modrm.reg); |
5920 | 88103cfe | blueswir1 | oappend (scratchbuf + intel_syntax); |
5921 | 88103cfe | blueswir1 | } |
5922 | 88103cfe | blueswir1 | |
5923 | 88103cfe | blueswir1 | static void |
5924 | 88103cfe | blueswir1 | OP_EX (int bytemode, int sizeflag) |
5925 | 88103cfe | blueswir1 | { |
5926 | 88103cfe | blueswir1 | int add = 0; |
5927 | 88103cfe | blueswir1 | if (modrm.mod != 3) |
5928 | 88103cfe | blueswir1 | { |
5929 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
5930 | bc51c5c9 | bellard | return;
|
5931 | bc51c5c9 | bellard | } |
5932 | 88103cfe | blueswir1 | USED_REX (REX_B); |
5933 | 88103cfe | blueswir1 | if (rex & REX_B)
|
5934 | bc51c5c9 | bellard | add = 8;
|
5935 | bc51c5c9 | bellard | |
5936 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
5937 | bc51c5c9 | bellard | MODRM_CHECK; |
5938 | bc51c5c9 | bellard | codep++; |
5939 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", modrm.rm + add); |
5940 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
5941 | bc51c5c9 | bellard | } |
5942 | bc51c5c9 | bellard | |
5943 | bc51c5c9 | bellard | static void |
5944 | c2c73b42 | blueswir1 | OP_MS (int bytemode, int sizeflag) |
5945 | bc51c5c9 | bellard | { |
5946 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
5947 | bc51c5c9 | bellard | OP_EM (bytemode, sizeflag); |
5948 | bc51c5c9 | bellard | else
|
5949 | bc51c5c9 | bellard | BadOp (); |
5950 | bc51c5c9 | bellard | } |
5951 | bc51c5c9 | bellard | |
5952 | bc51c5c9 | bellard | static void |
5953 | c2c73b42 | blueswir1 | OP_XS (int bytemode, int sizeflag) |
5954 | bc51c5c9 | bellard | { |
5955 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
5956 | bc51c5c9 | bellard | OP_EX (bytemode, sizeflag); |
5957 | bc51c5c9 | bellard | else
|
5958 | bc51c5c9 | bellard | BadOp (); |
5959 | bc51c5c9 | bellard | } |
5960 | bc51c5c9 | bellard | |
5961 | c2c73b42 | blueswir1 | static void |
5962 | c2c73b42 | blueswir1 | OP_M (int bytemode, int sizeflag) |
5963 | c2c73b42 | blueswir1 | { |
5964 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
5965 | 88103cfe | blueswir1 | /* bad bound,lea,lds,les,lfs,lgs,lss,cmpxchg8b,vmptrst modrm */
|
5966 | 88103cfe | blueswir1 | BadOp (); |
5967 | c2c73b42 | blueswir1 | else
|
5968 | c2c73b42 | blueswir1 | OP_E (bytemode, sizeflag); |
5969 | c2c73b42 | blueswir1 | } |
5970 | c2c73b42 | blueswir1 | |
5971 | c2c73b42 | blueswir1 | static void |
5972 | c2c73b42 | blueswir1 | OP_0f07 (int bytemode, int sizeflag) |
5973 | c2c73b42 | blueswir1 | { |
5974 | 88103cfe | blueswir1 | if (modrm.mod != 3 || modrm.rm != 0) |
5975 | c2c73b42 | blueswir1 | BadOp (); |
5976 | c2c73b42 | blueswir1 | else
|
5977 | c2c73b42 | blueswir1 | OP_E (bytemode, sizeflag); |
5978 | c2c73b42 | blueswir1 | } |
5979 | c2c73b42 | blueswir1 | |
5980 | c2c73b42 | blueswir1 | static void |
5981 | c2c73b42 | blueswir1 | OP_0fae (int bytemode, int sizeflag) |
5982 | c2c73b42 | blueswir1 | { |
5983 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
5984 | c2c73b42 | blueswir1 | { |
5985 | 88103cfe | blueswir1 | if (modrm.reg == 7) |
5986 | c2c73b42 | blueswir1 | strcpy (obuf + strlen (obuf) - sizeof ("clflush") + 1, "sfence"); |
5987 | c2c73b42 | blueswir1 | |
5988 | 88103cfe | blueswir1 | if (modrm.reg < 5 || modrm.rm != 0) |
5989 | c2c73b42 | blueswir1 | { |
5990 | c2c73b42 | blueswir1 | BadOp (); /* bad sfence, mfence, or lfence */
|
5991 | c2c73b42 | blueswir1 | return;
|
5992 | c2c73b42 | blueswir1 | } |
5993 | c2c73b42 | blueswir1 | } |
5994 | 88103cfe | blueswir1 | else if (modrm.reg != 7) |
5995 | c2c73b42 | blueswir1 | { |
5996 | c2c73b42 | blueswir1 | BadOp (); /* bad clflush */
|
5997 | c2c73b42 | blueswir1 | return;
|
5998 | c2c73b42 | blueswir1 | } |
5999 | c2c73b42 | blueswir1 | |
6000 | c2c73b42 | blueswir1 | OP_E (bytemode, sizeflag); |
6001 | c2c73b42 | blueswir1 | } |
6002 | c2c73b42 | blueswir1 | |
6003 | 88103cfe | blueswir1 | /* NOP is an alias of "xchg %ax,%ax" in 16bit mode, "xchg %eax,%eax" in
|
6004 | 88103cfe | blueswir1 | 32bit mode and "xchg %rax,%rax" in 64bit mode. */
|
6005 | 88103cfe | blueswir1 | |
6006 | 88103cfe | blueswir1 | static void |
6007 | 88103cfe | blueswir1 | NOP_Fixup1 (int bytemode, int sizeflag) |
6008 | 88103cfe | blueswir1 | { |
6009 | 88103cfe | blueswir1 | if ((prefixes & PREFIX_DATA) != 0 |
6010 | 88103cfe | blueswir1 | || (rex != 0
|
6011 | 88103cfe | blueswir1 | && rex != 0x48
|
6012 | 88103cfe | blueswir1 | && address_mode == mode_64bit)) |
6013 | 88103cfe | blueswir1 | OP_REG (bytemode, sizeflag); |
6014 | 88103cfe | blueswir1 | else
|
6015 | 88103cfe | blueswir1 | strcpy (obuf, "nop");
|
6016 | 88103cfe | blueswir1 | } |
6017 | 88103cfe | blueswir1 | |
6018 | c2c73b42 | blueswir1 | static void |
6019 | 88103cfe | blueswir1 | NOP_Fixup2 (int bytemode, int sizeflag) |
6020 | c2c73b42 | blueswir1 | { |
6021 | 88103cfe | blueswir1 | if ((prefixes & PREFIX_DATA) != 0 |
6022 | 88103cfe | blueswir1 | || (rex != 0
|
6023 | 88103cfe | blueswir1 | && rex != 0x48
|
6024 | 88103cfe | blueswir1 | && address_mode == mode_64bit)) |
6025 | 88103cfe | blueswir1 | OP_IMREG (bytemode, sizeflag); |
6026 | c2c73b42 | blueswir1 | } |
6027 | c2c73b42 | blueswir1 | |
6028 | bc51c5c9 | bellard | static const char *Suffix3DNow[] = { |
6029 | bc51c5c9 | bellard | /* 00 */ NULL, NULL, NULL, NULL, |
6030 | bc51c5c9 | bellard | /* 04 */ NULL, NULL, NULL, NULL, |
6031 | bc51c5c9 | bellard | /* 08 */ NULL, NULL, NULL, NULL, |
6032 | bc51c5c9 | bellard | /* 0C */ "pi2fw", "pi2fd", NULL, NULL, |
6033 | bc51c5c9 | bellard | /* 10 */ NULL, NULL, NULL, NULL, |
6034 | bc51c5c9 | bellard | /* 14 */ NULL, NULL, NULL, NULL, |
6035 | bc51c5c9 | bellard | /* 18 */ NULL, NULL, NULL, NULL, |
6036 | bc51c5c9 | bellard | /* 1C */ "pf2iw", "pf2id", NULL, NULL, |
6037 | bc51c5c9 | bellard | /* 20 */ NULL, NULL, NULL, NULL, |
6038 | bc51c5c9 | bellard | /* 24 */ NULL, NULL, NULL, NULL, |
6039 | bc51c5c9 | bellard | /* 28 */ NULL, NULL, NULL, NULL, |
6040 | bc51c5c9 | bellard | /* 2C */ NULL, NULL, NULL, NULL, |
6041 | bc51c5c9 | bellard | /* 30 */ NULL, NULL, NULL, NULL, |
6042 | bc51c5c9 | bellard | /* 34 */ NULL, NULL, NULL, NULL, |
6043 | bc51c5c9 | bellard | /* 38 */ NULL, NULL, NULL, NULL, |
6044 | bc51c5c9 | bellard | /* 3C */ NULL, NULL, NULL, NULL, |
6045 | bc51c5c9 | bellard | /* 40 */ NULL, NULL, NULL, NULL, |
6046 | bc51c5c9 | bellard | /* 44 */ NULL, NULL, NULL, NULL, |
6047 | bc51c5c9 | bellard | /* 48 */ NULL, NULL, NULL, NULL, |
6048 | bc51c5c9 | bellard | /* 4C */ NULL, NULL, NULL, NULL, |
6049 | bc51c5c9 | bellard | /* 50 */ NULL, NULL, NULL, NULL, |
6050 | bc51c5c9 | bellard | /* 54 */ NULL, NULL, NULL, NULL, |
6051 | bc51c5c9 | bellard | /* 58 */ NULL, NULL, NULL, NULL, |
6052 | bc51c5c9 | bellard | /* 5C */ NULL, NULL, NULL, NULL, |
6053 | bc51c5c9 | bellard | /* 60 */ NULL, NULL, NULL, NULL, |
6054 | bc51c5c9 | bellard | /* 64 */ NULL, NULL, NULL, NULL, |
6055 | bc51c5c9 | bellard | /* 68 */ NULL, NULL, NULL, NULL, |
6056 | bc51c5c9 | bellard | /* 6C */ NULL, NULL, NULL, NULL, |
6057 | bc51c5c9 | bellard | /* 70 */ NULL, NULL, NULL, NULL, |
6058 | bc51c5c9 | bellard | /* 74 */ NULL, NULL, NULL, NULL, |
6059 | bc51c5c9 | bellard | /* 78 */ NULL, NULL, NULL, NULL, |
6060 | bc51c5c9 | bellard | /* 7C */ NULL, NULL, NULL, NULL, |
6061 | bc51c5c9 | bellard | /* 80 */ NULL, NULL, NULL, NULL, |
6062 | bc51c5c9 | bellard | /* 84 */ NULL, NULL, NULL, NULL, |
6063 | bc51c5c9 | bellard | /* 88 */ NULL, NULL, "pfnacc", NULL, |
6064 | bc51c5c9 | bellard | /* 8C */ NULL, NULL, "pfpnacc", NULL, |
6065 | bc51c5c9 | bellard | /* 90 */ "pfcmpge", NULL, NULL, NULL, |
6066 | bc51c5c9 | bellard | /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", |
6067 | bc51c5c9 | bellard | /* 98 */ NULL, NULL, "pfsub", NULL, |
6068 | bc51c5c9 | bellard | /* 9C */ NULL, NULL, "pfadd", NULL, |
6069 | bc51c5c9 | bellard | /* A0 */ "pfcmpgt", NULL, NULL, NULL, |
6070 | bc51c5c9 | bellard | /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", |
6071 | bc51c5c9 | bellard | /* A8 */ NULL, NULL, "pfsubr", NULL, |
6072 | bc51c5c9 | bellard | /* AC */ NULL, NULL, "pfacc", NULL, |
6073 | bc51c5c9 | bellard | /* B0 */ "pfcmpeq", NULL, NULL, NULL, |
6074 | 88103cfe | blueswir1 | /* B4 */ "pfmul", NULL, "pfrcpit2", "pmulhrw", |
6075 | bc51c5c9 | bellard | /* B8 */ NULL, NULL, NULL, "pswapd", |
6076 | bc51c5c9 | bellard | /* BC */ NULL, NULL, NULL, "pavgusb", |
6077 | bc51c5c9 | bellard | /* C0 */ NULL, NULL, NULL, NULL, |
6078 | bc51c5c9 | bellard | /* C4 */ NULL, NULL, NULL, NULL, |
6079 | bc51c5c9 | bellard | /* C8 */ NULL, NULL, NULL, NULL, |
6080 | bc51c5c9 | bellard | /* CC */ NULL, NULL, NULL, NULL, |
6081 | bc51c5c9 | bellard | /* D0 */ NULL, NULL, NULL, NULL, |
6082 | bc51c5c9 | bellard | /* D4 */ NULL, NULL, NULL, NULL, |
6083 | bc51c5c9 | bellard | /* D8 */ NULL, NULL, NULL, NULL, |
6084 | bc51c5c9 | bellard | /* DC */ NULL, NULL, NULL, NULL, |
6085 | bc51c5c9 | bellard | /* E0 */ NULL, NULL, NULL, NULL, |
6086 | bc51c5c9 | bellard | /* E4 */ NULL, NULL, NULL, NULL, |
6087 | bc51c5c9 | bellard | /* E8 */ NULL, NULL, NULL, NULL, |
6088 | bc51c5c9 | bellard | /* EC */ NULL, NULL, NULL, NULL, |
6089 | bc51c5c9 | bellard | /* F0 */ NULL, NULL, NULL, NULL, |
6090 | bc51c5c9 | bellard | /* F4 */ NULL, NULL, NULL, NULL, |
6091 | bc51c5c9 | bellard | /* F8 */ NULL, NULL, NULL, NULL, |
6092 | bc51c5c9 | bellard | /* FC */ NULL, NULL, NULL, NULL, |
6093 | bc51c5c9 | bellard | }; |
6094 | bc51c5c9 | bellard | |
6095 | bc51c5c9 | bellard | static void |
6096 | c2c73b42 | blueswir1 | OP_3DNowSuffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
6097 | bc51c5c9 | bellard | { |
6098 | bc51c5c9 | bellard | const char *mnemonic; |
6099 | bc51c5c9 | bellard | |
6100 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 1);
|
6101 | bc51c5c9 | bellard | /* AMD 3DNow! instructions are specified by an opcode suffix in the
|
6102 | bc51c5c9 | bellard | place where an 8-bit immediate would normally go. ie. the last
|
6103 | bc51c5c9 | bellard | byte of the instruction. */
|
6104 | bc51c5c9 | bellard | obufp = obuf + strlen (obuf); |
6105 | bc51c5c9 | bellard | mnemonic = Suffix3DNow[*codep++ & 0xff];
|
6106 | bc51c5c9 | bellard | if (mnemonic)
|
6107 | bc51c5c9 | bellard | oappend (mnemonic); |
6108 | bc51c5c9 | bellard | else
|
6109 | bc51c5c9 | bellard | { |
6110 | bc51c5c9 | bellard | /* Since a variable sized modrm/sib chunk is between the start
|
6111 | bc51c5c9 | bellard | of the opcode (0x0f0f) and the opcode suffix, we need to do
|
6112 | bc51c5c9 | bellard | all the modrm processing first, and don't know until now that
|
6113 | bc51c5c9 | bellard | we have a bad opcode. This necessitates some cleaning up. */
|
6114 | 88103cfe | blueswir1 | op_out[0][0] = '\0'; |
6115 | 88103cfe | blueswir1 | op_out[1][0] = '\0'; |
6116 | bc51c5c9 | bellard | BadOp (); |
6117 | bc51c5c9 | bellard | } |
6118 | bc51c5c9 | bellard | } |
6119 | bc51c5c9 | bellard | |
6120 | bc51c5c9 | bellard | static const char *simd_cmp_op[] = { |
6121 | bc51c5c9 | bellard | "eq",
|
6122 | bc51c5c9 | bellard | "lt",
|
6123 | bc51c5c9 | bellard | "le",
|
6124 | bc51c5c9 | bellard | "unord",
|
6125 | bc51c5c9 | bellard | "neq",
|
6126 | bc51c5c9 | bellard | "nlt",
|
6127 | bc51c5c9 | bellard | "nle",
|
6128 | bc51c5c9 | bellard | "ord"
|
6129 | bc51c5c9 | bellard | }; |
6130 | bc51c5c9 | bellard | |
6131 | bc51c5c9 | bellard | static void |
6132 | c2c73b42 | blueswir1 | OP_SIMD_Suffix (int bytemode ATTRIBUTE_UNUSED, int sizeflag ATTRIBUTE_UNUSED) |
6133 | bc51c5c9 | bellard | { |
6134 | bc51c5c9 | bellard | unsigned int cmp_type; |
6135 | bc51c5c9 | bellard | |
6136 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 1);
|
6137 | bc51c5c9 | bellard | obufp = obuf + strlen (obuf); |
6138 | bc51c5c9 | bellard | cmp_type = *codep++ & 0xff;
|
6139 | bc51c5c9 | bellard | if (cmp_type < 8) |
6140 | bc51c5c9 | bellard | { |
6141 | bc51c5c9 | bellard | char suffix1 = 'p', suffix2 = 's'; |
6142 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPZ); |
6143 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPZ)
|
6144 | bc51c5c9 | bellard | suffix1 = 's';
|
6145 | bc51c5c9 | bellard | else
|
6146 | bc51c5c9 | bellard | { |
6147 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
6148 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
6149 | bc51c5c9 | bellard | suffix2 = 'd';
|
6150 | bc51c5c9 | bellard | else
|
6151 | bc51c5c9 | bellard | { |
6152 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPNZ); |
6153 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPNZ)
|
6154 | bc51c5c9 | bellard | suffix1 = 's', suffix2 = 'd'; |
6155 | bc51c5c9 | bellard | } |
6156 | bc51c5c9 | bellard | } |
6157 | 363a37d5 | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "cmp%s%c%c", |
6158 | 363a37d5 | blueswir1 | simd_cmp_op[cmp_type], suffix1, suffix2); |
6159 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPZ); |
6160 | bc51c5c9 | bellard | oappend (scratchbuf); |
6161 | bc51c5c9 | bellard | } |
6162 | bc51c5c9 | bellard | else
|
6163 | bc51c5c9 | bellard | { |
6164 | bc51c5c9 | bellard | /* We have a bad extension byte. Clean up. */
|
6165 | 88103cfe | blueswir1 | op_out[0][0] = '\0'; |
6166 | 88103cfe | blueswir1 | op_out[1][0] = '\0'; |
6167 | bc51c5c9 | bellard | BadOp (); |
6168 | bc51c5c9 | bellard | } |
6169 | bc51c5c9 | bellard | } |
6170 | bc51c5c9 | bellard | |
6171 | bc51c5c9 | bellard | static void |
6172 | c2c73b42 | blueswir1 | SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) |
6173 | bc51c5c9 | bellard | { |
6174 | bc51c5c9 | bellard | /* Change movlps/movhps to movhlps/movlhps for 2 register operand
|
6175 | bc51c5c9 | bellard | forms of these instructions. */
|
6176 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
6177 | bc51c5c9 | bellard | { |
6178 | bc51c5c9 | bellard | char *p = obuf + strlen (obuf);
|
6179 | bc51c5c9 | bellard | *(p + 1) = '\0'; |
6180 | bc51c5c9 | bellard | *p = *(p - 1);
|
6181 | bc51c5c9 | bellard | *(p - 1) = *(p - 2); |
6182 | bc51c5c9 | bellard | *(p - 2) = *(p - 3); |
6183 | bc51c5c9 | bellard | *(p - 3) = extrachar;
|
6184 | bc51c5c9 | bellard | } |
6185 | bc51c5c9 | bellard | } |
6186 | bc51c5c9 | bellard | |
6187 | bc51c5c9 | bellard | static void |
6188 | c2c73b42 | blueswir1 | PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) |
6189 | c2c73b42 | blueswir1 | { |
6190 | 88103cfe | blueswir1 | if (modrm.mod == 3 && modrm.reg == 1 && modrm.rm <= 1) |
6191 | c2c73b42 | blueswir1 | { |
6192 | c2c73b42 | blueswir1 | /* Override "sidt". */
|
6193 | c2c73b42 | blueswir1 | size_t olen = strlen (obuf); |
6194 | c2c73b42 | blueswir1 | char *p = obuf + olen - 4; |
6195 | c2c73b42 | blueswir1 | const char * const *names = (address_mode == mode_64bit |
6196 | c2c73b42 | blueswir1 | ? names64 : names32); |
6197 | c2c73b42 | blueswir1 | |
6198 | c2c73b42 | blueswir1 | /* We might have a suffix when disassembling with -Msuffix. */
|
6199 | c2c73b42 | blueswir1 | if (*p == 'i') |
6200 | c2c73b42 | blueswir1 | --p; |
6201 | c2c73b42 | blueswir1 | |
6202 | c2c73b42 | blueswir1 | /* Remove "addr16/addr32" if we aren't in Intel mode. */
|
6203 | c2c73b42 | blueswir1 | if (!intel_syntax
|
6204 | c2c73b42 | blueswir1 | && (prefixes & PREFIX_ADDR) |
6205 | c2c73b42 | blueswir1 | && olen >= (4 + 7) |
6206 | c2c73b42 | blueswir1 | && *(p - 1) == ' ' |
6207 | c2c73b42 | blueswir1 | && strncmp (p - 7, "addr", 4) == 0 |
6208 | c2c73b42 | blueswir1 | && (strncmp (p - 3, "16", 2) == 0 |
6209 | c2c73b42 | blueswir1 | || strncmp (p - 3, "32", 2) == 0)) |
6210 | c2c73b42 | blueswir1 | p -= 7;
|
6211 | c2c73b42 | blueswir1 | |
6212 | 88103cfe | blueswir1 | if (modrm.rm)
|
6213 | c2c73b42 | blueswir1 | { |
6214 | c2c73b42 | blueswir1 | /* mwait %eax,%ecx */
|
6215 | c2c73b42 | blueswir1 | strcpy (p, "mwait");
|
6216 | c2c73b42 | blueswir1 | if (!intel_syntax)
|
6217 | 88103cfe | blueswir1 | strcpy (op_out[0], names[0]); |
6218 | c2c73b42 | blueswir1 | } |
6219 | c2c73b42 | blueswir1 | else
|
6220 | c2c73b42 | blueswir1 | { |
6221 | c2c73b42 | blueswir1 | /* monitor %eax,%ecx,%edx" */
|
6222 | c2c73b42 | blueswir1 | strcpy (p, "monitor");
|
6223 | c2c73b42 | blueswir1 | if (!intel_syntax)
|
6224 | c2c73b42 | blueswir1 | { |
6225 | c2c73b42 | blueswir1 | const char * const *op1_names; |
6226 | c2c73b42 | blueswir1 | if (!(prefixes & PREFIX_ADDR))
|
6227 | c2c73b42 | blueswir1 | op1_names = (address_mode == mode_16bit |
6228 | c2c73b42 | blueswir1 | ? names16 : names); |
6229 | c2c73b42 | blueswir1 | else
|
6230 | c2c73b42 | blueswir1 | { |
6231 | c2c73b42 | blueswir1 | op1_names = (address_mode != mode_32bit |
6232 | c2c73b42 | blueswir1 | ? names32 : names16); |
6233 | c2c73b42 | blueswir1 | used_prefixes |= PREFIX_ADDR; |
6234 | c2c73b42 | blueswir1 | } |
6235 | 88103cfe | blueswir1 | strcpy (op_out[0], op1_names[0]); |
6236 | 88103cfe | blueswir1 | strcpy (op_out[2], names[2]); |
6237 | c2c73b42 | blueswir1 | } |
6238 | c2c73b42 | blueswir1 | } |
6239 | c2c73b42 | blueswir1 | if (!intel_syntax)
|
6240 | c2c73b42 | blueswir1 | { |
6241 | 88103cfe | blueswir1 | strcpy (op_out[1], names[1]); |
6242 | c2c73b42 | blueswir1 | two_source_ops = 1;
|
6243 | c2c73b42 | blueswir1 | } |
6244 | c2c73b42 | blueswir1 | |
6245 | c2c73b42 | blueswir1 | codep++; |
6246 | c2c73b42 | blueswir1 | } |
6247 | c2c73b42 | blueswir1 | else
|
6248 | c2c73b42 | blueswir1 | OP_M (0, sizeflag);
|
6249 | c2c73b42 | blueswir1 | } |
6250 | c2c73b42 | blueswir1 | |
6251 | c2c73b42 | blueswir1 | static void |
6252 | c2c73b42 | blueswir1 | SVME_Fixup (int bytemode, int sizeflag) |
6253 | c2c73b42 | blueswir1 | { |
6254 | c2c73b42 | blueswir1 | const char *alt; |
6255 | c2c73b42 | blueswir1 | char *p;
|
6256 | c2c73b42 | blueswir1 | |
6257 | c2c73b42 | blueswir1 | switch (*codep)
|
6258 | c2c73b42 | blueswir1 | { |
6259 | c2c73b42 | blueswir1 | case 0xd8: |
6260 | c2c73b42 | blueswir1 | alt = "vmrun";
|
6261 | c2c73b42 | blueswir1 | break;
|
6262 | c2c73b42 | blueswir1 | case 0xd9: |
6263 | c2c73b42 | blueswir1 | alt = "vmmcall";
|
6264 | c2c73b42 | blueswir1 | break;
|
6265 | c2c73b42 | blueswir1 | case 0xda: |
6266 | c2c73b42 | blueswir1 | alt = "vmload";
|
6267 | c2c73b42 | blueswir1 | break;
|
6268 | c2c73b42 | blueswir1 | case 0xdb: |
6269 | c2c73b42 | blueswir1 | alt = "vmsave";
|
6270 | c2c73b42 | blueswir1 | break;
|
6271 | c2c73b42 | blueswir1 | case 0xdc: |
6272 | c2c73b42 | blueswir1 | alt = "stgi";
|
6273 | c2c73b42 | blueswir1 | break;
|
6274 | c2c73b42 | blueswir1 | case 0xdd: |
6275 | c2c73b42 | blueswir1 | alt = "clgi";
|
6276 | c2c73b42 | blueswir1 | break;
|
6277 | c2c73b42 | blueswir1 | case 0xde: |
6278 | c2c73b42 | blueswir1 | alt = "skinit";
|
6279 | c2c73b42 | blueswir1 | break;
|
6280 | c2c73b42 | blueswir1 | case 0xdf: |
6281 | c2c73b42 | blueswir1 | alt = "invlpga";
|
6282 | c2c73b42 | blueswir1 | break;
|
6283 | c2c73b42 | blueswir1 | default:
|
6284 | c2c73b42 | blueswir1 | OP_M (bytemode, sizeflag); |
6285 | c2c73b42 | blueswir1 | return;
|
6286 | c2c73b42 | blueswir1 | } |
6287 | c2c73b42 | blueswir1 | /* Override "lidt". */
|
6288 | c2c73b42 | blueswir1 | p = obuf + strlen (obuf) - 4;
|
6289 | c2c73b42 | blueswir1 | /* We might have a suffix. */
|
6290 | c2c73b42 | blueswir1 | if (*p == 'i') |
6291 | c2c73b42 | blueswir1 | --p; |
6292 | c2c73b42 | blueswir1 | strcpy (p, alt); |
6293 | c2c73b42 | blueswir1 | if (!(prefixes & PREFIX_ADDR))
|
6294 | c2c73b42 | blueswir1 | { |
6295 | c2c73b42 | blueswir1 | ++codep; |
6296 | c2c73b42 | blueswir1 | return;
|
6297 | c2c73b42 | blueswir1 | } |
6298 | c2c73b42 | blueswir1 | used_prefixes |= PREFIX_ADDR; |
6299 | c2c73b42 | blueswir1 | switch (*codep++)
|
6300 | c2c73b42 | blueswir1 | { |
6301 | c2c73b42 | blueswir1 | case 0xdf: |
6302 | 88103cfe | blueswir1 | strcpy (op_out[1], names32[1]); |
6303 | c2c73b42 | blueswir1 | two_source_ops = 1;
|
6304 | c2c73b42 | blueswir1 | /* Fall through. */
|
6305 | c2c73b42 | blueswir1 | case 0xd8: |
6306 | c2c73b42 | blueswir1 | case 0xda: |
6307 | c2c73b42 | blueswir1 | case 0xdb: |
6308 | c2c73b42 | blueswir1 | *obufp++ = open_char; |
6309 | c2c73b42 | blueswir1 | if (address_mode == mode_64bit || (sizeflag & AFLAG))
|
6310 | c2c73b42 | blueswir1 | alt = names32[0];
|
6311 | c2c73b42 | blueswir1 | else
|
6312 | c2c73b42 | blueswir1 | alt = names16[0];
|
6313 | c2c73b42 | blueswir1 | strcpy (obufp, alt); |
6314 | c2c73b42 | blueswir1 | obufp += strlen (alt); |
6315 | c2c73b42 | blueswir1 | *obufp++ = close_char; |
6316 | c2c73b42 | blueswir1 | *obufp = '\0';
|
6317 | c2c73b42 | blueswir1 | break;
|
6318 | c2c73b42 | blueswir1 | } |
6319 | c2c73b42 | blueswir1 | } |
6320 | c2c73b42 | blueswir1 | |
6321 | c2c73b42 | blueswir1 | static void |
6322 | c2c73b42 | blueswir1 | INVLPG_Fixup (int bytemode, int sizeflag) |
6323 | c2c73b42 | blueswir1 | { |
6324 | c2c73b42 | blueswir1 | const char *alt; |
6325 | c2c73b42 | blueswir1 | |
6326 | c2c73b42 | blueswir1 | switch (*codep)
|
6327 | c2c73b42 | blueswir1 | { |
6328 | c2c73b42 | blueswir1 | case 0xf8: |
6329 | c2c73b42 | blueswir1 | alt = "swapgs";
|
6330 | c2c73b42 | blueswir1 | break;
|
6331 | c2c73b42 | blueswir1 | case 0xf9: |
6332 | c2c73b42 | blueswir1 | alt = "rdtscp";
|
6333 | c2c73b42 | blueswir1 | break;
|
6334 | c2c73b42 | blueswir1 | default:
|
6335 | c2c73b42 | blueswir1 | OP_M (bytemode, sizeflag); |
6336 | c2c73b42 | blueswir1 | return;
|
6337 | c2c73b42 | blueswir1 | } |
6338 | c2c73b42 | blueswir1 | /* Override "invlpg". */
|
6339 | c2c73b42 | blueswir1 | strcpy (obuf + strlen (obuf) - 6, alt);
|
6340 | c2c73b42 | blueswir1 | codep++; |
6341 | c2c73b42 | blueswir1 | } |
6342 | c2c73b42 | blueswir1 | |
6343 | c2c73b42 | blueswir1 | static void |
6344 | bc51c5c9 | bellard | BadOp (void)
|
6345 | bc51c5c9 | bellard | { |
6346 | bc51c5c9 | bellard | /* Throw away prefixes and 1st. opcode byte. */
|
6347 | bc51c5c9 | bellard | codep = insn_codep + 1;
|
6348 | bc51c5c9 | bellard | oappend ("(bad)");
|
6349 | dc99065b | bellard | } |
6350 | c2c73b42 | blueswir1 | |
6351 | c2c73b42 | blueswir1 | static void |
6352 | c2c73b42 | blueswir1 | VMX_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) |
6353 | c2c73b42 | blueswir1 | { |
6354 | 88103cfe | blueswir1 | if (modrm.mod == 3 |
6355 | 88103cfe | blueswir1 | && modrm.reg == 0
|
6356 | 88103cfe | blueswir1 | && modrm.rm >=1
|
6357 | 88103cfe | blueswir1 | && modrm.rm <= 4)
|
6358 | c2c73b42 | blueswir1 | { |
6359 | c2c73b42 | blueswir1 | /* Override "sgdt". */
|
6360 | c2c73b42 | blueswir1 | char *p = obuf + strlen (obuf) - 4; |
6361 | c2c73b42 | blueswir1 | |
6362 | c2c73b42 | blueswir1 | /* We might have a suffix when disassembling with -Msuffix. */
|
6363 | c2c73b42 | blueswir1 | if (*p == 'g') |
6364 | c2c73b42 | blueswir1 | --p; |
6365 | c2c73b42 | blueswir1 | |
6366 | 88103cfe | blueswir1 | switch (modrm.rm)
|
6367 | c2c73b42 | blueswir1 | { |
6368 | c2c73b42 | blueswir1 | case 1: |
6369 | c2c73b42 | blueswir1 | strcpy (p, "vmcall");
|
6370 | c2c73b42 | blueswir1 | break;
|
6371 | c2c73b42 | blueswir1 | case 2: |
6372 | c2c73b42 | blueswir1 | strcpy (p, "vmlaunch");
|
6373 | c2c73b42 | blueswir1 | break;
|
6374 | c2c73b42 | blueswir1 | case 3: |
6375 | c2c73b42 | blueswir1 | strcpy (p, "vmresume");
|
6376 | c2c73b42 | blueswir1 | break;
|
6377 | c2c73b42 | blueswir1 | case 4: |
6378 | c2c73b42 | blueswir1 | strcpy (p, "vmxoff");
|
6379 | c2c73b42 | blueswir1 | break;
|
6380 | c2c73b42 | blueswir1 | } |
6381 | c2c73b42 | blueswir1 | |
6382 | c2c73b42 | blueswir1 | codep++; |
6383 | c2c73b42 | blueswir1 | } |
6384 | c2c73b42 | blueswir1 | else
|
6385 | c2c73b42 | blueswir1 | OP_E (0, sizeflag);
|
6386 | c2c73b42 | blueswir1 | } |
6387 | c2c73b42 | blueswir1 | |
6388 | c2c73b42 | blueswir1 | static void |
6389 | c2c73b42 | blueswir1 | OP_VMX (int bytemode, int sizeflag) |
6390 | c2c73b42 | blueswir1 | { |
6391 | c2c73b42 | blueswir1 | used_prefixes |= (prefixes & (PREFIX_DATA | PREFIX_REPZ)); |
6392 | c2c73b42 | blueswir1 | if (prefixes & PREFIX_DATA)
|
6393 | c2c73b42 | blueswir1 | strcpy (obuf, "vmclear");
|
6394 | c2c73b42 | blueswir1 | else if (prefixes & PREFIX_REPZ) |
6395 | c2c73b42 | blueswir1 | strcpy (obuf, "vmxon");
|
6396 | c2c73b42 | blueswir1 | else
|
6397 | c2c73b42 | blueswir1 | strcpy (obuf, "vmptrld");
|
6398 | c2c73b42 | blueswir1 | OP_E (bytemode, sizeflag); |
6399 | c2c73b42 | blueswir1 | } |
6400 | c2c73b42 | blueswir1 | |
6401 | c2c73b42 | blueswir1 | static void |
6402 | c2c73b42 | blueswir1 | REP_Fixup (int bytemode, int sizeflag) |
6403 | c2c73b42 | blueswir1 | { |
6404 | c2c73b42 | blueswir1 | /* The 0xf3 prefix should be displayed as "rep" for ins, outs, movs,
|
6405 | c2c73b42 | blueswir1 | lods and stos. */
|
6406 | c2c73b42 | blueswir1 | size_t ilen = 0;
|
6407 | c2c73b42 | blueswir1 | |
6408 | c2c73b42 | blueswir1 | if (prefixes & PREFIX_REPZ)
|
6409 | c2c73b42 | blueswir1 | switch (*insn_codep)
|
6410 | c2c73b42 | blueswir1 | { |
6411 | c2c73b42 | blueswir1 | case 0x6e: /* outsb */ |
6412 | c2c73b42 | blueswir1 | case 0x6f: /* outsw/outsl */ |
6413 | c2c73b42 | blueswir1 | case 0xa4: /* movsb */ |
6414 | c2c73b42 | blueswir1 | case 0xa5: /* movsw/movsl/movsq */ |
6415 | c2c73b42 | blueswir1 | if (!intel_syntax)
|
6416 | c2c73b42 | blueswir1 | ilen = 5;
|
6417 | c2c73b42 | blueswir1 | else
|
6418 | c2c73b42 | blueswir1 | ilen = 4;
|
6419 | c2c73b42 | blueswir1 | break;
|
6420 | c2c73b42 | blueswir1 | case 0xaa: /* stosb */ |
6421 | c2c73b42 | blueswir1 | case 0xab: /* stosw/stosl/stosq */ |
6422 | c2c73b42 | blueswir1 | case 0xac: /* lodsb */ |
6423 | c2c73b42 | blueswir1 | case 0xad: /* lodsw/lodsl/lodsq */ |
6424 | c2c73b42 | blueswir1 | if (!intel_syntax && (sizeflag & SUFFIX_ALWAYS))
|
6425 | c2c73b42 | blueswir1 | ilen = 5;
|
6426 | c2c73b42 | blueswir1 | else
|
6427 | c2c73b42 | blueswir1 | ilen = 4;
|
6428 | c2c73b42 | blueswir1 | break;
|
6429 | c2c73b42 | blueswir1 | case 0x6c: /* insb */ |
6430 | c2c73b42 | blueswir1 | case 0x6d: /* insl/insw */ |
6431 | c2c73b42 | blueswir1 | if (!intel_syntax)
|
6432 | c2c73b42 | blueswir1 | ilen = 4;
|
6433 | c2c73b42 | blueswir1 | else
|
6434 | c2c73b42 | blueswir1 | ilen = 3;
|
6435 | c2c73b42 | blueswir1 | break;
|
6436 | c2c73b42 | blueswir1 | default:
|
6437 | c2c73b42 | blueswir1 | abort (); |
6438 | c2c73b42 | blueswir1 | break;
|
6439 | c2c73b42 | blueswir1 | } |
6440 | c2c73b42 | blueswir1 | |
6441 | c2c73b42 | blueswir1 | if (ilen != 0) |
6442 | c2c73b42 | blueswir1 | { |
6443 | c2c73b42 | blueswir1 | size_t olen; |
6444 | c2c73b42 | blueswir1 | char *p;
|
6445 | c2c73b42 | blueswir1 | |
6446 | c2c73b42 | blueswir1 | olen = strlen (obuf); |
6447 | c2c73b42 | blueswir1 | p = obuf + olen - ilen - 1 - 4; |
6448 | c2c73b42 | blueswir1 | /* Handle "repz [addr16|addr32]". */
|
6449 | c2c73b42 | blueswir1 | if ((prefixes & PREFIX_ADDR))
|
6450 | c2c73b42 | blueswir1 | p -= 1 + 6; |
6451 | c2c73b42 | blueswir1 | |
6452 | c2c73b42 | blueswir1 | memmove (p + 3, p + 4, olen - (p + 3 - obuf)); |
6453 | c2c73b42 | blueswir1 | } |
6454 | c2c73b42 | blueswir1 | |
6455 | c2c73b42 | blueswir1 | switch (bytemode)
|
6456 | c2c73b42 | blueswir1 | { |
6457 | c2c73b42 | blueswir1 | case al_reg:
|
6458 | c2c73b42 | blueswir1 | case eAX_reg:
|
6459 | c2c73b42 | blueswir1 | case indir_dx_reg:
|
6460 | c2c73b42 | blueswir1 | OP_IMREG (bytemode, sizeflag); |
6461 | c2c73b42 | blueswir1 | break;
|
6462 | c2c73b42 | blueswir1 | case eDI_reg:
|
6463 | c2c73b42 | blueswir1 | OP_ESreg (bytemode, sizeflag); |
6464 | c2c73b42 | blueswir1 | break;
|
6465 | c2c73b42 | blueswir1 | case eSI_reg:
|
6466 | c2c73b42 | blueswir1 | OP_DSreg (bytemode, sizeflag); |
6467 | c2c73b42 | blueswir1 | break;
|
6468 | c2c73b42 | blueswir1 | default:
|
6469 | c2c73b42 | blueswir1 | abort (); |
6470 | c2c73b42 | blueswir1 | break;
|
6471 | c2c73b42 | blueswir1 | } |
6472 | c2c73b42 | blueswir1 | } |
6473 | 88103cfe | blueswir1 | |
6474 | 88103cfe | blueswir1 | static void |
6475 | 88103cfe | blueswir1 | CMPXCHG8B_Fixup (int bytemode, int sizeflag) |
6476 | 88103cfe | blueswir1 | { |
6477 | 88103cfe | blueswir1 | USED_REX (REX_W); |
6478 | 88103cfe | blueswir1 | if (rex & REX_W)
|
6479 | 88103cfe | blueswir1 | { |
6480 | 88103cfe | blueswir1 | /* Change cmpxchg8b to cmpxchg16b. */
|
6481 | 88103cfe | blueswir1 | char *p = obuf + strlen (obuf) - 2; |
6482 | 88103cfe | blueswir1 | strcpy (p, "16b");
|
6483 | 88103cfe | blueswir1 | bytemode = o_mode; |
6484 | 88103cfe | blueswir1 | } |
6485 | 88103cfe | blueswir1 | OP_M (bytemode, sizeflag); |
6486 | 88103cfe | blueswir1 | } |
6487 | 88103cfe | blueswir1 | |
6488 | 88103cfe | blueswir1 | static void |
6489 | 88103cfe | blueswir1 | XMM_Fixup (int reg, int sizeflag ATTRIBUTE_UNUSED) |
6490 | 88103cfe | blueswir1 | { |
6491 | 88103cfe | blueswir1 | snprintf (scratchbuf, sizeof(scratchbuf), "%%xmm%d", reg); |
6492 | 88103cfe | blueswir1 | oappend (scratchbuf + intel_syntax); |
6493 | 88103cfe | blueswir1 | } |
6494 | 88103cfe | blueswir1 | |
6495 | 88103cfe | blueswir1 | static void |
6496 | 88103cfe | blueswir1 | CRC32_Fixup (int bytemode, int sizeflag) |
6497 | 88103cfe | blueswir1 | { |
6498 | 88103cfe | blueswir1 | /* Add proper suffix to "crc32". */
|
6499 | 88103cfe | blueswir1 | char *p = obuf + strlen (obuf);
|
6500 | 88103cfe | blueswir1 | |
6501 | 88103cfe | blueswir1 | switch (bytemode)
|
6502 | 88103cfe | blueswir1 | { |
6503 | 88103cfe | blueswir1 | case b_mode:
|
6504 | 88103cfe | blueswir1 | if (intel_syntax)
|
6505 | 88103cfe | blueswir1 | break;
|
6506 | 88103cfe | blueswir1 | |
6507 | 88103cfe | blueswir1 | *p++ = 'b';
|
6508 | 88103cfe | blueswir1 | break;
|
6509 | 88103cfe | blueswir1 | case v_mode:
|
6510 | 88103cfe | blueswir1 | if (intel_syntax)
|
6511 | 88103cfe | blueswir1 | break;
|
6512 | 88103cfe | blueswir1 | |
6513 | 88103cfe | blueswir1 | USED_REX (REX_W); |
6514 | 88103cfe | blueswir1 | if (rex & REX_W)
|
6515 | 88103cfe | blueswir1 | *p++ = 'q';
|
6516 | 88103cfe | blueswir1 | else if (sizeflag & DFLAG) |
6517 | 88103cfe | blueswir1 | *p++ = 'l';
|
6518 | 88103cfe | blueswir1 | else
|
6519 | 88103cfe | blueswir1 | *p++ = 'w';
|
6520 | 88103cfe | blueswir1 | used_prefixes |= (prefixes & PREFIX_DATA); |
6521 | 88103cfe | blueswir1 | break;
|
6522 | 88103cfe | blueswir1 | default:
|
6523 | 88103cfe | blueswir1 | oappend (INTERNAL_DISASSEMBLER_ERROR); |
6524 | 88103cfe | blueswir1 | break;
|
6525 | 88103cfe | blueswir1 | } |
6526 | 88103cfe | blueswir1 | *p = '\0';
|
6527 | 88103cfe | blueswir1 | |
6528 | 88103cfe | blueswir1 | if (modrm.mod == 3) |
6529 | 88103cfe | blueswir1 | { |
6530 | 88103cfe | blueswir1 | int add;
|
6531 | 88103cfe | blueswir1 | |
6532 | 88103cfe | blueswir1 | /* Skip mod/rm byte. */
|
6533 | 88103cfe | blueswir1 | MODRM_CHECK; |
6534 | 88103cfe | blueswir1 | codep++; |
6535 | 88103cfe | blueswir1 | |
6536 | 88103cfe | blueswir1 | USED_REX (REX_B); |
6537 | 88103cfe | blueswir1 | add = (rex & REX_B) ? 8 : 0; |
6538 | 88103cfe | blueswir1 | if (bytemode == b_mode)
|
6539 | 88103cfe | blueswir1 | { |
6540 | 88103cfe | blueswir1 | USED_REX (0);
|
6541 | 88103cfe | blueswir1 | if (rex)
|
6542 | 88103cfe | blueswir1 | oappend (names8rex[modrm.rm + add]); |
6543 | 88103cfe | blueswir1 | else
|
6544 | 88103cfe | blueswir1 | oappend (names8[modrm.rm + add]); |
6545 | 88103cfe | blueswir1 | } |
6546 | 88103cfe | blueswir1 | else
|
6547 | 88103cfe | blueswir1 | { |
6548 | 88103cfe | blueswir1 | USED_REX (REX_W); |
6549 | 88103cfe | blueswir1 | if (rex & REX_W)
|
6550 | 88103cfe | blueswir1 | oappend (names64[modrm.rm + add]); |
6551 | 88103cfe | blueswir1 | else if ((prefixes & PREFIX_DATA)) |
6552 | 88103cfe | blueswir1 | oappend (names16[modrm.rm + add]); |
6553 | 88103cfe | blueswir1 | else
|
6554 | 88103cfe | blueswir1 | oappend (names32[modrm.rm + add]); |
6555 | 88103cfe | blueswir1 | } |
6556 | 88103cfe | blueswir1 | } |
6557 | 88103cfe | blueswir1 | else
|
6558 | 88103cfe | blueswir1 | OP_E (bytemode, sizeflag); |
6559 | 88103cfe | blueswir1 | } |