Revision 9cdd03a7 hw/ide/core.c

b/hw/ide/core.c
381 381

  
382 382
static void ide_rw_error(IDEState *s) {
383 383
    ide_abort_command(s);
384
    ide_set_irq(s);
384
    ide_set_irq(s->bus);
385 385
}
386 386

  
387 387
static void ide_sector_read(IDEState *s)
......
408 408
            return;
409 409
        }
410 410
        ide_transfer_start(s, s->io_buffer, 512 * n, ide_sector_read);
411
        ide_set_irq(s);
411
        ide_set_irq(s->bus);
412 412
        ide_set_sector(s, sector_num + n);
413 413
        s->nsector -= n;
414 414
    }
......
465 465
    ide_transfer_stop(s);
466 466
    s->error = ABRT_ERR;
467 467
    s->status = READY_STAT | ERR_STAT;
468
    ide_set_irq(s);
468
    ide_set_irq(s->bus);
469 469
}
470 470

  
471 471
static int ide_handle_write_error(IDEState *s, int error, int op)
......
565 565
    /* end of transfer ? */
566 566
    if (s->nsector == 0) {
567 567
        s->status = READY_STAT | SEEK_STAT;
568
        ide_set_irq(s);
568
        ide_set_irq(s->bus);
569 569
    eot:
570 570
        bm->status &= ~BM_STATUS_DMAING;
571 571
        bm->status |= BM_STATUS_INT;
......
600 600
static void ide_sector_write_timer_cb(void *opaque)
601 601
{
602 602
    IDEState *s = opaque;
603
    ide_set_irq(s);
603
    ide_set_irq(s->bus);
604 604
}
605 605

  
606 606
static void ide_sector_write(IDEState *s)
......
648 648
    } else 
649 649
#endif
650 650
    {
651
        ide_set_irq(s);
651
        ide_set_irq(s->bus);
652 652
    }
653 653
}
654 654

  
......
705 705
    /* end of transfer ? */
706 706
    if (s->nsector == 0) {
707 707
        s->status = READY_STAT | SEEK_STAT;
708
        ide_set_irq(s);
708
        ide_set_irq(s->bus);
709 709
    eot:
710 710
        bm->status &= ~BM_STATUS_DMAING;
711 711
        bm->status |= BM_STATUS_INT;
......
741 741
    s->error = 0;
742 742
    s->status = READY_STAT | SEEK_STAT;
743 743
    s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
744
    ide_set_irq(s);
744
    ide_set_irq(s->bus);
745 745
}
746 746

  
747 747
void ide_atapi_cmd_error(IDEState *s, int sense_key, int asc)
......
754 754
    s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
755 755
    s->sense_key = sense_key;
756 756
    s->asc = asc;
757
    ide_set_irq(s);
757
    ide_set_irq(s->bus);
758 758
}
759 759

  
760 760
static void ide_atapi_cmd_check_status(IDEState *s)
......
765 765
    s->error = MC_ERR | (SENSE_UNIT_ATTENTION << 4);
766 766
    s->status = ERR_STAT;
767 767
    s->nsector = 0;
768
    ide_set_irq(s);
768
    ide_set_irq(s->bus);
769 769
}
770 770

  
771 771
static inline void cpu_to_ube16(uint8_t *buf, int val)
......
866 866
        ide_transfer_stop(s);
867 867
        s->status = READY_STAT | SEEK_STAT;
868 868
        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
869
        ide_set_irq(s);
869
        ide_set_irq(s->bus);
870 870
#ifdef DEBUG_IDE_ATAPI
871 871
        printf("status=0x%x\n", s->status);
872 872
#endif
......
922 922
            s->packet_transfer_size -= size;
923 923
            s->elementary_transfer_size -= size;
924 924
            s->io_buffer_index += size;
925
            ide_set_irq(s);
925
            ide_set_irq(s->bus);
926 926
#ifdef DEBUG_IDE_ATAPI
927 927
            printf("status=0x%x\n", s->status);
928 928
#endif
......
1003 1003
    if (s->packet_transfer_size <= 0) {
1004 1004
        s->status = READY_STAT | SEEK_STAT;
1005 1005
        s->nsector = (s->nsector & ~7) | ATAPI_INT_REASON_IO | ATAPI_INT_REASON_CD;
1006
        ide_set_irq(s);
1006
        ide_set_irq(s->bus);
1007 1007
    eot:
1008 1008
        bm->status &= ~BM_STATUS_DMAING;
1009 1009
        bm->status |= BM_STATUS_INT;
......
1666 1666
    s->sense_key = SENSE_UNIT_ATTENTION;
1667 1667
    s->asc = ASC_MEDIUM_MAY_HAVE_CHANGED;
1668 1668
    s->cdrom_changed = 1;
1669
    ide_set_irq(s);
1669
    ide_set_irq(s->bus);
1670 1670
}
1671 1671

  
1672 1672
static void ide_cmd_lba48_transform(IDEState *s, int lba48)
......
1792 1792
                }
1793 1793
                ide_abort_command(s);
1794 1794
            }
1795
            ide_set_irq(s);
1795
            ide_set_irq(s->bus);
1796 1796
            break;
1797 1797
        case WIN_SPECIFY:
1798 1798
        case WIN_RECAL:
1799 1799
            s->error = 0;
1800 1800
            s->status = READY_STAT | SEEK_STAT;
1801
            ide_set_irq(s);
1801
            ide_set_irq(s->bus);
1802 1802
            break;
1803 1803
        case WIN_SETMULT:
1804 1804
            if (s->is_cf && s->nsector == 0) {
......
1813 1813
                s->mult_sectors = s->nsector & 0xff;
1814 1814
                s->status = READY_STAT | SEEK_STAT;
1815 1815
            }
1816
            ide_set_irq(s);
1816
            ide_set_irq(s->bus);
1817 1817
            break;
1818 1818
        case WIN_VERIFY_EXT:
1819 1819
	    lba48 = 1;
......
1822 1822
            /* do sector number check ? */
1823 1823
	    ide_cmd_lba48_transform(s, lba48);
1824 1824
            s->status = READY_STAT | SEEK_STAT;
1825
            ide_set_irq(s);
1825
            ide_set_irq(s->bus);
1826 1826
            break;
1827 1827
	case WIN_READ_EXT:
1828 1828
	    lba48 = 1;
......
1897 1897
	    ide_cmd_lba48_transform(s, lba48);
1898 1898
            ide_set_sector(s, s->nb_sectors - 1);
1899 1899
            s->status = READY_STAT | SEEK_STAT;
1900
            ide_set_irq(s);
1900
            ide_set_irq(s->bus);
1901 1901
            break;
1902 1902
        case WIN_CHECKPOWERMODE1:
1903 1903
        case WIN_CHECKPOWERMODE2:
1904 1904
            s->nsector = 0xff; /* device active or idle */
1905 1905
            s->status = READY_STAT | SEEK_STAT;
1906
            ide_set_irq(s);
1906
            ide_set_irq(s->bus);
1907 1907
            break;
1908 1908
        case WIN_SETFEATURES:
1909 1909
            if (!s->bs)
......
1925 1925
            case 0x42: /* enable Automatic Acoustic Mode */
1926 1926
            case 0xc2: /* disable Automatic Acoustic Mode */
1927 1927
                s->status = READY_STAT | SEEK_STAT;
1928
                ide_set_irq(s);
1928
                ide_set_irq(s->bus);
1929 1929
                break;
1930 1930
            case 0x03: { /* set transfer mode */
1931 1931
		uint8_t val = s->nsector & 0x07;
......
1956 1956
			goto abort_cmd;
1957 1957
		}
1958 1958
                s->status = READY_STAT | SEEK_STAT;
1959
                ide_set_irq(s);
1959
                ide_set_irq(s->bus);
1960 1960
                break;
1961 1961
	    }
1962 1962
            default:
......
1968 1968
            if (s->bs)
1969 1969
                bdrv_flush(s->bs);
1970 1970
	    s->status = READY_STAT | SEEK_STAT;
1971
            ide_set_irq(s);
1971
            ide_set_irq(s->bus);
1972 1972
            break;
1973 1973
        case WIN_STANDBY:
1974 1974
        case WIN_STANDBY2:
......
1981 1981
        case WIN_SLEEPNOW1:
1982 1982
        case WIN_SLEEPNOW2:
1983 1983
            s->status = READY_STAT;
1984
            ide_set_irq(s);
1984
            ide_set_irq(s->bus);
1985 1985
            break;
1986 1986
        case WIN_SEEK:
1987 1987
            if(s->is_cdrom)
1988 1988
                goto abort_cmd;
1989 1989
            /* XXX: Check that seek is within bounds */
1990 1990
            s->status = READY_STAT | SEEK_STAT;
1991
            ide_set_irq(s);
1991
            ide_set_irq(s->bus);
1992 1992
            break;
1993 1993
            /* ATAPI commands */
1994 1994
        case WIN_PIDENTIFY:
......
1999 1999
            } else {
2000 2000
                ide_abort_command(s);
2001 2001
            }
2002
            ide_set_irq(s);
2002
            ide_set_irq(s->bus);
2003 2003
            break;
2004 2004
        case WIN_DIAGNOSE:
2005 2005
            ide_set_signature(s);
......
2012 2012
            s->error = 0x01; /* Device 0 passed, Device 1 passed or not
2013 2013
                              * present. 
2014 2014
                              */
2015
            ide_set_irq(s);
2015
            ide_set_irq(s->bus);
2016 2016
            break;
2017 2017
        case WIN_SRST:
2018 2018
            if (!s->is_cdrom)
......
2039 2039
                goto abort_cmd;
2040 2040
            s->error = 0x09;    /* miscellaneous error */
2041 2041
            s->status = READY_STAT | SEEK_STAT;
2042
            ide_set_irq(s);
2042
            ide_set_irq(s->bus);
2043 2043
            break;
2044 2044
        case CFA_ERASE_SECTORS:
2045 2045
        case CFA_WEAR_LEVEL:
......
2051 2051
                s->media_changed = 1;
2052 2052
            s->error = 0x00;
2053 2053
            s->status = READY_STAT | SEEK_STAT;
2054
            ide_set_irq(s);
2054
            ide_set_irq(s->bus);
2055 2055
            break;
2056 2056
        case CFA_TRANSLATE_SECTOR:
2057 2057
            if (!s->is_cf)
......
2071 2071
            s->io_buffer[0x19] = 0x00;				/* Hot count */
2072 2072
            s->io_buffer[0x1a] = 0x01;				/* Hot count */
2073 2073
            ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2074
            ide_set_irq(s);
2074
            ide_set_irq(s->bus);
2075 2075
            break;
2076 2076
        case CFA_ACCESS_METADATA_STORAGE:
2077 2077
            if (!s->is_cf)
......
2091 2091
            }
2092 2092
            ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2093 2093
            s->status = 0x00; /* NOTE: READY is _not_ set */
2094
            ide_set_irq(s);
2094
            ide_set_irq(s->bus);
2095 2095
            break;
2096 2096
        case IBM_SENSE_CONDITION:
2097 2097
            if (!s->is_cf)
......
2104 2104
                goto abort_cmd;
2105 2105
            }
2106 2106
            s->status = READY_STAT | SEEK_STAT;
2107
            ide_set_irq(s);
2107
            ide_set_irq(s->bus);
2108 2108
            break;
2109 2109

  
2110 2110
	case WIN_SMART:
......
2118 2118
	    case SMART_DISABLE:
2119 2119
		s->smart_enabled = 0;
2120 2120
		s->status = READY_STAT | SEEK_STAT;
2121
		ide_set_irq(s);
2121
		ide_set_irq(s->bus);
2122 2122
		break;
2123 2123
	    case SMART_ENABLE:
2124 2124
		s->smart_enabled = 1;
2125 2125
		s->status = READY_STAT | SEEK_STAT;
2126
		ide_set_irq(s);
2126
		ide_set_irq(s->bus);
2127 2127
		break;
2128 2128
	    case SMART_ATTR_AUTOSAVE:
2129 2129
		switch (s->sector) {
......
2137 2137
		    goto abort_cmd;
2138 2138
		}
2139 2139
		s->status = READY_STAT | SEEK_STAT;
2140
		ide_set_irq(s);
2140
		ide_set_irq(s->bus);
2141 2141
		break;
2142 2142
	    case SMART_STATUS:
2143 2143
		if (!s->smart_errors) {
......
2148 2148
		    s->lcyl = 0xf4;
2149 2149
		}
2150 2150
		s->status = READY_STAT | SEEK_STAT;
2151
		ide_set_irq(s);
2151
		ide_set_irq(s->bus);
2152 2152
		break;
2153 2153
	    case SMART_READ_THRESH:
2154 2154
		memset(s->io_buffer, 0, 0x200);
......
2164 2164
		s->io_buffer[511] = 0x100 - s->io_buffer[511];
2165 2165
		s->status = READY_STAT | SEEK_STAT;
2166 2166
		ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2167
		ide_set_irq(s);
2167
		ide_set_irq(s->bus);
2168 2168
		break;
2169 2169
	    case SMART_READ_DATA:
2170 2170
		memset(s->io_buffer, 0, 0x200);
......
2202 2202
		s->io_buffer[511] = 0x100 - s->io_buffer[511];
2203 2203
		s->status = READY_STAT | SEEK_STAT;
2204 2204
		ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2205
		ide_set_irq(s);
2205
		ide_set_irq(s->bus);
2206 2206
		break;
2207 2207
	    case SMART_READ_LOG:
2208 2208
		switch (s->sector) {
......
2236 2236
		}
2237 2237
		s->status = READY_STAT | SEEK_STAT;
2238 2238
		ide_transfer_start(s, s->io_buffer, 0x200, ide_transfer_stop);
2239
		ide_set_irq(s);
2239
		ide_set_irq(s->bus);
2240 2240
		break;
2241 2241
	    case SMART_EXECUTE_OFFLINE:
2242 2242
		switch (s->sector) {
......
2252 2252
		    s->smart_selftest_data[n+2] = 0x34; /* hour count lsb */
2253 2253
		    s->smart_selftest_data[n+3] = 0x12; /* hour count msb */
2254 2254
		    s->status = READY_STAT | SEEK_STAT;
2255
		    ide_set_irq(s);
2255
		    ide_set_irq(s->bus);
2256 2256
		    break;
2257 2257
		default:
2258 2258
		    goto abort_cmd;
......
2265 2265
        default:
2266 2266
        abort_cmd:
2267 2267
            ide_abort_command(s);
2268
            ide_set_irq(s);
2268
            ide_set_irq(s->bus);
2269 2269
            break;
2270 2270
        }
2271 2271
    }
......
2340 2340
            ret = 0;
2341 2341
        else
2342 2342
            ret = s->status;
2343
        qemu_irq_lower(s->irq);
2343
        qemu_irq_lower(bus->irq);
2344 2344
        break;
2345 2345
    }
2346 2346
#ifdef DEBUG_IDE
......
2376 2376
    printf("ide: write control addr=0x%x val=%02x\n", addr, val);
2377 2377
#endif
2378 2378
    /* common for both drives */
2379
    if (!(bus->ifs[0].cmd & IDE_CMD_RESET) &&
2379
    if (!(bus->cmd & IDE_CMD_RESET) &&
2380 2380
        (val & IDE_CMD_RESET)) {
2381 2381
        /* reset low to high */
2382 2382
        for(i = 0;i < 2; i++) {
......
2384 2384
            s->status = BUSY_STAT | SEEK_STAT;
2385 2385
            s->error = 0x01;
2386 2386
        }
2387
    } else if ((bus->ifs[0].cmd & IDE_CMD_RESET) &&
2387
    } else if ((bus->cmd & IDE_CMD_RESET) &&
2388 2388
               !(val & IDE_CMD_RESET)) {
2389 2389
        /* high to low */
2390 2390
        for(i = 0;i < 2; i++) {
......
2397 2397
        }
2398 2398
    }
2399 2399

  
2400
    bus->ifs[0].cmd = val;
2401
    bus->ifs[1].cmd = val;
2400
    bus->cmd = val;
2402 2401
}
2403 2402

  
2404 2403
void ide_data_writew(void *opaque, uint32_t addr, uint32_t val)
......
2548 2547
        if (strlen(s->drive_serial_str) == 0)
2549 2548
            snprintf(s->drive_serial_str, sizeof(s->drive_serial_str),
2550 2549
                    "QM%05d", s->drive_serial);
2551
        s->irq = irq;
2552 2550
        s->sector_write_timer = qemu_new_timer(vm_clock,
2553 2551
                                               ide_sector_write_timer_cb, s);
2554 2552
        ide_reset(s);
2555 2553
    }
2554
    bus->irq = irq;
2556 2555
}
2557 2556

  
2558 2557
void ide_init_ioport(IDEBus *bus, int iobase, int iobase2)
......
2637 2636

  
2638 2637
void idebus_save(QEMUFile* f, IDEBus *bus)
2639 2638
{
2640
    IDEState *s = idebus_active_if(bus);
2641
    qemu_put_8s(f, &s->cmd);
2639
    qemu_put_8s(f, &bus->cmd);
2642 2640
    qemu_put_8s(f, &bus->unit);
2643 2641
}
2644 2642

  
2645 2643
void idebus_load(QEMUFile* f, IDEBus *bus, int version_id)
2646 2644
{
2647
    IDEState *s;
2648
    uint8_t cmd;
2649

  
2650
    qemu_get_8s(f, &cmd);
2645
    qemu_get_8s(f, &bus->cmd);
2651 2646
    qemu_get_8s(f, &bus->unit);
2652
    s = idebus_active_if(bus);
2653
    s->cmd = cmd;
2654 2647
}
2655 2648

  
2656 2649
/***********************************************************/

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