root / target-arm / op_mem.h @ 9ee6e8bb
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1 | b5ff1b31 | bellard | /* ARM memory operations. */
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2 | b5ff1b31 | bellard | |
3 | 9ee6e8bb | pbrook | void helper_ld(uint32_t);
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4 | b5ff1b31 | bellard | /* Load from address T1 into T0. */
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5 | b5ff1b31 | bellard | #define MEM_LD_OP(name) \
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6 | b5ff1b31 | bellard | void OPPROTO glue(op_ld##name,MEMSUFFIX)(void) \ |
7 | b5ff1b31 | bellard | { \ |
8 | b5ff1b31 | bellard | T0 = glue(ld##name,MEMSUFFIX)(T1); \ |
9 | b5ff1b31 | bellard | FORCE_RET(); \ |
10 | b5ff1b31 | bellard | } |
11 | b5ff1b31 | bellard | |
12 | b5ff1b31 | bellard | MEM_LD_OP(ub) |
13 | b5ff1b31 | bellard | MEM_LD_OP(sb) |
14 | b5ff1b31 | bellard | MEM_LD_OP(uw) |
15 | b5ff1b31 | bellard | MEM_LD_OP(sw) |
16 | b5ff1b31 | bellard | MEM_LD_OP(l) |
17 | b5ff1b31 | bellard | |
18 | b5ff1b31 | bellard | #undef MEM_LD_OP
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19 | b5ff1b31 | bellard | |
20 | b5ff1b31 | bellard | /* Store T0 to address T1. */
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21 | b5ff1b31 | bellard | #define MEM_ST_OP(name) \
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22 | b5ff1b31 | bellard | void OPPROTO glue(op_st##name,MEMSUFFIX)(void) \ |
23 | b5ff1b31 | bellard | { \ |
24 | b5ff1b31 | bellard | glue(st##name,MEMSUFFIX)(T1, T0); \ |
25 | b5ff1b31 | bellard | FORCE_RET(); \ |
26 | b5ff1b31 | bellard | } |
27 | b5ff1b31 | bellard | |
28 | b5ff1b31 | bellard | MEM_ST_OP(b) |
29 | b5ff1b31 | bellard | MEM_ST_OP(w) |
30 | b5ff1b31 | bellard | MEM_ST_OP(l) |
31 | b5ff1b31 | bellard | |
32 | b5ff1b31 | bellard | #undef MEM_ST_OP
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33 | b5ff1b31 | bellard | |
34 | b5ff1b31 | bellard | /* Swap T0 with memory at address T1. */
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35 | b5ff1b31 | bellard | /* ??? Is this exception safe? */
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36 | b5ff1b31 | bellard | #define MEM_SWP_OP(name, lname) \
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37 | b5ff1b31 | bellard | void OPPROTO glue(op_swp##name,MEMSUFFIX)(void) \ |
38 | b5ff1b31 | bellard | { \ |
39 | b5ff1b31 | bellard | uint32_t tmp; \ |
40 | b5ff1b31 | bellard | cpu_lock(); \ |
41 | b5ff1b31 | bellard | tmp = glue(ld##lname,MEMSUFFIX)(T1); \ |
42 | b5ff1b31 | bellard | glue(st##name,MEMSUFFIX)(T1, T0); \ |
43 | b5ff1b31 | bellard | T0 = tmp; \ |
44 | b5ff1b31 | bellard | cpu_unlock(); \ |
45 | b5ff1b31 | bellard | FORCE_RET(); \ |
46 | b5ff1b31 | bellard | } |
47 | b5ff1b31 | bellard | |
48 | b5ff1b31 | bellard | MEM_SWP_OP(b, ub) |
49 | b5ff1b31 | bellard | MEM_SWP_OP(l, l) |
50 | b5ff1b31 | bellard | |
51 | b5ff1b31 | bellard | #undef MEM_SWP_OP
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52 | b5ff1b31 | bellard | |
53 | 9ee6e8bb | pbrook | /* Load-locked, store exclusive. */
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54 | 9ee6e8bb | pbrook | #define EXCLUSIVE_OP(suffix, ldsuffix) \
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55 | 9ee6e8bb | pbrook | void OPPROTO glue(op_ld##suffix##ex,MEMSUFFIX)(void) \ |
56 | 9ee6e8bb | pbrook | { \ |
57 | 9ee6e8bb | pbrook | cpu_lock(); \ |
58 | 9ee6e8bb | pbrook | helper_mark_exclusive(env, T1); \ |
59 | 9ee6e8bb | pbrook | T0 = glue(ld##ldsuffix,MEMSUFFIX)(T1); \ |
60 | 9ee6e8bb | pbrook | cpu_unlock(); \ |
61 | 9ee6e8bb | pbrook | FORCE_RET(); \ |
62 | 9ee6e8bb | pbrook | } \ |
63 | 9ee6e8bb | pbrook | \ |
64 | 9ee6e8bb | pbrook | void OPPROTO glue(op_st##suffix##ex,MEMSUFFIX)(void) \ |
65 | 9ee6e8bb | pbrook | { \ |
66 | 9ee6e8bb | pbrook | int failed; \
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67 | 9ee6e8bb | pbrook | cpu_lock(); \ |
68 | 9ee6e8bb | pbrook | failed = helper_test_exclusive(env, T1); \ |
69 | 9ee6e8bb | pbrook | /* ??? Is it safe to hold the cpu lock over a store? */ \
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70 | 9ee6e8bb | pbrook | if (!failed) { \
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71 | 9ee6e8bb | pbrook | glue(st##suffix,MEMSUFFIX)(T1, T0); \ |
72 | 9ee6e8bb | pbrook | } \ |
73 | 9ee6e8bb | pbrook | T0 = failed; \ |
74 | 9ee6e8bb | pbrook | cpu_unlock(); \ |
75 | 9ee6e8bb | pbrook | FORCE_RET(); \ |
76 | 9ee6e8bb | pbrook | } |
77 | 9ee6e8bb | pbrook | |
78 | 9ee6e8bb | pbrook | EXCLUSIVE_OP(b, ub) |
79 | 9ee6e8bb | pbrook | EXCLUSIVE_OP(w, uw) |
80 | 9ee6e8bb | pbrook | EXCLUSIVE_OP(l, l) |
81 | 9ee6e8bb | pbrook | |
82 | 9ee6e8bb | pbrook | #undef EXCLUSIVE_OP
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83 | 9ee6e8bb | pbrook | |
84 | 9ee6e8bb | pbrook | /* Load exclusive T0:T1 from address T1. */
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85 | 9ee6e8bb | pbrook | void OPPROTO glue(op_ldqex,MEMSUFFIX)(void) |
86 | 9ee6e8bb | pbrook | { |
87 | 9ee6e8bb | pbrook | cpu_lock(); |
88 | 9ee6e8bb | pbrook | helper_mark_exclusive(env, T1); |
89 | 9ee6e8bb | pbrook | T0 = glue(ldl,MEMSUFFIX)(T1); |
90 | 9ee6e8bb | pbrook | T1 = glue(ldl,MEMSUFFIX)((T1 + 4));
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91 | 9ee6e8bb | pbrook | cpu_unlock(); |
92 | 9ee6e8bb | pbrook | FORCE_RET(); |
93 | 9ee6e8bb | pbrook | } |
94 | 9ee6e8bb | pbrook | |
95 | 9ee6e8bb | pbrook | /* Store exclusive T0:T2 to address T1. */
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96 | 9ee6e8bb | pbrook | void OPPROTO glue(op_stqex,MEMSUFFIX)(void) |
97 | 9ee6e8bb | pbrook | { |
98 | 9ee6e8bb | pbrook | int failed;
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99 | 9ee6e8bb | pbrook | cpu_lock(); |
100 | 9ee6e8bb | pbrook | failed = helper_test_exclusive(env, T1); |
101 | 9ee6e8bb | pbrook | /* ??? Is it safe to hold the cpu lock over a store? */
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102 | 9ee6e8bb | pbrook | if (!failed) {
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103 | 9ee6e8bb | pbrook | glue(stl,MEMSUFFIX)(T1, T0); |
104 | 9ee6e8bb | pbrook | glue(stl,MEMSUFFIX)((T1 + 4), T2);
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105 | 9ee6e8bb | pbrook | } |
106 | 9ee6e8bb | pbrook | T0 = failed; |
107 | 9ee6e8bb | pbrook | cpu_unlock(); |
108 | 9ee6e8bb | pbrook | FORCE_RET(); |
109 | 9ee6e8bb | pbrook | } |
110 | 9ee6e8bb | pbrook | |
111 | b5ff1b31 | bellard | /* Floating point load/store. Address is in T1 */
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112 | b5ff1b31 | bellard | #define VFP_MEM_OP(p, w) \
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113 | b5ff1b31 | bellard | void OPPROTO glue(op_vfp_ld##p,MEMSUFFIX)(void) \ |
114 | b5ff1b31 | bellard | { \ |
115 | b5ff1b31 | bellard | FT0##p = glue(ldf##w,MEMSUFFIX)(T1); \ |
116 | b5ff1b31 | bellard | FORCE_RET(); \ |
117 | b5ff1b31 | bellard | } \ |
118 | b5ff1b31 | bellard | void OPPROTO glue(op_vfp_st##p,MEMSUFFIX)(void) \ |
119 | b5ff1b31 | bellard | { \ |
120 | b5ff1b31 | bellard | glue(stf##w,MEMSUFFIX)(T1, FT0##p); \ |
121 | b5ff1b31 | bellard | FORCE_RET(); \ |
122 | b5ff1b31 | bellard | } |
123 | b5ff1b31 | bellard | |
124 | b5ff1b31 | bellard | VFP_MEM_OP(s,l) |
125 | b5ff1b31 | bellard | VFP_MEM_OP(d,q) |
126 | b5ff1b31 | bellard | |
127 | b5ff1b31 | bellard | #undef VFP_MEM_OP
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128 | b5ff1b31 | bellard | |
129 | 18c9b560 | balrog | /* iwMMXt load/store. Address is in T1 */
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130 | 18c9b560 | balrog | #define MMX_MEM_OP(name, ldname) \
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131 | 18c9b560 | balrog | void OPPROTO glue(op_iwmmxt_ld##name,MEMSUFFIX)(void) \ |
132 | 18c9b560 | balrog | { \ |
133 | 18c9b560 | balrog | M0 = glue(ld##ldname,MEMSUFFIX)(T1); \ |
134 | 18c9b560 | balrog | FORCE_RET(); \ |
135 | 18c9b560 | balrog | } \ |
136 | 18c9b560 | balrog | void OPPROTO glue(op_iwmmxt_st##name,MEMSUFFIX)(void) \ |
137 | 18c9b560 | balrog | { \ |
138 | 18c9b560 | balrog | glue(st##name,MEMSUFFIX)(T1, M0); \ |
139 | 18c9b560 | balrog | FORCE_RET(); \ |
140 | 18c9b560 | balrog | } |
141 | 18c9b560 | balrog | |
142 | 18c9b560 | balrog | MMX_MEM_OP(b, ub) |
143 | 18c9b560 | balrog | MMX_MEM_OP(w, uw) |
144 | 18c9b560 | balrog | MMX_MEM_OP(l, l) |
145 | 18c9b560 | balrog | MMX_MEM_OP(q, q) |
146 | 18c9b560 | balrog | |
147 | 18c9b560 | balrog | #undef MMX_MEM_OP
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148 | 18c9b560 | balrog | |
149 | b5ff1b31 | bellard | #undef MEMSUFFIX |