Revision 9ee6e8bb hw/arm_boot.c
b/hw/arm_boot.c | ||
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/* |
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* ARM kernel loader. |
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* |
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* Copyright (c) 2006 CodeSourcery. |
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* Copyright (c) 2006-2007 CodeSourcery.
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* Written by Paul Brook |
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* |
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* This code is licenced under the GPL. |
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0 /* Kernel entry point. Set by integratorcp_init. */ |
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}; |
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/* Entry point for secondary CPUs. Enable interrupt controller and |
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Issue WFI until start address is written to system controller. */ |
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static uint32_t smpboot[] = { |
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0xe3a00201, /* mov r0, #0x10000000 */ |
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0xe3800601, /* orr r0, r0, #0x001000000 */ |
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0xe3a01001, /* mov r1, #1 */ |
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0xe5801100, /* str r1, [r0, #0x100] */ |
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0xe3a00201, /* mov r0, #0x10000000 */ |
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0xe3800030, /* orr r0, #0x30 */ |
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0xe320f003, /* wfi */ |
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0xe5901000, /* ldr r1, [r0] */ |
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0xe3110003, /* tst r1, #3 */ |
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0x1afffffb, /* bne <wfi> */ |
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0xe12fff11 /* bx r1 */ |
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}; |
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static void main_cpu_reset(void *opaque) |
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{ |
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CPUState *env = opaque; |
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arm_load_kernel(env, env->ram_size, env->kernel_filename, |
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env->kernel_cmdline, env->initrd_filename, |
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env->board_id, env->loader_start); |
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/* TODO: Reset secondary CPUs. */ |
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} |
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static void set_kernel_args(uint32_t ram_size, int initrd_size, |
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bootloader[6] = entry; |
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for (n = 0; n < sizeof(bootloader) / 4; n++) |
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stl_raw(phys_ram_base + (n * 4), bootloader[n]); |
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for (n = 0; n < sizeof(smpboot) / 4; n++) |
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stl_raw(phys_ram_base + ram_size + (n * 4), smpboot[n]); |
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if (old_param) |
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set_kernel_args_old(ram_size, initrd_size, |
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kernel_cmdline, loader_start); |
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