Revision 9f5a1fae target-cris/mmu.c
| b/target-cris/mmu.c | ||
|---|---|---|
| 135 | 135 |
/* rw 0 = read, 1 = write, 2 = exec. */ |
| 136 | 136 |
static int cris_mmu_translate_page(struct cris_mmu_result *res, |
| 137 | 137 |
CPUState *env, uint32_t vaddr, |
| 138 |
int rw, int usermode) |
|
| 138 |
int rw, int usermode, int debug)
|
|
| 139 | 139 |
{
|
| 140 | 140 |
unsigned int vpage; |
| 141 | 141 |
unsigned int idx; |
| ... | ... | |
| 261 | 261 |
set = env->mmu_rand_lfsr & 3; |
| 262 | 262 |
} |
| 263 | 263 |
|
| 264 |
if (!match) {
|
|
| 264 |
if (!match && !debug) {
|
|
| 265 | 265 |
cris_mmu_update_rand_lfsr(env); |
| 266 | 266 |
|
| 267 | 267 |
/* Compute index. */ |
| ... | ... | |
| 330 | 330 |
|
| 331 | 331 |
int cris_mmu_translate(struct cris_mmu_result *res, |
| 332 | 332 |
CPUState *env, uint32_t vaddr, |
| 333 |
int rw, int mmu_idx) |
|
| 333 |
int rw, int mmu_idx, int debug)
|
|
| 334 | 334 |
{
|
| 335 | 335 |
int seg; |
| 336 | 336 |
int miss = 0; |
| ... | ... | |
| 357 | 357 |
base = cris_mmu_translate_seg(env, seg); |
| 358 | 358 |
res->phy = base | (0x0fffffff & vaddr); |
| 359 | 359 |
res->prot = PAGE_BITS; |
| 360 |
} else {
|
|
| 361 |
miss = cris_mmu_translate_page(res, env, vaddr, rw, |
|
| 362 |
is_user, debug); |
|
| 360 | 363 |
} |
| 361 |
else |
|
| 362 |
miss = cris_mmu_translate_page(res, env, vaddr, rw, is_user); |
|
| 363 | 364 |
done: |
| 364 | 365 |
env->pregs[PR_SRS] = old_srs; |
| 365 | 366 |
return miss; |
Also available in: Unified diff