Revision 9fc7577a hw/etraxfs_eth.c
| b/hw/etraxfs_eth.c | ||
|---|---|---|
| 35 | 35 |
#define ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */ |
| 36 | 36 |
#define ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */ |
| 37 | 37 |
|
| 38 |
/*
|
|
| 39 |
* The MDIO extensions in the TDK PHY model were reversed engineered from the
|
|
| 38 |
/* |
|
| 39 |
* The MDIO extensions in the TDK PHY model were reversed engineered from the |
|
| 40 | 40 |
* linux driver (PHYID and Diagnostics reg). |
| 41 | 41 |
* TODO: Add friendly names for the register nums. |
| 42 | 42 |
*/ |
| 43 | 43 |
struct qemu_phy |
| 44 | 44 |
{
|
| 45 |
uint32_t regs[32];
|
|
| 45 |
uint32_t regs[32];
|
|
| 46 | 46 |
|
| 47 |
int link;
|
|
| 47 |
int link;
|
|
| 48 | 48 |
|
| 49 |
unsigned int (*read)(struct qemu_phy *phy, unsigned int req); |
|
| 50 |
void (*write)(struct qemu_phy *phy, unsigned int req, |
|
| 51 |
unsigned int data); |
|
| 49 |
unsigned int (*read)(struct qemu_phy *phy, unsigned int req); |
|
| 50 |
void (*write)(struct qemu_phy *phy, unsigned int req, unsigned int data); |
|
| 52 | 51 |
}; |
| 53 | 52 |
|
| 54 | 53 |
static unsigned int tdk_read(struct qemu_phy *phy, unsigned int req) |
| 55 | 54 |
{
|
| 56 |
int regnum; |
|
| 57 |
unsigned r = 0; |
|
| 58 |
|
|
| 59 |
regnum = req & 0x1f; |
|
| 60 |
|
|
| 61 |
switch (regnum) {
|
|
| 62 |
case 1: |
|
| 63 |
if (!phy->link) |
|
| 64 |
break; |
|
| 65 |
/* MR1. */ |
|
| 66 |
/* Speeds and modes. */ |
|
| 67 |
r |= (1 << 13) | (1 << 14); |
|
| 68 |
r |= (1 << 11) | (1 << 12); |
|
| 69 |
r |= (1 << 5); /* Autoneg complete. */ |
|
| 70 |
r |= (1 << 3); /* Autoneg able. */ |
|
| 71 |
r |= (1 << 2); /* link. */ |
|
| 72 |
break; |
|
| 73 |
case 5: |
|
| 74 |
/* Link partner ability. |
|
| 75 |
We are kind; always agree with whatever best mode |
|
| 76 |
the guest advertises. */ |
|
| 77 |
r = 1 << 14; /* Success. */ |
|
| 78 |
/* Copy advertised modes. */ |
|
| 79 |
r |= phy->regs[4] & (15 << 5); |
|
| 80 |
/* Autoneg support. */ |
|
| 81 |
r |= 1; |
|
| 82 |
break; |
|
| 83 |
case 18: |
|
| 84 |
{
|
|
| 85 |
/* Diagnostics reg. */ |
|
| 86 |
int duplex = 0; |
|
| 87 |
int speed_100 = 0; |
|
| 88 |
|
|
| 89 |
if (!phy->link) |
|
| 90 |
break; |
|
| 91 |
|
|
| 92 |
/* Are we advertising 100 half or 100 duplex ? */ |
|
| 93 |
speed_100 = !!(phy->regs[4] & ADVERTISE_100HALF); |
|
| 94 |
speed_100 |= !!(phy->regs[4] & ADVERTISE_100FULL); |
|
| 95 |
|
|
| 96 |
/* Are we advertising 10 duplex or 100 duplex ? */ |
|
| 97 |
duplex = !!(phy->regs[4] & ADVERTISE_100FULL); |
|
| 98 |
duplex |= !!(phy->regs[4] & ADVERTISE_10FULL); |
|
| 99 |
r = (speed_100 << 10) | (duplex << 11); |
|
| 100 |
} |
|
| 101 |
break; |
|
| 102 |
|
|
| 103 |
default: |
|
| 104 |
r = phy->regs[regnum]; |
|
| 105 |
break; |
|
| 106 |
} |
|
| 107 |
D(printf("\n%s %x = reg[%d]\n", __func__, r, regnum));
|
|
| 108 |
return r; |
|
| 55 |
int regnum; |
|
| 56 |
unsigned r = 0; |
|
| 57 |
|
|
| 58 |
regnum = req & 0x1f; |
|
| 59 |
|
|
| 60 |
switch (regnum) {
|
|
| 61 |
case 1: |
|
| 62 |
if (!phy->link) {
|
|
| 63 |
break; |
|
| 64 |
} |
|
| 65 |
/* MR1. */ |
|
| 66 |
/* Speeds and modes. */ |
|
| 67 |
r |= (1 << 13) | (1 << 14); |
|
| 68 |
r |= (1 << 11) | (1 << 12); |
|
| 69 |
r |= (1 << 5); /* Autoneg complete. */ |
|
| 70 |
r |= (1 << 3); /* Autoneg able. */ |
|
| 71 |
r |= (1 << 2); /* link. */ |
|
| 72 |
break; |
|
| 73 |
case 5: |
|
| 74 |
/* Link partner ability. |
|
| 75 |
We are kind; always agree with whatever best mode |
|
| 76 |
the guest advertises. */ |
|
| 77 |
r = 1 << 14; /* Success. */ |
|
| 78 |
/* Copy advertised modes. */ |
|
| 79 |
r |= phy->regs[4] & (15 << 5); |
|
| 80 |
/* Autoneg support. */ |
|
| 81 |
r |= 1; |
|
| 82 |
break; |
|
| 83 |
case 18: |
|
| 84 |
{
|
|
| 85 |
/* Diagnostics reg. */ |
|
| 86 |
int duplex = 0; |
|
| 87 |
int speed_100 = 0; |
|
| 88 |
|
|
| 89 |
if (!phy->link) {
|
|
| 90 |
break; |
|
| 91 |
} |
|
| 92 |
|
|
| 93 |
/* Are we advertising 100 half or 100 duplex ? */ |
|
| 94 |
speed_100 = !!(phy->regs[4] & ADVERTISE_100HALF); |
|
| 95 |
speed_100 |= !!(phy->regs[4] & ADVERTISE_100FULL); |
|
| 96 |
|
|
| 97 |
/* Are we advertising 10 duplex or 100 duplex ? */ |
|
| 98 |
duplex = !!(phy->regs[4] & ADVERTISE_100FULL); |
|
| 99 |
duplex |= !!(phy->regs[4] & ADVERTISE_10FULL); |
|
| 100 |
r = (speed_100 << 10) | (duplex << 11); |
|
| 101 |
} |
|
| 102 |
break; |
|
| 103 |
|
|
| 104 |
default: |
|
| 105 |
r = phy->regs[regnum]; |
|
| 106 |
break; |
|
| 107 |
} |
|
| 108 |
D(printf("\n%s %x = reg[%d]\n", __func__, r, regnum));
|
|
| 109 |
return r; |
|
| 109 | 110 |
} |
| 110 | 111 |
|
| 111 |
static void
|
|
| 112 |
static void |
|
| 112 | 113 |
tdk_write(struct qemu_phy *phy, unsigned int req, unsigned int data) |
| 113 | 114 |
{
|
| 114 |
int regnum;
|
|
| 115 |
|
|
| 116 |
regnum = req & 0x1f;
|
|
| 117 |
D(printf("%s reg[%d] = %x\n", __func__, regnum, data));
|
|
| 118 |
switch (regnum) {
|
|
| 119 |
default:
|
|
| 120 |
phy->regs[regnum] = data;
|
|
| 121 |
break;
|
|
| 122 |
}
|
|
| 115 |
int regnum;
|
|
| 116 |
|
|
| 117 |
regnum = req & 0x1f;
|
|
| 118 |
D(printf("%s reg[%d] = %x\n", __func__, regnum, data));
|
|
| 119 |
switch (regnum) {
|
|
| 120 |
default:
|
|
| 121 |
phy->regs[regnum] = data;
|
|
| 122 |
break;
|
|
| 123 |
}
|
|
| 123 | 124 |
} |
| 124 | 125 |
|
| 125 |
static void
|
|
| 126 |
static void |
|
| 126 | 127 |
tdk_init(struct qemu_phy *phy) |
| 127 | 128 |
{
|
| 128 |
phy->regs[0] = 0x3100;
|
|
| 129 |
/* PHY Id. */
|
|
| 130 |
phy->regs[2] = 0x0300;
|
|
| 131 |
phy->regs[3] = 0xe400;
|
|
| 132 |
/* Autonegotiation advertisement reg. */
|
|
| 133 |
phy->regs[4] = 0x01E1;
|
|
| 134 |
phy->link = 1;
|
|
| 135 |
|
|
| 136 |
phy->read = tdk_read;
|
|
| 137 |
phy->write = tdk_write;
|
|
| 129 |
phy->regs[0] = 0x3100;
|
|
| 130 |
/* PHY Id. */
|
|
| 131 |
phy->regs[2] = 0x0300;
|
|
| 132 |
phy->regs[3] = 0xe400;
|
|
| 133 |
/* Autonegotiation advertisement reg. */
|
|
| 134 |
phy->regs[4] = 0x01E1;
|
|
| 135 |
phy->link = 1;
|
|
| 136 |
|
|
| 137 |
phy->read = tdk_read;
|
|
| 138 |
phy->write = tdk_write;
|
|
| 138 | 139 |
} |
| 139 | 140 |
|
| 140 | 141 |
struct qemu_mdio |
| 141 | 142 |
{
|
| 142 |
/* bus. */
|
|
| 143 |
int mdc;
|
|
| 144 |
int mdio;
|
|
| 145 |
|
|
| 146 |
/* decoder. */
|
|
| 147 |
enum {
|
|
| 148 |
PREAMBLE,
|
|
| 149 |
SOF,
|
|
| 150 |
OPC,
|
|
| 151 |
ADDR,
|
|
| 152 |
REQ,
|
|
| 153 |
TURNAROUND,
|
|
| 154 |
DATA
|
|
| 155 |
} state;
|
|
| 156 |
unsigned int drive;
|
|
| 157 |
|
|
| 158 |
unsigned int cnt;
|
|
| 159 |
unsigned int addr;
|
|
| 160 |
unsigned int opc;
|
|
| 161 |
unsigned int req;
|
|
| 162 |
unsigned int data;
|
|
| 163 |
|
|
| 164 |
struct qemu_phy *devs[32];
|
|
| 143 |
/* bus. */
|
|
| 144 |
int mdc;
|
|
| 145 |
int mdio;
|
|
| 146 |
|
|
| 147 |
/* decoder. */
|
|
| 148 |
enum {
|
|
| 149 |
PREAMBLE,
|
|
| 150 |
SOF,
|
|
| 151 |
OPC,
|
|
| 152 |
ADDR,
|
|
| 153 |
REQ,
|
|
| 154 |
TURNAROUND,
|
|
| 155 |
DATA
|
|
| 156 |
} state;
|
|
| 157 |
unsigned int drive;
|
|
| 158 |
|
|
| 159 |
unsigned int cnt;
|
|
| 160 |
unsigned int addr;
|
|
| 161 |
unsigned int opc;
|
|
| 162 |
unsigned int req;
|
|
| 163 |
unsigned int data;
|
|
| 164 |
|
|
| 165 |
struct qemu_phy *devs[32];
|
|
| 165 | 166 |
}; |
| 166 | 167 |
|
| 167 |
static void
|
|
| 168 |
static void |
|
| 168 | 169 |
mdio_attach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr) |
| 169 | 170 |
{
|
| 170 |
bus->devs[addr & 0x1f] = phy;
|
|
| 171 |
bus->devs[addr & 0x1f] = phy;
|
|
| 171 | 172 |
} |
| 172 | 173 |
|
| 173 | 174 |
#ifdef USE_THIS_DEAD_CODE |
| 174 |
static void
|
|
| 175 |
static void |
|
| 175 | 176 |
mdio_detach(struct qemu_mdio *bus, struct qemu_phy *phy, unsigned int addr) |
| 176 | 177 |
{
|
| 177 |
bus->devs[addr & 0x1f] = NULL;
|
|
| 178 |
bus->devs[addr & 0x1f] = NULL;
|
|
| 178 | 179 |
} |
| 179 | 180 |
#endif |
| 180 | 181 |
|
| 181 | 182 |
static void mdio_read_req(struct qemu_mdio *bus) |
| 182 | 183 |
{
|
| 183 |
struct qemu_phy *phy; |
|
| 184 |
|
|
| 185 |
phy = bus->devs[bus->addr]; |
|
| 186 |
if (phy && phy->read) |
|
| 187 |
bus->data = phy->read(phy, bus->req); |
|
| 188 |
else |
|
| 189 |
bus->data = 0xffff; |
|
| 184 |
struct qemu_phy *phy; |
|
| 185 |
|
|
| 186 |
phy = bus->devs[bus->addr]; |
|
| 187 |
if (phy && phy->read) {
|
|
| 188 |
bus->data = phy->read(phy, bus->req); |
|
| 189 |
} else {
|
|
| 190 |
bus->data = 0xffff; |
|
| 191 |
} |
|
| 190 | 192 |
} |
| 191 | 193 |
|
| 192 | 194 |
static void mdio_write_req(struct qemu_mdio *bus) |
| 193 | 195 |
{
|
| 194 |
struct qemu_phy *phy;
|
|
| 196 |
struct qemu_phy *phy;
|
|
| 195 | 197 |
|
| 196 |
phy = bus->devs[bus->addr]; |
|
| 197 |
if (phy && phy->write) |
|
| 198 |
phy->write(phy, bus->req, bus->data); |
|
| 198 |
phy = bus->devs[bus->addr]; |
|
| 199 |
if (phy && phy->write) {
|
|
| 200 |
phy->write(phy, bus->req, bus->data); |
|
| 201 |
} |
|
| 199 | 202 |
} |
| 200 | 203 |
|
| 201 | 204 |
static void mdio_cycle(struct qemu_mdio *bus) |
| 202 | 205 |
{
|
| 203 |
bus->cnt++;
|
|
| 206 |
bus->cnt++;
|
|
| 204 | 207 |
|
| 205 |
D(printf("mdc=%d mdio=%d state=%d cnt=%d drv=%d\n",
|
|
| 206 |
bus->mdc, bus->mdio, bus->state, bus->cnt, bus->drive));
|
|
| 208 |
D(printf("mdc=%d mdio=%d state=%d cnt=%d drv=%d\n",
|
|
| 209 |
bus->mdc, bus->mdio, bus->state, bus->cnt, bus->drive));
|
|
| 207 | 210 |
#if 0 |
| 208 |
if (bus->mdc) |
|
| 209 |
printf("%d", bus->mdio);
|
|
| 211 |
if (bus->mdc) {
|
|
| 212 |
printf("%d", bus->mdio);
|
|
| 213 |
} |
|
| 210 | 214 |
#endif |
| 211 |
switch (bus->state) |
|
| 212 |
{
|
|
| 213 |
case PREAMBLE: |
|
| 214 |
if (bus->mdc) {
|
|
| 215 |
if (bus->cnt >= (32 * 2) && !bus->mdio) {
|
|
| 216 |
bus->cnt = 0; |
|
| 217 |
bus->state = SOF; |
|
| 218 |
bus->data = 0; |
|
| 219 |
} |
|
| 220 |
} |
|
| 221 |
break; |
|
| 222 |
case SOF: |
|
| 223 |
if (bus->mdc) {
|
|
| 224 |
if (bus->mdio != 1) |
|
| 225 |
printf("WARNING: no SOF\n");
|
|
| 226 |
if (bus->cnt == 1*2) {
|
|
| 227 |
bus->cnt = 0; |
|
| 228 |
bus->opc = 0; |
|
| 229 |
bus->state = OPC; |
|
| 230 |
} |
|
| 231 |
} |
|
| 232 |
break; |
|
| 233 |
case OPC: |
|
| 234 |
if (bus->mdc) {
|
|
| 235 |
bus->opc <<= 1; |
|
| 236 |
bus->opc |= bus->mdio & 1; |
|
| 237 |
if (bus->cnt == 2*2) {
|
|
| 238 |
bus->cnt = 0; |
|
| 239 |
bus->addr = 0; |
|
| 240 |
bus->state = ADDR; |
|
| 241 |
} |
|
| 242 |
} |
|
| 243 |
break; |
|
| 244 |
case ADDR: |
|
| 245 |
if (bus->mdc) {
|
|
| 246 |
bus->addr <<= 1; |
|
| 247 |
bus->addr |= bus->mdio & 1; |
|
| 248 |
|
|
| 249 |
if (bus->cnt == 5*2) {
|
|
| 250 |
bus->cnt = 0; |
|
| 251 |
bus->req = 0; |
|
| 252 |
bus->state = REQ; |
|
| 253 |
} |
|
| 254 |
} |
|
| 255 |
break; |
|
| 256 |
case REQ: |
|
| 257 |
if (bus->mdc) {
|
|
| 258 |
bus->req <<= 1; |
|
| 259 |
bus->req |= bus->mdio & 1; |
|
| 260 |
if (bus->cnt == 5*2) {
|
|
| 261 |
bus->cnt = 0; |
|
| 262 |
bus->state = TURNAROUND; |
|
| 263 |
} |
|
| 264 |
} |
|
| 265 |
break; |
|
| 266 |
case TURNAROUND: |
|
| 267 |
if (bus->mdc && bus->cnt == 2*2) {
|
|
| 268 |
bus->mdio = 0; |
|
| 269 |
bus->cnt = 0; |
|
| 270 |
|
|
| 271 |
if (bus->opc == 2) {
|
|
| 272 |
bus->drive = 1; |
|
| 273 |
mdio_read_req(bus); |
|
| 274 |
bus->mdio = bus->data & 1; |
|
| 275 |
} |
|
| 276 |
bus->state = DATA; |
|
| 277 |
} |
|
| 278 |
break; |
|
| 279 |
case DATA: |
|
| 280 |
if (!bus->mdc) {
|
|
| 281 |
if (bus->drive) {
|
|
| 282 |
bus->mdio = !!(bus->data & (1 << 15)); |
|
| 283 |
bus->data <<= 1; |
|
| 284 |
} |
|
| 285 |
} else {
|
|
| 286 |
if (!bus->drive) {
|
|
| 287 |
bus->data <<= 1; |
|
| 288 |
bus->data |= bus->mdio; |
|
| 289 |
} |
|
| 290 |
if (bus->cnt == 16 * 2) {
|
|
| 291 |
bus->cnt = 0; |
|
| 292 |
bus->state = PREAMBLE; |
|
| 293 |
if (!bus->drive) |
|
| 294 |
mdio_write_req(bus); |
|
| 295 |
bus->drive = 0; |
|
| 296 |
} |
|
| 297 |
} |
|
| 298 |
break; |
|
| 299 |
default: |
|
| 300 |
break; |
|
| 301 |
} |
|
| 215 |
switch (bus->state) {
|
|
| 216 |
case PREAMBLE: |
|
| 217 |
if (bus->mdc) {
|
|
| 218 |
if (bus->cnt >= (32 * 2) && !bus->mdio) {
|
|
| 219 |
bus->cnt = 0; |
|
| 220 |
bus->state = SOF; |
|
| 221 |
bus->data = 0; |
|
| 222 |
} |
|
| 223 |
} |
|
| 224 |
break; |
|
| 225 |
case SOF: |
|
| 226 |
if (bus->mdc) {
|
|
| 227 |
if (bus->mdio != 1) {
|
|
| 228 |
printf("WARNING: no SOF\n");
|
|
| 229 |
} |
|
| 230 |
if (bus->cnt == 1*2) {
|
|
| 231 |
bus->cnt = 0; |
|
| 232 |
bus->opc = 0; |
|
| 233 |
bus->state = OPC; |
|
| 234 |
} |
|
| 235 |
} |
|
| 236 |
break; |
|
| 237 |
case OPC: |
|
| 238 |
if (bus->mdc) {
|
|
| 239 |
bus->opc <<= 1; |
|
| 240 |
bus->opc |= bus->mdio & 1; |
|
| 241 |
if (bus->cnt == 2*2) {
|
|
| 242 |
bus->cnt = 0; |
|
| 243 |
bus->addr = 0; |
|
| 244 |
bus->state = ADDR; |
|
| 245 |
} |
|
| 246 |
} |
|
| 247 |
break; |
|
| 248 |
case ADDR: |
|
| 249 |
if (bus->mdc) {
|
|
| 250 |
bus->addr <<= 1; |
|
| 251 |
bus->addr |= bus->mdio & 1; |
|
| 252 |
|
|
| 253 |
if (bus->cnt == 5*2) {
|
|
| 254 |
bus->cnt = 0; |
|
| 255 |
bus->req = 0; |
|
| 256 |
bus->state = REQ; |
|
| 257 |
} |
|
| 258 |
} |
|
| 259 |
break; |
|
| 260 |
case REQ: |
|
| 261 |
if (bus->mdc) {
|
|
| 262 |
bus->req <<= 1; |
|
| 263 |
bus->req |= bus->mdio & 1; |
|
| 264 |
if (bus->cnt == 5*2) {
|
|
| 265 |
bus->cnt = 0; |
|
| 266 |
bus->state = TURNAROUND; |
|
| 267 |
} |
|
| 268 |
} |
|
| 269 |
break; |
|
| 270 |
case TURNAROUND: |
|
| 271 |
if (bus->mdc && bus->cnt == 2*2) {
|
|
| 272 |
bus->mdio = 0; |
|
| 273 |
bus->cnt = 0; |
|
| 274 |
|
|
| 275 |
if (bus->opc == 2) {
|
|
| 276 |
bus->drive = 1; |
|
| 277 |
mdio_read_req(bus); |
|
| 278 |
bus->mdio = bus->data & 1; |
|
| 279 |
} |
|
| 280 |
bus->state = DATA; |
|
| 281 |
} |
|
| 282 |
break; |
|
| 283 |
case DATA: |
|
| 284 |
if (!bus->mdc) {
|
|
| 285 |
if (bus->drive) {
|
|
| 286 |
bus->mdio = !!(bus->data & (1 << 15)); |
|
| 287 |
bus->data <<= 1; |
|
| 288 |
} |
|
| 289 |
} else {
|
|
| 290 |
if (!bus->drive) {
|
|
| 291 |
bus->data <<= 1; |
|
| 292 |
bus->data |= bus->mdio; |
|
| 293 |
} |
|
| 294 |
if (bus->cnt == 16 * 2) {
|
|
| 295 |
bus->cnt = 0; |
|
| 296 |
bus->state = PREAMBLE; |
|
| 297 |
if (!bus->drive) {
|
|
| 298 |
mdio_write_req(bus); |
|
| 299 |
} |
|
| 300 |
bus->drive = 0; |
|
| 301 |
} |
|
| 302 |
} |
|
| 303 |
break; |
|
| 304 |
default: |
|
| 305 |
break; |
|
| 306 |
} |
|
| 302 | 307 |
} |
| 303 | 308 |
|
| 304 | 309 |
/* ETRAX-FS Ethernet MAC block starts here. */ |
| 305 | 310 |
|
| 306 |
#define RW_MA0_LO 0x00
|
|
| 307 |
#define RW_MA0_HI 0x01
|
|
| 308 |
#define RW_MA1_LO 0x02
|
|
| 309 |
#define RW_MA1_HI 0x03
|
|
| 310 |
#define RW_GA_LO 0x04
|
|
| 311 |
#define RW_GA_HI 0x05
|
|
| 312 |
#define RW_GEN_CTRL 0x06
|
|
| 313 |
#define RW_REC_CTRL 0x07
|
|
| 314 |
#define RW_TR_CTRL 0x08
|
|
| 315 |
#define RW_CLR_ERR 0x09
|
|
| 316 |
#define RW_MGM_CTRL 0x0a
|
|
| 317 |
#define R_STAT 0x0b
|
|
| 318 |
#define FS_ETH_MAX_REGS 0x17
|
|
| 311 |
#define RW_MA0_LO 0x00
|
|
| 312 |
#define RW_MA0_HI 0x01
|
|
| 313 |
#define RW_MA1_LO 0x02
|
|
| 314 |
#define RW_MA1_HI 0x03
|
|
| 315 |
#define RW_GA_LO 0x04
|
|
| 316 |
#define RW_GA_HI 0x05
|
|
| 317 |
#define RW_GEN_CTRL 0x06
|
|
| 318 |
#define RW_REC_CTRL 0x07
|
|
| 319 |
#define RW_TR_CTRL 0x08
|
|
| 320 |
#define RW_CLR_ERR 0x09
|
|
| 321 |
#define RW_MGM_CTRL 0x0a
|
|
| 322 |
#define R_STAT 0x0b
|
|
| 323 |
#define FS_ETH_MAX_REGS 0x17
|
|
| 319 | 324 |
|
| 320 | 325 |
struct fs_eth |
| 321 | 326 |
{
|
| 322 |
SysBusDevice busdev;
|
|
| 323 |
MemoryRegion mmio;
|
|
| 324 |
NICState *nic;
|
|
| 325 |
NICConf conf;
|
|
| 326 |
|
|
| 327 |
/* Two addrs in the filter. */
|
|
| 328 |
uint8_t macaddr[2][6];
|
|
| 329 |
uint32_t regs[FS_ETH_MAX_REGS];
|
|
| 330 |
|
|
| 331 |
union {
|
|
| 332 |
void *vdma_out;
|
|
| 333 |
struct etraxfs_dma_client *dma_out;
|
|
| 334 |
};
|
|
| 335 |
union {
|
|
| 336 |
void *vdma_in;
|
|
| 337 |
struct etraxfs_dma_client *dma_in;
|
|
| 338 |
};
|
|
| 339 |
|
|
| 340 |
/* MDIO bus. */
|
|
| 341 |
struct qemu_mdio mdio_bus;
|
|
| 342 |
unsigned int phyaddr;
|
|
| 343 |
int duplex_mismatch;
|
|
| 344 |
|
|
| 345 |
/* PHY. */
|
|
| 346 |
struct qemu_phy phy;
|
|
| 327 |
SysBusDevice busdev;
|
|
| 328 |
MemoryRegion mmio;
|
|
| 329 |
NICState *nic;
|
|
| 330 |
NICConf conf;
|
|
| 331 |
|
|
| 332 |
/* Two addrs in the filter. */
|
|
| 333 |
uint8_t macaddr[2][6];
|
|
| 334 |
uint32_t regs[FS_ETH_MAX_REGS];
|
|
| 335 |
|
|
| 336 |
union {
|
|
| 337 |
void *vdma_out;
|
|
| 338 |
struct etraxfs_dma_client *dma_out;
|
|
| 339 |
};
|
|
| 340 |
union {
|
|
| 341 |
void *vdma_in;
|
|
| 342 |
struct etraxfs_dma_client *dma_in;
|
|
| 343 |
};
|
|
| 344 |
|
|
| 345 |
/* MDIO bus. */
|
|
| 346 |
struct qemu_mdio mdio_bus;
|
|
| 347 |
unsigned int phyaddr;
|
|
| 348 |
int duplex_mismatch;
|
|
| 349 |
|
|
| 350 |
/* PHY. */
|
|
| 351 |
struct qemu_phy phy;
|
|
| 347 | 352 |
}; |
| 348 | 353 |
|
| 349 | 354 |
static void eth_validate_duplex(struct fs_eth *eth) |
| 350 | 355 |
{
|
| 351 |
struct qemu_phy *phy; |
|
| 352 |
unsigned int phy_duplex; |
|
| 353 |
unsigned int mac_duplex; |
|
| 354 |
int new_mm = 0; |
|
| 355 |
|
|
| 356 |
phy = eth->mdio_bus.devs[eth->phyaddr]; |
|
| 357 |
phy_duplex = !!(phy->read(phy, 18) & (1 << 11)); |
|
| 358 |
mac_duplex = !!(eth->regs[RW_REC_CTRL] & 128); |
|
| 359 |
|
|
| 360 |
if (mac_duplex != phy_duplex) |
|
| 361 |
new_mm = 1; |
|
| 362 |
|
|
| 363 |
if (eth->regs[RW_GEN_CTRL] & 1) {
|
|
| 364 |
if (new_mm != eth->duplex_mismatch) {
|
|
| 365 |
if (new_mm) |
|
| 366 |
printf("HW: WARNING "
|
|
| 367 |
"ETH duplex mismatch MAC=%d PHY=%d\n", |
|
| 368 |
mac_duplex, phy_duplex); |
|
| 369 |
else |
|
| 370 |
printf("HW: ETH duplex ok.\n");
|
|
| 371 |
} |
|
| 372 |
eth->duplex_mismatch = new_mm; |
|
| 373 |
} |
|
| 356 |
struct qemu_phy *phy; |
|
| 357 |
unsigned int phy_duplex; |
|
| 358 |
unsigned int mac_duplex; |
|
| 359 |
int new_mm = 0; |
|
| 360 |
|
|
| 361 |
phy = eth->mdio_bus.devs[eth->phyaddr]; |
|
| 362 |
phy_duplex = !!(phy->read(phy, 18) & (1 << 11)); |
|
| 363 |
mac_duplex = !!(eth->regs[RW_REC_CTRL] & 128); |
|
| 364 |
|
|
| 365 |
if (mac_duplex != phy_duplex) {
|
|
| 366 |
new_mm = 1; |
|
| 367 |
} |
|
| 368 |
|
|
| 369 |
if (eth->regs[RW_GEN_CTRL] & 1) {
|
|
| 370 |
if (new_mm != eth->duplex_mismatch) {
|
|
| 371 |
if (new_mm) {
|
|
| 372 |
printf("HW: WARNING ETH duplex mismatch MAC=%d PHY=%d\n",
|
|
| 373 |
mac_duplex, phy_duplex); |
|
| 374 |
} else {
|
|
| 375 |
printf("HW: ETH duplex ok.\n");
|
|
| 376 |
} |
|
| 377 |
} |
|
| 378 |
eth->duplex_mismatch = new_mm; |
|
| 379 |
} |
|
| 374 | 380 |
} |
| 375 | 381 |
|
| 376 | 382 |
static uint64_t |
| 377 | 383 |
eth_read(void *opaque, hwaddr addr, unsigned int size) |
| 378 | 384 |
{
|
| 379 |
struct fs_eth *eth = opaque;
|
|
| 380 |
uint32_t r = 0;
|
|
| 381 |
|
|
| 382 |
addr >>= 2;
|
|
| 383 |
|
|
| 384 |
switch (addr) {
|
|
| 385 |
case R_STAT:
|
|
| 386 |
r = eth->mdio_bus.mdio & 1;
|
|
| 387 |
break;
|
|
| 388 |
default:
|
|
| 389 |
r = eth->regs[addr];
|
|
| 390 |
D(printf ("%s %x\n", __func__, addr * 4));
|
|
| 391 |
break;
|
|
| 392 |
}
|
|
| 393 |
return r;
|
|
| 385 |
struct fs_eth *eth = opaque;
|
|
| 386 |
uint32_t r = 0;
|
|
| 387 |
|
|
| 388 |
addr >>= 2;
|
|
| 389 |
|
|
| 390 |
switch (addr) {
|
|
| 391 |
case R_STAT:
|
|
| 392 |
r = eth->mdio_bus.mdio & 1;
|
|
| 393 |
break;
|
|
| 394 |
default:
|
|
| 395 |
r = eth->regs[addr];
|
|
| 396 |
D(printf("%s %x\n", __func__, addr * 4));
|
|
| 397 |
break;
|
|
| 398 |
}
|
|
| 399 |
return r;
|
|
| 394 | 400 |
} |
| 395 | 401 |
|
| 396 | 402 |
static void eth_update_ma(struct fs_eth *eth, int ma) |
| 397 | 403 |
{
|
| 398 |
int reg; |
|
| 399 |
int i = 0; |
|
| 400 |
|
|
| 401 |
ma &= 1; |
|
| 402 |
|
|
| 403 |
reg = RW_MA0_LO; |
|
| 404 |
if (ma) |
|
| 405 |
reg = RW_MA1_LO; |
|
| 406 |
|
|
| 407 |
eth->macaddr[ma][i++] = eth->regs[reg]; |
|
| 408 |
eth->macaddr[ma][i++] = eth->regs[reg] >> 8; |
|
| 409 |
eth->macaddr[ma][i++] = eth->regs[reg] >> 16; |
|
| 410 |
eth->macaddr[ma][i++] = eth->regs[reg] >> 24; |
|
| 411 |
eth->macaddr[ma][i++] = eth->regs[reg + 1]; |
|
| 412 |
eth->macaddr[ma][i] = eth->regs[reg + 1] >> 8; |
|
| 413 |
|
|
| 414 |
D(printf("set mac%d=%x.%x.%x.%x.%x.%x\n", ma,
|
|
| 415 |
eth->macaddr[ma][0], eth->macaddr[ma][1], |
|
| 416 |
eth->macaddr[ma][2], eth->macaddr[ma][3], |
|
| 417 |
eth->macaddr[ma][4], eth->macaddr[ma][5])); |
|
| 404 |
int reg; |
|
| 405 |
int i = 0; |
|
| 406 |
|
|
| 407 |
ma &= 1; |
|
| 408 |
|
|
| 409 |
reg = RW_MA0_LO; |
|
| 410 |
if (ma) {
|
|
| 411 |
reg = RW_MA1_LO; |
|
| 412 |
} |
|
| 413 |
|
|
| 414 |
eth->macaddr[ma][i++] = eth->regs[reg]; |
|
| 415 |
eth->macaddr[ma][i++] = eth->regs[reg] >> 8; |
|
| 416 |
eth->macaddr[ma][i++] = eth->regs[reg] >> 16; |
|
| 417 |
eth->macaddr[ma][i++] = eth->regs[reg] >> 24; |
|
| 418 |
eth->macaddr[ma][i++] = eth->regs[reg + 1]; |
|
| 419 |
eth->macaddr[ma][i] = eth->regs[reg + 1] >> 8; |
|
| 420 |
|
|
| 421 |
D(printf("set mac%d=%x.%x.%x.%x.%x.%x\n", ma,
|
|
| 422 |
eth->macaddr[ma][0], eth->macaddr[ma][1], |
|
| 423 |
eth->macaddr[ma][2], eth->macaddr[ma][3], |
|
| 424 |
eth->macaddr[ma][4], eth->macaddr[ma][5])); |
|
| 418 | 425 |
} |
| 419 | 426 |
|
| 420 | 427 |
static void |
| 421 | 428 |
eth_write(void *opaque, hwaddr addr, |
| 422 | 429 |
uint64_t val64, unsigned int size) |
| 423 | 430 |
{
|
| 424 |
struct fs_eth *eth = opaque; |
|
| 425 |
uint32_t value = val64; |
|
| 426 |
|
|
| 427 |
addr >>= 2; |
|
| 428 |
switch (addr) |
|
| 429 |
{
|
|
| 430 |
case RW_MA0_LO: |
|
| 431 |
case RW_MA0_HI: |
|
| 432 |
eth->regs[addr] = value; |
|
| 433 |
eth_update_ma(eth, 0); |
|
| 434 |
break; |
|
| 435 |
case RW_MA1_LO: |
|
| 436 |
case RW_MA1_HI: |
|
| 437 |
eth->regs[addr] = value; |
|
| 438 |
eth_update_ma(eth, 1); |
|
| 439 |
break; |
|
| 440 |
|
|
| 441 |
case RW_MGM_CTRL: |
|
| 442 |
/* Attach an MDIO/PHY abstraction. */ |
|
| 443 |
if (value & 2) |
|
| 444 |
eth->mdio_bus.mdio = value & 1; |
|
| 445 |
if (eth->mdio_bus.mdc != (value & 4)) {
|
|
| 446 |
mdio_cycle(ð->mdio_bus); |
|
| 447 |
eth_validate_duplex(eth); |
|
| 448 |
} |
|
| 449 |
eth->mdio_bus.mdc = !!(value & 4); |
|
| 450 |
eth->regs[addr] = value; |
|
| 451 |
break; |
|
| 452 |
|
|
| 453 |
case RW_REC_CTRL: |
|
| 454 |
eth->regs[addr] = value; |
|
| 455 |
eth_validate_duplex(eth); |
|
| 456 |
break; |
|
| 457 |
|
|
| 458 |
default: |
|
| 459 |
eth->regs[addr] = value; |
|
| 460 |
D(printf ("%s %x %x\n",
|
|
| 461 |
__func__, addr, value)); |
|
| 462 |
break; |
|
| 463 |
} |
|
| 431 |
struct fs_eth *eth = opaque; |
|
| 432 |
uint32_t value = val64; |
|
| 433 |
|
|
| 434 |
addr >>= 2; |
|
| 435 |
switch (addr) {
|
|
| 436 |
case RW_MA0_LO: |
|
| 437 |
case RW_MA0_HI: |
|
| 438 |
eth->regs[addr] = value; |
|
| 439 |
eth_update_ma(eth, 0); |
|
| 440 |
break; |
|
| 441 |
case RW_MA1_LO: |
|
| 442 |
case RW_MA1_HI: |
|
| 443 |
eth->regs[addr] = value; |
|
| 444 |
eth_update_ma(eth, 1); |
|
| 445 |
break; |
|
| 446 |
|
|
| 447 |
case RW_MGM_CTRL: |
|
| 448 |
/* Attach an MDIO/PHY abstraction. */ |
|
| 449 |
if (value & 2) {
|
|
| 450 |
eth->mdio_bus.mdio = value & 1; |
|
| 451 |
} |
|
| 452 |
if (eth->mdio_bus.mdc != (value & 4)) {
|
|
| 453 |
mdio_cycle(ð->mdio_bus); |
|
| 454 |
eth_validate_duplex(eth); |
|
| 455 |
} |
|
| 456 |
eth->mdio_bus.mdc = !!(value & 4); |
|
| 457 |
eth->regs[addr] = value; |
|
| 458 |
break; |
|
| 459 |
|
|
| 460 |
case RW_REC_CTRL: |
|
| 461 |
eth->regs[addr] = value; |
|
| 462 |
eth_validate_duplex(eth); |
|
| 463 |
break; |
|
| 464 |
|
|
| 465 |
default: |
|
| 466 |
eth->regs[addr] = value; |
|
| 467 |
D(printf("%s %x %x\n", __func__, addr, value));
|
|
| 468 |
break; |
|
| 469 |
} |
|
| 464 | 470 |
} |
| 465 | 471 |
|
| 466 | 472 |
/* The ETRAX FS has a groupt address table (GAT) which works like a k=1 bloom |
| 467 |
filter dropping group addresses we have not joined. The filter has 64
|
|
| 468 |
bits (m). The has function is a simple nible xor of the group addr. */
|
|
| 473 |
filter dropping group addresses we have not joined. The filter has 64
|
|
| 474 |
bits (m). The has function is a simple nible xor of the group addr. */
|
|
| 469 | 475 |
static int eth_match_groupaddr(struct fs_eth *eth, const unsigned char *sa) |
| 470 | 476 |
{
|
| 471 |
unsigned int hsh; |
|
| 472 |
int m_individual = eth->regs[RW_REC_CTRL] & 4; |
|
| 473 |
int match; |
|
| 474 |
|
|
| 475 |
/* First bit on the wire of a MAC address signals multicast or |
|
| 476 |
physical address. */ |
|
| 477 |
if (!m_individual && !(sa[0] & 1)) |
|
| 478 |
return 0; |
|
| 479 |
|
|
| 480 |
/* Calculate the hash index for the GA registers. */ |
|
| 481 |
hsh = 0; |
|
| 482 |
hsh ^= (*sa) & 0x3f; |
|
| 483 |
hsh ^= ((*sa) >> 6) & 0x03; |
|
| 484 |
++sa; |
|
| 485 |
hsh ^= ((*sa) << 2) & 0x03c; |
|
| 486 |
hsh ^= ((*sa) >> 4) & 0xf; |
|
| 487 |
++sa; |
|
| 488 |
hsh ^= ((*sa) << 4) & 0x30; |
|
| 489 |
hsh ^= ((*sa) >> 2) & 0x3f; |
|
| 490 |
++sa; |
|
| 491 |
hsh ^= (*sa) & 0x3f; |
|
| 492 |
hsh ^= ((*sa) >> 6) & 0x03; |
|
| 493 |
++sa; |
|
| 494 |
hsh ^= ((*sa) << 2) & 0x03c; |
|
| 495 |
hsh ^= ((*sa) >> 4) & 0xf; |
|
| 496 |
++sa; |
|
| 497 |
hsh ^= ((*sa) << 4) & 0x30; |
|
| 498 |
hsh ^= ((*sa) >> 2) & 0x3f; |
|
| 499 |
|
|
| 500 |
hsh &= 63; |
|
| 501 |
if (hsh > 31) |
|
| 502 |
match = eth->regs[RW_GA_HI] & (1 << (hsh - 32)); |
|
| 503 |
else |
|
| 504 |
match = eth->regs[RW_GA_LO] & (1 << hsh); |
|
| 505 |
D(printf("hsh=%x ga=%x.%x mtch=%d\n", hsh,
|
|
| 506 |
eth->regs[RW_GA_HI], eth->regs[RW_GA_LO], match)); |
|
| 507 |
return match; |
|
| 477 |
unsigned int hsh; |
|
| 478 |
int m_individual = eth->regs[RW_REC_CTRL] & 4; |
|
| 479 |
int match; |
|
| 480 |
|
|
| 481 |
/* First bit on the wire of a MAC address signals multicast or |
|
| 482 |
physical address. */ |
|
| 483 |
if (!m_individual && !(sa[0] & 1)) {
|
|
| 484 |
return 0; |
|
| 485 |
} |
|
| 486 |
|
|
| 487 |
/* Calculate the hash index for the GA registers. */ |
|
| 488 |
hsh = 0; |
|
| 489 |
hsh ^= (*sa) & 0x3f; |
|
| 490 |
hsh ^= ((*sa) >> 6) & 0x03; |
|
| 491 |
++sa; |
|
| 492 |
hsh ^= ((*sa) << 2) & 0x03c; |
|
| 493 |
hsh ^= ((*sa) >> 4) & 0xf; |
|
| 494 |
++sa; |
|
| 495 |
hsh ^= ((*sa) << 4) & 0x30; |
|
| 496 |
hsh ^= ((*sa) >> 2) & 0x3f; |
|
| 497 |
++sa; |
|
| 498 |
hsh ^= (*sa) & 0x3f; |
|
| 499 |
hsh ^= ((*sa) >> 6) & 0x03; |
|
| 500 |
++sa; |
|
| 501 |
hsh ^= ((*sa) << 2) & 0x03c; |
|
| 502 |
hsh ^= ((*sa) >> 4) & 0xf; |
|
| 503 |
++sa; |
|
| 504 |
hsh ^= ((*sa) << 4) & 0x30; |
|
| 505 |
hsh ^= ((*sa) >> 2) & 0x3f; |
|
| 506 |
|
|
| 507 |
hsh &= 63; |
|
| 508 |
if (hsh > 31) {
|
|
| 509 |
match = eth->regs[RW_GA_HI] & (1 << (hsh - 32)); |
|
| 510 |
} else {
|
|
| 511 |
match = eth->regs[RW_GA_LO] & (1 << hsh); |
|
| 512 |
} |
|
| 513 |
D(printf("hsh=%x ga=%x.%x mtch=%d\n", hsh,
|
|
| 514 |
eth->regs[RW_GA_HI], eth->regs[RW_GA_LO], match)); |
|
| 515 |
return match; |
|
| 508 | 516 |
} |
| 509 | 517 |
|
| 510 | 518 |
static int eth_can_receive(NetClientState *nc) |
| 511 | 519 |
{
|
| 512 |
return 1;
|
|
| 520 |
return 1;
|
|
| 513 | 521 |
} |
| 514 | 522 |
|
| 515 | 523 |
static ssize_t eth_receive(NetClientState *nc, const uint8_t *buf, size_t size) |
| 516 | 524 |
{
|
| 517 |
unsigned char sa_bcast[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
|
| 518 |
struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque; |
|
| 519 |
int use_ma0 = eth->regs[RW_REC_CTRL] & 1; |
|
| 520 |
int use_ma1 = eth->regs[RW_REC_CTRL] & 2; |
|
| 521 |
int r_bcast = eth->regs[RW_REC_CTRL] & 8; |
|
| 522 |
|
|
| 523 |
if (size < 12) |
|
| 524 |
return -1; |
|
| 525 |
|
|
| 526 |
D(printf("%x.%x.%x.%x.%x.%x ma=%d %d bc=%d\n",
|
|
| 527 |
buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], |
|
| 528 |
use_ma0, use_ma1, r_bcast)); |
|
| 529 |
|
|
| 530 |
/* Does the frame get through the address filters? */ |
|
| 531 |
if ((!use_ma0 || memcmp(buf, eth->macaddr[0], 6)) |
|
| 532 |
&& (!use_ma1 || memcmp(buf, eth->macaddr[1], 6)) |
|
| 533 |
&& (!r_bcast || memcmp(buf, sa_bcast, 6)) |
|
| 534 |
&& !eth_match_groupaddr(eth, buf)) |
|
| 535 |
return size; |
|
| 536 |
|
|
| 537 |
/* FIXME: Find another way to pass on the fake csum. */ |
|
| 538 |
etraxfs_dmac_input(eth->dma_in, (void *)buf, size + 4, 1); |
|
| 525 |
unsigned char sa_bcast[6] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
|
|
| 526 |
struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque; |
|
| 527 |
int use_ma0 = eth->regs[RW_REC_CTRL] & 1; |
|
| 528 |
int use_ma1 = eth->regs[RW_REC_CTRL] & 2; |
|
| 529 |
int r_bcast = eth->regs[RW_REC_CTRL] & 8; |
|
| 530 |
|
|
| 531 |
if (size < 12) {
|
|
| 532 |
return -1; |
|
| 533 |
} |
|
| 534 |
|
|
| 535 |
D(printf("%x.%x.%x.%x.%x.%x ma=%d %d bc=%d\n",
|
|
| 536 |
buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], |
|
| 537 |
use_ma0, use_ma1, r_bcast)); |
|
| 538 |
|
|
| 539 |
/* Does the frame get through the address filters? */ |
|
| 540 |
if ((!use_ma0 || memcmp(buf, eth->macaddr[0], 6)) |
|
| 541 |
&& (!use_ma1 || memcmp(buf, eth->macaddr[1], 6)) |
|
| 542 |
&& (!r_bcast || memcmp(buf, sa_bcast, 6)) |
|
| 543 |
&& !eth_match_groupaddr(eth, buf)) {
|
|
| 544 |
return size; |
|
| 545 |
} |
|
| 546 |
|
|
| 547 |
/* FIXME: Find another way to pass on the fake csum. */ |
|
| 548 |
etraxfs_dmac_input(eth->dma_in, (void *)buf, size + 4, 1); |
|
| 539 | 549 |
|
| 540 | 550 |
return size; |
| 541 | 551 |
} |
| 542 | 552 |
|
| 543 | 553 |
static int eth_tx_push(void *opaque, unsigned char *buf, int len, bool eop) |
| 544 | 554 |
{
|
| 545 |
struct fs_eth *eth = opaque;
|
|
| 555 |
struct fs_eth *eth = opaque;
|
|
| 546 | 556 |
|
| 547 |
D(printf("%s buf=%p len=%d\n", __func__, buf, len));
|
|
| 548 |
qemu_send_packet(ð->nic->nc, buf, len);
|
|
| 549 |
return len;
|
|
| 557 |
D(printf("%s buf=%p len=%d\n", __func__, buf, len));
|
|
| 558 |
qemu_send_packet(ð->nic->nc, buf, len);
|
|
| 559 |
return len;
|
|
| 550 | 560 |
} |
| 551 | 561 |
|
| 552 | 562 |
static void eth_set_link(NetClientState *nc) |
| 553 | 563 |
{
|
| 554 |
struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
|
|
| 555 |
D(printf("%s %d\n", __func__, nc->link_down));
|
|
| 556 |
eth->phy.link = !nc->link_down;
|
|
| 564 |
struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
|
|
| 565 |
D(printf("%s %d\n", __func__, nc->link_down));
|
|
| 566 |
eth->phy.link = !nc->link_down;
|
|
| 557 | 567 |
} |
| 558 | 568 |
|
| 559 | 569 |
static const MemoryRegionOps eth_ops = {
|
| 560 |
.read = eth_read,
|
|
| 561 |
.write = eth_write,
|
|
| 562 |
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
| 563 |
.valid = {
|
|
| 564 |
.min_access_size = 4,
|
|
| 565 |
.max_access_size = 4
|
|
| 566 |
}
|
|
| 570 |
.read = eth_read,
|
|
| 571 |
.write = eth_write,
|
|
| 572 |
.endianness = DEVICE_LITTLE_ENDIAN,
|
|
| 573 |
.valid = {
|
|
| 574 |
.min_access_size = 4,
|
|
| 575 |
.max_access_size = 4
|
|
| 576 |
}
|
|
| 567 | 577 |
}; |
| 568 | 578 |
|
| 569 | 579 |
static void eth_cleanup(NetClientState *nc) |
| 570 | 580 |
{
|
| 571 |
struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
|
|
| 581 |
struct fs_eth *eth = DO_UPCAST(NICState, nc, nc)->opaque;
|
|
| 572 | 582 |
|
| 573 |
/* Disconnect the client. */
|
|
| 574 |
eth->dma_out->client.push = NULL;
|
|
| 575 |
eth->dma_out->client.opaque = NULL;
|
|
| 576 |
eth->dma_in->client.opaque = NULL;
|
|
| 577 |
eth->dma_in->client.pull = NULL;
|
|
| 583 |
/* Disconnect the client. */
|
|
| 584 |
eth->dma_out->client.push = NULL;
|
|
| 585 |
eth->dma_out->client.opaque = NULL;
|
|
| 586 |
eth->dma_in->client.opaque = NULL;
|
|
| 587 |
eth->dma_in->client.pull = NULL;
|
|
| 578 | 588 |
g_free(eth); |
| 579 | 589 |
} |
| 580 | 590 |
|
| 581 | 591 |
static NetClientInfo net_etraxfs_info = {
|
| 582 |
.type = NET_CLIENT_OPTIONS_KIND_NIC,
|
|
| 583 |
.size = sizeof(NICState),
|
|
| 584 |
.can_receive = eth_can_receive,
|
|
| 585 |
.receive = eth_receive,
|
|
| 586 |
.cleanup = eth_cleanup,
|
|
| 587 |
.link_status_changed = eth_set_link,
|
|
| 592 |
.type = NET_CLIENT_OPTIONS_KIND_NIC,
|
|
| 593 |
.size = sizeof(NICState),
|
|
| 594 |
.can_receive = eth_can_receive,
|
|
| 595 |
.receive = eth_receive,
|
|
| 596 |
.cleanup = eth_cleanup,
|
|
| 597 |
.link_status_changed = eth_set_link,
|
|
| 588 | 598 |
}; |
| 589 | 599 |
|
| 590 | 600 |
static int fs_eth_init(SysBusDevice *dev) |
| 591 | 601 |
{
|
| 592 |
struct fs_eth *s = FROM_SYSBUS(typeof(*s), dev);
|
|
| 602 |
struct fs_eth *s = FROM_SYSBUS(typeof(*s), dev);
|
|
| 593 | 603 |
|
| 594 |
if (!s->dma_out || !s->dma_in) {
|
|
| 595 |
hw_error("Unconnected ETRAX-FS Ethernet MAC.\n");
|
|
| 596 |
}
|
|
| 604 |
if (!s->dma_out || !s->dma_in) {
|
|
| 605 |
hw_error("Unconnected ETRAX-FS Ethernet MAC.\n");
|
|
| 606 |
}
|
|
| 597 | 607 |
|
| 598 |
s->dma_out->client.push = eth_tx_push;
|
|
| 599 |
s->dma_out->client.opaque = s;
|
|
| 600 |
s->dma_in->client.opaque = s;
|
|
| 601 |
s->dma_in->client.pull = NULL;
|
|
| 608 |
s->dma_out->client.push = eth_tx_push;
|
|
| 609 |
s->dma_out->client.opaque = s;
|
|
| 610 |
s->dma_in->client.opaque = s;
|
|
| 611 |
s->dma_in->client.pull = NULL;
|
|
| 602 | 612 |
|
| 603 |
memory_region_init_io(&s->mmio, ð_ops, s, "etraxfs-eth", 0x5c);
|
|
| 604 |
sysbus_init_mmio(dev, &s->mmio);
|
|
| 613 |
memory_region_init_io(&s->mmio, ð_ops, s, "etraxfs-eth", 0x5c);
|
|
| 614 |
sysbus_init_mmio(dev, &s->mmio);
|
|
| 605 | 615 |
|
| 606 |
qemu_macaddr_default_if_unset(&s->conf.macaddr);
|
|
| 607 |
s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
|
|
| 608 |
object_get_typename(OBJECT(s)), dev->qdev.id, s);
|
|
| 609 |
qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
|
|
| 616 |
qemu_macaddr_default_if_unset(&s->conf.macaddr);
|
|
| 617 |
s->nic = qemu_new_nic(&net_etraxfs_info, &s->conf,
|
|
| 618 |
object_get_typename(OBJECT(s)), dev->qdev.id, s);
|
|
| 619 |
qemu_format_nic_info_str(&s->nic->nc, s->conf.macaddr.a);
|
|
| 610 | 620 |
|
| 611 |
tdk_init(&s->phy);
|
|
| 612 |
mdio_attach(&s->mdio_bus, &s->phy, s->phyaddr);
|
|
| 613 |
return 0;
|
|
| 621 |
tdk_init(&s->phy);
|
|
| 622 |
mdio_attach(&s->mdio_bus, &s->phy, s->phyaddr);
|
|
| 623 |
return 0;
|
|
| 614 | 624 |
} |
| 615 | 625 |
|
| 616 | 626 |
static Property etraxfs_eth_properties[] = {
|
Also available in: Unified diff