root / hw / spapr.c @ 9fdf0c29
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "qemu-char.h" |
29 | 9fdf0c29 | David Gibson | #include "hw.h" |
30 | 9fdf0c29 | David Gibson | #include "elf.h" |
31 | 9fdf0c29 | David Gibson | |
32 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
33 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
34 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
37 | 9fdf0c29 | David Gibson | |
38 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #define KERNEL_LOAD_ADDR 0x00000000 |
41 | 9fdf0c29 | David Gibson | #define INITRD_LOAD_ADDR 0x02800000 |
42 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
43 | 9fdf0c29 | David Gibson | |
44 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
45 | 9fdf0c29 | David Gibson | |
46 | 9fdf0c29 | David Gibson | #define MAX_CPUS 32 |
47 | 9fdf0c29 | David Gibson | |
48 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
49 | 9fdf0c29 | David Gibson | |
50 | 9fdf0c29 | David Gibson | static void *spapr_create_fdt(int *fdt_size, ram_addr_t ramsize, |
51 | 9fdf0c29 | David Gibson | const char *cpu_model, CPUState *envs[], |
52 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr, |
53 | 9fdf0c29 | David Gibson | target_phys_addr_t initrd_base, |
54 | 9fdf0c29 | David Gibson | target_phys_addr_t initrd_size, |
55 | 9fdf0c29 | David Gibson | const char *kernel_cmdline) |
56 | 9fdf0c29 | David Gibson | { |
57 | 9fdf0c29 | David Gibson | void *fdt;
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58 | 9fdf0c29 | David Gibson | uint64_t mem_reg_property[] = { 0, cpu_to_be64(ramsize) };
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59 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
60 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
61 | 9fdf0c29 | David Gibson | int i;
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62 | 9fdf0c29 | David Gibson | char *modelname;
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63 | 9fdf0c29 | David Gibson | |
64 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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65 | 9fdf0c29 | David Gibson | do { \
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66 | 9fdf0c29 | David Gibson | int ret = (exp); \
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67 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
68 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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69 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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70 | 9fdf0c29 | David Gibson | exit(1); \
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71 | 9fdf0c29 | David Gibson | } \ |
72 | 9fdf0c29 | David Gibson | } while (0) |
73 | 9fdf0c29 | David Gibson | |
74 | 9fdf0c29 | David Gibson | fdt = qemu_mallocz(FDT_MAX_SIZE); |
75 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
76 | 9fdf0c29 | David Gibson | |
77 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
78 | 9fdf0c29 | David Gibson | |
79 | 9fdf0c29 | David Gibson | /* Root node */
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80 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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81 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
82 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "model", "qemu,emulated-pSeries-LPAR"))); |
83 | 9fdf0c29 | David Gibson | |
84 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
85 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
86 | 9fdf0c29 | David Gibson | |
87 | 9fdf0c29 | David Gibson | /* /chosen */
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88 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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89 | 9fdf0c29 | David Gibson | |
90 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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91 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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92 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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93 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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94 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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95 | 9fdf0c29 | David Gibson | |
96 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
97 | 9fdf0c29 | David Gibson | |
98 | 9fdf0c29 | David Gibson | /* memory node */
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99 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "memory@0")));
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100 | 9fdf0c29 | David Gibson | |
101 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
102 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "reg",
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103 | 9fdf0c29 | David Gibson | mem_reg_property, sizeof(mem_reg_property))));
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104 | 9fdf0c29 | David Gibson | |
105 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
106 | 9fdf0c29 | David Gibson | |
107 | 9fdf0c29 | David Gibson | /* cpus */
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108 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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109 | 9fdf0c29 | David Gibson | |
110 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
111 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
112 | 9fdf0c29 | David Gibson | |
113 | 9fdf0c29 | David Gibson | modelname = qemu_strdup(cpu_model); |
114 | 9fdf0c29 | David Gibson | |
115 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
116 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
117 | 9fdf0c29 | David Gibson | } |
118 | 9fdf0c29 | David Gibson | |
119 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
120 | 9fdf0c29 | David Gibson | CPUState *env = envs[i]; |
121 | 9fdf0c29 | David Gibson | char *nodename;
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122 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
123 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
124 | 9fdf0c29 | David Gibson | |
125 | 9fdf0c29 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, i) < 0) { |
126 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
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127 | 9fdf0c29 | David Gibson | exit(1);
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128 | 9fdf0c29 | David Gibson | } |
129 | 9fdf0c29 | David Gibson | |
130 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
131 | 9fdf0c29 | David Gibson | |
132 | 9fdf0c29 | David Gibson | free(nodename); |
133 | 9fdf0c29 | David Gibson | |
134 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", i)));
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135 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
136 | 9fdf0c29 | David Gibson | |
137 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
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138 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
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139 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
140 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
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141 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
142 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "timebase-frequency", TIMEBASE_FREQ)));
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143 | 9fdf0c29 | David Gibson | /* Hardcode CPU frequency for now. It's kind of arbitrary on
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144 | 9fdf0c29 | David Gibson | * full emu, for kvm we should copy it from the host */
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145 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "clock-frequency", 1000000000))); |
146 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
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147 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
148 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
149 | 9fdf0c29 | David Gibson | |
150 | 9fdf0c29 | David Gibson | if (envs[i]->mmu_model & POWERPC_MMU_1TSEG) {
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151 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
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152 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
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153 | 9fdf0c29 | David Gibson | } |
154 | 9fdf0c29 | David Gibson | |
155 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
156 | 9fdf0c29 | David Gibson | } |
157 | 9fdf0c29 | David Gibson | |
158 | 9fdf0c29 | David Gibson | qemu_free(modelname); |
159 | 9fdf0c29 | David Gibson | |
160 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
161 | 9fdf0c29 | David Gibson | |
162 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
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163 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
164 | 9fdf0c29 | David Gibson | |
165 | 9fdf0c29 | David Gibson | *fdt_size = fdt_totalsize(fdt); |
166 | 9fdf0c29 | David Gibson | |
167 | 9fdf0c29 | David Gibson | return fdt;
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168 | 9fdf0c29 | David Gibson | } |
169 | 9fdf0c29 | David Gibson | |
170 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
171 | 9fdf0c29 | David Gibson | { |
172 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
173 | 9fdf0c29 | David Gibson | } |
174 | 9fdf0c29 | David Gibson | |
175 | 9fdf0c29 | David Gibson | static void emulate_spapr_hypercall(CPUState *env) |
176 | 9fdf0c29 | David Gibson | { |
177 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
178 | 9fdf0c29 | David Gibson | } |
179 | 9fdf0c29 | David Gibson | |
180 | 9fdf0c29 | David Gibson | /* FIXME: hack until we implement the proper VIO console */
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181 | 9fdf0c29 | David Gibson | static target_ulong h_put_term_char(CPUState *env, sPAPREnvironment *spapr,
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182 | 9fdf0c29 | David Gibson | target_ulong opcode, target_ulong *args) |
183 | 9fdf0c29 | David Gibson | { |
184 | 9fdf0c29 | David Gibson | uint8_t buf[16];
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185 | 9fdf0c29 | David Gibson | |
186 | 9fdf0c29 | David Gibson | stq_p(buf, args[2]);
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187 | 9fdf0c29 | David Gibson | stq_p(buf + 8, args[3]); |
188 | 9fdf0c29 | David Gibson | |
189 | 9fdf0c29 | David Gibson | qemu_chr_write(serial_hds[0], buf, args[1]); |
190 | 9fdf0c29 | David Gibson | |
191 | 9fdf0c29 | David Gibson | return 0; |
192 | 9fdf0c29 | David Gibson | } |
193 | 9fdf0c29 | David Gibson | |
194 | 9fdf0c29 | David Gibson | |
195 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
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196 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
197 | 9fdf0c29 | David Gibson | const char *boot_device, |
198 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
199 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
200 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
201 | 9fdf0c29 | David Gibson | const char *cpu_model) |
202 | 9fdf0c29 | David Gibson | { |
203 | 9fdf0c29 | David Gibson | CPUState *envs[MAX_CPUS]; |
204 | 9fdf0c29 | David Gibson | void *fdt;
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205 | 9fdf0c29 | David Gibson | int i;
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206 | 9fdf0c29 | David Gibson | ram_addr_t ram_offset; |
207 | 9fdf0c29 | David Gibson | target_phys_addr_t fdt_addr; |
208 | 9fdf0c29 | David Gibson | uint32_t kernel_base, initrd_base; |
209 | 9fdf0c29 | David Gibson | long kernel_size, initrd_size;
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210 | 9fdf0c29 | David Gibson | int fdt_size;
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211 | 9fdf0c29 | David Gibson | |
212 | 9fdf0c29 | David Gibson | spapr = qemu_malloc(sizeof(*spapr));
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213 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
214 | 9fdf0c29 | David Gibson | |
215 | 9fdf0c29 | David Gibson | /* We place the device tree just below either the top of RAM, or
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216 | 9fdf0c29 | David Gibson | * 2GB, so that it can be processed with 32-bit code if
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217 | 9fdf0c29 | David Gibson | * necessary */
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218 | 9fdf0c29 | David Gibson | fdt_addr = MIN(ram_size, 0x80000000) - FDT_MAX_SIZE;
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219 | 9fdf0c29 | David Gibson | |
220 | 9fdf0c29 | David Gibson | /* init CPUs */
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221 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
222 | 9fdf0c29 | David Gibson | cpu_model = "POWER7";
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223 | 9fdf0c29 | David Gibson | } |
224 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
225 | 9fdf0c29 | David Gibson | CPUState *env = cpu_init(cpu_model); |
226 | 9fdf0c29 | David Gibson | |
227 | 9fdf0c29 | David Gibson | if (!env) {
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228 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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229 | 9fdf0c29 | David Gibson | exit(1);
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230 | 9fdf0c29 | David Gibson | } |
231 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
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232 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
233 | 9fdf0c29 | David Gibson | qemu_register_reset((QEMUResetHandler *)&cpu_reset, env); |
234 | 9fdf0c29 | David Gibson | |
235 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
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236 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
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237 | 9fdf0c29 | David Gibson | env->gpr[3] = i;
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238 | 9fdf0c29 | David Gibson | |
239 | 9fdf0c29 | David Gibson | envs[i] = env; |
240 | 9fdf0c29 | David Gibson | } |
241 | 9fdf0c29 | David Gibson | |
242 | 9fdf0c29 | David Gibson | /* allocate RAM */
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243 | 9fdf0c29 | David Gibson | ram_offset = qemu_ram_alloc(NULL, "ppc_spapr.ram", ram_size); |
244 | 9fdf0c29 | David Gibson | cpu_register_physical_memory(0, ram_size, ram_offset);
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245 | 9fdf0c29 | David Gibson | |
246 | 9fdf0c29 | David Gibson | spapr_register_hypercall(H_PUT_TERM_CHAR, h_put_term_char); |
247 | 9fdf0c29 | David Gibson | |
248 | 9fdf0c29 | David Gibson | if (kernel_filename) {
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249 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
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250 | 9fdf0c29 | David Gibson | |
251 | 9fdf0c29 | David Gibson | kernel_base = KERNEL_LOAD_ADDR; |
252 | 9fdf0c29 | David Gibson | |
253 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
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254 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
255 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
256 | 9fdf0c29 | David Gibson | kernel_size = load_image_targphys(kernel_filename, kernel_base, |
257 | 9fdf0c29 | David Gibson | ram_size - kernel_base); |
258 | 9fdf0c29 | David Gibson | } |
259 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
260 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
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261 | 9fdf0c29 | David Gibson | kernel_filename); |
262 | 9fdf0c29 | David Gibson | exit(1);
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263 | 9fdf0c29 | David Gibson | } |
264 | 9fdf0c29 | David Gibson | |
265 | 9fdf0c29 | David Gibson | /* load initrd */
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266 | 9fdf0c29 | David Gibson | if (initrd_filename) {
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267 | 9fdf0c29 | David Gibson | initrd_base = INITRD_LOAD_ADDR; |
268 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
269 | 9fdf0c29 | David Gibson | ram_size - initrd_base); |
270 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
271 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
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272 | 9fdf0c29 | David Gibson | initrd_filename); |
273 | 9fdf0c29 | David Gibson | exit(1);
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274 | 9fdf0c29 | David Gibson | } |
275 | 9fdf0c29 | David Gibson | } else {
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276 | 9fdf0c29 | David Gibson | initrd_base = 0;
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277 | 9fdf0c29 | David Gibson | initrd_size = 0;
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278 | 9fdf0c29 | David Gibson | } |
279 | 9fdf0c29 | David Gibson | |
280 | 9fdf0c29 | David Gibson | } else {
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281 | 9fdf0c29 | David Gibson | fprintf(stderr, "pSeries machine needs -kernel for now");
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282 | 9fdf0c29 | David Gibson | exit(1);
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283 | 9fdf0c29 | David Gibson | } |
284 | 9fdf0c29 | David Gibson | |
285 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
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286 | 9fdf0c29 | David Gibson | fdt = spapr_create_fdt(&fdt_size, ram_size, cpu_model, envs, spapr, |
287 | 9fdf0c29 | David Gibson | initrd_base, initrd_size, kernel_cmdline); |
288 | 9fdf0c29 | David Gibson | assert(fdt != NULL);
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289 | 9fdf0c29 | David Gibson | |
290 | 9fdf0c29 | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_size); |
291 | 9fdf0c29 | David Gibson | |
292 | 9fdf0c29 | David Gibson | qemu_free(fdt); |
293 | 9fdf0c29 | David Gibson | |
294 | 9fdf0c29 | David Gibson | envs[0]->gpr[3] = fdt_addr; |
295 | 9fdf0c29 | David Gibson | envs[0]->gpr[5] = 0; |
296 | 9fdf0c29 | David Gibson | envs[0]->hreset_vector = kernel_base;
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297 | 9fdf0c29 | David Gibson | } |
298 | 9fdf0c29 | David Gibson | |
299 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
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300 | 9fdf0c29 | David Gibson | .name = "pseries",
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301 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
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302 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
303 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
304 | 9fdf0c29 | David Gibson | .no_vga = 1,
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305 | 9fdf0c29 | David Gibson | .no_parallel = 1,
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306 | 9fdf0c29 | David Gibson | }; |
307 | 9fdf0c29 | David Gibson | |
308 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
309 | 9fdf0c29 | David Gibson | { |
310 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
311 | 9fdf0c29 | David Gibson | } |
312 | 9fdf0c29 | David Gibson | |
313 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |