Revision a050e24d
b/hw/pxa2xx.c | ||
---|---|---|
1233 | 1233 |
qemu_put_be32s(f, &s->last_rycr); |
1234 | 1234 |
qemu_put_be32s(f, &s->last_swcr); |
1235 | 1235 |
qemu_put_be32s(f, &s->last_rtcpicr); |
1236 |
qemu_put_be64s(f, &s->last_hz); |
|
1237 |
qemu_put_be64s(f, &s->last_sw); |
|
1238 |
qemu_put_be64s(f, &s->last_pi); |
|
1236 |
qemu_put_be64s(f, (uint64_t *) &s->last_hz);
|
|
1237 |
qemu_put_be64s(f, (uint64_t *) &s->last_sw);
|
|
1238 |
qemu_put_be64s(f, (uint64_t *) &s->last_pi);
|
|
1239 | 1239 |
} |
1240 | 1240 |
|
1241 | 1241 |
static int pxa2xx_rtc_load(QEMUFile *f, void *opaque, int version_id) |
... | ... | |
1257 | 1257 |
qemu_get_be32s(f, &s->last_rycr); |
1258 | 1258 |
qemu_get_be32s(f, &s->last_swcr); |
1259 | 1259 |
qemu_get_be32s(f, &s->last_rtcpicr); |
1260 |
qemu_get_be64s(f, &s->last_hz); |
|
1261 |
qemu_get_be64s(f, &s->last_sw); |
|
1262 |
qemu_get_be64s(f, &s->last_pi); |
|
1260 |
qemu_get_be64s(f, (uint64_t *) &s->last_hz);
|
|
1261 |
qemu_get_be64s(f, (uint64_t *) &s->last_sw);
|
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1262 |
qemu_get_be64s(f, (uint64_t *) &s->last_pi);
|
|
1263 | 1263 |
|
1264 | 1264 |
pxa2xx_rtc_alarm_update(s, s->rtsr); |
1265 | 1265 |
|
b/hw/pxa2xx_timer.c | ||
---|---|---|
372 | 372 |
pxa2xx_timer_info *s = (pxa2xx_timer_info *) opaque; |
373 | 373 |
int i; |
374 | 374 |
|
375 |
qemu_put_be32s(f, &s->clock); |
|
376 |
qemu_put_be32s(f, &s->oldclock); |
|
375 |
qemu_put_be32s(f, (uint32_t *) &s->clock);
|
|
376 |
qemu_put_be32s(f, (uint32_t *) &s->oldclock);
|
|
377 | 377 |
qemu_put_be64s(f, &s->lastload); |
378 | 378 |
|
379 | 379 |
for (i = 0; i < 4; i ++) { |
... | ... | |
384 | 384 |
for (i = 0; i < 8; i ++) { |
385 | 385 |
qemu_put_be32s(f, &s->tm4[i].tm.value); |
386 | 386 |
qemu_put_be32(f, s->tm4[i].tm.level); |
387 |
qemu_put_be32s(f, &s->tm4[i].oldclock); |
|
388 |
qemu_put_be32s(f, &s->tm4[i].clock); |
|
387 |
qemu_put_be32s(f, (uint32_t *) &s->tm4[i].oldclock);
|
|
388 |
qemu_put_be32s(f, (uint32_t *) &s->tm4[i].clock);
|
|
389 | 389 |
qemu_put_be64s(f, &s->tm4[i].lastload); |
390 | 390 |
qemu_put_be32s(f, &s->tm4[i].freq); |
391 | 391 |
qemu_put_be32s(f, &s->tm4[i].control); |
... | ... | |
403 | 403 |
int64_t now; |
404 | 404 |
int i; |
405 | 405 |
|
406 |
qemu_get_be32s(f, &s->clock); |
|
407 |
qemu_get_be32s(f, &s->oldclock); |
|
406 |
qemu_get_be32s(f, (uint32_t *) &s->clock);
|
|
407 |
qemu_get_be32s(f, (uint32_t *) &s->oldclock);
|
|
408 | 408 |
qemu_get_be64s(f, &s->lastload); |
409 | 409 |
|
410 | 410 |
now = qemu_get_clock(vm_clock); |
... | ... | |
418 | 418 |
for (i = 0; i < 8; i ++) { |
419 | 419 |
qemu_get_be32s(f, &s->tm4[i].tm.value); |
420 | 420 |
s->tm4[i].tm.level = qemu_get_be32(f); |
421 |
qemu_get_be32s(f, &s->tm4[i].oldclock); |
|
422 |
qemu_get_be32s(f, &s->tm4[i].clock); |
|
421 |
qemu_get_be32s(f, (uint32_t *) &s->tm4[i].oldclock);
|
|
422 |
qemu_get_be32s(f, (uint32_t *) &s->tm4[i].clock);
|
|
423 | 423 |
qemu_get_be64s(f, &s->tm4[i].lastload); |
424 | 424 |
qemu_get_be32s(f, &s->tm4[i].freq); |
425 | 425 |
qemu_get_be32s(f, &s->tm4[i].control); |
b/hw/tmp105.c | ||
---|---|---|
185 | 185 |
|
186 | 186 |
qemu_put_8s(f, &s->pointer); |
187 | 187 |
qemu_put_8s(f, &s->config); |
188 |
qemu_put_be16s(f, &s->temperature); |
|
189 |
qemu_put_be16s(f, &s->limit[0]); |
|
190 |
qemu_put_be16s(f, &s->limit[1]); |
|
188 |
qemu_put_be16s(f, (uint16_t *) &s->temperature);
|
|
189 |
qemu_put_be16s(f, (uint16_t *) &s->limit[0]);
|
|
190 |
qemu_put_be16s(f, (uint16_t *) &s->limit[1]);
|
|
191 | 191 |
qemu_put_byte(f, s->alarm); |
192 | 192 |
s->faults = tmp105_faultq[(s->config >> 3) & 3]; /* F */ |
193 | 193 |
|
... | ... | |
204 | 204 |
|
205 | 205 |
qemu_get_8s(f, &s->pointer); |
206 | 206 |
qemu_get_8s(f, &s->config); |
207 |
qemu_get_be16s(f, &s->temperature); |
|
208 |
qemu_get_be16s(f, &s->limit[0]); |
|
209 |
qemu_get_be16s(f, &s->limit[1]); |
|
207 |
qemu_get_be16s(f, (uint16_t *) &s->temperature);
|
|
208 |
qemu_get_be16s(f, (uint16_t *) &s->limit[0]);
|
|
209 |
qemu_get_be16s(f, (uint16_t *) &s->limit[1]);
|
|
210 | 210 |
s->alarm = qemu_get_byte(f); |
211 | 211 |
|
212 | 212 |
tmp105_interrupt_update(s); |
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