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/*
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 *  QEMU model of the Milkymist SD Card Controller.
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 *
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 *  Copyright (c) 2010 Michael Walle <michael@walle.cc>
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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 *
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 *
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 * Specification available at:
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 *   http://www.milkymist.org/socdoc/memcard.pdf
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 */
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#include "hw.h"
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#include "sysbus.h"
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#include "sysemu.h"
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#include "trace.h"
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#include "qemu-error.h"
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#include "blockdev.h"
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#include "sd.h"
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enum {
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    ENABLE_CMD_TX   = (1<<0),
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    ENABLE_CMD_RX   = (1<<1),
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    ENABLE_DAT_TX   = (1<<2),
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    ENABLE_DAT_RX   = (1<<3),
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};
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enum {
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    PENDING_CMD_TX   = (1<<0),
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    PENDING_CMD_RX   = (1<<1),
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    PENDING_DAT_TX   = (1<<2),
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    PENDING_DAT_RX   = (1<<3),
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};
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enum {
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    START_CMD_TX    = (1<<0),
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    START_DAT_RX    = (1<<1),
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};
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enum {
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    R_CLK2XDIV = 0,
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    R_ENABLE,
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    R_PENDING,
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    R_START,
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    R_CMD,
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    R_DAT,
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    R_MAX
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};
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struct MilkymistMemcardState {
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    SysBusDevice busdev;
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    MemoryRegion regs_region;
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    SDState *card;
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    int command_write_ptr;
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    int response_read_ptr;
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    int response_len;
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    int ignore_next_cmd;
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    int enabled;
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    uint8_t command[6];
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    uint8_t response[17];
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    uint32_t regs[R_MAX];
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};
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typedef struct MilkymistMemcardState MilkymistMemcardState;
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static void update_pending_bits(MilkymistMemcardState *s)
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{
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    /* transmits are instantaneous, thus tx pending bits are never set */
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    s->regs[R_PENDING] = 0;
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    /* if rx is enabled the corresponding pending bits are always set */
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    if (s->regs[R_ENABLE] & ENABLE_CMD_RX) {
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        s->regs[R_PENDING] |= PENDING_CMD_RX;
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    }
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    if (s->regs[R_ENABLE] & ENABLE_DAT_RX) {
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        s->regs[R_PENDING] |= PENDING_DAT_RX;
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    }
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}
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static void memcard_sd_command(MilkymistMemcardState *s)
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{
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    SDRequest req;
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    req.cmd = s->command[0] & 0x3f;
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    req.arg = (s->command[1] << 24) | (s->command[2] << 16)
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              | (s->command[3] << 8) | s->command[4];
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    req.crc = s->command[5];
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    s->response[0] = req.cmd;
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    s->response_len = sd_do_command(s->card, &req, s->response+1);
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    s->response_read_ptr = 0;
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    if (s->response_len == 16) {
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        /* R2 response */
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        s->response[0] = 0x3f;
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        s->response_len += 1;
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    } else if (s->response_len == 4) {
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        /* no crc calculation, insert dummy byte */
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        s->response[5] = 0;
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        s->response_len += 2;
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    }
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    if (req.cmd == 0) {
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        /* next write is a dummy byte to clock the initialization of the sd
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         * card */
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        s->ignore_next_cmd = 1;
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    }
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}
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static uint64_t memcard_read(void *opaque, target_phys_addr_t addr,
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                             unsigned size)
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{
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    MilkymistMemcardState *s = opaque;
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    uint32_t r = 0;
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    addr >>= 2;
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    switch (addr) {
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    case R_CMD:
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        if (!s->enabled) {
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            r = 0xff;
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        } else {
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            r = s->response[s->response_read_ptr++];
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            if (s->response_read_ptr > s->response_len) {
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                error_report("milkymist_memcard: "
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                        "read more cmd bytes than available. Clipping.");
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                s->response_read_ptr = 0;
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            }
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        }
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        break;
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    case R_DAT:
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        if (!s->enabled) {
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            r = 0xffffffff;
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        } else {
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            r = 0;
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            r |= sd_read_data(s->card) << 24;
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            r |= sd_read_data(s->card) << 16;
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            r |= sd_read_data(s->card) << 8;
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            r |= sd_read_data(s->card);
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        }
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        break;
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    case R_CLK2XDIV:
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    case R_ENABLE:
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    case R_PENDING:
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    case R_START:
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        r = s->regs[addr];
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        break;
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    default:
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        error_report("milkymist_memcard: read access to unknown register 0x"
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                TARGET_FMT_plx, addr << 2);
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        break;
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    }
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    trace_milkymist_memcard_memory_read(addr << 2, r);
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    return r;
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}
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static void memcard_write(void *opaque, target_phys_addr_t addr, uint64_t value,
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                          unsigned size)
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{
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    MilkymistMemcardState *s = opaque;
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    trace_milkymist_memcard_memory_write(addr, value);
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    addr >>= 2;
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    switch (addr) {
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    case R_PENDING:
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        /* clear rx pending bits */
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        s->regs[R_PENDING] &= ~(value & (PENDING_CMD_RX | PENDING_DAT_RX));
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        update_pending_bits(s);
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        break;
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    case R_CMD:
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        if (!s->enabled) {
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            break;
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        }
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        if (s->ignore_next_cmd) {
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            s->ignore_next_cmd = 0;
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            break;
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        }
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        s->command[s->command_write_ptr] = value & 0xff;
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        s->command_write_ptr = (s->command_write_ptr + 1) % 6;
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        if (s->command_write_ptr == 0) {
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            memcard_sd_command(s);
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        }
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        break;
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    case R_DAT:
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        if (!s->enabled) {
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            break;
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        }
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        sd_write_data(s->card, (value >> 24) & 0xff);
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        sd_write_data(s->card, (value >> 16) & 0xff);
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        sd_write_data(s->card, (value >> 8) & 0xff);
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        sd_write_data(s->card, value & 0xff);
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        break;
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    case R_ENABLE:
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        s->regs[addr] = value;
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        update_pending_bits(s);
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        break;
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    case R_CLK2XDIV:
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    case R_START:
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        s->regs[addr] = value;
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        break;
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    default:
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        error_report("milkymist_memcard: write access to unknown register 0x"
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                TARGET_FMT_plx, addr << 2);
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        break;
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    }
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}
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static const MemoryRegionOps memcard_mmio_ops = {
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    .read = memcard_read,
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    .write = memcard_write,
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    .valid = {
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        .min_access_size = 4,
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        .max_access_size = 4,
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    },
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    .endianness = DEVICE_NATIVE_ENDIAN,
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};
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static void milkymist_memcard_reset(DeviceState *d)
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{
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    MilkymistMemcardState *s =
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            container_of(d, MilkymistMemcardState, busdev.qdev);
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    int i;
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    s->command_write_ptr = 0;
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    s->response_read_ptr = 0;
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    s->response_len = 0;
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    for (i = 0; i < R_MAX; i++) {
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        s->regs[i] = 0;
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    }
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}
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static int milkymist_memcard_init(SysBusDevice *dev)
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{
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    MilkymistMemcardState *s = FROM_SYSBUS(typeof(*s), dev);
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    DriveInfo *dinfo;
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    dinfo = drive_get_next(IF_SD);
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    s->card = sd_init(dinfo ? dinfo->bdrv : NULL, 0);
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    s->enabled = dinfo ? bdrv_is_inserted(dinfo->bdrv) : 0;
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    memory_region_init_io(&s->regs_region, &memcard_mmio_ops, s,
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            "milkymist-memcard", R_MAX * 4);
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    sysbus_init_mmio(dev, &s->regs_region);
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    return 0;
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}
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static const VMStateDescription vmstate_milkymist_memcard = {
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    .name = "milkymist-memcard",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .minimum_version_id_old = 1,
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    .fields      = (VMStateField[]) {
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        VMSTATE_INT32(command_write_ptr, MilkymistMemcardState),
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        VMSTATE_INT32(response_read_ptr, MilkymistMemcardState),
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        VMSTATE_INT32(response_len, MilkymistMemcardState),
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        VMSTATE_INT32(ignore_next_cmd, MilkymistMemcardState),
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        VMSTATE_INT32(enabled, MilkymistMemcardState),
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        VMSTATE_UINT8_ARRAY(command, MilkymistMemcardState, 6),
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        VMSTATE_UINT8_ARRAY(response, MilkymistMemcardState, 17),
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        VMSTATE_UINT32_ARRAY(regs, MilkymistMemcardState, R_MAX),
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        VMSTATE_END_OF_LIST()
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    }
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};
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static SysBusDeviceInfo milkymist_memcard_info = {
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    .init = milkymist_memcard_init,
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    .qdev.name  = "milkymist-memcard",
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    .qdev.size  = sizeof(MilkymistMemcardState),
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    .qdev.vmsd  = &vmstate_milkymist_memcard,
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    .qdev.reset = milkymist_memcard_reset,
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};
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static void milkymist_memcard_register(void)
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{
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    sysbus_register_withprop(&milkymist_memcard_info);
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}
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device_init(milkymist_memcard_register)