Revision a15fdf86
| b/hw/lsi53c895a.c | ||
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| 10 | 10 |
/* ??? Need to check if the {read,write}[wl] routines work properly on
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big-endian targets. */ |
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#include <assert.h> \
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#include <assert.h> |
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#include "hw.h" |
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#include "pci.h" |
| ... | ... | |
| 185 | 185 |
int carry; /* ??? Should this be an a visible register somewhere? */ |
| 186 | 186 |
int sense; |
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/* Action to take at the end of a MSG IN phase. |
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0 = COMMAND, 1 = disconect, 2 = DATA OUT, 3 = DATA IN. */ |
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0 = COMMAND, 1 = disconnect, 2 = DATA OUT, 3 = DATA IN. */
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int msg_action; |
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int msg_len; |
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uint8_t msg[LSI_MAX_MSGIN_LEN]; |
| ... | ... | |
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lsi_set_phase(s, PHASE_MO); |
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break; |
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case 1: /* Disconnect */ |
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DPRINTF("Wait Disconect\n");
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DPRINTF("Wait Disconnect\n");
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s->scntl1 &= ~LSI_SCNTL1_CON; |
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break; |
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case 2: /* Wait Reselect */ |
| ... | ... | |
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SCRIPTS register move instructions are. */ |
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s->sfbr = val; |
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break; |
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case 0x0a: case 0x0b:
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case 0x0a: case 0x0b: |
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/* Openserver writes to these readonly registers on startup */ |
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return;
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return; |
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case 0x0c: case 0x0d: case 0x0e: case 0x0f: |
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/* Linux writes to these readonly registers on startup. */ |
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return; |
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