Archipelago » qemu

/*

 * vfio based device assignment support

 *

 * Copyright Red Hat, Inc. 2012

 *

 * Authors:

 *  Alex Williamson <alex.williamson@redhat.com>

 *

 * This work is licensed under the terms of the GNU GPL, version 2.  See

 * the COPYING file in the top-level directory.

 *

 * Based on qemu-kvm device-assignment:

 *  Adapted for KVM by Qumranet.

 *  Copyright (c) 2007, Neocleus, Alex Novik (alex@neocleus.com)

 *  Copyright (c) 2007, Neocleus, Guy Zana (guy@neocleus.com)

 *  Copyright (C) 2008, Qumranet, Amit Shah (amit.shah@qumranet.com)

 *  Copyright (C) 2008, Red Hat, Amit Shah (amit.shah@redhat.com)

 *  Copyright (C) 2008, IBM, Muli Ben-Yehuda (muli@il.ibm.com)

 */

#include <dirent.h>

#include <unistd.h>

#include <sys/ioctl.h>

#include <sys/mman.h>

#include <sys/stat.h>

#include <sys/types.h>

#include <linux/vfio.h>

#include "config.h"

#include "event_notifier.h"

#include "exec-memory.h"

#include "kvm.h"

#include "memory.h"

#include "msi.h"

#include "msix.h"

#include "pci.h"

#include "qemu-common.h"

#include "qemu-error.h"

#include "qemu-queue.h"

#include "range.h"

/* #define DEBUG_VFIO */

#ifdef DEBUG_VFIO

#define DPRINTF(fmt, ...) \

    do { fprintf(stderr, "vfio: " fmt, ## __VA_ARGS__); } while (0)

#else

#define DPRINTF(fmt, ...) \

    do { } while (0)

#endif

typedef struct VFIOBAR {

    off_t fd_offset; /* offset of BAR within device fd */

    int fd; /* device fd, allows us to pass VFIOBAR as opaque data */

    MemoryRegion mem; /* slow, read/write access */

    MemoryRegion mmap_mem; /* direct mapped access */

    void *mmap;

    size_t size;

    uint32_t flags; /* VFIO region flags (rd/wr/mmap) */

    uint8_t nr; /* cache the BAR number for debug */

} VFIOBAR;

typedef struct VFIOINTx {

    bool pending; /* interrupt pending */

    bool kvm_accel; /* set when QEMU bypass through KVM enabled */

    uint8_t pin; /* which pin to pull for qemu_set_irq */

    EventNotifier interrupt; /* eventfd triggered on interrupt */

    EventNotifier unmask; /* eventfd for unmask on QEMU bypass */

    PCIINTxRoute route; /* routing info for QEMU bypass */

    uint32_t mmap_timeout; /* delay to re-enable mmaps after interrupt */

    QEMUTimer *mmap_timer; /* enable mmaps after periods w/o interrupts */

} VFIOINTx;

struct VFIODevice;

typedef struct VFIOMSIVector {

    EventNotifier interrupt; /* eventfd triggered on interrupt */

    struct VFIODevice *vdev; /* back pointer to device */

    int virq; /* KVM irqchip route for QEMU bypass */

    bool use;

} VFIOMSIVector;

enum {

    VFIO_INT_NONE = 0,

    VFIO_INT_INTx = 1,

    VFIO_INT_MSI  = 2,

    VFIO_INT_MSIX = 3,

};

struct VFIOGroup;

typedef struct VFIOContainer {

    int fd; /* /dev/vfio/vfio, empowered by the attached groups */

    struct {

        /* enable abstraction to support various iommu backends */

        union {

            MemoryListener listener; /* Used by type1 iommu */

        };

        void (*release)(struct VFIOContainer *);

    } iommu_data;

    QLIST_HEAD(, VFIOGroup) group_list;

    QLIST_ENTRY(VFIOContainer) next;

} VFIOContainer;

/* Cache of MSI-X setup plus extra mmap and memory region for split BAR map */

typedef struct VFIOMSIXInfo {

    uint8_t table_bar;

    uint8_t pba_bar;

    uint16_t entries;

    uint32_t table_offset;

    uint32_t pba_offset;

    MemoryRegion mmap_mem;

    void *mmap;

} VFIOMSIXInfo;

typedef struct VFIODevice {

    PCIDevice pdev;

    int fd;

    VFIOINTx intx;

    unsigned int config_size;

    off_t config_offset; /* Offset of config space region within device fd */

    unsigned int rom_size;

    off_t rom_offset; /* Offset of ROM region within device fd */

    int msi_cap_size;

    VFIOMSIVector *msi_vectors;

    VFIOMSIXInfo *msix;

    int nr_vectors; /* Number of MSI/MSIX vectors currently in use */

    int interrupt; /* Current interrupt type */

    VFIOBAR bars[PCI_NUM_REGIONS - 1]; /* No ROM */

    PCIHostDeviceAddress host;

    QLIST_ENTRY(VFIODevice) next;

    struct VFIOGroup *group;

    bool reset_works;

} VFIODevice;

typedef struct VFIOGroup {

    int fd;

    int groupid;

    VFIOContainer *container;

    QLIST_HEAD(, VFIODevice) device_list;

    QLIST_ENTRY(VFIOGroup) next;

    QLIST_ENTRY(VFIOGroup) container_next;

} VFIOGroup;

#define MSIX_CAP_LENGTH 12

static QLIST_HEAD(, VFIOContainer)

    container_list = QLIST_HEAD_INITIALIZER(container_list);

static QLIST_HEAD(, VFIOGroup)

    group_list = QLIST_HEAD_INITIALIZER(group_list);

static void vfio_disable_interrupts(VFIODevice *vdev);

static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len);

static void vfio_mmap_set_enabled(VFIODevice *vdev, bool enabled);

/*

 * Common VFIO interrupt disable

 */

static void vfio_disable_irqindex(VFIODevice *vdev, int index)

{

    struct vfio_irq_set irq_set = {

        .argsz = sizeof(irq_set),

        .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_TRIGGER,

        .index = index,

        .start = 0,

        .count = 0,

    };

    ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);

}

/*

 * INTx

 */

static void vfio_unmask_intx(VFIODevice *vdev)

{

    struct vfio_irq_set irq_set = {

        .argsz = sizeof(irq_set),

        .flags = VFIO_IRQ_SET_DATA_NONE | VFIO_IRQ_SET_ACTION_UNMASK,

        .index = VFIO_PCI_INTX_IRQ_INDEX,

        .start = 0,

        .count = 1,

    };

    ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, &irq_set);

}

/*

 * Disabling BAR mmaping can be slow, but toggling it around INTx can

 * also be a huge overhead.  We try to get the best of both worlds by

 * waiting until an interrupt to disable mmaps (subsequent transitions

 * to the same state are effectively no overhead).  If the interrupt has

 * been serviced and the time gap is long enough, we re-enable mmaps for

 * performance.  This works well for things like graphics cards, which

 * may not use their interrupt at all and are penalized to an unusable

 * level by read/write BAR traps.  Other devices, like NICs, have more

 * regular interrupts and see much better latency by staying in non-mmap

 * mode.  We therefore set the default mmap_timeout such that a ping

 * is just enough to keep the mmap disabled.  Users can experiment with

 * other options with the x-intx-mmap-timeout-ms parameter (a value of

 * zero disables the timer).

 */

static void vfio_intx_mmap_enable(void *opaque)

{

    VFIODevice *vdev = opaque;

    if (vdev->intx.pending) {

        qemu_mod_timer(vdev->intx.mmap_timer,

                       qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);

        return;

    }

    vfio_mmap_set_enabled(vdev, true);

}

static void vfio_intx_interrupt(void *opaque)

{

    VFIODevice *vdev = opaque;

    if (!event_notifier_test_and_clear(&vdev->intx.interrupt)) {

        return;

    }

    DPRINTF("%s(%04x:%02x:%02x.%x) Pin %c\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function,

            'A' + vdev->intx.pin);

    vdev->intx.pending = true;

    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 1);

    vfio_mmap_set_enabled(vdev, false);

    if (vdev->intx.mmap_timeout) {

        qemu_mod_timer(vdev->intx.mmap_timer,

                       qemu_get_clock_ms(vm_clock) + vdev->intx.mmap_timeout);

    }

}

static void vfio_eoi(VFIODevice *vdev)

{

    if (!vdev->intx.pending) {

        return;

    }

    DPRINTF("%s(%04x:%02x:%02x.%x) EOI\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function);

    vdev->intx.pending = false;

    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);

    vfio_unmask_intx(vdev);

}

static int vfio_enable_intx(VFIODevice *vdev)

{

    uint8_t pin = vfio_pci_read_config(&vdev->pdev, PCI_INTERRUPT_PIN, 1);

    int ret, argsz;

    struct vfio_irq_set *irq_set;

    int32_t *pfd;

    if (!pin) {

        return 0;

    }

    vfio_disable_interrupts(vdev);

    vdev->intx.pin = pin - 1; /* Pin A (1) -> irq[0] */

    ret = event_notifier_init(&vdev->intx.interrupt, 0);

    if (ret) {

        error_report("vfio: Error: event_notifier_init failed\n");

        return ret;

    }

    argsz = sizeof(*irq_set) + sizeof(*pfd);

    irq_set = g_malloc0(argsz);

    irq_set->argsz = argsz;

    irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;

    irq_set->index = VFIO_PCI_INTX_IRQ_INDEX;

    irq_set->start = 0;

    irq_set->count = 1;

    pfd = (int32_t *)&irq_set->data;

    *pfd = event_notifier_get_fd(&vdev->intx.interrupt);

    qemu_set_fd_handler(*pfd, vfio_intx_interrupt, NULL, vdev);

    ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);

    g_free(irq_set);

    if (ret) {

        error_report("vfio: Error: Failed to setup INTx fd: %m\n");

        qemu_set_fd_handler(*pfd, NULL, NULL, vdev);

        event_notifier_cleanup(&vdev->intx.interrupt);

        return -errno;

    }

    vdev->interrupt = VFIO_INT_INTx;

    DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function);

    return 0;

}

static void vfio_disable_intx(VFIODevice *vdev)

{

    int fd;

    qemu_del_timer(vdev->intx.mmap_timer);

    vfio_disable_irqindex(vdev, VFIO_PCI_INTX_IRQ_INDEX);

    vdev->intx.pending = false;

    qemu_set_irq(vdev->pdev.irq[vdev->intx.pin], 0);

    vfio_mmap_set_enabled(vdev, true);

    fd = event_notifier_get_fd(&vdev->intx.interrupt);

    qemu_set_fd_handler(fd, NULL, NULL, vdev);

    event_notifier_cleanup(&vdev->intx.interrupt);

    vdev->interrupt = VFIO_INT_NONE;

    DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function);

}

/*

 * MSI/X

 */

static void vfio_msi_interrupt(void *opaque)

{

    VFIOMSIVector *vector = opaque;

    VFIODevice *vdev = vector->vdev;

    int nr = vector - vdev->msi_vectors;

    if (!event_notifier_test_and_clear(&vector->interrupt)) {

        return;

    }

    DPRINTF("%s(%04x:%02x:%02x.%x) vector %d\n", __func__,

            vdev->host.domain, vdev->host.bus, vdev->host.slot,

            vdev->host.function, nr);

    if (vdev->interrupt == VFIO_INT_MSIX) {

        msix_notify(&vdev->pdev, nr);

    } else if (vdev->interrupt == VFIO_INT_MSI) {

        msi_notify(&vdev->pdev, nr);

    } else {

        error_report("vfio: MSI interrupt receieved, but not enabled?\n");

    }

}

static int vfio_enable_vectors(VFIODevice *vdev, bool msix)

{

    struct vfio_irq_set *irq_set;

    int ret = 0, i, argsz;

    int32_t *fds;

    argsz = sizeof(*irq_set) + (vdev->nr_vectors * sizeof(*fds));

    irq_set = g_malloc0(argsz);

    irq_set->argsz = argsz;

    irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD | VFIO_IRQ_SET_ACTION_TRIGGER;

    irq_set->index = msix ? VFIO_PCI_MSIX_IRQ_INDEX : VFIO_PCI_MSI_IRQ_INDEX;

    irq_set->start = 0;

    irq_set->count = vdev->nr_vectors;

    fds = (int32_t *)&irq_set->data;

    for (i = 0; i < vdev->nr_vectors; i++) {

        if (!vdev->msi_vectors[i].use) {

            fds[i] = -1;

            continue;

        }

        fds[i] = event_notifier_get_fd(&vdev->msi_vectors[i].interrupt);

    }

    ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);

    g_free(irq_set);

    return ret;

}

static int vfio_msix_vector_use(PCIDevice *pdev,

                                unsigned int nr, MSIMessage msg)

{

    VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);

    VFIOMSIVector *vector;

    int ret;

    DPRINTF("%s(%04x:%02x:%02x.%x) vector %d used\n", __func__,

            vdev->host.domain, vdev->host.bus, vdev->host.slot,

            vdev->host.function, nr);

    vector = &vdev->msi_vectors[nr];

    vector->vdev = vdev;

    vector->use = true;

    msix_vector_use(pdev, nr);

    if (event_notifier_init(&vector->interrupt, 0)) {

        error_report("vfio: Error: event_notifier_init failed\n");

    }

    /*

     * Attempt to enable route through KVM irqchip,

     * default to userspace handling if unavailable.

     */

    vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);

    if (vector->virq < 0 ||

        kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,

                                       vector->virq) < 0) {

        if (vector->virq >= 0) {

            kvm_irqchip_release_virq(kvm_state, vector->virq);

            vector->virq = -1;

        }

        qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),

                            vfio_msi_interrupt, NULL, vector);

    }

    /*

     * We don't want to have the host allocate all possible MSI vectors

     * for a device if they're not in use, so we shutdown and incrementally

     * increase them as needed.

     */

    if (vdev->nr_vectors < nr + 1) {

        vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);

        vdev->nr_vectors = nr + 1;

        ret = vfio_enable_vectors(vdev, true);

        if (ret) {

            error_report("vfio: failed to enable vectors, %d\n", ret);

        }

    } else {

        int argsz;

        struct vfio_irq_set *irq_set;

        int32_t *pfd;

        argsz = sizeof(*irq_set) + sizeof(*pfd);

        irq_set = g_malloc0(argsz);

        irq_set->argsz = argsz;

        irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |

                         VFIO_IRQ_SET_ACTION_TRIGGER;

        irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;

        irq_set->start = nr;

        irq_set->count = 1;

        pfd = (int32_t *)&irq_set->data;

        *pfd = event_notifier_get_fd(&vector->interrupt);

        ret = ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);

        g_free(irq_set);

        if (ret) {

            error_report("vfio: failed to modify vector, %d\n", ret);

        }

    }

    return 0;

}

static void vfio_msix_vector_release(PCIDevice *pdev, unsigned int nr)

{

    VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);

    VFIOMSIVector *vector = &vdev->msi_vectors[nr];

    int argsz;

    struct vfio_irq_set *irq_set;

    int32_t *pfd;

    DPRINTF("%s(%04x:%02x:%02x.%x) vector %d released\n", __func__,

            vdev->host.domain, vdev->host.bus, vdev->host.slot,

            vdev->host.function, nr);

    /*

     * XXX What's the right thing to do here?  This turns off the interrupt

     * completely, but do we really just want to switch the interrupt to

     * bouncing through userspace and let msix.c drop it?  Not sure.

     */

    msix_vector_unuse(pdev, nr);

    argsz = sizeof(*irq_set) + sizeof(*pfd);

    irq_set = g_malloc0(argsz);

    irq_set->argsz = argsz;

    irq_set->flags = VFIO_IRQ_SET_DATA_EVENTFD |

                     VFIO_IRQ_SET_ACTION_TRIGGER;

    irq_set->index = VFIO_PCI_MSIX_IRQ_INDEX;

    irq_set->start = nr;

    irq_set->count = 1;

    pfd = (int32_t *)&irq_set->data;

    *pfd = -1;

    ioctl(vdev->fd, VFIO_DEVICE_SET_IRQS, irq_set);

    g_free(irq_set);

    if (vector->virq < 0) {

        qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),

                            NULL, NULL, NULL);

    } else {

        kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,

                                          vector->virq);

        kvm_irqchip_release_virq(kvm_state, vector->virq);

        vector->virq = -1;

    }

    event_notifier_cleanup(&vector->interrupt);

    vector->use = false;

}

/* TODO This should move to msi.c */

static MSIMessage msi_get_msg(PCIDevice *pdev, unsigned int vector)

{

    uint16_t flags = pci_get_word(pdev->config + pdev->msi_cap + PCI_MSI_FLAGS);

    bool msi64bit = flags & PCI_MSI_FLAGS_64BIT;

    MSIMessage msg;

    if (msi64bit) {

        msg.address = pci_get_quad(pdev->config +

                                   pdev->msi_cap + PCI_MSI_ADDRESS_LO);

    } else {

        msg.address = pci_get_long(pdev->config +

                                   pdev->msi_cap + PCI_MSI_ADDRESS_LO);

    }

    msg.data = pci_get_word(pdev->config + pdev->msi_cap +

                            (msi64bit ? PCI_MSI_DATA_64 : PCI_MSI_DATA_32));

    msg.data += vector;

    return msg;

}

static void vfio_enable_msix(VFIODevice *vdev)

{

    vfio_disable_interrupts(vdev);

    vdev->msi_vectors = g_malloc0(vdev->msix->entries * sizeof(VFIOMSIVector));

    vdev->interrupt = VFIO_INT_MSIX;

    if (msix_set_vector_notifiers(&vdev->pdev, vfio_msix_vector_use,

                                  vfio_msix_vector_release)) {

        error_report("vfio: msix_set_vector_notifiers failed\n");

    }

    DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function);

}

static void vfio_enable_msi(VFIODevice *vdev)

{

    int ret, i;

    vfio_disable_interrupts(vdev);

    vdev->nr_vectors = msi_nr_vectors_allocated(&vdev->pdev);

retry:

    vdev->msi_vectors = g_malloc0(vdev->nr_vectors * sizeof(VFIOMSIVector));

    for (i = 0; i < vdev->nr_vectors; i++) {

        MSIMessage msg;

        VFIOMSIVector *vector = &vdev->msi_vectors[i];

        vector->vdev = vdev;

        vector->use = true;

        if (event_notifier_init(&vector->interrupt, 0)) {

            error_report("vfio: Error: event_notifier_init failed\n");

        }

        msg = msi_get_msg(&vdev->pdev, i);

        /*

         * Attempt to enable route through KVM irqchip,

         * default to userspace handling if unavailable.

         */

        vector->virq = kvm_irqchip_add_msi_route(kvm_state, msg);

        if (vector->virq < 0 ||

            kvm_irqchip_add_irqfd_notifier(kvm_state, &vector->interrupt,

                                           vector->virq) < 0) {

            qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),

                                vfio_msi_interrupt, NULL, vector);

        }

    }

    ret = vfio_enable_vectors(vdev, false);

    if (ret) {

        if (ret < 0) {

            error_report("vfio: Error: Failed to setup MSI fds: %m\n");

        } else if (ret != vdev->nr_vectors) {

            error_report("vfio: Error: Failed to enable %d "

                         "MSI vectors, retry with %d\n", vdev->nr_vectors, ret);

        }

        for (i = 0; i < vdev->nr_vectors; i++) {

            VFIOMSIVector *vector = &vdev->msi_vectors[i];

            if (vector->virq >= 0) {

                kvm_irqchip_remove_irqfd_notifier(kvm_state, &vector->interrupt,

                                                  vector->virq);

                kvm_irqchip_release_virq(kvm_state, vector->virq);

                vector->virq = -1;

            } else {

                qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),

                                    NULL, NULL, NULL);

            }

            event_notifier_cleanup(&vector->interrupt);

        }

        g_free(vdev->msi_vectors);

        if (ret > 0 && ret != vdev->nr_vectors) {

            vdev->nr_vectors = ret;

            goto retry;

        }

        vdev->nr_vectors = 0;

        return;

    }

    vdev->interrupt = VFIO_INT_MSI;

    DPRINTF("%s(%04x:%02x:%02x.%x) Enabled %d MSI vectors\n", __func__,

            vdev->host.domain, vdev->host.bus, vdev->host.slot,

            vdev->host.function, vdev->nr_vectors);

}

static void vfio_disable_msi_common(VFIODevice *vdev)

{

    g_free(vdev->msi_vectors);

    vdev->msi_vectors = NULL;

    vdev->nr_vectors = 0;

    vdev->interrupt = VFIO_INT_NONE;

    vfio_enable_intx(vdev);

}

static void vfio_disable_msix(VFIODevice *vdev)

{

    msix_unset_vector_notifiers(&vdev->pdev);

    if (vdev->nr_vectors) {

        vfio_disable_irqindex(vdev, VFIO_PCI_MSIX_IRQ_INDEX);

    }

    vfio_disable_msi_common(vdev);

    DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function);

}

static void vfio_disable_msi(VFIODevice *vdev)

{

    int i;

    vfio_disable_irqindex(vdev, VFIO_PCI_MSI_IRQ_INDEX);

    for (i = 0; i < vdev->nr_vectors; i++) {

        VFIOMSIVector *vector = &vdev->msi_vectors[i];

        if (!vector->use) {

            continue;

        }

        if (vector->virq >= 0) {

            kvm_irqchip_remove_irqfd_notifier(kvm_state,

                                              &vector->interrupt, vector->virq);

            kvm_irqchip_release_virq(kvm_state, vector->virq);

            vector->virq = -1;

        } else {

            qemu_set_fd_handler(event_notifier_get_fd(&vector->interrupt),

                                NULL, NULL, NULL);

        }

        event_notifier_cleanup(&vector->interrupt);

    }

    vfio_disable_msi_common(vdev);

    DPRINTF("%s(%04x:%02x:%02x.%x)\n", __func__, vdev->host.domain,

            vdev->host.bus, vdev->host.slot, vdev->host.function);

}

/*

 * IO Port/MMIO - Beware of the endians, VFIO is always little endian

 */

static void vfio_bar_write(void *opaque, hwaddr addr,

                           uint64_t data, unsigned size)

{

    VFIOBAR *bar = opaque;

    union {

        uint8_t byte;

        uint16_t word;

        uint32_t dword;

        uint64_t qword;

    } buf;

    switch (size) {

    case 1:

        buf.byte = data;

        break;

    case 2:

        buf.word = cpu_to_le16(data);

        break;

    case 4:

        buf.dword = cpu_to_le32(data);

        break;

    default:

        hw_error("vfio: unsupported write size, %d bytes\n", size);

        break;

    }

    if (pwrite(bar->fd, &buf, size, bar->fd_offset + addr) != size) {

        error_report("%s(,0x%"HWADDR_PRIx", 0x%"PRIx64", %d) failed: %m\n",

                     __func__, addr, data, size);

    }

    DPRINTF("%s(BAR%d+0x%"HWADDR_PRIx", 0x%"PRIx64", %d)\n",

            __func__, bar->nr, addr, data, size);

    /*

     * A read or write to a BAR always signals an INTx EOI.  This will

     * do nothing if not pending (including not in INTx mode).  We assume

     * that a BAR access is in response to an interrupt and that BAR

     * accesses will service the interrupt.  Unfortunately, we don't know

     * which access will service the interrupt, so we're potentially

     * getting quite a few host interrupts per guest interrupt.

     */

    vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));

}

static uint64_t vfio_bar_read(void *opaque,

                              hwaddr addr, unsigned size)

{

    VFIOBAR *bar = opaque;

    union {

        uint8_t byte;

        uint16_t word;

        uint32_t dword;

        uint64_t qword;

    } buf;

    uint64_t data = 0;

    if (pread(bar->fd, &buf, size, bar->fd_offset + addr) != size) {

        error_report("%s(,0x%"HWADDR_PRIx", %d) failed: %m\n",

                     __func__, addr, size);

        return (uint64_t)-1;

    }

    switch (size) {

    case 1:

        data = buf.byte;

        break;

    case 2:

        data = le16_to_cpu(buf.word);

        break;

    case 4:

        data = le32_to_cpu(buf.dword);

        break;

    default:

        hw_error("vfio: unsupported read size, %d bytes\n", size);

        break;

    }

    DPRINTF("%s(BAR%d+0x%"HWADDR_PRIx", %d) = 0x%"PRIx64"\n",

            __func__, bar->nr, addr, size, data);

    /* Same as write above */

    vfio_eoi(container_of(bar, VFIODevice, bars[bar->nr]));

    return data;

}

static const MemoryRegionOps vfio_bar_ops = {

    .read = vfio_bar_read,

    .write = vfio_bar_write,

    .endianness = DEVICE_LITTLE_ENDIAN,

};

/*

 * PCI config space

 */

static uint32_t vfio_pci_read_config(PCIDevice *pdev, uint32_t addr, int len)

{

    VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);

    uint32_t val = 0;

    /*

     * We only need QEMU PCI config support for the ROM BAR, the MSI and MSIX

     * capabilities, and the multifunction bit below.  We let VFIO handle

     * virtualizing everything else.  Performance is not a concern here.

     */

    if (ranges_overlap(addr, len, PCI_ROM_ADDRESS, 4) ||

        (pdev->cap_present & QEMU_PCI_CAP_MSIX &&

         ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) ||

        (pdev->cap_present & QEMU_PCI_CAP_MSI &&

         ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size))) {

        val = pci_default_read_config(pdev, addr, len);

    } else {

        if (pread(vdev->fd, &val, len, vdev->config_offset + addr) != len) {

            error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x) failed: %m\n",

                         __func__, vdev->host.domain, vdev->host.bus,

                         vdev->host.slot, vdev->host.function, addr, len);

            return -errno;

        }

        val = le32_to_cpu(val);

    }

    /* Multifunction bit is virualized in QEMU */

    if (unlikely(ranges_overlap(addr, len, PCI_HEADER_TYPE, 1))) {

        uint32_t mask = PCI_HEADER_TYPE_MULTI_FUNCTION;

        if (len == 4) {

            mask <<= 16;

        }

        if (pdev->cap_present & QEMU_PCI_CAP_MULTIFUNCTION) {

            val |= mask;

        } else {

            val &= ~mask;

        }

    }

    DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, len=0x%x) %x\n", __func__,

            vdev->host.domain, vdev->host.bus, vdev->host.slot,

            vdev->host.function, addr, len, val);

    return val;

}

static void vfio_pci_write_config(PCIDevice *pdev, uint32_t addr,

                                  uint32_t val, int len)

{

    VFIODevice *vdev = DO_UPCAST(VFIODevice, pdev, pdev);

    uint32_t val_le = cpu_to_le32(val);

    DPRINTF("%s(%04x:%02x:%02x.%x, @0x%x, 0x%x, len=0x%x)\n", __func__,

            vdev->host.domain, vdev->host.bus, vdev->host.slot,

            vdev->host.function, addr, val, len);

    /* Write everything to VFIO, let it filter out what we can't write */

    if (pwrite(vdev->fd, &val_le, len, vdev->config_offset + addr) != len) {

        error_report("%s(%04x:%02x:%02x.%x, 0x%x, 0x%x, 0x%x) failed: %m\n",

                     __func__, vdev->host.domain, vdev->host.bus,

                     vdev->host.slot, vdev->host.function, addr, val, len);

    }

    /* Write standard header bits to emulation */

    if (addr < PCI_CONFIG_HEADER_SIZE) {

        pci_default_write_config(pdev, addr, val, len);

        return;

    }

    /* MSI/MSI-X Enabling/Disabling */

    if (pdev->cap_present & QEMU_PCI_CAP_MSI &&

        ranges_overlap(addr, len, pdev->msi_cap, vdev->msi_cap_size)) {

        int is_enabled, was_enabled = msi_enabled(pdev);

        pci_default_write_config(pdev, addr, val, len);

        is_enabled = msi_enabled(pdev);

        if (!was_enabled && is_enabled) {

            vfio_enable_msi(vdev);

        } else if (was_enabled && !is_enabled) {

            vfio_disable_msi(vdev);

        }

    }

    if (pdev->cap_present & QEMU_PCI_CAP_MSIX &&

        ranges_overlap(addr, len, pdev->msix_cap, MSIX_CAP_LENGTH)) {

        int is_enabled, was_enabled = msix_enabled(pdev);

        pci_default_write_config(pdev, addr, val, len);

        is_enabled = msix_enabled(pdev);

        if (!was_enabled && is_enabled) {

            vfio_enable_msix(vdev);

        } else if (was_enabled && !is_enabled) {

            vfio_disable_msix(vdev);

        }

    }

}

/*

 * DMA - Mapping and unmapping for the "type1" IOMMU interface used on x86

 */

static int vfio_dma_unmap(VFIOContainer *container,

                          hwaddr iova, ram_addr_t size)

{

    struct vfio_iommu_type1_dma_unmap unmap = {

        .argsz = sizeof(unmap),

        .flags = 0,

        .iova = iova,

        .size = size,

    };

    if (ioctl(container->fd, VFIO_IOMMU_UNMAP_DMA, &unmap)) {

        DPRINTF("VFIO_UNMAP_DMA: %d\n", -errno);

        return -errno;

    }

    return 0;

}

static int vfio_dma_map(VFIOContainer *container, hwaddr iova,