root / hw / xilinx_timer.c @ a1bc20df
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1 | 388f60b1 | Edgar E. Iglesias | /*
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2 | 388f60b1 | Edgar E. Iglesias | * QEMU model of the Xilinx timer block.
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3 | 388f60b1 | Edgar E. Iglesias | *
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4 | 388f60b1 | Edgar E. Iglesias | * Copyright (c) 2009 Edgar E. Iglesias.
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5 | 388f60b1 | Edgar E. Iglesias | *
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6 | 388f60b1 | Edgar E. Iglesias | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 388f60b1 | Edgar E. Iglesias | * of this software and associated documentation files (the "Software"), to deal
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8 | 388f60b1 | Edgar E. Iglesias | * in the Software without restriction, including without limitation the rights
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9 | 388f60b1 | Edgar E. Iglesias | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 388f60b1 | Edgar E. Iglesias | * copies of the Software, and to permit persons to whom the Software is
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11 | 388f60b1 | Edgar E. Iglesias | * furnished to do so, subject to the following conditions:
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12 | 388f60b1 | Edgar E. Iglesias | *
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13 | 388f60b1 | Edgar E. Iglesias | * The above copyright notice and this permission notice shall be included in
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14 | 388f60b1 | Edgar E. Iglesias | * all copies or substantial portions of the Software.
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15 | 388f60b1 | Edgar E. Iglesias | *
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16 | 388f60b1 | Edgar E. Iglesias | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 388f60b1 | Edgar E. Iglesias | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 388f60b1 | Edgar E. Iglesias | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 388f60b1 | Edgar E. Iglesias | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 388f60b1 | Edgar E. Iglesias | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 388f60b1 | Edgar E. Iglesias | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 388f60b1 | Edgar E. Iglesias | * THE SOFTWARE.
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23 | 388f60b1 | Edgar E. Iglesias | */
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24 | 388f60b1 | Edgar E. Iglesias | |
25 | 388f60b1 | Edgar E. Iglesias | #include "sysbus.h" |
26 | 49d4d9b6 | Paolo Bonzini | #include "ptimer.h" |
27 | 8354cd72 | Chris Wulff | #include "qemu-log.h" |
28 | 388f60b1 | Edgar E. Iglesias | |
29 | 388f60b1 | Edgar E. Iglesias | #define D(x)
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30 | 388f60b1 | Edgar E. Iglesias | |
31 | 388f60b1 | Edgar E. Iglesias | #define R_TCSR 0 |
32 | 388f60b1 | Edgar E. Iglesias | #define R_TLR 1 |
33 | 388f60b1 | Edgar E. Iglesias | #define R_TCR 2 |
34 | 388f60b1 | Edgar E. Iglesias | #define R_MAX 4 |
35 | 388f60b1 | Edgar E. Iglesias | |
36 | 388f60b1 | Edgar E. Iglesias | #define TCSR_MDT (1<<0) |
37 | 388f60b1 | Edgar E. Iglesias | #define TCSR_UDT (1<<1) |
38 | 388f60b1 | Edgar E. Iglesias | #define TCSR_GENT (1<<2) |
39 | 388f60b1 | Edgar E. Iglesias | #define TCSR_CAPT (1<<3) |
40 | 388f60b1 | Edgar E. Iglesias | #define TCSR_ARHT (1<<4) |
41 | 388f60b1 | Edgar E. Iglesias | #define TCSR_LOAD (1<<5) |
42 | 388f60b1 | Edgar E. Iglesias | #define TCSR_ENIT (1<<6) |
43 | 388f60b1 | Edgar E. Iglesias | #define TCSR_ENT (1<<7) |
44 | 388f60b1 | Edgar E. Iglesias | #define TCSR_TINT (1<<8) |
45 | 388f60b1 | Edgar E. Iglesias | #define TCSR_PWMA (1<<9) |
46 | 388f60b1 | Edgar E. Iglesias | #define TCSR_ENALL (1<<10) |
47 | 388f60b1 | Edgar E. Iglesias | |
48 | 388f60b1 | Edgar E. Iglesias | struct xlx_timer
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49 | 388f60b1 | Edgar E. Iglesias | { |
50 | 388f60b1 | Edgar E. Iglesias | QEMUBH *bh; |
51 | 388f60b1 | Edgar E. Iglesias | ptimer_state *ptimer; |
52 | 388f60b1 | Edgar E. Iglesias | void *parent;
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53 | 388f60b1 | Edgar E. Iglesias | int nr; /* for debug. */ |
54 | 388f60b1 | Edgar E. Iglesias | |
55 | 388f60b1 | Edgar E. Iglesias | unsigned long timer_div; |
56 | 388f60b1 | Edgar E. Iglesias | |
57 | 388f60b1 | Edgar E. Iglesias | uint32_t regs[R_MAX]; |
58 | 388f60b1 | Edgar E. Iglesias | }; |
59 | 388f60b1 | Edgar E. Iglesias | |
60 | 388f60b1 | Edgar E. Iglesias | struct timerblock
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61 | 388f60b1 | Edgar E. Iglesias | { |
62 | 388f60b1 | Edgar E. Iglesias | SysBusDevice busdev; |
63 | 010f3f5f | Edgar E. Iglesias | MemoryRegion mmio; |
64 | 388f60b1 | Edgar E. Iglesias | qemu_irq irq; |
65 | abe098e4 | Peter A. G. Crosthwaite | uint8_t one_timer_only; |
66 | ee6847d1 | Gerd Hoffmann | uint32_t freq_hz; |
67 | 388f60b1 | Edgar E. Iglesias | struct xlx_timer *timers;
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68 | 388f60b1 | Edgar E. Iglesias | }; |
69 | 388f60b1 | Edgar E. Iglesias | |
70 | abe098e4 | Peter A. G. Crosthwaite | static inline unsigned int num_timers(struct timerblock *t) |
71 | abe098e4 | Peter A. G. Crosthwaite | { |
72 | abe098e4 | Peter A. G. Crosthwaite | return 2 - t->one_timer_only; |
73 | abe098e4 | Peter A. G. Crosthwaite | } |
74 | abe098e4 | Peter A. G. Crosthwaite | |
75 | a8170e5e | Avi Kivity | static inline unsigned int timer_from_addr(hwaddr addr) |
76 | 388f60b1 | Edgar E. Iglesias | { |
77 | 388f60b1 | Edgar E. Iglesias | /* Timers get a 4x32bit control reg area each. */
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78 | 388f60b1 | Edgar E. Iglesias | return addr >> 2; |
79 | 388f60b1 | Edgar E. Iglesias | } |
80 | 388f60b1 | Edgar E. Iglesias | |
81 | 388f60b1 | Edgar E. Iglesias | static void timer_update_irq(struct timerblock *t) |
82 | 388f60b1 | Edgar E. Iglesias | { |
83 | 388f60b1 | Edgar E. Iglesias | unsigned int i, irq = 0; |
84 | 388f60b1 | Edgar E. Iglesias | uint32_t csr; |
85 | 388f60b1 | Edgar E. Iglesias | |
86 | abe098e4 | Peter A. G. Crosthwaite | for (i = 0; i < num_timers(t); i++) { |
87 | 388f60b1 | Edgar E. Iglesias | csr = t->timers[i].regs[R_TCSR]; |
88 | 388f60b1 | Edgar E. Iglesias | irq |= (csr & TCSR_TINT) && (csr & TCSR_ENIT); |
89 | 388f60b1 | Edgar E. Iglesias | } |
90 | 388f60b1 | Edgar E. Iglesias | |
91 | 388f60b1 | Edgar E. Iglesias | /* All timers within the same slave share a single IRQ line. */
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92 | 388f60b1 | Edgar E. Iglesias | qemu_set_irq(t->irq, !!irq); |
93 | 388f60b1 | Edgar E. Iglesias | } |
94 | 388f60b1 | Edgar E. Iglesias | |
95 | 010f3f5f | Edgar E. Iglesias | static uint64_t
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96 | a8170e5e | Avi Kivity | timer_read(void *opaque, hwaddr addr, unsigned int size) |
97 | 388f60b1 | Edgar E. Iglesias | { |
98 | 388f60b1 | Edgar E. Iglesias | struct timerblock *t = opaque;
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99 | 388f60b1 | Edgar E. Iglesias | struct xlx_timer *xt;
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100 | 388f60b1 | Edgar E. Iglesias | uint32_t r = 0;
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101 | 388f60b1 | Edgar E. Iglesias | unsigned int timer; |
102 | 388f60b1 | Edgar E. Iglesias | |
103 | 388f60b1 | Edgar E. Iglesias | addr >>= 2;
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104 | 388f60b1 | Edgar E. Iglesias | timer = timer_from_addr(addr); |
105 | 388f60b1 | Edgar E. Iglesias | xt = &t->timers[timer]; |
106 | 388f60b1 | Edgar E. Iglesias | /* Further decoding to address a specific timers reg. */
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107 | 388f60b1 | Edgar E. Iglesias | addr &= 0x3;
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108 | 388f60b1 | Edgar E. Iglesias | switch (addr)
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109 | 388f60b1 | Edgar E. Iglesias | { |
110 | 388f60b1 | Edgar E. Iglesias | case R_TCR:
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111 | 388f60b1 | Edgar E. Iglesias | r = ptimer_get_count(xt->ptimer); |
112 | 388f60b1 | Edgar E. Iglesias | if (!(xt->regs[R_TCSR] & TCSR_UDT))
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113 | 388f60b1 | Edgar E. Iglesias | r = ~r; |
114 | 388f60b1 | Edgar E. Iglesias | D(qemu_log("xlx_timer t=%d read counter=%x udt=%d\n",
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115 | 388f60b1 | Edgar E. Iglesias | timer, r, xt->regs[R_TCSR] & TCSR_UDT)); |
116 | 388f60b1 | Edgar E. Iglesias | break;
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117 | 388f60b1 | Edgar E. Iglesias | default:
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118 | 388f60b1 | Edgar E. Iglesias | if (addr < ARRAY_SIZE(xt->regs))
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119 | 388f60b1 | Edgar E. Iglesias | r = xt->regs[addr]; |
120 | 388f60b1 | Edgar E. Iglesias | break;
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121 | 388f60b1 | Edgar E. Iglesias | |
122 | 388f60b1 | Edgar E. Iglesias | } |
123 | e03377ae | Peter A. G. Crosthwaite | D(fprintf(stderr, "%s timer=%d %x=%x\n", __func__, timer, addr * 4, r)); |
124 | 388f60b1 | Edgar E. Iglesias | return r;
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125 | 388f60b1 | Edgar E. Iglesias | } |
126 | 388f60b1 | Edgar E. Iglesias | |
127 | 388f60b1 | Edgar E. Iglesias | static void timer_enable(struct xlx_timer *xt) |
128 | 388f60b1 | Edgar E. Iglesias | { |
129 | 388f60b1 | Edgar E. Iglesias | uint64_t count; |
130 | 388f60b1 | Edgar E. Iglesias | |
131 | e03377ae | Peter A. G. Crosthwaite | D(fprintf(stderr, "%s timer=%d down=%d\n", __func__,
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132 | 388f60b1 | Edgar E. Iglesias | xt->nr, xt->regs[R_TCSR] & TCSR_UDT)); |
133 | 388f60b1 | Edgar E. Iglesias | |
134 | 388f60b1 | Edgar E. Iglesias | ptimer_stop(xt->ptimer); |
135 | 388f60b1 | Edgar E. Iglesias | |
136 | 388f60b1 | Edgar E. Iglesias | if (xt->regs[R_TCSR] & TCSR_UDT)
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137 | 388f60b1 | Edgar E. Iglesias | count = xt->regs[R_TLR]; |
138 | 388f60b1 | Edgar E. Iglesias | else
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139 | 388f60b1 | Edgar E. Iglesias | count = ~0 - xt->regs[R_TLR];
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140 | 7798a882 | Peter A. G. Crosthwaite | ptimer_set_limit(xt->ptimer, count, 1);
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141 | 388f60b1 | Edgar E. Iglesias | ptimer_run(xt->ptimer, 1);
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142 | 388f60b1 | Edgar E. Iglesias | } |
143 | 388f60b1 | Edgar E. Iglesias | |
144 | 388f60b1 | Edgar E. Iglesias | static void |
145 | a8170e5e | Avi Kivity | timer_write(void *opaque, hwaddr addr,
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146 | 010f3f5f | Edgar E. Iglesias | uint64_t val64, unsigned int size) |
147 | 388f60b1 | Edgar E. Iglesias | { |
148 | 388f60b1 | Edgar E. Iglesias | struct timerblock *t = opaque;
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149 | 388f60b1 | Edgar E. Iglesias | struct xlx_timer *xt;
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150 | 388f60b1 | Edgar E. Iglesias | unsigned int timer; |
151 | 010f3f5f | Edgar E. Iglesias | uint32_t value = val64; |
152 | 388f60b1 | Edgar E. Iglesias | |
153 | 388f60b1 | Edgar E. Iglesias | addr >>= 2;
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154 | 388f60b1 | Edgar E. Iglesias | timer = timer_from_addr(addr); |
155 | 388f60b1 | Edgar E. Iglesias | xt = &t->timers[timer]; |
156 | e03377ae | Peter A. G. Crosthwaite | D(fprintf(stderr, "%s addr=%x val=%x (timer=%d off=%d)\n",
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157 | 388f60b1 | Edgar E. Iglesias | __func__, addr * 4, value, timer, addr & 3)); |
158 | 388f60b1 | Edgar E. Iglesias | /* Further decoding to address a specific timers reg. */
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159 | 388f60b1 | Edgar E. Iglesias | addr &= 3;
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160 | 388f60b1 | Edgar E. Iglesias | switch (addr)
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161 | 388f60b1 | Edgar E. Iglesias | { |
162 | 388f60b1 | Edgar E. Iglesias | case R_TCSR:
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163 | 388f60b1 | Edgar E. Iglesias | if (value & TCSR_TINT)
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164 | 388f60b1 | Edgar E. Iglesias | value &= ~TCSR_TINT; |
165 | 388f60b1 | Edgar E. Iglesias | |
166 | 388f60b1 | Edgar E. Iglesias | xt->regs[addr] = value; |
167 | 388f60b1 | Edgar E. Iglesias | if (value & TCSR_ENT)
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168 | 388f60b1 | Edgar E. Iglesias | timer_enable(xt); |
169 | 388f60b1 | Edgar E. Iglesias | break;
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170 | 388f60b1 | Edgar E. Iglesias | |
171 | 388f60b1 | Edgar E. Iglesias | default:
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172 | 388f60b1 | Edgar E. Iglesias | if (addr < ARRAY_SIZE(xt->regs))
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173 | 388f60b1 | Edgar E. Iglesias | xt->regs[addr] = value; |
174 | 388f60b1 | Edgar E. Iglesias | break;
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175 | 388f60b1 | Edgar E. Iglesias | } |
176 | 388f60b1 | Edgar E. Iglesias | timer_update_irq(t); |
177 | 388f60b1 | Edgar E. Iglesias | } |
178 | 388f60b1 | Edgar E. Iglesias | |
179 | 010f3f5f | Edgar E. Iglesias | static const MemoryRegionOps timer_ops = { |
180 | 010f3f5f | Edgar E. Iglesias | .read = timer_read, |
181 | 010f3f5f | Edgar E. Iglesias | .write = timer_write, |
182 | 010f3f5f | Edgar E. Iglesias | .endianness = DEVICE_NATIVE_ENDIAN, |
183 | 010f3f5f | Edgar E. Iglesias | .valid = { |
184 | 010f3f5f | Edgar E. Iglesias | .min_access_size = 4,
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185 | 010f3f5f | Edgar E. Iglesias | .max_access_size = 4
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186 | 010f3f5f | Edgar E. Iglesias | } |
187 | 388f60b1 | Edgar E. Iglesias | }; |
188 | 388f60b1 | Edgar E. Iglesias | |
189 | 388f60b1 | Edgar E. Iglesias | static void timer_hit(void *opaque) |
190 | 388f60b1 | Edgar E. Iglesias | { |
191 | 388f60b1 | Edgar E. Iglesias | struct xlx_timer *xt = opaque;
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192 | 388f60b1 | Edgar E. Iglesias | struct timerblock *t = xt->parent;
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193 | 8354cd72 | Chris Wulff | D(fprintf(stderr, "%s %d\n", __func__, xt->nr));
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194 | 388f60b1 | Edgar E. Iglesias | xt->regs[R_TCSR] |= TCSR_TINT; |
195 | 388f60b1 | Edgar E. Iglesias | |
196 | 388f60b1 | Edgar E. Iglesias | if (xt->regs[R_TCSR] & TCSR_ARHT)
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197 | 388f60b1 | Edgar E. Iglesias | timer_enable(xt); |
198 | 388f60b1 | Edgar E. Iglesias | timer_update_irq(t); |
199 | 388f60b1 | Edgar E. Iglesias | } |
200 | 388f60b1 | Edgar E. Iglesias | |
201 | 81a322d4 | Gerd Hoffmann | static int xilinx_timer_init(SysBusDevice *dev) |
202 | 388f60b1 | Edgar E. Iglesias | { |
203 | 388f60b1 | Edgar E. Iglesias | struct timerblock *t = FROM_SYSBUS(typeof (*t), dev);
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204 | 388f60b1 | Edgar E. Iglesias | unsigned int i; |
205 | 388f60b1 | Edgar E. Iglesias | |
206 | 388f60b1 | Edgar E. Iglesias | /* All timers share a single irq line. */
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207 | 388f60b1 | Edgar E. Iglesias | sysbus_init_irq(dev, &t->irq); |
208 | 388f60b1 | Edgar E. Iglesias | |
209 | 388f60b1 | Edgar E. Iglesias | /* Init all the ptimers. */
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210 | abe098e4 | Peter A. G. Crosthwaite | t->timers = g_malloc0(sizeof t->timers[0] * num_timers(t)); |
211 | abe098e4 | Peter A. G. Crosthwaite | for (i = 0; i < num_timers(t); i++) { |
212 | 388f60b1 | Edgar E. Iglesias | struct xlx_timer *xt = &t->timers[i];
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213 | 388f60b1 | Edgar E. Iglesias | |
214 | 388f60b1 | Edgar E. Iglesias | xt->parent = t; |
215 | 388f60b1 | Edgar E. Iglesias | xt->nr = i; |
216 | 388f60b1 | Edgar E. Iglesias | xt->bh = qemu_bh_new(timer_hit, xt); |
217 | 388f60b1 | Edgar E. Iglesias | xt->ptimer = ptimer_init(xt->bh); |
218 | ee6847d1 | Gerd Hoffmann | ptimer_set_freq(xt->ptimer, t->freq_hz); |
219 | 388f60b1 | Edgar E. Iglesias | } |
220 | 388f60b1 | Edgar E. Iglesias | |
221 | c0a1dcb9 | Peter A. G. Crosthwaite | memory_region_init_io(&t->mmio, &timer_ops, t, "xlnx.xps-timer",
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222 | abe098e4 | Peter A. G. Crosthwaite | R_MAX * 4 * num_timers(t));
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223 | 750ecd44 | Avi Kivity | sysbus_init_mmio(dev, &t->mmio); |
224 | 81a322d4 | Gerd Hoffmann | return 0; |
225 | 388f60b1 | Edgar E. Iglesias | } |
226 | 388f60b1 | Edgar E. Iglesias | |
227 | 999e12bb | Anthony Liguori | static Property xilinx_timer_properties[] = {
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228 | 919f89f4 | Peter A. G. Crosthwaite | DEFINE_PROP_UINT32("clock-frequency", struct timerblock, freq_hz, |
229 | 919f89f4 | Peter A. G. Crosthwaite | 62 * 1000000), |
230 | abe098e4 | Peter A. G. Crosthwaite | DEFINE_PROP_UINT8("one-timer-only", struct timerblock, one_timer_only, 0), |
231 | 999e12bb | Anthony Liguori | DEFINE_PROP_END_OF_LIST(), |
232 | 999e12bb | Anthony Liguori | }; |
233 | 999e12bb | Anthony Liguori | |
234 | 999e12bb | Anthony Liguori | static void xilinx_timer_class_init(ObjectClass *klass, void *data) |
235 | 999e12bb | Anthony Liguori | { |
236 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
237 | 999e12bb | Anthony Liguori | SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass); |
238 | 999e12bb | Anthony Liguori | |
239 | 999e12bb | Anthony Liguori | k->init = xilinx_timer_init; |
240 | 39bffca2 | Anthony Liguori | dc->props = xilinx_timer_properties; |
241 | 999e12bb | Anthony Liguori | } |
242 | 999e12bb | Anthony Liguori | |
243 | 39bffca2 | Anthony Liguori | static TypeInfo xilinx_timer_info = {
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244 | c0a1dcb9 | Peter A. G. Crosthwaite | .name = "xlnx.xps-timer",
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245 | 39bffca2 | Anthony Liguori | .parent = TYPE_SYS_BUS_DEVICE, |
246 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(struct timerblock), |
247 | 39bffca2 | Anthony Liguori | .class_init = xilinx_timer_class_init, |
248 | ee6847d1 | Gerd Hoffmann | }; |
249 | ee6847d1 | Gerd Hoffmann | |
250 | 83f7d43a | Andreas Färber | static void xilinx_timer_register_types(void) |
251 | 388f60b1 | Edgar E. Iglesias | { |
252 | 39bffca2 | Anthony Liguori | type_register_static(&xilinx_timer_info); |
253 | 388f60b1 | Edgar E. Iglesias | } |
254 | 388f60b1 | Edgar E. Iglesias | |
255 | 83f7d43a | Andreas Färber | type_init(xilinx_timer_register_types) |