/ - Diff - qemu - Greek Research and Technology Network's projects

      * Run consistency checks on an image
+     *
      * Returns 0 if the check could be completed (it doesn't mean that the image is
      * free of errors) or -errno when an internal error occured. The results of the
      * free of errors) or -errno when an internal error occurred. The results of the
      * check are stored in res.
      */
     int bdrv_check(BlockDriverState *bs, BdrvCheckResult *res)

b/block/qcow2-refcount.c
1063	1063	* Checks an image for refcount consistency.
1064	1064	*
1065	1065	* Returns 0 if no errors are found, the number of errors in case the image is
1066		* detected as corrupted, and -errno when an internal error occured.
	1066	* detected as corrupted, and -errno when an internal error occurred.
1067	1067	*/
1068	1068	int qcow2_check_refcounts(BlockDriverState bs, BdrvCheckResult res)
1069	1069	{

     #define CPU_INTERRUPT_FIQ    0x10 /* Fast interrupt pending.  */
     #define CPU_INTERRUPT_HALT   0x20 /* CPU halt wanted */
     #define CPU_INTERRUPT_SMI    0x40 /* (x86 only) SMI interrupt pending */
     #define CPU_INTERRUPT_DEBUG  0x80 /* Debug event occured.  */
     #define CPU_INTERRUPT_DEBUG  0x80 /* Debug event occurred.  */
     #define CPU_INTERRUPT_VIRQ   0x100 /* virtual interrupt pending.  */
     #define CPU_INTERRUPT_NMI    0x200 /* NMI pending. */
     #define CPU_INTERRUPT_INIT   0x400 /* INIT pending. */

                            jump normally, then does the exception return when the
                            CPU tries to execute code at the magic address.
                            This will cause the magic PC value to be pushed to
                            the stack if an interrupt occured at the wrong time.
                            the stack if an interrupt occurred at the wrong time.
                            We avoid this by disabling interrupts when
                            pc contains a magic address.  */
                         if (interrupt_request & CPU_INTERRUPT_HARD

     #define EVT_FLUSH_OCCURRED		0x11
     typedef struct {
         uint16_t	handle;
     } __attribute__ ((packed)) evt_flush_occured;
     } __attribute__ ((packed)) evt_flush_occurred;
     #define EVT_FLUSH_OCCURRED_SIZE 2
     #define EVT_ROLE_CHANGE			0x12

b/hw/pcie.c
176	176	}
177	177
178	178	/*
179		* A PCI Express Hot-Plug Event has occured, so update slot status register
	179	* A PCI Express Hot-Plug Event has occurred, so update slot status register
180	180	* and notify OS of the event if necessary.
181	181	*
182	182	* 6.7.3 PCI Express Hot-Plug Events

+         *
          * Not all the bits of slot control register match with the ones of
          * slot status. Not some bits of slot status register is used to
          * show status, not to report event occurence.
          * show status, not to report event occurrence.
          * So such bits must be masked out when checking the software
          * notification condition.
          */

         case 4:
             switch (pfl->cmd) {
             case 0xA0:
                 /* Ignore writes while flash data write is occuring */
                 /* Ignore writes while flash data write is occurring */
                 /* As we suppose write is immediate, this should never happen */
                 return;
             case 0x80:

b/target-arm/translate.c
1331	1331	return 0;
1332	1332	}
1333	1333
1334		/* Disassemble an iwMMXt instruction. Returns nonzero if an error occured
	1334	/* Disassemble an iwMMXt instruction. Returns nonzero if an error occurred
1335	1335	(ie. an undefined instruction). */
1336	1336	static int disas_iwmmxt_insn(CPUState env, DisasContext s, uint32_t insn)
1337	1337	{
...	...
2335	2335	return 0;
2336	2336	}
2337	2337
2338		/* Disassemble an XScale DSP instruction. Returns nonzero if an error occured
	2338	/* Disassemble an XScale DSP instruction. Returns nonzero if an error occurred
2339	2339	(ie. an undefined instruction). */
2340	2340	static int disas_dsp_insn(CPUState env, DisasContext s, uint32_t insn)
2341	2341	{
...	...
2681	2681	return tmp;
2682	2682	}
2683	2683
2684		/* Disassemble a VFP instruction. Returns nonzero if an error occured
	2684	/* Disassemble a VFP instruction. Returns nonzero if an error occurred
2685	2685	(ie. an undefined instruction). */
2686	2686	static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn)
2687	2687	{

         if (env->macsr & MACSR_V) {
             env->macsr |= MACSR_PAV0 << acc;
             if (env->macsr & MACSR_OMC) {
                 /* The result is saturated to 32 bits, despite overflow occuring
                 /* The result is saturated to 32 bits, despite overflow occurring
                    at 48 bits.  Seems weird, but that's what the hardware docs
                    say.  */
                 result = (result >> 63) ^ 0x7fffffff;

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