Revision a1fc6246 target-mips/translate.c
| b/target-mips/translate.c | ||
|---|---|---|
| 11061 | 11061 |
} |
| 11062 | 11062 |
break; |
| 11063 | 11063 |
#endif |
| 11064 |
case 0x2a: |
|
| 11065 |
switch (minor & 3) {
|
|
| 11066 |
case MADD_ACC: |
|
| 11067 |
gen_muldiv(ctx, OPC_MADD, (ctx->opcode >> 14) & 3, rs, rt); |
|
| 11068 |
break; |
|
| 11069 |
case MADDU_ACC: |
|
| 11070 |
gen_muldiv(ctx, OPC_MADDU, (ctx->opcode >> 14) & 3, rs, rt); |
|
| 11071 |
break; |
|
| 11072 |
case MSUB_ACC: |
|
| 11073 |
gen_muldiv(ctx, OPC_MSUB, (ctx->opcode >> 14) & 3, rs, rt); |
|
| 11074 |
break; |
|
| 11075 |
case MSUBU_ACC: |
|
| 11076 |
gen_muldiv(ctx, OPC_MSUBU, (ctx->opcode >> 14) & 3, rs, rt); |
|
| 11077 |
break; |
|
| 11078 |
default: |
|
| 11079 |
goto pool32axf_invalid; |
|
| 11080 |
} |
|
| 11081 |
break; |
|
| 11082 |
case 0x32: |
|
| 11083 |
switch (minor & 3) {
|
|
| 11084 |
case MULT_ACC: |
|
| 11085 |
gen_muldiv(ctx, OPC_MULT, (ctx->opcode >> 14) & 3, rs, rt); |
|
| 11086 |
break; |
|
| 11087 |
case MULTU_ACC: |
|
| 11088 |
gen_muldiv(ctx, OPC_MULTU, (ctx->opcode >> 14) & 3, rs, rt); |
|
| 11089 |
break; |
|
| 11090 |
default: |
|
| 11091 |
goto pool32axf_invalid; |
|
| 11092 |
} |
|
| 11093 |
break; |
|
| 11064 | 11094 |
case 0x2c: |
| 11065 | 11095 |
switch (minor) {
|
| 11066 | 11096 |
case SEB: |
| ... | ... | |
| 11113 | 11143 |
mips32_op = OPC_MSUBU; |
| 11114 | 11144 |
do_mul: |
| 11115 | 11145 |
check_insn(ctx, ISA_MIPS32); |
| 11116 |
gen_muldiv(ctx, mips32_op, (ctx->opcode >> 14) & 3, rs, rt);
|
|
| 11146 |
gen_muldiv(ctx, mips32_op, 0, rs, rt);
|
|
| 11117 | 11147 |
break; |
| 11118 | 11148 |
default: |
| 11119 | 11149 |
goto pool32axf_invalid; |
| ... | ... | |
| 11247 | 11277 |
goto pool32axf_invalid; |
| 11248 | 11278 |
} |
| 11249 | 11279 |
break; |
| 11250 |
case 0x35:
|
|
| 11280 |
case 0x01:
|
|
| 11251 | 11281 |
switch (minor & 3) {
|
| 11252 |
case MFHI32:
|
|
| 11282 |
case MFHI_ACC:
|
|
| 11253 | 11283 |
gen_HILO(ctx, OPC_MFHI, minor >> 2, rs); |
| 11254 | 11284 |
break; |
| 11255 |
case MFLO32:
|
|
| 11285 |
case MFLO_ACC:
|
|
| 11256 | 11286 |
gen_HILO(ctx, OPC_MFLO, minor >> 2, rs); |
| 11257 | 11287 |
break; |
| 11258 |
case MTHI32:
|
|
| 11288 |
case MTHI_ACC:
|
|
| 11259 | 11289 |
gen_HILO(ctx, OPC_MTHI, minor >> 2, rs); |
| 11260 | 11290 |
break; |
| 11261 |
case MTLO32:
|
|
| 11291 |
case MTLO_ACC:
|
|
| 11262 | 11292 |
gen_HILO(ctx, OPC_MTLO, minor >> 2, rs); |
| 11263 | 11293 |
break; |
| 11264 | 11294 |
default: |
| 11265 | 11295 |
goto pool32axf_invalid; |
| 11266 | 11296 |
} |
| 11267 | 11297 |
break; |
| 11298 |
case 0x35: |
|
| 11299 |
switch (minor) {
|
|
| 11300 |
case MFHI32: |
|
| 11301 |
gen_HILO(ctx, OPC_MFHI, 0, rs); |
|
| 11302 |
break; |
|
| 11303 |
case MFLO32: |
|
| 11304 |
gen_HILO(ctx, OPC_MFLO, 0, rs); |
|
| 11305 |
break; |
|
| 11306 |
case MTHI32: |
|
| 11307 |
gen_HILO(ctx, OPC_MTHI, 0, rs); |
|
| 11308 |
break; |
|
| 11309 |
case MTLO32: |
|
| 11310 |
gen_HILO(ctx, OPC_MTLO, 0, rs); |
|
| 11311 |
break; |
|
| 11312 |
default: |
|
| 11313 |
goto pool32axf_invalid; |
|
| 11314 |
} |
|
| 11315 |
break; |
|
| 11268 | 11316 |
default: |
| 11269 | 11317 |
pool32axf_invalid: |
| 11270 | 11318 |
MIPS_INVAL("pool32axf");
|
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