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1 | dc99065b | bellard | /* Print i386 instructions for GDB, the GNU debugger.
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2 | bc51c5c9 | bellard | Copyright 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
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3 | bc51c5c9 | bellard | 2001
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4 | dc99065b | bellard | Free Software Foundation, Inc.
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5 | dc99065b | bellard | |
6 | dc99065b | bellard | This file is part of GDB.
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7 | dc99065b | bellard | |
8 | dc99065b | bellard | This program is free software; you can redistribute it and/or modify
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9 | dc99065b | bellard | it under the terms of the GNU General Public License as published by
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10 | dc99065b | bellard | the Free Software Foundation; either version 2 of the License, or
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11 | dc99065b | bellard | (at your option) any later version.
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12 | dc99065b | bellard | |
13 | dc99065b | bellard | This program is distributed in the hope that it will be useful,
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14 | dc99065b | bellard | but WITHOUT ANY WARRANTY; without even the implied warranty of
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15 | dc99065b | bellard | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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16 | dc99065b | bellard | GNU General Public License for more details.
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17 | dc99065b | bellard | |
18 | dc99065b | bellard | You should have received a copy of the GNU General Public License
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19 | dc99065b | bellard | along with this program; if not, write to the Free Software
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20 | dc99065b | bellard | Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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21 | dc99065b | bellard | |
22 | dc99065b | bellard | /*
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23 | dc99065b | bellard | * 80386 instruction printer by Pace Willisson (pace@prep.ai.mit.edu)
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24 | dc99065b | bellard | * July 1988
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25 | dc99065b | bellard | * modified by John Hassey (hassey@dg-rtp.dg.com)
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26 | bc51c5c9 | bellard | * x86-64 support added by Jan Hubicka (jh@suse.cz)
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27 | dc99065b | bellard | */
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28 | dc99065b | bellard | |
29 | dc99065b | bellard | /*
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30 | dc99065b | bellard | * The main tables describing the instructions is essentially a copy
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31 | dc99065b | bellard | * of the "Opcode Map" chapter (Appendix A) of the Intel 80386
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32 | dc99065b | bellard | * Programmers Manual. Usually, there is a capital letter, followed
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33 | dc99065b | bellard | * by a small letter. The capital letter tell the addressing mode,
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34 | bc51c5c9 | bellard | * and the small letter tells about the operand size. Refer to
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35 | dc99065b | bellard | * the Intel manual for details.
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36 | dc99065b | bellard | */
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37 | dc99065b | bellard | |
38 | bb0ebb1f | bellard | #include <stdlib.h> |
39 | dc99065b | bellard | #include "dis-asm.h" |
40 | dc99065b | bellard | |
41 | dc99065b | bellard | #define MAXLEN 20 |
42 | dc99065b | bellard | |
43 | bc51c5c9 | bellard | #include <setjmp.h> |
44 | bc51c5c9 | bellard | |
45 | bc51c5c9 | bellard | #ifndef UNIXWARE_COMPAT
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46 | bc51c5c9 | bellard | /* Set non-zero for broken, compatible instructions. Set to zero for
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47 | bc51c5c9 | bellard | non-broken opcodes. */
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48 | bc51c5c9 | bellard | #define UNIXWARE_COMPAT 1 |
49 | bc51c5c9 | bellard | #endif
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50 | bc51c5c9 | bellard | |
51 | dc99065b | bellard | static int fetch_data PARAMS ((struct disassemble_info *, bfd_byte *)); |
52 | bc51c5c9 | bellard | static void ckprefix PARAMS ((void)); |
53 | bc51c5c9 | bellard | static const char *prefix_name PARAMS ((int, int)); |
54 | bc51c5c9 | bellard | static int print_insn PARAMS ((bfd_vma, disassemble_info *)); |
55 | bc51c5c9 | bellard | static void dofloat PARAMS ((int)); |
56 | bc51c5c9 | bellard | static void OP_ST PARAMS ((int, int)); |
57 | bc51c5c9 | bellard | static void OP_STi PARAMS ((int, int)); |
58 | bc51c5c9 | bellard | static int putop PARAMS ((const char *, int)); |
59 | bc51c5c9 | bellard | static void oappend PARAMS ((const char *)); |
60 | bc51c5c9 | bellard | static void append_seg PARAMS ((void)); |
61 | bc51c5c9 | bellard | static void OP_indirE PARAMS ((int, int)); |
62 | bc51c5c9 | bellard | static void print_operand_value PARAMS ((char *, int, bfd_vma)); |
63 | bc51c5c9 | bellard | static void OP_E PARAMS ((int, int)); |
64 | bc51c5c9 | bellard | static void OP_G PARAMS ((int, int)); |
65 | bc51c5c9 | bellard | static bfd_vma get64 PARAMS ((void)); |
66 | bc51c5c9 | bellard | static bfd_signed_vma get32 PARAMS ((void)); |
67 | bc51c5c9 | bellard | static bfd_signed_vma get32s PARAMS ((void)); |
68 | bc51c5c9 | bellard | static int get16 PARAMS ((void)); |
69 | bc51c5c9 | bellard | static void set_op PARAMS ((bfd_vma, int)); |
70 | bc51c5c9 | bellard | static void OP_REG PARAMS ((int, int)); |
71 | bc51c5c9 | bellard | static void OP_IMREG PARAMS ((int, int)); |
72 | bc51c5c9 | bellard | static void OP_I PARAMS ((int, int)); |
73 | bc51c5c9 | bellard | static void OP_I64 PARAMS ((int, int)); |
74 | bc51c5c9 | bellard | static void OP_sI PARAMS ((int, int)); |
75 | bc51c5c9 | bellard | static void OP_J PARAMS ((int, int)); |
76 | bc51c5c9 | bellard | static void OP_SEG PARAMS ((int, int)); |
77 | bc51c5c9 | bellard | static void OP_DIR PARAMS ((int, int)); |
78 | bc51c5c9 | bellard | static void OP_OFF PARAMS ((int, int)); |
79 | bc51c5c9 | bellard | static void OP_OFF64 PARAMS ((int, int)); |
80 | bc51c5c9 | bellard | static void ptr_reg PARAMS ((int, int)); |
81 | bc51c5c9 | bellard | static void OP_ESreg PARAMS ((int, int)); |
82 | bc51c5c9 | bellard | static void OP_DSreg PARAMS ((int, int)); |
83 | bc51c5c9 | bellard | static void OP_C PARAMS ((int, int)); |
84 | bc51c5c9 | bellard | static void OP_D PARAMS ((int, int)); |
85 | bc51c5c9 | bellard | static void OP_T PARAMS ((int, int)); |
86 | bc51c5c9 | bellard | static void OP_Rd PARAMS ((int, int)); |
87 | bc51c5c9 | bellard | static void OP_MMX PARAMS ((int, int)); |
88 | bc51c5c9 | bellard | static void OP_XMM PARAMS ((int, int)); |
89 | bc51c5c9 | bellard | static void OP_EM PARAMS ((int, int)); |
90 | bc51c5c9 | bellard | static void OP_EX PARAMS ((int, int)); |
91 | bc51c5c9 | bellard | static void OP_MS PARAMS ((int, int)); |
92 | bc51c5c9 | bellard | static void OP_XS PARAMS ((int, int)); |
93 | bc51c5c9 | bellard | static void OP_3DNowSuffix PARAMS ((int, int)); |
94 | bc51c5c9 | bellard | static void OP_SIMD_Suffix PARAMS ((int, int)); |
95 | bc51c5c9 | bellard | static void SIMD_Fixup PARAMS ((int, int)); |
96 | bc51c5c9 | bellard | static void BadOp PARAMS ((void)); |
97 | dc99065b | bellard | |
98 | bc51c5c9 | bellard | struct dis_private {
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99 | dc99065b | bellard | /* Points to first byte not fetched. */
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100 | dc99065b | bellard | bfd_byte *max_fetched; |
101 | dc99065b | bellard | bfd_byte the_buffer[MAXLEN]; |
102 | dc99065b | bellard | bfd_vma insn_start; |
103 | bc51c5c9 | bellard | int orig_sizeflag;
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104 | dc99065b | bellard | jmp_buf bailout; |
105 | dc99065b | bellard | }; |
106 | dc99065b | bellard | |
107 | bc51c5c9 | bellard | /* The opcode for the fwait instruction, which we treat as a prefix
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108 | bc51c5c9 | bellard | when we can. */
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109 | bc51c5c9 | bellard | #define FWAIT_OPCODE (0x9b) |
110 | bc51c5c9 | bellard | |
111 | bc51c5c9 | bellard | /* Set to 1 for 64bit mode disassembly. */
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112 | bc51c5c9 | bellard | static int mode_64bit; |
113 | bc51c5c9 | bellard | |
114 | bc51c5c9 | bellard | /* Flags for the prefixes for the current instruction. See below. */
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115 | bc51c5c9 | bellard | static int prefixes; |
116 | bc51c5c9 | bellard | |
117 | bc51c5c9 | bellard | /* REX prefix the current instruction. See below. */
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118 | bc51c5c9 | bellard | static int rex; |
119 | bc51c5c9 | bellard | /* Bits of REX we've already used. */
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120 | bc51c5c9 | bellard | static int rex_used; |
121 | bc51c5c9 | bellard | #define REX_MODE64 8 |
122 | bc51c5c9 | bellard | #define REX_EXTX 4 |
123 | bc51c5c9 | bellard | #define REX_EXTY 2 |
124 | bc51c5c9 | bellard | #define REX_EXTZ 1 |
125 | bc51c5c9 | bellard | /* Mark parts used in the REX prefix. When we are testing for
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126 | bc51c5c9 | bellard | empty prefix (for 8bit register REX extension), just mask it
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127 | bc51c5c9 | bellard | out. Otherwise test for REX bit is excuse for existence of REX
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128 | bc51c5c9 | bellard | only in case value is nonzero. */
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129 | bc51c5c9 | bellard | #define USED_REX(value) \
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130 | bc51c5c9 | bellard | { \ |
131 | bc51c5c9 | bellard | if (value) \
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132 | bc51c5c9 | bellard | rex_used |= (rex & value) ? (value) | 0x40 : 0; \ |
133 | bc51c5c9 | bellard | else \
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134 | bc51c5c9 | bellard | rex_used |= 0x40; \
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135 | bc51c5c9 | bellard | } |
136 | bc51c5c9 | bellard | |
137 | bc51c5c9 | bellard | /* Flags for prefixes which we somehow handled when printing the
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138 | bc51c5c9 | bellard | current instruction. */
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139 | bc51c5c9 | bellard | static int used_prefixes; |
140 | bc51c5c9 | bellard | |
141 | bc51c5c9 | bellard | /* Flags stored in PREFIXES. */
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142 | bc51c5c9 | bellard | #define PREFIX_REPZ 1 |
143 | bc51c5c9 | bellard | #define PREFIX_REPNZ 2 |
144 | bc51c5c9 | bellard | #define PREFIX_LOCK 4 |
145 | bc51c5c9 | bellard | #define PREFIX_CS 8 |
146 | bc51c5c9 | bellard | #define PREFIX_SS 0x10 |
147 | bc51c5c9 | bellard | #define PREFIX_DS 0x20 |
148 | bc51c5c9 | bellard | #define PREFIX_ES 0x40 |
149 | bc51c5c9 | bellard | #define PREFIX_FS 0x80 |
150 | bc51c5c9 | bellard | #define PREFIX_GS 0x100 |
151 | bc51c5c9 | bellard | #define PREFIX_DATA 0x200 |
152 | bc51c5c9 | bellard | #define PREFIX_ADDR 0x400 |
153 | bc51c5c9 | bellard | #define PREFIX_FWAIT 0x800 |
154 | bc51c5c9 | bellard | |
155 | dc99065b | bellard | /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
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156 | dc99065b | bellard | to ADDR (exclusive) are valid. Returns 1 for success, longjmps
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157 | dc99065b | bellard | on error. */
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158 | dc99065b | bellard | #define FETCH_DATA(info, addr) \
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159 | bc51c5c9 | bellard | ((addr) <= ((struct dis_private *) (info->private_data))->max_fetched \
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160 | dc99065b | bellard | ? 1 : fetch_data ((info), (addr)))
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161 | dc99065b | bellard | |
162 | dc99065b | bellard | static int |
163 | dc99065b | bellard | fetch_data (info, addr) |
164 | dc99065b | bellard | struct disassemble_info *info;
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165 | dc99065b | bellard | bfd_byte *addr; |
166 | dc99065b | bellard | { |
167 | dc99065b | bellard | int status;
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168 | bc51c5c9 | bellard | struct dis_private *priv = (struct dis_private *) info->private_data; |
169 | dc99065b | bellard | bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); |
170 | dc99065b | bellard | |
171 | dc99065b | bellard | status = (*info->read_memory_func) (start, |
172 | dc99065b | bellard | priv->max_fetched, |
173 | dc99065b | bellard | addr - priv->max_fetched, |
174 | dc99065b | bellard | info); |
175 | dc99065b | bellard | if (status != 0) |
176 | dc99065b | bellard | { |
177 | bc51c5c9 | bellard | /* If we did manage to read at least one byte, then
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178 | bc51c5c9 | bellard | print_insn_i386 will do something sensible. Otherwise, print
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179 | bc51c5c9 | bellard | an error. We do that here because this is where we know
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180 | bc51c5c9 | bellard | STATUS. */
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181 | bc51c5c9 | bellard | if (priv->max_fetched == priv->the_buffer)
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182 | bc51c5c9 | bellard | (*info->memory_error_func) (status, start, info); |
183 | dc99065b | bellard | longjmp (priv->bailout, 1);
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184 | dc99065b | bellard | } |
185 | dc99065b | bellard | else
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186 | dc99065b | bellard | priv->max_fetched = addr; |
187 | dc99065b | bellard | return 1; |
188 | dc99065b | bellard | } |
189 | dc99065b | bellard | |
190 | bc51c5c9 | bellard | #define XX NULL, 0 |
191 | bc51c5c9 | bellard | |
192 | dc99065b | bellard | #define Eb OP_E, b_mode
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193 | dc99065b | bellard | #define Ev OP_E, v_mode
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194 | bc51c5c9 | bellard | #define Ed OP_E, d_mode
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195 | bc51c5c9 | bellard | #define indirEb OP_indirE, b_mode
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196 | dc99065b | bellard | #define indirEv OP_indirE, v_mode
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197 | dc99065b | bellard | #define Ew OP_E, w_mode
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198 | dc99065b | bellard | #define Ma OP_E, v_mode
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199 | bc51c5c9 | bellard | #define M OP_E, 0 /* lea, lgdt, etc. */ |
200 | bc51c5c9 | bellard | #define Mp OP_E, 0 /* 32 or 48 bit memory operand for LDS, LES etc */ |
201 | bc51c5c9 | bellard | #define Gb OP_G, b_mode
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202 | dc99065b | bellard | #define Gv OP_G, v_mode
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203 | bc51c5c9 | bellard | #define Gd OP_G, d_mode
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204 | dc99065b | bellard | #define Gw OP_G, w_mode
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205 | bc51c5c9 | bellard | #define Rd OP_Rd, d_mode
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206 | bc51c5c9 | bellard | #define Rm OP_Rd, m_mode
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207 | dc99065b | bellard | #define Ib OP_I, b_mode
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208 | dc99065b | bellard | #define sIb OP_sI, b_mode /* sign extened byte */ |
209 | dc99065b | bellard | #define Iv OP_I, v_mode
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210 | bc51c5c9 | bellard | #define Iq OP_I, q_mode
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211 | bc51c5c9 | bellard | #define Iv64 OP_I64, v_mode
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212 | dc99065b | bellard | #define Iw OP_I, w_mode
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213 | dc99065b | bellard | #define Jb OP_J, b_mode
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214 | dc99065b | bellard | #define Jv OP_J, v_mode
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215 | bc51c5c9 | bellard | #define Cm OP_C, m_mode
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216 | bc51c5c9 | bellard | #define Dm OP_D, m_mode
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217 | dc99065b | bellard | #define Td OP_T, d_mode
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218 | dc99065b | bellard | |
219 | bc51c5c9 | bellard | #define RMeAX OP_REG, eAX_reg
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220 | bc51c5c9 | bellard | #define RMeBX OP_REG, eBX_reg
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221 | bc51c5c9 | bellard | #define RMeCX OP_REG, eCX_reg
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222 | bc51c5c9 | bellard | #define RMeDX OP_REG, eDX_reg
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223 | bc51c5c9 | bellard | #define RMeSP OP_REG, eSP_reg
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224 | bc51c5c9 | bellard | #define RMeBP OP_REG, eBP_reg
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225 | bc51c5c9 | bellard | #define RMeSI OP_REG, eSI_reg
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226 | bc51c5c9 | bellard | #define RMeDI OP_REG, eDI_reg
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227 | bc51c5c9 | bellard | #define RMrAX OP_REG, rAX_reg
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228 | bc51c5c9 | bellard | #define RMrBX OP_REG, rBX_reg
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229 | bc51c5c9 | bellard | #define RMrCX OP_REG, rCX_reg
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230 | bc51c5c9 | bellard | #define RMrDX OP_REG, rDX_reg
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231 | bc51c5c9 | bellard | #define RMrSP OP_REG, rSP_reg
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232 | bc51c5c9 | bellard | #define RMrBP OP_REG, rBP_reg
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233 | bc51c5c9 | bellard | #define RMrSI OP_REG, rSI_reg
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234 | bc51c5c9 | bellard | #define RMrDI OP_REG, rDI_reg
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235 | bc51c5c9 | bellard | #define RMAL OP_REG, al_reg
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236 | bc51c5c9 | bellard | #define RMAL OP_REG, al_reg
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237 | bc51c5c9 | bellard | #define RMCL OP_REG, cl_reg
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238 | bc51c5c9 | bellard | #define RMDL OP_REG, dl_reg
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239 | bc51c5c9 | bellard | #define RMBL OP_REG, bl_reg
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240 | bc51c5c9 | bellard | #define RMAH OP_REG, ah_reg
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241 | bc51c5c9 | bellard | #define RMCH OP_REG, ch_reg
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242 | bc51c5c9 | bellard | #define RMDH OP_REG, dh_reg
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243 | bc51c5c9 | bellard | #define RMBH OP_REG, bh_reg
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244 | bc51c5c9 | bellard | #define RMAX OP_REG, ax_reg
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245 | bc51c5c9 | bellard | #define RMDX OP_REG, dx_reg
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246 | bc51c5c9 | bellard | |
247 | bc51c5c9 | bellard | #define eAX OP_IMREG, eAX_reg
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248 | bc51c5c9 | bellard | #define eBX OP_IMREG, eBX_reg
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249 | bc51c5c9 | bellard | #define eCX OP_IMREG, eCX_reg
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250 | bc51c5c9 | bellard | #define eDX OP_IMREG, eDX_reg
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251 | bc51c5c9 | bellard | #define eSP OP_IMREG, eSP_reg
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252 | bc51c5c9 | bellard | #define eBP OP_IMREG, eBP_reg
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253 | bc51c5c9 | bellard | #define eSI OP_IMREG, eSI_reg
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254 | bc51c5c9 | bellard | #define eDI OP_IMREG, eDI_reg
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255 | bc51c5c9 | bellard | #define AL OP_IMREG, al_reg
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256 | bc51c5c9 | bellard | #define AL OP_IMREG, al_reg
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257 | bc51c5c9 | bellard | #define CL OP_IMREG, cl_reg
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258 | bc51c5c9 | bellard | #define DL OP_IMREG, dl_reg
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259 | bc51c5c9 | bellard | #define BL OP_IMREG, bl_reg
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260 | bc51c5c9 | bellard | #define AH OP_IMREG, ah_reg
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261 | bc51c5c9 | bellard | #define CH OP_IMREG, ch_reg
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262 | bc51c5c9 | bellard | #define DH OP_IMREG, dh_reg
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263 | bc51c5c9 | bellard | #define BH OP_IMREG, bh_reg
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264 | bc51c5c9 | bellard | #define AX OP_IMREG, ax_reg
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265 | bc51c5c9 | bellard | #define DX OP_IMREG, dx_reg
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266 | bc51c5c9 | bellard | #define indirDX OP_IMREG, indir_dx_reg
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267 | dc99065b | bellard | |
268 | dc99065b | bellard | #define Sw OP_SEG, w_mode
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269 | bc51c5c9 | bellard | #define Ap OP_DIR, 0 |
270 | dc99065b | bellard | #define Ob OP_OFF, b_mode
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271 | bc51c5c9 | bellard | #define Ob64 OP_OFF64, b_mode
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272 | dc99065b | bellard | #define Ov OP_OFF, v_mode
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273 | bc51c5c9 | bellard | #define Ov64 OP_OFF64, v_mode
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274 | bc51c5c9 | bellard | #define Xb OP_DSreg, eSI_reg
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275 | bc51c5c9 | bellard | #define Xv OP_DSreg, eSI_reg
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276 | bc51c5c9 | bellard | #define Yb OP_ESreg, eDI_reg
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277 | bc51c5c9 | bellard | #define Yv OP_ESreg, eDI_reg
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278 | bc51c5c9 | bellard | #define DSBX OP_DSreg, eBX_reg
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279 | dc99065b | bellard | |
280 | dc99065b | bellard | #define es OP_REG, es_reg
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281 | dc99065b | bellard | #define ss OP_REG, ss_reg
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282 | dc99065b | bellard | #define cs OP_REG, cs_reg
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283 | dc99065b | bellard | #define ds OP_REG, ds_reg
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284 | dc99065b | bellard | #define fs OP_REG, fs_reg
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285 | dc99065b | bellard | #define gs OP_REG, gs_reg
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286 | dc99065b | bellard | |
287 | dc99065b | bellard | #define MX OP_MMX, 0 |
288 | bc51c5c9 | bellard | #define XM OP_XMM, 0 |
289 | dc99065b | bellard | #define EM OP_EM, v_mode
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290 | bc51c5c9 | bellard | #define EX OP_EX, v_mode
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291 | bc51c5c9 | bellard | #define MS OP_MS, v_mode
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292 | bc51c5c9 | bellard | #define XS OP_XS, v_mode
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293 | bc51c5c9 | bellard | #define None OP_E, 0 |
294 | bc51c5c9 | bellard | #define OPSUF OP_3DNowSuffix, 0 |
295 | bc51c5c9 | bellard | #define OPSIMD OP_SIMD_Suffix, 0 |
296 | bc51c5c9 | bellard | |
297 | bc51c5c9 | bellard | #define cond_jump_flag NULL, cond_jump_mode |
298 | bc51c5c9 | bellard | #define loop_jcxz_flag NULL, loop_jcxz_mode |
299 | bc51c5c9 | bellard | |
300 | bc51c5c9 | bellard | /* bits in sizeflag */
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301 | bc51c5c9 | bellard | #define SUFFIX_ALWAYS 4 |
302 | bc51c5c9 | bellard | #define AFLAG 2 |
303 | bc51c5c9 | bellard | #define DFLAG 1 |
304 | dc99065b | bellard | |
305 | bc51c5c9 | bellard | #define b_mode 1 /* byte operand */ |
306 | bc51c5c9 | bellard | #define v_mode 2 /* operand size depends on prefixes */ |
307 | bc51c5c9 | bellard | #define w_mode 3 /* word operand */ |
308 | bc51c5c9 | bellard | #define d_mode 4 /* double word operand */ |
309 | bc51c5c9 | bellard | #define q_mode 5 /* quad word operand */ |
310 | bc51c5c9 | bellard | #define x_mode 6 |
311 | bc51c5c9 | bellard | #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ |
312 | bc51c5c9 | bellard | #define cond_jump_mode 8 |
313 | bc51c5c9 | bellard | #define loop_jcxz_mode 9 |
314 | dc99065b | bellard | |
315 | dc99065b | bellard | #define es_reg 100 |
316 | dc99065b | bellard | #define cs_reg 101 |
317 | dc99065b | bellard | #define ss_reg 102 |
318 | dc99065b | bellard | #define ds_reg 103 |
319 | dc99065b | bellard | #define fs_reg 104 |
320 | dc99065b | bellard | #define gs_reg 105 |
321 | dc99065b | bellard | |
322 | bc51c5c9 | bellard | #define eAX_reg 108 |
323 | bc51c5c9 | bellard | #define eCX_reg 109 |
324 | bc51c5c9 | bellard | #define eDX_reg 110 |
325 | bc51c5c9 | bellard | #define eBX_reg 111 |
326 | bc51c5c9 | bellard | #define eSP_reg 112 |
327 | bc51c5c9 | bellard | #define eBP_reg 113 |
328 | bc51c5c9 | bellard | #define eSI_reg 114 |
329 | bc51c5c9 | bellard | #define eDI_reg 115 |
330 | dc99065b | bellard | |
331 | dc99065b | bellard | #define al_reg 116 |
332 | dc99065b | bellard | #define cl_reg 117 |
333 | dc99065b | bellard | #define dl_reg 118 |
334 | dc99065b | bellard | #define bl_reg 119 |
335 | dc99065b | bellard | #define ah_reg 120 |
336 | dc99065b | bellard | #define ch_reg 121 |
337 | dc99065b | bellard | #define dh_reg 122 |
338 | dc99065b | bellard | #define bh_reg 123 |
339 | dc99065b | bellard | |
340 | dc99065b | bellard | #define ax_reg 124 |
341 | dc99065b | bellard | #define cx_reg 125 |
342 | dc99065b | bellard | #define dx_reg 126 |
343 | dc99065b | bellard | #define bx_reg 127 |
344 | dc99065b | bellard | #define sp_reg 128 |
345 | dc99065b | bellard | #define bp_reg 129 |
346 | dc99065b | bellard | #define si_reg 130 |
347 | dc99065b | bellard | #define di_reg 131 |
348 | dc99065b | bellard | |
349 | bc51c5c9 | bellard | #define rAX_reg 132 |
350 | bc51c5c9 | bellard | #define rCX_reg 133 |
351 | bc51c5c9 | bellard | #define rDX_reg 134 |
352 | bc51c5c9 | bellard | #define rBX_reg 135 |
353 | bc51c5c9 | bellard | #define rSP_reg 136 |
354 | bc51c5c9 | bellard | #define rBP_reg 137 |
355 | bc51c5c9 | bellard | #define rSI_reg 138 |
356 | bc51c5c9 | bellard | #define rDI_reg 139 |
357 | bc51c5c9 | bellard | |
358 | dc99065b | bellard | #define indir_dx_reg 150 |
359 | dc99065b | bellard | |
360 | bc51c5c9 | bellard | #define FLOATCODE 1 |
361 | bc51c5c9 | bellard | #define USE_GROUPS 2 |
362 | bc51c5c9 | bellard | #define USE_PREFIX_USER_TABLE 3 |
363 | bc51c5c9 | bellard | #define X86_64_SPECIAL 4 |
364 | bc51c5c9 | bellard | |
365 | bc51c5c9 | bellard | #define FLOAT NULL, NULL, FLOATCODE, NULL, 0, NULL, 0 |
366 | bc51c5c9 | bellard | |
367 | bc51c5c9 | bellard | #define GRP1b NULL, NULL, USE_GROUPS, NULL, 0, NULL, 0 |
368 | bc51c5c9 | bellard | #define GRP1S NULL, NULL, USE_GROUPS, NULL, 1, NULL, 0 |
369 | bc51c5c9 | bellard | #define GRP1Ss NULL, NULL, USE_GROUPS, NULL, 2, NULL, 0 |
370 | bc51c5c9 | bellard | #define GRP2b NULL, NULL, USE_GROUPS, NULL, 3, NULL, 0 |
371 | bc51c5c9 | bellard | #define GRP2S NULL, NULL, USE_GROUPS, NULL, 4, NULL, 0 |
372 | bc51c5c9 | bellard | #define GRP2b_one NULL, NULL, USE_GROUPS, NULL, 5, NULL, 0 |
373 | bc51c5c9 | bellard | #define GRP2S_one NULL, NULL, USE_GROUPS, NULL, 6, NULL, 0 |
374 | bc51c5c9 | bellard | #define GRP2b_cl NULL, NULL, USE_GROUPS, NULL, 7, NULL, 0 |
375 | bc51c5c9 | bellard | #define GRP2S_cl NULL, NULL, USE_GROUPS, NULL, 8, NULL, 0 |
376 | bc51c5c9 | bellard | #define GRP3b NULL, NULL, USE_GROUPS, NULL, 9, NULL, 0 |
377 | bc51c5c9 | bellard | #define GRP3S NULL, NULL, USE_GROUPS, NULL, 10, NULL, 0 |
378 | bc51c5c9 | bellard | #define GRP4 NULL, NULL, USE_GROUPS, NULL, 11, NULL, 0 |
379 | bc51c5c9 | bellard | #define GRP5 NULL, NULL, USE_GROUPS, NULL, 12, NULL, 0 |
380 | bc51c5c9 | bellard | #define GRP6 NULL, NULL, USE_GROUPS, NULL, 13, NULL, 0 |
381 | bc51c5c9 | bellard | #define GRP7 NULL, NULL, USE_GROUPS, NULL, 14, NULL, 0 |
382 | bc51c5c9 | bellard | #define GRP8 NULL, NULL, USE_GROUPS, NULL, 15, NULL, 0 |
383 | bc51c5c9 | bellard | #define GRP9 NULL, NULL, USE_GROUPS, NULL, 16, NULL, 0 |
384 | bc51c5c9 | bellard | #define GRP10 NULL, NULL, USE_GROUPS, NULL, 17, NULL, 0 |
385 | bc51c5c9 | bellard | #define GRP11 NULL, NULL, USE_GROUPS, NULL, 18, NULL, 0 |
386 | bc51c5c9 | bellard | #define GRP12 NULL, NULL, USE_GROUPS, NULL, 19, NULL, 0 |
387 | bc51c5c9 | bellard | #define GRP13 NULL, NULL, USE_GROUPS, NULL, 20, NULL, 0 |
388 | bc51c5c9 | bellard | #define GRP14 NULL, NULL, USE_GROUPS, NULL, 21, NULL, 0 |
389 | bc51c5c9 | bellard | #define GRPAMD NULL, NULL, USE_GROUPS, NULL, 22, NULL, 0 |
390 | bc51c5c9 | bellard | |
391 | bc51c5c9 | bellard | #define PREGRP0 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 0, NULL, 0 |
392 | bc51c5c9 | bellard | #define PREGRP1 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 1, NULL, 0 |
393 | bc51c5c9 | bellard | #define PREGRP2 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 2, NULL, 0 |
394 | bc51c5c9 | bellard | #define PREGRP3 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 3, NULL, 0 |
395 | bc51c5c9 | bellard | #define PREGRP4 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 4, NULL, 0 |
396 | bc51c5c9 | bellard | #define PREGRP5 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 5, NULL, 0 |
397 | bc51c5c9 | bellard | #define PREGRP6 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 6, NULL, 0 |
398 | bc51c5c9 | bellard | #define PREGRP7 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 7, NULL, 0 |
399 | bc51c5c9 | bellard | #define PREGRP8 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 8, NULL, 0 |
400 | bc51c5c9 | bellard | #define PREGRP9 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 9, NULL, 0 |
401 | bc51c5c9 | bellard | #define PREGRP10 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 10, NULL, 0 |
402 | bc51c5c9 | bellard | #define PREGRP11 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 11, NULL, 0 |
403 | bc51c5c9 | bellard | #define PREGRP12 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 12, NULL, 0 |
404 | bc51c5c9 | bellard | #define PREGRP13 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 13, NULL, 0 |
405 | bc51c5c9 | bellard | #define PREGRP14 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 14, NULL, 0 |
406 | bc51c5c9 | bellard | #define PREGRP15 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 15, NULL, 0 |
407 | bc51c5c9 | bellard | #define PREGRP16 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 16, NULL, 0 |
408 | bc51c5c9 | bellard | #define PREGRP17 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 17, NULL, 0 |
409 | bc51c5c9 | bellard | #define PREGRP18 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 18, NULL, 0 |
410 | bc51c5c9 | bellard | #define PREGRP19 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 19, NULL, 0 |
411 | bc51c5c9 | bellard | #define PREGRP20 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 20, NULL, 0 |
412 | bc51c5c9 | bellard | #define PREGRP21 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 21, NULL, 0 |
413 | bc51c5c9 | bellard | #define PREGRP22 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 22, NULL, 0 |
414 | bc51c5c9 | bellard | #define PREGRP23 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 23, NULL, 0 |
415 | bc51c5c9 | bellard | #define PREGRP24 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 24, NULL, 0 |
416 | bc51c5c9 | bellard | #define PREGRP25 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 25, NULL, 0 |
417 | bc51c5c9 | bellard | #define PREGRP26 NULL, NULL, USE_PREFIX_USER_TABLE, NULL, 26, NULL, 0 |
418 | bc51c5c9 | bellard | |
419 | bc51c5c9 | bellard | #define X86_64_0 NULL, NULL, X86_64_SPECIAL, NULL, 0, NULL, 0 |
420 | bc51c5c9 | bellard | |
421 | bc51c5c9 | bellard | typedef void (*op_rtn) PARAMS ((int bytemode, int sizeflag)); |
422 | dc99065b | bellard | |
423 | dc99065b | bellard | struct dis386 {
|
424 | bc51c5c9 | bellard | const char *name; |
425 | dc99065b | bellard | op_rtn op1; |
426 | dc99065b | bellard | int bytemode1;
|
427 | dc99065b | bellard | op_rtn op2; |
428 | dc99065b | bellard | int bytemode2;
|
429 | dc99065b | bellard | op_rtn op3; |
430 | dc99065b | bellard | int bytemode3;
|
431 | dc99065b | bellard | }; |
432 | dc99065b | bellard | |
433 | bc51c5c9 | bellard | /* Upper case letters in the instruction names here are macros.
|
434 | bc51c5c9 | bellard | 'A' => print 'b' if no register operands or suffix_always is true
|
435 | bc51c5c9 | bellard | 'B' => print 'b' if suffix_always is true
|
436 | bc51c5c9 | bellard | 'E' => print 'e' if 32-bit form of jcxz
|
437 | bc51c5c9 | bellard | 'F' => print 'w' or 'l' depending on address size prefix (loop insns)
|
438 | bc51c5c9 | bellard | 'H' => print ",pt" or ",pn" branch hint
|
439 | bc51c5c9 | bellard | 'L' => print 'l' if suffix_always is true
|
440 | bc51c5c9 | bellard | 'N' => print 'n' if instruction has no wait "prefix"
|
441 | bc51c5c9 | bellard | 'O' => print 'd', or 'o'
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442 | bc51c5c9 | bellard | 'P' => print 'w', 'l' or 'q' if instruction has an operand size prefix,
|
443 | bc51c5c9 | bellard | . or suffix_always is true. print 'q' if rex prefix is present.
|
444 | bc51c5c9 | bellard | 'Q' => print 'w', 'l' or 'q' if no register operands or suffix_always
|
445 | bc51c5c9 | bellard | . is true
|
446 | bc51c5c9 | bellard | 'R' => print 'w', 'l' or 'q' ("wd" or "dq" in intel mode)
|
447 | bc51c5c9 | bellard | 'S' => print 'w', 'l' or 'q' if suffix_always is true
|
448 | bc51c5c9 | bellard | 'T' => print 'q' in 64bit mode and behave as 'P' otherwise
|
449 | bc51c5c9 | bellard | 'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
|
450 | bc51c5c9 | bellard | 'X' => print 's', 'd' depending on data16 prefix (for XMM)
|
451 | bc51c5c9 | bellard | 'W' => print 'b' or 'w' ("w" or "de" in intel mode)
|
452 | bc51c5c9 | bellard | 'Y' => 'q' if instruction has an REX 64bit overwrite prefix
|
453 | bc51c5c9 | bellard | |
454 | bc51c5c9 | bellard | Many of the above letters print nothing in Intel mode. See "putop"
|
455 | bc51c5c9 | bellard | for the details.
|
456 | bc51c5c9 | bellard | |
457 | bc51c5c9 | bellard | Braces '{' and '}', and vertical bars '|', indicate alternative
|
458 | bc51c5c9 | bellard | mnemonic strings for AT&T, Intel, X86_64 AT&T, and X86_64 Intel
|
459 | bc51c5c9 | bellard | modes. In cases where there are only two alternatives, the X86_64
|
460 | bc51c5c9 | bellard | instruction is reserved, and "(bad)" is printed.
|
461 | bc51c5c9 | bellard | */
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462 | bc51c5c9 | bellard | |
463 | bc51c5c9 | bellard | static const struct dis386 dis386[] = { |
464 | dc99065b | bellard | /* 00 */
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465 | bc51c5c9 | bellard | { "addB", Eb, Gb, XX },
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466 | bc51c5c9 | bellard | { "addS", Ev, Gv, XX },
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467 | bc51c5c9 | bellard | { "addB", Gb, Eb, XX },
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468 | bc51c5c9 | bellard | { "addS", Gv, Ev, XX },
|
469 | bc51c5c9 | bellard | { "addB", AL, Ib, XX },
|
470 | bc51c5c9 | bellard | { "addS", eAX, Iv, XX },
|
471 | bc51c5c9 | bellard | { "push{T|}", es, XX, XX },
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472 | bc51c5c9 | bellard | { "pop{T|}", es, XX, XX },
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473 | dc99065b | bellard | /* 08 */
|
474 | bc51c5c9 | bellard | { "orB", Eb, Gb, XX },
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475 | bc51c5c9 | bellard | { "orS", Ev, Gv, XX },
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476 | bc51c5c9 | bellard | { "orB", Gb, Eb, XX },
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477 | bc51c5c9 | bellard | { "orS", Gv, Ev, XX },
|
478 | bc51c5c9 | bellard | { "orB", AL, Ib, XX },
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479 | bc51c5c9 | bellard | { "orS", eAX, Iv, XX },
|
480 | bc51c5c9 | bellard | { "push{T|}", cs, XX, XX },
|
481 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* 0x0f extended opcode escape */ |
482 | dc99065b | bellard | /* 10 */
|
483 | bc51c5c9 | bellard | { "adcB", Eb, Gb, XX },
|
484 | bc51c5c9 | bellard | { "adcS", Ev, Gv, XX },
|
485 | bc51c5c9 | bellard | { "adcB", Gb, Eb, XX },
|
486 | bc51c5c9 | bellard | { "adcS", Gv, Ev, XX },
|
487 | bc51c5c9 | bellard | { "adcB", AL, Ib, XX },
|
488 | bc51c5c9 | bellard | { "adcS", eAX, Iv, XX },
|
489 | bc51c5c9 | bellard | { "push{T|}", ss, XX, XX },
|
490 | bc51c5c9 | bellard | { "popT|}", ss, XX, XX },
|
491 | dc99065b | bellard | /* 18 */
|
492 | bc51c5c9 | bellard | { "sbbB", Eb, Gb, XX },
|
493 | bc51c5c9 | bellard | { "sbbS", Ev, Gv, XX },
|
494 | bc51c5c9 | bellard | { "sbbB", Gb, Eb, XX },
|
495 | bc51c5c9 | bellard | { "sbbS", Gv, Ev, XX },
|
496 | bc51c5c9 | bellard | { "sbbB", AL, Ib, XX },
|
497 | bc51c5c9 | bellard | { "sbbS", eAX, Iv, XX },
|
498 | bc51c5c9 | bellard | { "push{T|}", ds, XX, XX },
|
499 | bc51c5c9 | bellard | { "pop{T|}", ds, XX, XX },
|
500 | dc99065b | bellard | /* 20 */
|
501 | bc51c5c9 | bellard | { "andB", Eb, Gb, XX },
|
502 | bc51c5c9 | bellard | { "andS", Ev, Gv, XX },
|
503 | bc51c5c9 | bellard | { "andB", Gb, Eb, XX },
|
504 | bc51c5c9 | bellard | { "andS", Gv, Ev, XX },
|
505 | bc51c5c9 | bellard | { "andB", AL, Ib, XX },
|
506 | bc51c5c9 | bellard | { "andS", eAX, Iv, XX },
|
507 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* SEG ES prefix */ |
508 | bc51c5c9 | bellard | { "daa{|}", XX, XX, XX },
|
509 | dc99065b | bellard | /* 28 */
|
510 | bc51c5c9 | bellard | { "subB", Eb, Gb, XX },
|
511 | bc51c5c9 | bellard | { "subS", Ev, Gv, XX },
|
512 | bc51c5c9 | bellard | { "subB", Gb, Eb, XX },
|
513 | bc51c5c9 | bellard | { "subS", Gv, Ev, XX },
|
514 | bc51c5c9 | bellard | { "subB", AL, Ib, XX },
|
515 | bc51c5c9 | bellard | { "subS", eAX, Iv, XX },
|
516 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* SEG CS prefix */ |
517 | bc51c5c9 | bellard | { "das{|}", XX, XX, XX },
|
518 | dc99065b | bellard | /* 30 */
|
519 | bc51c5c9 | bellard | { "xorB", Eb, Gb, XX },
|
520 | bc51c5c9 | bellard | { "xorS", Ev, Gv, XX },
|
521 | bc51c5c9 | bellard | { "xorB", Gb, Eb, XX },
|
522 | bc51c5c9 | bellard | { "xorS", Gv, Ev, XX },
|
523 | bc51c5c9 | bellard | { "xorB", AL, Ib, XX },
|
524 | bc51c5c9 | bellard | { "xorS", eAX, Iv, XX },
|
525 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* SEG SS prefix */ |
526 | bc51c5c9 | bellard | { "aaa{|}", XX, XX, XX },
|
527 | dc99065b | bellard | /* 38 */
|
528 | bc51c5c9 | bellard | { "cmpB", Eb, Gb, XX },
|
529 | bc51c5c9 | bellard | { "cmpS", Ev, Gv, XX },
|
530 | bc51c5c9 | bellard | { "cmpB", Gb, Eb, XX },
|
531 | bc51c5c9 | bellard | { "cmpS", Gv, Ev, XX },
|
532 | bc51c5c9 | bellard | { "cmpB", AL, Ib, XX },
|
533 | bc51c5c9 | bellard | { "cmpS", eAX, Iv, XX },
|
534 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* SEG DS prefix */ |
535 | bc51c5c9 | bellard | { "aas{|}", XX, XX, XX },
|
536 | dc99065b | bellard | /* 40 */
|
537 | bc51c5c9 | bellard | { "inc{S|}", RMeAX, XX, XX },
|
538 | bc51c5c9 | bellard | { "inc{S|}", RMeCX, XX, XX },
|
539 | bc51c5c9 | bellard | { "inc{S|}", RMeDX, XX, XX },
|
540 | bc51c5c9 | bellard | { "inc{S|}", RMeBX, XX, XX },
|
541 | bc51c5c9 | bellard | { "inc{S|}", RMeSP, XX, XX },
|
542 | bc51c5c9 | bellard | { "inc{S|}", RMeBP, XX, XX },
|
543 | bc51c5c9 | bellard | { "inc{S|}", RMeSI, XX, XX },
|
544 | bc51c5c9 | bellard | { "inc{S|}", RMeDI, XX, XX },
|
545 | dc99065b | bellard | /* 48 */
|
546 | bc51c5c9 | bellard | { "dec{S|}", RMeAX, XX, XX },
|
547 | bc51c5c9 | bellard | { "dec{S|}", RMeCX, XX, XX },
|
548 | bc51c5c9 | bellard | { "dec{S|}", RMeDX, XX, XX },
|
549 | bc51c5c9 | bellard | { "dec{S|}", RMeBX, XX, XX },
|
550 | bc51c5c9 | bellard | { "dec{S|}", RMeSP, XX, XX },
|
551 | bc51c5c9 | bellard | { "dec{S|}", RMeBP, XX, XX },
|
552 | bc51c5c9 | bellard | { "dec{S|}", RMeSI, XX, XX },
|
553 | bc51c5c9 | bellard | { "dec{S|}", RMeDI, XX, XX },
|
554 | dc99065b | bellard | /* 50 */
|
555 | bc51c5c9 | bellard | { "pushS", RMrAX, XX, XX },
|
556 | bc51c5c9 | bellard | { "pushS", RMrCX, XX, XX },
|
557 | bc51c5c9 | bellard | { "pushS", RMrDX, XX, XX },
|
558 | bc51c5c9 | bellard | { "pushS", RMrBX, XX, XX },
|
559 | bc51c5c9 | bellard | { "pushS", RMrSP, XX, XX },
|
560 | bc51c5c9 | bellard | { "pushS", RMrBP, XX, XX },
|
561 | bc51c5c9 | bellard | { "pushS", RMrSI, XX, XX },
|
562 | bc51c5c9 | bellard | { "pushS", RMrDI, XX, XX },
|
563 | dc99065b | bellard | /* 58 */
|
564 | bc51c5c9 | bellard | { "popS", RMrAX, XX, XX },
|
565 | bc51c5c9 | bellard | { "popS", RMrCX, XX, XX },
|
566 | bc51c5c9 | bellard | { "popS", RMrDX, XX, XX },
|
567 | bc51c5c9 | bellard | { "popS", RMrBX, XX, XX },
|
568 | bc51c5c9 | bellard | { "popS", RMrSP, XX, XX },
|
569 | bc51c5c9 | bellard | { "popS", RMrBP, XX, XX },
|
570 | bc51c5c9 | bellard | { "popS", RMrSI, XX, XX },
|
571 | bc51c5c9 | bellard | { "popS", RMrDI, XX, XX },
|
572 | dc99065b | bellard | /* 60 */
|
573 | bc51c5c9 | bellard | { "pusha{P|}", XX, XX, XX },
|
574 | bc51c5c9 | bellard | { "popa{P|}", XX, XX, XX },
|
575 | bc51c5c9 | bellard | { "bound{S|}", Gv, Ma, XX },
|
576 | bc51c5c9 | bellard | { X86_64_0 }, |
577 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* seg fs */ |
578 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* seg gs */ |
579 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* op size prefix */ |
580 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* adr size prefix */ |
581 | dc99065b | bellard | /* 68 */
|
582 | bc51c5c9 | bellard | { "pushT", Iq, XX, XX },
|
583 | bc51c5c9 | bellard | { "imulS", Gv, Ev, Iv },
|
584 | bc51c5c9 | bellard | { "pushT", sIb, XX, XX },
|
585 | bc51c5c9 | bellard | { "imulS", Gv, Ev, sIb },
|
586 | bc51c5c9 | bellard | { "ins{b||b|}", Yb, indirDX, XX },
|
587 | bc51c5c9 | bellard | { "ins{R||R|}", Yv, indirDX, XX },
|
588 | bc51c5c9 | bellard | { "outs{b||b|}", indirDX, Xb, XX },
|
589 | bc51c5c9 | bellard | { "outs{R||R|}", indirDX, Xv, XX },
|
590 | dc99065b | bellard | /* 70 */
|
591 | bc51c5c9 | bellard | { "joH", Jb, XX, cond_jump_flag },
|
592 | bc51c5c9 | bellard | { "jnoH", Jb, XX, cond_jump_flag },
|
593 | bc51c5c9 | bellard | { "jbH", Jb, XX, cond_jump_flag },
|
594 | bc51c5c9 | bellard | { "jaeH", Jb, XX, cond_jump_flag },
|
595 | bc51c5c9 | bellard | { "jeH", Jb, XX, cond_jump_flag },
|
596 | bc51c5c9 | bellard | { "jneH", Jb, XX, cond_jump_flag },
|
597 | bc51c5c9 | bellard | { "jbeH", Jb, XX, cond_jump_flag },
|
598 | bc51c5c9 | bellard | { "jaH", Jb, XX, cond_jump_flag },
|
599 | dc99065b | bellard | /* 78 */
|
600 | bc51c5c9 | bellard | { "jsH", Jb, XX, cond_jump_flag },
|
601 | bc51c5c9 | bellard | { "jnsH", Jb, XX, cond_jump_flag },
|
602 | bc51c5c9 | bellard | { "jpH", Jb, XX, cond_jump_flag },
|
603 | bc51c5c9 | bellard | { "jnpH", Jb, XX, cond_jump_flag },
|
604 | bc51c5c9 | bellard | { "jlH", Jb, XX, cond_jump_flag },
|
605 | bc51c5c9 | bellard | { "jgeH", Jb, XX, cond_jump_flag },
|
606 | bc51c5c9 | bellard | { "jleH", Jb, XX, cond_jump_flag },
|
607 | bc51c5c9 | bellard | { "jgH", Jb, XX, cond_jump_flag },
|
608 | dc99065b | bellard | /* 80 */
|
609 | dc99065b | bellard | { GRP1b }, |
610 | dc99065b | bellard | { GRP1S }, |
611 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
612 | dc99065b | bellard | { GRP1Ss }, |
613 | bc51c5c9 | bellard | { "testB", Eb, Gb, XX },
|
614 | bc51c5c9 | bellard | { "testS", Ev, Gv, XX },
|
615 | bc51c5c9 | bellard | { "xchgB", Eb, Gb, XX },
|
616 | bc51c5c9 | bellard | { "xchgS", Ev, Gv, XX },
|
617 | dc99065b | bellard | /* 88 */
|
618 | bc51c5c9 | bellard | { "movB", Eb, Gb, XX },
|
619 | bc51c5c9 | bellard | { "movS", Ev, Gv, XX },
|
620 | bc51c5c9 | bellard | { "movB", Gb, Eb, XX },
|
621 | bc51c5c9 | bellard | { "movS", Gv, Ev, XX },
|
622 | bc51c5c9 | bellard | { "movQ", Ev, Sw, XX },
|
623 | bc51c5c9 | bellard | { "leaS", Gv, M, XX },
|
624 | bc51c5c9 | bellard | { "movQ", Sw, Ev, XX },
|
625 | bc51c5c9 | bellard | { "popU", Ev, XX, XX },
|
626 | dc99065b | bellard | /* 90 */
|
627 | bc51c5c9 | bellard | { "nop", XX, XX, XX },
|
628 | bc51c5c9 | bellard | /* FIXME: NOP with REPz prefix is called PAUSE. */
|
629 | bc51c5c9 | bellard | { "xchgS", RMeCX, eAX, XX },
|
630 | bc51c5c9 | bellard | { "xchgS", RMeDX, eAX, XX },
|
631 | bc51c5c9 | bellard | { "xchgS", RMeBX, eAX, XX },
|
632 | bc51c5c9 | bellard | { "xchgS", RMeSP, eAX, XX },
|
633 | bc51c5c9 | bellard | { "xchgS", RMeBP, eAX, XX },
|
634 | bc51c5c9 | bellard | { "xchgS", RMeSI, eAX, XX },
|
635 | bc51c5c9 | bellard | { "xchgS", RMeDI, eAX, XX },
|
636 | dc99065b | bellard | /* 98 */
|
637 | bc51c5c9 | bellard | { "cW{tR||tR|}", XX, XX, XX },
|
638 | bc51c5c9 | bellard | { "cR{tO||tO|}", XX, XX, XX },
|
639 | bc51c5c9 | bellard | { "lcall{T|}", Ap, XX, XX },
|
640 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* fwait */ |
641 | bc51c5c9 | bellard | { "pushfT", XX, XX, XX },
|
642 | bc51c5c9 | bellard | { "popfT", XX, XX, XX },
|
643 | bc51c5c9 | bellard | { "sahf{|}", XX, XX, XX },
|
644 | bc51c5c9 | bellard | { "lahf{|}", XX, XX, XX },
|
645 | dc99065b | bellard | /* a0 */
|
646 | bc51c5c9 | bellard | { "movB", AL, Ob64, XX },
|
647 | bc51c5c9 | bellard | { "movS", eAX, Ov64, XX },
|
648 | bc51c5c9 | bellard | { "movB", Ob64, AL, XX },
|
649 | bc51c5c9 | bellard | { "movS", Ov64, eAX, XX },
|
650 | bc51c5c9 | bellard | { "movs{b||b|}", Yb, Xb, XX },
|
651 | bc51c5c9 | bellard | { "movs{R||R|}", Yv, Xv, XX },
|
652 | bc51c5c9 | bellard | { "cmps{b||b|}", Xb, Yb, XX },
|
653 | bc51c5c9 | bellard | { "cmps{R||R|}", Xv, Yv, XX },
|
654 | dc99065b | bellard | /* a8 */
|
655 | bc51c5c9 | bellard | { "testB", AL, Ib, XX },
|
656 | bc51c5c9 | bellard | { "testS", eAX, Iv, XX },
|
657 | bc51c5c9 | bellard | { "stosB", Yb, AL, XX },
|
658 | bc51c5c9 | bellard | { "stosS", Yv, eAX, XX },
|
659 | bc51c5c9 | bellard | { "lodsB", AL, Xb, XX },
|
660 | bc51c5c9 | bellard | { "lodsS", eAX, Xv, XX },
|
661 | bc51c5c9 | bellard | { "scasB", AL, Yb, XX },
|
662 | bc51c5c9 | bellard | { "scasS", eAX, Yv, XX },
|
663 | dc99065b | bellard | /* b0 */
|
664 | bc51c5c9 | bellard | { "movB", RMAL, Ib, XX },
|
665 | bc51c5c9 | bellard | { "movB", RMCL, Ib, XX },
|
666 | bc51c5c9 | bellard | { "movB", RMDL, Ib, XX },
|
667 | bc51c5c9 | bellard | { "movB", RMBL, Ib, XX },
|
668 | bc51c5c9 | bellard | { "movB", RMAH, Ib, XX },
|
669 | bc51c5c9 | bellard | { "movB", RMCH, Ib, XX },
|
670 | bc51c5c9 | bellard | { "movB", RMDH, Ib, XX },
|
671 | bc51c5c9 | bellard | { "movB", RMBH, Ib, XX },
|
672 | dc99065b | bellard | /* b8 */
|
673 | bc51c5c9 | bellard | { "movS", RMeAX, Iv64, XX },
|
674 | bc51c5c9 | bellard | { "movS", RMeCX, Iv64, XX },
|
675 | bc51c5c9 | bellard | { "movS", RMeDX, Iv64, XX },
|
676 | bc51c5c9 | bellard | { "movS", RMeBX, Iv64, XX },
|
677 | bc51c5c9 | bellard | { "movS", RMeSP, Iv64, XX },
|
678 | bc51c5c9 | bellard | { "movS", RMeBP, Iv64, XX },
|
679 | bc51c5c9 | bellard | { "movS", RMeSI, Iv64, XX },
|
680 | bc51c5c9 | bellard | { "movS", RMeDI, Iv64, XX },
|
681 | dc99065b | bellard | /* c0 */
|
682 | dc99065b | bellard | { GRP2b }, |
683 | dc99065b | bellard | { GRP2S }, |
684 | bc51c5c9 | bellard | { "retT", Iw, XX, XX },
|
685 | bc51c5c9 | bellard | { "retT", XX, XX, XX },
|
686 | bc51c5c9 | bellard | { "les{S|}", Gv, Mp, XX },
|
687 | bc51c5c9 | bellard | { "ldsS", Gv, Mp, XX },
|
688 | bc51c5c9 | bellard | { "movA", Eb, Ib, XX },
|
689 | bc51c5c9 | bellard | { "movQ", Ev, Iv, XX },
|
690 | dc99065b | bellard | /* c8 */
|
691 | bc51c5c9 | bellard | { "enterT", Iw, Ib, XX },
|
692 | bc51c5c9 | bellard | { "leaveT", XX, XX, XX },
|
693 | bc51c5c9 | bellard | { "lretP", Iw, XX, XX },
|
694 | bc51c5c9 | bellard | { "lretP", XX, XX, XX },
|
695 | bc51c5c9 | bellard | { "int3", XX, XX, XX },
|
696 | bc51c5c9 | bellard | { "int", Ib, XX, XX },
|
697 | bc51c5c9 | bellard | { "into{|}", XX, XX, XX },
|
698 | bc51c5c9 | bellard | { "iretP", XX, XX, XX },
|
699 | dc99065b | bellard | /* d0 */
|
700 | dc99065b | bellard | { GRP2b_one }, |
701 | dc99065b | bellard | { GRP2S_one }, |
702 | dc99065b | bellard | { GRP2b_cl }, |
703 | dc99065b | bellard | { GRP2S_cl }, |
704 | bc51c5c9 | bellard | { "aam{|}", sIb, XX, XX },
|
705 | bc51c5c9 | bellard | { "aad{|}", sIb, XX, XX },
|
706 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
707 | bc51c5c9 | bellard | { "xlat", DSBX, XX, XX },
|
708 | dc99065b | bellard | /* d8 */
|
709 | dc99065b | bellard | { FLOAT }, |
710 | dc99065b | bellard | { FLOAT }, |
711 | dc99065b | bellard | { FLOAT }, |
712 | dc99065b | bellard | { FLOAT }, |
713 | dc99065b | bellard | { FLOAT }, |
714 | dc99065b | bellard | { FLOAT }, |
715 | dc99065b | bellard | { FLOAT }, |
716 | dc99065b | bellard | { FLOAT }, |
717 | dc99065b | bellard | /* e0 */
|
718 | bc51c5c9 | bellard | { "loopneFH", Jb, XX, loop_jcxz_flag },
|
719 | bc51c5c9 | bellard | { "loopeFH", Jb, XX, loop_jcxz_flag },
|
720 | bc51c5c9 | bellard | { "loopFH", Jb, XX, loop_jcxz_flag },
|
721 | bc51c5c9 | bellard | { "jEcxzH", Jb, XX, loop_jcxz_flag },
|
722 | bc51c5c9 | bellard | { "inB", AL, Ib, XX },
|
723 | bc51c5c9 | bellard | { "inS", eAX, Ib, XX },
|
724 | bc51c5c9 | bellard | { "outB", Ib, AL, XX },
|
725 | bc51c5c9 | bellard | { "outS", Ib, eAX, XX },
|
726 | dc99065b | bellard | /* e8 */
|
727 | bc51c5c9 | bellard | { "callT", Jv, XX, XX },
|
728 | bc51c5c9 | bellard | { "jmpT", Jv, XX, XX },
|
729 | bc51c5c9 | bellard | { "ljmp{T|}", Ap, XX, XX },
|
730 | bc51c5c9 | bellard | { "jmp", Jb, XX, XX },
|
731 | bc51c5c9 | bellard | { "inB", AL, indirDX, XX },
|
732 | bc51c5c9 | bellard | { "inS", eAX, indirDX, XX },
|
733 | bc51c5c9 | bellard | { "outB", indirDX, AL, XX },
|
734 | bc51c5c9 | bellard | { "outS", indirDX, eAX, XX },
|
735 | dc99065b | bellard | /* f0 */
|
736 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* lock prefix */ |
737 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
738 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* repne */ |
739 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }, /* repz */ |
740 | bc51c5c9 | bellard | { "hlt", XX, XX, XX },
|
741 | bc51c5c9 | bellard | { "cmc", XX, XX, XX },
|
742 | dc99065b | bellard | { GRP3b }, |
743 | dc99065b | bellard | { GRP3S }, |
744 | dc99065b | bellard | /* f8 */
|
745 | bc51c5c9 | bellard | { "clc", XX, XX, XX },
|
746 | bc51c5c9 | bellard | { "stc", XX, XX, XX },
|
747 | bc51c5c9 | bellard | { "cli", XX, XX, XX },
|
748 | bc51c5c9 | bellard | { "sti", XX, XX, XX },
|
749 | bc51c5c9 | bellard | { "cld", XX, XX, XX },
|
750 | bc51c5c9 | bellard | { "std", XX, XX, XX },
|
751 | dc99065b | bellard | { GRP4 }, |
752 | dc99065b | bellard | { GRP5 }, |
753 | dc99065b | bellard | }; |
754 | dc99065b | bellard | |
755 | bc51c5c9 | bellard | static const struct dis386 dis386_twobyte[] = { |
756 | dc99065b | bellard | /* 00 */
|
757 | dc99065b | bellard | { GRP6 }, |
758 | dc99065b | bellard | { GRP7 }, |
759 | bc51c5c9 | bellard | { "larS", Gv, Ew, XX },
|
760 | bc51c5c9 | bellard | { "lslS", Gv, Ew, XX },
|
761 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
762 | bc51c5c9 | bellard | { "syscall", XX, XX, XX },
|
763 | bc51c5c9 | bellard | { "clts", XX, XX, XX },
|
764 | bc51c5c9 | bellard | { "sysretP", XX, XX, XX },
|
765 | dc99065b | bellard | /* 08 */
|
766 | bc51c5c9 | bellard | { "invd", XX, XX, XX },
|
767 | bc51c5c9 | bellard | { "wbinvd", XX, XX, XX },
|
768 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
769 | bc51c5c9 | bellard | { "ud2a", XX, XX, XX },
|
770 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
771 | bc51c5c9 | bellard | { GRPAMD }, |
772 | bc51c5c9 | bellard | { "femms", XX, XX, XX },
|
773 | bc51c5c9 | bellard | { "", MX, EM, OPSUF }, /* See OP_3DNowSuffix. */ |
774 | dc99065b | bellard | /* 10 */
|
775 | bc51c5c9 | bellard | { PREGRP8 }, |
776 | bc51c5c9 | bellard | { PREGRP9 }, |
777 | bc51c5c9 | bellard | { "movlpX", XM, EX, SIMD_Fixup, 'h' }, /* really only 2 operands */ |
778 | bc51c5c9 | bellard | { "movlpX", EX, XM, SIMD_Fixup, 'h' }, |
779 | bc51c5c9 | bellard | { "unpcklpX", XM, EX, XX },
|
780 | bc51c5c9 | bellard | { "unpckhpX", XM, EX, XX },
|
781 | bc51c5c9 | bellard | { "movhpX", XM, EX, SIMD_Fixup, 'l' }, |
782 | bc51c5c9 | bellard | { "movhpX", EX, XM, SIMD_Fixup, 'l' }, |
783 | dc99065b | bellard | /* 18 */
|
784 | bc51c5c9 | bellard | { GRP14 }, |
785 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
786 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
787 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
788 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
789 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
790 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
791 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
792 | dc99065b | bellard | /* 20 */
|
793 | bc51c5c9 | bellard | { "movL", Rm, Cm, XX },
|
794 | bc51c5c9 | bellard | { "movL", Rm, Dm, XX },
|
795 | bc51c5c9 | bellard | { "movL", Cm, Rm, XX },
|
796 | bc51c5c9 | bellard | { "movL", Dm, Rm, XX },
|
797 | bc51c5c9 | bellard | { "movL", Rd, Td, XX },
|
798 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
799 | bc51c5c9 | bellard | { "movL", Td, Rd, XX },
|
800 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
801 | dc99065b | bellard | /* 28 */
|
802 | bc51c5c9 | bellard | { "movapX", XM, EX, XX },
|
803 | bc51c5c9 | bellard | { "movapX", EX, XM, XX },
|
804 | bc51c5c9 | bellard | { PREGRP2 }, |
805 | bc51c5c9 | bellard | { "movntpX", Ev, XM, XX },
|
806 | bc51c5c9 | bellard | { PREGRP4 }, |
807 | bc51c5c9 | bellard | { PREGRP3 }, |
808 | bc51c5c9 | bellard | { "ucomisX", XM,EX, XX },
|
809 | bc51c5c9 | bellard | { "comisX", XM,EX, XX },
|
810 | dc99065b | bellard | /* 30 */
|
811 | bc51c5c9 | bellard | { "wrmsr", XX, XX, XX },
|
812 | bc51c5c9 | bellard | { "rdtsc", XX, XX, XX },
|
813 | bc51c5c9 | bellard | { "rdmsr", XX, XX, XX },
|
814 | bc51c5c9 | bellard | { "rdpmc", XX, XX, XX },
|
815 | bc51c5c9 | bellard | { "sysenter", XX, XX, XX },
|
816 | bc51c5c9 | bellard | { "sysexit", XX, XX, XX },
|
817 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
818 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
819 | dc99065b | bellard | /* 38 */
|
820 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
821 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
822 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
823 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
824 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
825 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
826 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
827 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
828 | dc99065b | bellard | /* 40 */
|
829 | bc51c5c9 | bellard | { "cmovo", Gv, Ev, XX },
|
830 | bc51c5c9 | bellard | { "cmovno", Gv, Ev, XX },
|
831 | bc51c5c9 | bellard | { "cmovb", Gv, Ev, XX },
|
832 | bc51c5c9 | bellard | { "cmovae", Gv, Ev, XX },
|
833 | bc51c5c9 | bellard | { "cmove", Gv, Ev, XX },
|
834 | bc51c5c9 | bellard | { "cmovne", Gv, Ev, XX },
|
835 | bc51c5c9 | bellard | { "cmovbe", Gv, Ev, XX },
|
836 | bc51c5c9 | bellard | { "cmova", Gv, Ev, XX },
|
837 | dc99065b | bellard | /* 48 */
|
838 | bc51c5c9 | bellard | { "cmovs", Gv, Ev, XX },
|
839 | bc51c5c9 | bellard | { "cmovns", Gv, Ev, XX },
|
840 | bc51c5c9 | bellard | { "cmovp", Gv, Ev, XX },
|
841 | bc51c5c9 | bellard | { "cmovnp", Gv, Ev, XX },
|
842 | bc51c5c9 | bellard | { "cmovl", Gv, Ev, XX },
|
843 | bc51c5c9 | bellard | { "cmovge", Gv, Ev, XX },
|
844 | bc51c5c9 | bellard | { "cmovle", Gv, Ev, XX },
|
845 | bc51c5c9 | bellard | { "cmovg", Gv, Ev, XX },
|
846 | dc99065b | bellard | /* 50 */
|
847 | bc51c5c9 | bellard | { "movmskpX", Gd, XS, XX },
|
848 | bc51c5c9 | bellard | { PREGRP13 }, |
849 | bc51c5c9 | bellard | { PREGRP12 }, |
850 | bc51c5c9 | bellard | { PREGRP11 }, |
851 | bc51c5c9 | bellard | { "andpX", XM, EX, XX },
|
852 | bc51c5c9 | bellard | { "andnpX", XM, EX, XX },
|
853 | bc51c5c9 | bellard | { "orpX", XM, EX, XX },
|
854 | bc51c5c9 | bellard | { "xorpX", XM, EX, XX },
|
855 | dc99065b | bellard | /* 58 */
|
856 | bc51c5c9 | bellard | { PREGRP0 }, |
857 | bc51c5c9 | bellard | { PREGRP10 }, |
858 | bc51c5c9 | bellard | { PREGRP17 }, |
859 | bc51c5c9 | bellard | { PREGRP16 }, |
860 | bc51c5c9 | bellard | { PREGRP14 }, |
861 | bc51c5c9 | bellard | { PREGRP7 }, |
862 | bc51c5c9 | bellard | { PREGRP5 }, |
863 | bc51c5c9 | bellard | { PREGRP6 }, |
864 | dc99065b | bellard | /* 60 */
|
865 | bc51c5c9 | bellard | { "punpcklbw", MX, EM, XX },
|
866 | bc51c5c9 | bellard | { "punpcklwd", MX, EM, XX },
|
867 | bc51c5c9 | bellard | { "punpckldq", MX, EM, XX },
|
868 | bc51c5c9 | bellard | { "packsswb", MX, EM, XX },
|
869 | bc51c5c9 | bellard | { "pcmpgtb", MX, EM, XX },
|
870 | bc51c5c9 | bellard | { "pcmpgtw", MX, EM, XX },
|
871 | bc51c5c9 | bellard | { "pcmpgtd", MX, EM, XX },
|
872 | bc51c5c9 | bellard | { "packuswb", MX, EM, XX },
|
873 | dc99065b | bellard | /* 68 */
|
874 | bc51c5c9 | bellard | { "punpckhbw", MX, EM, XX },
|
875 | bc51c5c9 | bellard | { "punpckhwd", MX, EM, XX },
|
876 | bc51c5c9 | bellard | { "punpckhdq", MX, EM, XX },
|
877 | bc51c5c9 | bellard | { "packssdw", MX, EM, XX },
|
878 | bc51c5c9 | bellard | { PREGRP26 }, |
879 | bc51c5c9 | bellard | { PREGRP24 }, |
880 | bc51c5c9 | bellard | { "movd", MX, Ed, XX },
|
881 | bc51c5c9 | bellard | { PREGRP19 }, |
882 | dc99065b | bellard | /* 70 */
|
883 | bc51c5c9 | bellard | { PREGRP22 }, |
884 | dc99065b | bellard | { GRP10 }, |
885 | dc99065b | bellard | { GRP11 }, |
886 | dc99065b | bellard | { GRP12 }, |
887 | bc51c5c9 | bellard | { "pcmpeqb", MX, EM, XX },
|
888 | bc51c5c9 | bellard | { "pcmpeqw", MX, EM, XX },
|
889 | bc51c5c9 | bellard | { "pcmpeqd", MX, EM, XX },
|
890 | bc51c5c9 | bellard | { "emms", XX, XX, XX },
|
891 | dc99065b | bellard | /* 78 */
|
892 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
893 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
894 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
895 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
896 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
897 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
898 | bc51c5c9 | bellard | { PREGRP23 }, |
899 | bc51c5c9 | bellard | { PREGRP20 }, |
900 | dc99065b | bellard | /* 80 */
|
901 | bc51c5c9 | bellard | { "joH", Jv, XX, cond_jump_flag },
|
902 | bc51c5c9 | bellard | { "jnoH", Jv, XX, cond_jump_flag },
|
903 | bc51c5c9 | bellard | { "jbH", Jv, XX, cond_jump_flag },
|
904 | bc51c5c9 | bellard | { "jaeH", Jv, XX, cond_jump_flag },
|
905 | bc51c5c9 | bellard | { "jeH", Jv, XX, cond_jump_flag },
|
906 | bc51c5c9 | bellard | { "jneH", Jv, XX, cond_jump_flag },
|
907 | bc51c5c9 | bellard | { "jbeH", Jv, XX, cond_jump_flag },
|
908 | bc51c5c9 | bellard | { "jaH", Jv, XX, cond_jump_flag },
|
909 | dc99065b | bellard | /* 88 */
|
910 | bc51c5c9 | bellard | { "jsH", Jv, XX, cond_jump_flag },
|
911 | bc51c5c9 | bellard | { "jnsH", Jv, XX, cond_jump_flag },
|
912 | bc51c5c9 | bellard | { "jpH", Jv, XX, cond_jump_flag },
|
913 | bc51c5c9 | bellard | { "jnpH", Jv, XX, cond_jump_flag },
|
914 | bc51c5c9 | bellard | { "jlH", Jv, XX, cond_jump_flag },
|
915 | bc51c5c9 | bellard | { "jgeH", Jv, XX, cond_jump_flag },
|
916 | bc51c5c9 | bellard | { "jleH", Jv, XX, cond_jump_flag },
|
917 | bc51c5c9 | bellard | { "jgH", Jv, XX, cond_jump_flag },
|
918 | dc99065b | bellard | /* 90 */
|
919 | bc51c5c9 | bellard | { "seto", Eb, XX, XX },
|
920 | bc51c5c9 | bellard | { "setno", Eb, XX, XX },
|
921 | bc51c5c9 | bellard | { "setb", Eb, XX, XX },
|
922 | bc51c5c9 | bellard | { "setae", Eb, XX, XX },
|
923 | bc51c5c9 | bellard | { "sete", Eb, XX, XX },
|
924 | bc51c5c9 | bellard | { "setne", Eb, XX, XX },
|
925 | bc51c5c9 | bellard | { "setbe", Eb, XX, XX },
|
926 | bc51c5c9 | bellard | { "seta", Eb, XX, XX },
|
927 | dc99065b | bellard | /* 98 */
|
928 | bc51c5c9 | bellard | { "sets", Eb, XX, XX },
|
929 | bc51c5c9 | bellard | { "setns", Eb, XX, XX },
|
930 | bc51c5c9 | bellard | { "setp", Eb, XX, XX },
|
931 | bc51c5c9 | bellard | { "setnp", Eb, XX, XX },
|
932 | bc51c5c9 | bellard | { "setl", Eb, XX, XX },
|
933 | bc51c5c9 | bellard | { "setge", Eb, XX, XX },
|
934 | bc51c5c9 | bellard | { "setle", Eb, XX, XX },
|
935 | bc51c5c9 | bellard | { "setg", Eb, XX, XX },
|
936 | dc99065b | bellard | /* a0 */
|
937 | bc51c5c9 | bellard | { "pushT", fs, XX, XX },
|
938 | bc51c5c9 | bellard | { "popT", fs, XX, XX },
|
939 | bc51c5c9 | bellard | { "cpuid", XX, XX, XX },
|
940 | bc51c5c9 | bellard | { "btS", Ev, Gv, XX },
|
941 | bc51c5c9 | bellard | { "shldS", Ev, Gv, Ib },
|
942 | bc51c5c9 | bellard | { "shldS", Ev, Gv, CL },
|
943 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
944 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
945 | dc99065b | bellard | /* a8 */
|
946 | bc51c5c9 | bellard | { "pushT", gs, XX, XX },
|
947 | bc51c5c9 | bellard | { "popT", gs, XX, XX },
|
948 | bc51c5c9 | bellard | { "rsm", XX, XX, XX },
|
949 | bc51c5c9 | bellard | { "btsS", Ev, Gv, XX },
|
950 | bc51c5c9 | bellard | { "shrdS", Ev, Gv, Ib },
|
951 | bc51c5c9 | bellard | { "shrdS", Ev, Gv, CL },
|
952 | bc51c5c9 | bellard | { GRP13 }, |
953 | bc51c5c9 | bellard | { "imulS", Gv, Ev, XX },
|
954 | dc99065b | bellard | /* b0 */
|
955 | bc51c5c9 | bellard | { "cmpxchgB", Eb, Gb, XX },
|
956 | bc51c5c9 | bellard | { "cmpxchgS", Ev, Gv, XX },
|
957 | bc51c5c9 | bellard | { "lssS", Gv, Mp, XX },
|
958 | bc51c5c9 | bellard | { "btrS", Ev, Gv, XX },
|
959 | bc51c5c9 | bellard | { "lfsS", Gv, Mp, XX },
|
960 | bc51c5c9 | bellard | { "lgsS", Gv, Mp, XX },
|
961 | bc51c5c9 | bellard | { "movz{bR|x|bR|x}", Gv, Eb, XX },
|
962 | bc51c5c9 | bellard | { "movz{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movzww ! */ |
963 | dc99065b | bellard | /* b8 */
|
964 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
965 | bc51c5c9 | bellard | { "ud2b", XX, XX, XX },
|
966 | dc99065b | bellard | { GRP8 }, |
967 | bc51c5c9 | bellard | { "btcS", Ev, Gv, XX },
|
968 | bc51c5c9 | bellard | { "bsfS", Gv, Ev, XX },
|
969 | bc51c5c9 | bellard | { "bsrS", Gv, Ev, XX },
|
970 | bc51c5c9 | bellard | { "movs{bR|x|bR|x}", Gv, Eb, XX },
|
971 | bc51c5c9 | bellard | { "movs{wR|x|wR|x}", Gv, Ew, XX }, /* yes, there really is movsww ! */ |
972 | dc99065b | bellard | /* c0 */
|
973 | bc51c5c9 | bellard | { "xaddB", Eb, Gb, XX },
|
974 | bc51c5c9 | bellard | { "xaddS", Ev, Gv, XX },
|
975 | bc51c5c9 | bellard | { PREGRP1 }, |
976 | bc51c5c9 | bellard | { "movntiS", Ev, Gv, XX },
|
977 | bc51c5c9 | bellard | { "pinsrw", MX, Ed, Ib },
|
978 | bc51c5c9 | bellard | { "pextrw", Gd, MS, Ib },
|
979 | bc51c5c9 | bellard | { "shufpX", XM, EX, Ib },
|
980 | bc51c5c9 | bellard | { GRP9 }, |
981 | dc99065b | bellard | /* c8 */
|
982 | bc51c5c9 | bellard | { "bswap", RMeAX, XX, XX },
|
983 | bc51c5c9 | bellard | { "bswap", RMeCX, XX, XX },
|
984 | bc51c5c9 | bellard | { "bswap", RMeDX, XX, XX },
|
985 | bc51c5c9 | bellard | { "bswap", RMeBX, XX, XX },
|
986 | bc51c5c9 | bellard | { "bswap", RMeSP, XX, XX },
|
987 | bc51c5c9 | bellard | { "bswap", RMeBP, XX, XX },
|
988 | bc51c5c9 | bellard | { "bswap", RMeSI, XX, XX },
|
989 | bc51c5c9 | bellard | { "bswap", RMeDI, XX, XX },
|
990 | dc99065b | bellard | /* d0 */
|
991 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
992 | bc51c5c9 | bellard | { "psrlw", MX, EM, XX },
|
993 | bc51c5c9 | bellard | { "psrld", MX, EM, XX },
|
994 | bc51c5c9 | bellard | { "psrlq", MX, EM, XX },
|
995 | bc51c5c9 | bellard | { "paddq", MX, EM, XX },
|
996 | bc51c5c9 | bellard | { "pmullw", MX, EM, XX },
|
997 | bc51c5c9 | bellard | { PREGRP21 }, |
998 | bc51c5c9 | bellard | { "pmovmskb", Gd, MS, XX },
|
999 | dc99065b | bellard | /* d8 */
|
1000 | bc51c5c9 | bellard | { "psubusb", MX, EM, XX },
|
1001 | bc51c5c9 | bellard | { "psubusw", MX, EM, XX },
|
1002 | bc51c5c9 | bellard | { "pminub", MX, EM, XX },
|
1003 | bc51c5c9 | bellard | { "pand", MX, EM, XX },
|
1004 | bc51c5c9 | bellard | { "paddusb", MX, EM, XX },
|
1005 | bc51c5c9 | bellard | { "paddusw", MX, EM, XX },
|
1006 | bc51c5c9 | bellard | { "pmaxub", MX, EM, XX },
|
1007 | bc51c5c9 | bellard | { "pandn", MX, EM, XX },
|
1008 | dc99065b | bellard | /* e0 */
|
1009 | bc51c5c9 | bellard | { "pavgb", MX, EM, XX },
|
1010 | bc51c5c9 | bellard | { "psraw", MX, EM, XX },
|
1011 | bc51c5c9 | bellard | { "psrad", MX, EM, XX },
|
1012 | bc51c5c9 | bellard | { "pavgw", MX, EM, XX },
|
1013 | bc51c5c9 | bellard | { "pmulhuw", MX, EM, XX },
|
1014 | bc51c5c9 | bellard | { "pmulhw", MX, EM, XX },
|
1015 | bc51c5c9 | bellard | { PREGRP15 }, |
1016 | bc51c5c9 | bellard | { PREGRP25 }, |
1017 | dc99065b | bellard | /* e8 */
|
1018 | bc51c5c9 | bellard | { "psubsb", MX, EM, XX },
|
1019 | bc51c5c9 | bellard | { "psubsw", MX, EM, XX },
|
1020 | bc51c5c9 | bellard | { "pminsw", MX, EM, XX },
|
1021 | bc51c5c9 | bellard | { "por", MX, EM, XX },
|
1022 | bc51c5c9 | bellard | { "paddsb", MX, EM, XX },
|
1023 | bc51c5c9 | bellard | { "paddsw", MX, EM, XX },
|
1024 | bc51c5c9 | bellard | { "pmaxsw", MX, EM, XX },
|
1025 | bc51c5c9 | bellard | { "pxor", MX, EM, XX },
|
1026 | dc99065b | bellard | /* f0 */
|
1027 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1028 | bc51c5c9 | bellard | { "psllw", MX, EM, XX },
|
1029 | bc51c5c9 | bellard | { "pslld", MX, EM, XX },
|
1030 | bc51c5c9 | bellard | { "psllq", MX, EM, XX },
|
1031 | bc51c5c9 | bellard | { "pmuludq", MX, EM, XX },
|
1032 | bc51c5c9 | bellard | { "pmaddwd", MX, EM, XX },
|
1033 | bc51c5c9 | bellard | { "psadbw", MX, EM, XX },
|
1034 | bc51c5c9 | bellard | { PREGRP18 }, |
1035 | dc99065b | bellard | /* f8 */
|
1036 | bc51c5c9 | bellard | { "psubb", MX, EM, XX },
|
1037 | bc51c5c9 | bellard | { "psubw", MX, EM, XX },
|
1038 | bc51c5c9 | bellard | { "psubd", MX, EM, XX },
|
1039 | bc51c5c9 | bellard | { "psubq", MX, EM, XX },
|
1040 | bc51c5c9 | bellard | { "paddb", MX, EM, XX },
|
1041 | bc51c5c9 | bellard | { "paddw", MX, EM, XX },
|
1042 | bc51c5c9 | bellard | { "paddd", MX, EM, XX },
|
1043 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }
|
1044 | dc99065b | bellard | }; |
1045 | dc99065b | bellard | |
1046 | dc99065b | bellard | static const unsigned char onebyte_has_modrm[256] = { |
1047 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1048 | bc51c5c9 | bellard | /* ------------------------------- */
|
1049 | bc51c5c9 | bellard | /* 00 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 00 */ |
1050 | bc51c5c9 | bellard | /* 10 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 10 */ |
1051 | bc51c5c9 | bellard | /* 20 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 20 */ |
1052 | bc51c5c9 | bellard | /* 30 */ 1,1,1,1,0,0,0,0,1,1,1,1,0,0,0,0, /* 30 */ |
1053 | bc51c5c9 | bellard | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 40 */ |
1054 | bc51c5c9 | bellard | /* 50 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 50 */ |
1055 | bc51c5c9 | bellard | /* 60 */ 0,0,1,1,0,0,0,0,0,1,0,1,0,0,0,0, /* 60 */ |
1056 | bc51c5c9 | bellard | /* 70 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 70 */ |
1057 | bc51c5c9 | bellard | /* 80 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 80 */ |
1058 | bc51c5c9 | bellard | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 90 */ |
1059 | bc51c5c9 | bellard | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* a0 */ |
1060 | bc51c5c9 | bellard | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* b0 */ |
1061 | bc51c5c9 | bellard | /* c0 */ 1,1,0,0,1,1,1,1,0,0,0,0,0,0,0,0, /* c0 */ |
1062 | bc51c5c9 | bellard | /* d0 */ 1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* d0 */ |
1063 | bc51c5c9 | bellard | /* e0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* e0 */ |
1064 | bc51c5c9 | bellard | /* f0 */ 0,0,0,0,0,0,1,1,0,0,0,0,0,0,1,1 /* f0 */ |
1065 | bc51c5c9 | bellard | /* ------------------------------- */
|
1066 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1067 | dc99065b | bellard | }; |
1068 | dc99065b | bellard | |
1069 | dc99065b | bellard | static const unsigned char twobyte_has_modrm[256] = { |
1070 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1071 | bc51c5c9 | bellard | /* ------------------------------- */
|
1072 | bc51c5c9 | bellard | /* 00 */ 1,1,1,1,0,0,0,0,0,0,0,0,0,1,0,1, /* 0f */ |
1073 | bc51c5c9 | bellard | /* 10 */ 1,1,1,1,1,1,1,1,1,0,0,0,0,0,0,0, /* 1f */ |
1074 | bc51c5c9 | bellard | /* 20 */ 1,1,1,1,1,0,1,0,1,1,1,1,1,1,1,1, /* 2f */ |
1075 | dc99065b | bellard | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1076 | dc99065b | bellard | /* 40 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 4f */ |
1077 | bc51c5c9 | bellard | /* 50 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 5f */ |
1078 | bc51c5c9 | bellard | /* 60 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 6f */ |
1079 | bc51c5c9 | bellard | /* 70 */ 1,1,1,1,1,1,1,0,0,0,0,0,0,0,1,1, /* 7f */ |
1080 | dc99065b | bellard | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1081 | dc99065b | bellard | /* 90 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* 9f */ |
1082 | bc51c5c9 | bellard | /* a0 */ 0,0,0,1,1,1,0,0,0,0,0,1,1,1,1,1, /* af */ |
1083 | dc99065b | bellard | /* b0 */ 1,1,1,1,1,1,1,1,0,0,1,1,1,1,1,1, /* bf */ |
1084 | dc99065b | bellard | /* c0 */ 1,1,1,1,1,1,1,1,0,0,0,0,0,0,0,0, /* cf */ |
1085 | bc51c5c9 | bellard | /* d0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* df */ |
1086 | bc51c5c9 | bellard | /* e0 */ 1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1, /* ef */ |
1087 | bc51c5c9 | bellard | /* f0 */ 0,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0 /* ff */ |
1088 | bc51c5c9 | bellard | /* ------------------------------- */
|
1089 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1090 | bc51c5c9 | bellard | }; |
1091 | bc51c5c9 | bellard | |
1092 | bc51c5c9 | bellard | static const unsigned char twobyte_uses_SSE_prefix[256] = { |
1093 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1094 | bc51c5c9 | bellard | /* ------------------------------- */
|
1095 | bc51c5c9 | bellard | /* 00 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 0f */ |
1096 | bc51c5c9 | bellard | /* 10 */ 1,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 1f */ |
1097 | bc51c5c9 | bellard | /* 20 */ 0,0,0,0,0,0,0,0,0,0,1,0,1,1,0,0, /* 2f */ |
1098 | bc51c5c9 | bellard | /* 30 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 3f */ |
1099 | bc51c5c9 | bellard | /* 40 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 4f */ |
1100 | bc51c5c9 | bellard | /* 50 */ 0,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1, /* 5f */ |
1101 | bc51c5c9 | bellard | /* 60 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,1,0,1, /* 6f */ |
1102 | bc51c5c9 | bellard | /* 70 */ 1,0,0,0,0,0,0,0,0,0,0,0,0,0,1,1, /* 7f */ |
1103 | bc51c5c9 | bellard | /* 80 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 8f */ |
1104 | bc51c5c9 | bellard | /* 90 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* 9f */ |
1105 | bc51c5c9 | bellard | /* a0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* af */ |
1106 | bc51c5c9 | bellard | /* b0 */ 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0, /* bf */ |
1107 | bc51c5c9 | bellard | /* c0 */ 0,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0, /* cf */ |
1108 | bc51c5c9 | bellard | /* d0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* df */ |
1109 | bc51c5c9 | bellard | /* e0 */ 0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,0, /* ef */ |
1110 | bc51c5c9 | bellard | /* f0 */ 0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0 /* ff */ |
1111 | bc51c5c9 | bellard | /* ------------------------------- */
|
1112 | bc51c5c9 | bellard | /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
|
1113 | dc99065b | bellard | }; |
1114 | dc99065b | bellard | |
1115 | dc99065b | bellard | static char obuf[100]; |
1116 | dc99065b | bellard | static char *obufp; |
1117 | dc99065b | bellard | static char scratchbuf[100]; |
1118 | dc99065b | bellard | static unsigned char *start_codep; |
1119 | bc51c5c9 | bellard | static unsigned char *insn_codep; |
1120 | dc99065b | bellard | static unsigned char *codep; |
1121 | dc99065b | bellard | static disassemble_info *the_info;
|
1122 | dc99065b | bellard | static int mod; |
1123 | dc99065b | bellard | static int rm; |
1124 | dc99065b | bellard | static int reg; |
1125 | bc51c5c9 | bellard | static unsigned char need_modrm; |
1126 | bc51c5c9 | bellard | |
1127 | bc51c5c9 | bellard | /* If we are accessing mod/rm/reg without need_modrm set, then the
|
1128 | bc51c5c9 | bellard | values are stale. Hitting this abort likely indicates that you
|
1129 | bc51c5c9 | bellard | need to update onebyte_has_modrm or twobyte_has_modrm. */
|
1130 | bc51c5c9 | bellard | #define MODRM_CHECK if (!need_modrm) abort () |
1131 | bc51c5c9 | bellard | |
1132 | bc51c5c9 | bellard | static const char **names64; |
1133 | bc51c5c9 | bellard | static const char **names32; |
1134 | bc51c5c9 | bellard | static const char **names16; |
1135 | bc51c5c9 | bellard | static const char **names8; |
1136 | bc51c5c9 | bellard | static const char **names8rex; |
1137 | bc51c5c9 | bellard | static const char **names_seg; |
1138 | bc51c5c9 | bellard | static const char **index16; |
1139 | bc51c5c9 | bellard | |
1140 | bc51c5c9 | bellard | static const char *intel_names64[] = { |
1141 | bc51c5c9 | bellard | "rax", "rcx", "rdx", "rbx", "rsp", "rbp", "rsi", "rdi", |
1142 | bc51c5c9 | bellard | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" |
1143 | bc51c5c9 | bellard | }; |
1144 | bc51c5c9 | bellard | static const char *intel_names32[] = { |
1145 | bc51c5c9 | bellard | "eax", "ecx", "edx", "ebx", "esp", "ebp", "esi", "edi", |
1146 | bc51c5c9 | bellard | "r8d", "r9d", "r10d", "r11d", "r12d", "r13d", "r14d", "r15d" |
1147 | bc51c5c9 | bellard | }; |
1148 | bc51c5c9 | bellard | static const char *intel_names16[] = { |
1149 | bc51c5c9 | bellard | "ax", "cx", "dx", "bx", "sp", "bp", "si", "di", |
1150 | bc51c5c9 | bellard | "r8w", "r9w", "r10w", "r11w", "r12w", "r13w", "r14w", "r15w" |
1151 | bc51c5c9 | bellard | }; |
1152 | bc51c5c9 | bellard | static const char *intel_names8[] = { |
1153 | bc51c5c9 | bellard | "al", "cl", "dl", "bl", "ah", "ch", "dh", "bh", |
1154 | bc51c5c9 | bellard | }; |
1155 | bc51c5c9 | bellard | static const char *intel_names8rex[] = { |
1156 | bc51c5c9 | bellard | "al", "cl", "dl", "bl", "spl", "bpl", "sil", "dil", |
1157 | bc51c5c9 | bellard | "r8b", "r9b", "r10b", "r11b", "r12b", "r13b", "r14b", "r15b" |
1158 | bc51c5c9 | bellard | }; |
1159 | bc51c5c9 | bellard | static const char *intel_names_seg[] = { |
1160 | bc51c5c9 | bellard | "es", "cs", "ss", "ds", "fs", "gs", "?", "?", |
1161 | bc51c5c9 | bellard | }; |
1162 | bc51c5c9 | bellard | static const char *intel_index16[] = { |
1163 | bc51c5c9 | bellard | "bx+si", "bx+di", "bp+si", "bp+di", "si", "di", "bp", "bx" |
1164 | bc51c5c9 | bellard | }; |
1165 | dc99065b | bellard | |
1166 | bc51c5c9 | bellard | static const char *att_names64[] = { |
1167 | bc51c5c9 | bellard | "%rax", "%rcx", "%rdx", "%rbx", "%rsp", "%rbp", "%rsi", "%rdi", |
1168 | bc51c5c9 | bellard | "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15" |
1169 | bc51c5c9 | bellard | }; |
1170 | bc51c5c9 | bellard | static const char *att_names32[] = { |
1171 | bc51c5c9 | bellard | "%eax", "%ecx", "%edx", "%ebx", "%esp", "%ebp", "%esi", "%edi", |
1172 | bc51c5c9 | bellard | "%r8d", "%r9d", "%r10d", "%r11d", "%r12d", "%r13d", "%r14d", "%r15d" |
1173 | dc99065b | bellard | }; |
1174 | bc51c5c9 | bellard | static const char *att_names16[] = { |
1175 | bc51c5c9 | bellard | "%ax", "%cx", "%dx", "%bx", "%sp", "%bp", "%si", "%di", |
1176 | bc51c5c9 | bellard | "%r8w", "%r9w", "%r10w", "%r11w", "%r12w", "%r13w", "%r14w", "%r15w" |
1177 | dc99065b | bellard | }; |
1178 | bc51c5c9 | bellard | static const char *att_names8[] = { |
1179 | bc51c5c9 | bellard | "%al", "%cl", "%dl", "%bl", "%ah", "%ch", "%dh", "%bh", |
1180 | dc99065b | bellard | }; |
1181 | bc51c5c9 | bellard | static const char *att_names8rex[] = { |
1182 | bc51c5c9 | bellard | "%al", "%cl", "%dl", "%bl", "%spl", "%bpl", "%sil", "%dil", |
1183 | bc51c5c9 | bellard | "%r8b", "%r9b", "%r10b", "%r11b", "%r12b", "%r13b", "%r14b", "%r15b" |
1184 | dc99065b | bellard | }; |
1185 | bc51c5c9 | bellard | static const char *att_names_seg[] = { |
1186 | bc51c5c9 | bellard | "%es", "%cs", "%ss", "%ds", "%fs", "%gs", "%?", "%?", |
1187 | bc51c5c9 | bellard | }; |
1188 | bc51c5c9 | bellard | static const char *att_index16[] = { |
1189 | bc51c5c9 | bellard | "%bx,%si", "%bx,%di", "%bp,%si", "%bp,%di", "%si", "%di", "%bp", "%bx" |
1190 | dc99065b | bellard | }; |
1191 | dc99065b | bellard | |
1192 | bc51c5c9 | bellard | static const struct dis386 grps[][8] = { |
1193 | dc99065b | bellard | /* GRP1b */
|
1194 | dc99065b | bellard | { |
1195 | bc51c5c9 | bellard | { "addA", Eb, Ib, XX },
|
1196 | bc51c5c9 | bellard | { "orA", Eb, Ib, XX },
|
1197 | bc51c5c9 | bellard | { "adcA", Eb, Ib, XX },
|
1198 | bc51c5c9 | bellard | { "sbbA", Eb, Ib, XX },
|
1199 | bc51c5c9 | bellard | { "andA", Eb, Ib, XX },
|
1200 | bc51c5c9 | bellard | { "subA", Eb, Ib, XX },
|
1201 | bc51c5c9 | bellard | { "xorA", Eb, Ib, XX },
|
1202 | bc51c5c9 | bellard | { "cmpA", Eb, Ib, XX }
|
1203 | dc99065b | bellard | }, |
1204 | dc99065b | bellard | /* GRP1S */
|
1205 | dc99065b | bellard | { |
1206 | bc51c5c9 | bellard | { "addQ", Ev, Iv, XX },
|
1207 | bc51c5c9 | bellard | { "orQ", Ev, Iv, XX },
|
1208 | bc51c5c9 | bellard | { "adcQ", Ev, Iv, XX },
|
1209 | bc51c5c9 | bellard | { "sbbQ", Ev, Iv, XX },
|
1210 | bc51c5c9 | bellard | { "andQ", Ev, Iv, XX },
|
1211 | bc51c5c9 | bellard | { "subQ", Ev, Iv, XX },
|
1212 | bc51c5c9 | bellard | { "xorQ", Ev, Iv, XX },
|
1213 | bc51c5c9 | bellard | { "cmpQ", Ev, Iv, XX }
|
1214 | dc99065b | bellard | }, |
1215 | dc99065b | bellard | /* GRP1Ss */
|
1216 | dc99065b | bellard | { |
1217 | bc51c5c9 | bellard | { "addQ", Ev, sIb, XX },
|
1218 | bc51c5c9 | bellard | { "orQ", Ev, sIb, XX },
|
1219 | bc51c5c9 | bellard | { "adcQ", Ev, sIb, XX },
|
1220 | bc51c5c9 | bellard | { "sbbQ", Ev, sIb, XX },
|
1221 | bc51c5c9 | bellard | { "andQ", Ev, sIb, XX },
|
1222 | bc51c5c9 | bellard | { "subQ", Ev, sIb, XX },
|
1223 | bc51c5c9 | bellard | { "xorQ", Ev, sIb, XX },
|
1224 | bc51c5c9 | bellard | { "cmpQ", Ev, sIb, XX }
|
1225 | dc99065b | bellard | }, |
1226 | dc99065b | bellard | /* GRP2b */
|
1227 | dc99065b | bellard | { |
1228 | bc51c5c9 | bellard | { "rolA", Eb, Ib, XX },
|
1229 | bc51c5c9 | bellard | { "rorA", Eb, Ib, XX },
|
1230 | bc51c5c9 | bellard | { "rclA", Eb, Ib, XX },
|
1231 | bc51c5c9 | bellard | { "rcrA", Eb, Ib, XX },
|
1232 | bc51c5c9 | bellard | { "shlA", Eb, Ib, XX },
|
1233 | bc51c5c9 | bellard | { "shrA", Eb, Ib, XX },
|
1234 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1235 | bc51c5c9 | bellard | { "sarA", Eb, Ib, XX },
|
1236 | dc99065b | bellard | }, |
1237 | dc99065b | bellard | /* GRP2S */
|
1238 | dc99065b | bellard | { |
1239 | bc51c5c9 | bellard | { "rolQ", Ev, Ib, XX },
|
1240 | bc51c5c9 | bellard | { "rorQ", Ev, Ib, XX },
|
1241 | bc51c5c9 | bellard | { "rclQ", Ev, Ib, XX },
|
1242 | bc51c5c9 | bellard | { "rcrQ", Ev, Ib, XX },
|
1243 | bc51c5c9 | bellard | { "shlQ", Ev, Ib, XX },
|
1244 | bc51c5c9 | bellard | { "shrQ", Ev, Ib, XX },
|
1245 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1246 | bc51c5c9 | bellard | { "sarQ", Ev, Ib, XX },
|
1247 | dc99065b | bellard | }, |
1248 | dc99065b | bellard | /* GRP2b_one */
|
1249 | dc99065b | bellard | { |
1250 | bc51c5c9 | bellard | { "rolA", Eb, XX, XX },
|
1251 | bc51c5c9 | bellard | { "rorA", Eb, XX, XX },
|
1252 | bc51c5c9 | bellard | { "rclA", Eb, XX, XX },
|
1253 | bc51c5c9 | bellard | { "rcrA", Eb, XX, XX },
|
1254 | bc51c5c9 | bellard | { "shlA", Eb, XX, XX },
|
1255 | bc51c5c9 | bellard | { "shrA", Eb, XX, XX },
|
1256 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1257 | bc51c5c9 | bellard | { "sarA", Eb, XX, XX },
|
1258 | dc99065b | bellard | }, |
1259 | dc99065b | bellard | /* GRP2S_one */
|
1260 | dc99065b | bellard | { |
1261 | bc51c5c9 | bellard | { "rolQ", Ev, XX, XX },
|
1262 | bc51c5c9 | bellard | { "rorQ", Ev, XX, XX },
|
1263 | bc51c5c9 | bellard | { "rclQ", Ev, XX, XX },
|
1264 | bc51c5c9 | bellard | { "rcrQ", Ev, XX, XX },
|
1265 | bc51c5c9 | bellard | { "shlQ", Ev, XX, XX },
|
1266 | bc51c5c9 | bellard | { "shrQ", Ev, XX, XX },
|
1267 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX},
|
1268 | bc51c5c9 | bellard | { "sarQ", Ev, XX, XX },
|
1269 | dc99065b | bellard | }, |
1270 | dc99065b | bellard | /* GRP2b_cl */
|
1271 | dc99065b | bellard | { |
1272 | bc51c5c9 | bellard | { "rolA", Eb, CL, XX },
|
1273 | bc51c5c9 | bellard | { "rorA", Eb, CL, XX },
|
1274 | bc51c5c9 | bellard | { "rclA", Eb, CL, XX },
|
1275 | bc51c5c9 | bellard | { "rcrA", Eb, CL, XX },
|
1276 | bc51c5c9 | bellard | { "shlA", Eb, CL, XX },
|
1277 | bc51c5c9 | bellard | { "shrA", Eb, CL, XX },
|
1278 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1279 | bc51c5c9 | bellard | { "sarA", Eb, CL, XX },
|
1280 | dc99065b | bellard | }, |
1281 | dc99065b | bellard | /* GRP2S_cl */
|
1282 | dc99065b | bellard | { |
1283 | bc51c5c9 | bellard | { "rolQ", Ev, CL, XX },
|
1284 | bc51c5c9 | bellard | { "rorQ", Ev, CL, XX },
|
1285 | bc51c5c9 | bellard | { "rclQ", Ev, CL, XX },
|
1286 | bc51c5c9 | bellard | { "rcrQ", Ev, CL, XX },
|
1287 | bc51c5c9 | bellard | { "shlQ", Ev, CL, XX },
|
1288 | bc51c5c9 | bellard | { "shrQ", Ev, CL, XX },
|
1289 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1290 | bc51c5c9 | bellard | { "sarQ", Ev, CL, XX }
|
1291 | dc99065b | bellard | }, |
1292 | dc99065b | bellard | /* GRP3b */
|
1293 | dc99065b | bellard | { |
1294 | bc51c5c9 | bellard | { "testA", Eb, Ib, XX },
|
1295 | bc51c5c9 | bellard | { "(bad)", Eb, XX, XX },
|
1296 | bc51c5c9 | bellard | { "notA", Eb, XX, XX },
|
1297 | bc51c5c9 | bellard | { "negA", Eb, XX, XX },
|
1298 | bc51c5c9 | bellard | { "mulA", Eb, XX, XX }, /* Don't print the implicit %al register, */ |
1299 | bc51c5c9 | bellard | { "imulA", Eb, XX, XX }, /* to distinguish these opcodes from other */ |
1300 | bc51c5c9 | bellard | { "divA", Eb, XX, XX }, /* mul/imul opcodes. Do the same for div */ |
1301 | bc51c5c9 | bellard | { "idivA", Eb, XX, XX } /* and idiv for consistency. */ |
1302 | dc99065b | bellard | }, |
1303 | dc99065b | bellard | /* GRP3S */
|
1304 | dc99065b | bellard | { |
1305 | bc51c5c9 | bellard | { "testQ", Ev, Iv, XX },
|
1306 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1307 | bc51c5c9 | bellard | { "notQ", Ev, XX, XX },
|
1308 | bc51c5c9 | bellard | { "negQ", Ev, XX, XX },
|
1309 | bc51c5c9 | bellard | { "mulQ", Ev, XX, XX }, /* Don't print the implicit register. */ |
1310 | bc51c5c9 | bellard | { "imulQ", Ev, XX, XX },
|
1311 | bc51c5c9 | bellard | { "divQ", Ev, XX, XX },
|
1312 | bc51c5c9 | bellard | { "idivQ", Ev, XX, XX },
|
1313 | dc99065b | bellard | }, |
1314 | dc99065b | bellard | /* GRP4 */
|
1315 | dc99065b | bellard | { |
1316 | bc51c5c9 | bellard | { "incA", Eb, XX, XX },
|
1317 | bc51c5c9 | bellard | { "decA", Eb, XX, XX },
|
1318 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1319 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1320 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1321 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1322 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1323 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1324 | dc99065b | bellard | }, |
1325 | dc99065b | bellard | /* GRP5 */
|
1326 | dc99065b | bellard | { |
1327 | bc51c5c9 | bellard | { "incQ", Ev, XX, XX },
|
1328 | bc51c5c9 | bellard | { "decQ", Ev, XX, XX },
|
1329 | bc51c5c9 | bellard | { "callT", indirEv, XX, XX },
|
1330 | bc51c5c9 | bellard | { "lcallT", indirEv, XX, XX },
|
1331 | bc51c5c9 | bellard | { "jmpT", indirEv, XX, XX },
|
1332 | bc51c5c9 | bellard | { "ljmpT", indirEv, XX, XX },
|
1333 | bc51c5c9 | bellard | { "pushU", Ev, XX, XX },
|
1334 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1335 | dc99065b | bellard | }, |
1336 | dc99065b | bellard | /* GRP6 */
|
1337 | dc99065b | bellard | { |
1338 | bc51c5c9 | bellard | { "sldtQ", Ev, XX, XX },
|
1339 | bc51c5c9 | bellard | { "strQ", Ev, XX, XX },
|
1340 | bc51c5c9 | bellard | { "lldt", Ew, XX, XX },
|
1341 | bc51c5c9 | bellard | { "ltr", Ew, XX, XX },
|
1342 | bc51c5c9 | bellard | { "verr", Ew, XX, XX },
|
1343 | bc51c5c9 | bellard | { "verw", Ew, XX, XX },
|
1344 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1345 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX }
|
1346 | dc99065b | bellard | }, |
1347 | dc99065b | bellard | /* GRP7 */
|
1348 | dc99065b | bellard | { |
1349 | bc51c5c9 | bellard | { "sgdtQ", M, XX, XX },
|
1350 | bc51c5c9 | bellard | { "sidtQ", M, XX, XX },
|
1351 | bc51c5c9 | bellard | { "lgdtQ", M, XX, XX },
|
1352 | bc51c5c9 | bellard | { "lidtQ", M, XX, XX },
|
1353 | bc51c5c9 | bellard | { "smswQ", Ev, XX, XX },
|
1354 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1355 | bc51c5c9 | bellard | { "lmsw", Ew, XX, XX },
|
1356 | bc51c5c9 | bellard | { "invlpg", Ew, XX, XX },
|
1357 | dc99065b | bellard | }, |
1358 | dc99065b | bellard | /* GRP8 */
|
1359 | dc99065b | bellard | { |
1360 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1361 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1362 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1363 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1364 | bc51c5c9 | bellard | { "btQ", Ev, Ib, XX },
|
1365 | bc51c5c9 | bellard | { "btsQ", Ev, Ib, XX },
|
1366 | bc51c5c9 | bellard | { "btrQ", Ev, Ib, XX },
|
1367 | bc51c5c9 | bellard | { "btcQ", Ev, Ib, XX },
|
1368 | dc99065b | bellard | }, |
1369 | dc99065b | bellard | /* GRP9 */
|
1370 | dc99065b | bellard | { |
1371 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1372 | bc51c5c9 | bellard | { "cmpxchg8b", Ev, XX, XX },
|
1373 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1374 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1375 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1376 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1377 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1378 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1379 | dc99065b | bellard | }, |
1380 | dc99065b | bellard | /* GRP10 */
|
1381 | dc99065b | bellard | { |
1382 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1383 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1384 | bc51c5c9 | bellard | { "psrlw", MS, Ib, XX },
|
1385 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1386 | bc51c5c9 | bellard | { "psraw", MS, Ib, XX },
|
1387 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1388 | bc51c5c9 | bellard | { "psllw", MS, Ib, XX },
|
1389 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1390 | dc99065b | bellard | }, |
1391 | dc99065b | bellard | /* GRP11 */
|
1392 | dc99065b | bellard | { |
1393 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1394 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1395 | bc51c5c9 | bellard | { "psrld", MS, Ib, XX },
|
1396 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1397 | bc51c5c9 | bellard | { "psrad", MS, Ib, XX },
|
1398 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1399 | bc51c5c9 | bellard | { "pslld", MS, Ib, XX },
|
1400 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1401 | dc99065b | bellard | }, |
1402 | dc99065b | bellard | /* GRP12 */
|
1403 | dc99065b | bellard | { |
1404 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1405 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1406 | bc51c5c9 | bellard | { "psrlq", MS, Ib, XX },
|
1407 | bc51c5c9 | bellard | { "psrldq", MS, Ib, XX },
|
1408 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1409 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1410 | bc51c5c9 | bellard | { "psllq", MS, Ib, XX },
|
1411 | bc51c5c9 | bellard | { "pslldq", MS, Ib, XX },
|
1412 | bc51c5c9 | bellard | }, |
1413 | bc51c5c9 | bellard | /* GRP13 */
|
1414 | bc51c5c9 | bellard | { |
1415 | bc51c5c9 | bellard | { "fxsave", Ev, XX, XX },
|
1416 | bc51c5c9 | bellard | { "fxrstor", Ev, XX, XX },
|
1417 | bc51c5c9 | bellard | { "ldmxcsr", Ev, XX, XX },
|
1418 | bc51c5c9 | bellard | { "stmxcsr", Ev, XX, XX },
|
1419 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1420 | bc51c5c9 | bellard | { "lfence", None, XX, XX },
|
1421 | bc51c5c9 | bellard | { "mfence", None, XX, XX },
|
1422 | bc51c5c9 | bellard | { "sfence", None, XX, XX },
|
1423 | bc51c5c9 | bellard | /* FIXME: the sfence with memory operand is clflush! */
|
1424 | bc51c5c9 | bellard | }, |
1425 | bc51c5c9 | bellard | /* GRP14 */
|
1426 | bc51c5c9 | bellard | { |
1427 | bc51c5c9 | bellard | { "prefetchnta", Ev, XX, XX },
|
1428 | bc51c5c9 | bellard | { "prefetcht0", Ev, XX, XX },
|
1429 | bc51c5c9 | bellard | { "prefetcht1", Ev, XX, XX },
|
1430 | bc51c5c9 | bellard | { "prefetcht2", Ev, XX, XX },
|
1431 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1432 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1433 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1434 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1435 | bc51c5c9 | bellard | }, |
1436 | bc51c5c9 | bellard | /* GRPAMD */
|
1437 | bc51c5c9 | bellard | { |
1438 | bc51c5c9 | bellard | { "prefetch", Eb, XX, XX },
|
1439 | bc51c5c9 | bellard | { "prefetchw", Eb, XX, XX },
|
1440 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1441 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1442 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1443 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1444 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1445 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
1446 | dc99065b | bellard | } |
1447 | dc99065b | bellard | }; |
1448 | dc99065b | bellard | |
1449 | bc51c5c9 | bellard | static const struct dis386 prefix_user_table[][4] = { |
1450 | bc51c5c9 | bellard | /* PREGRP0 */
|
1451 | bc51c5c9 | bellard | { |
1452 | bc51c5c9 | bellard | { "addps", XM, EX, XX },
|
1453 | bc51c5c9 | bellard | { "addss", XM, EX, XX },
|
1454 | bc51c5c9 | bellard | { "addpd", XM, EX, XX },
|
1455 | bc51c5c9 | bellard | { "addsd", XM, EX, XX },
|
1456 | bc51c5c9 | bellard | }, |
1457 | bc51c5c9 | bellard | /* PREGRP1 */
|
1458 | bc51c5c9 | bellard | { |
1459 | bc51c5c9 | bellard | { "", XM, EX, OPSIMD }, /* See OP_SIMD_SUFFIX. */ |
1460 | bc51c5c9 | bellard | { "", XM, EX, OPSIMD },
|
1461 | bc51c5c9 | bellard | { "", XM, EX, OPSIMD },
|
1462 | bc51c5c9 | bellard | { "", XM, EX, OPSIMD },
|
1463 | bc51c5c9 | bellard | }, |
1464 | bc51c5c9 | bellard | /* PREGRP2 */
|
1465 | bc51c5c9 | bellard | { |
1466 | bc51c5c9 | bellard | { "cvtpi2ps", XM, EM, XX },
|
1467 | bc51c5c9 | bellard | { "cvtsi2ssY", XM, Ev, XX },
|
1468 | bc51c5c9 | bellard | { "cvtpi2pd", XM, EM, XX },
|
1469 | bc51c5c9 | bellard | { "cvtsi2sdY", XM, Ev, XX },
|
1470 | bc51c5c9 | bellard | }, |
1471 | bc51c5c9 | bellard | /* PREGRP3 */
|
1472 | bc51c5c9 | bellard | { |
1473 | bc51c5c9 | bellard | { "cvtps2pi", MX, EX, XX },
|
1474 | bc51c5c9 | bellard | { "cvtss2siY", Gv, EX, XX },
|
1475 | bc51c5c9 | bellard | { "cvtpd2pi", MX, EX, XX },
|
1476 | bc51c5c9 | bellard | { "cvtsd2siY", Gv, EX, XX },
|
1477 | bc51c5c9 | bellard | }, |
1478 | bc51c5c9 | bellard | /* PREGRP4 */
|
1479 | bc51c5c9 | bellard | { |
1480 | bc51c5c9 | bellard | { "cvttps2pi", MX, EX, XX },
|
1481 | bc51c5c9 | bellard | { "cvttss2siY", Gv, EX, XX },
|
1482 | bc51c5c9 | bellard | { "cvttpd2pi", MX, EX, XX },
|
1483 | bc51c5c9 | bellard | { "cvttsd2siY", Gv, EX, XX },
|
1484 | bc51c5c9 | bellard | }, |
1485 | bc51c5c9 | bellard | /* PREGRP5 */
|
1486 | bc51c5c9 | bellard | { |
1487 | bc51c5c9 | bellard | { "divps", XM, EX, XX },
|
1488 | bc51c5c9 | bellard | { "divss", XM, EX, XX },
|
1489 | bc51c5c9 | bellard | { "divpd", XM, EX, XX },
|
1490 | bc51c5c9 | bellard | { "divsd", XM, EX, XX },
|
1491 | bc51c5c9 | bellard | }, |
1492 | bc51c5c9 | bellard | /* PREGRP6 */
|
1493 | bc51c5c9 | bellard | { |
1494 | bc51c5c9 | bellard | { "maxps", XM, EX, XX },
|
1495 | bc51c5c9 | bellard | { "maxss", XM, EX, XX },
|
1496 | bc51c5c9 | bellard | { "maxpd", XM, EX, XX },
|
1497 | bc51c5c9 | bellard | { "maxsd", XM, EX, XX },
|
1498 | bc51c5c9 | bellard | }, |
1499 | bc51c5c9 | bellard | /* PREGRP7 */
|
1500 | bc51c5c9 | bellard | { |
1501 | bc51c5c9 | bellard | { "minps", XM, EX, XX },
|
1502 | bc51c5c9 | bellard | { "minss", XM, EX, XX },
|
1503 | bc51c5c9 | bellard | { "minpd", XM, EX, XX },
|
1504 | bc51c5c9 | bellard | { "minsd", XM, EX, XX },
|
1505 | bc51c5c9 | bellard | }, |
1506 | bc51c5c9 | bellard | /* PREGRP8 */
|
1507 | bc51c5c9 | bellard | { |
1508 | bc51c5c9 | bellard | { "movups", XM, EX, XX },
|
1509 | bc51c5c9 | bellard | { "movss", XM, EX, XX },
|
1510 | bc51c5c9 | bellard | { "movupd", XM, EX, XX },
|
1511 | bc51c5c9 | bellard | { "movsd", XM, EX, XX },
|
1512 | bc51c5c9 | bellard | }, |
1513 | bc51c5c9 | bellard | /* PREGRP9 */
|
1514 | bc51c5c9 | bellard | { |
1515 | bc51c5c9 | bellard | { "movups", EX, XM, XX },
|
1516 | bc51c5c9 | bellard | { "movss", EX, XM, XX },
|
1517 | bc51c5c9 | bellard | { "movupd", EX, XM, XX },
|
1518 | bc51c5c9 | bellard | { "movsd", EX, XM, XX },
|
1519 | bc51c5c9 | bellard | }, |
1520 | bc51c5c9 | bellard | /* PREGRP10 */
|
1521 | bc51c5c9 | bellard | { |
1522 | bc51c5c9 | bellard | { "mulps", XM, EX, XX },
|
1523 | bc51c5c9 | bellard | { "mulss", XM, EX, XX },
|
1524 | bc51c5c9 | bellard | { "mulpd", XM, EX, XX },
|
1525 | bc51c5c9 | bellard | { "mulsd", XM, EX, XX },
|
1526 | bc51c5c9 | bellard | }, |
1527 | bc51c5c9 | bellard | /* PREGRP11 */
|
1528 | bc51c5c9 | bellard | { |
1529 | bc51c5c9 | bellard | { "rcpps", XM, EX, XX },
|
1530 | bc51c5c9 | bellard | { "rcpss", XM, EX, XX },
|
1531 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1532 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1533 | bc51c5c9 | bellard | }, |
1534 | bc51c5c9 | bellard | /* PREGRP12 */
|
1535 | bc51c5c9 | bellard | { |
1536 | bc51c5c9 | bellard | { "rsqrtps", XM, EX, XX },
|
1537 | bc51c5c9 | bellard | { "rsqrtss", XM, EX, XX },
|
1538 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1539 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1540 | bc51c5c9 | bellard | }, |
1541 | bc51c5c9 | bellard | /* PREGRP13 */
|
1542 | bc51c5c9 | bellard | { |
1543 | bc51c5c9 | bellard | { "sqrtps", XM, EX, XX },
|
1544 | bc51c5c9 | bellard | { "sqrtss", XM, EX, XX },
|
1545 | bc51c5c9 | bellard | { "sqrtpd", XM, EX, XX },
|
1546 | bc51c5c9 | bellard | { "sqrtsd", XM, EX, XX },
|
1547 | bc51c5c9 | bellard | }, |
1548 | bc51c5c9 | bellard | /* PREGRP14 */
|
1549 | bc51c5c9 | bellard | { |
1550 | bc51c5c9 | bellard | { "subps", XM, EX, XX },
|
1551 | bc51c5c9 | bellard | { "subss", XM, EX, XX },
|
1552 | bc51c5c9 | bellard | { "subpd", XM, EX, XX },
|
1553 | bc51c5c9 | bellard | { "subsd", XM, EX, XX },
|
1554 | bc51c5c9 | bellard | }, |
1555 | bc51c5c9 | bellard | /* PREGRP15 */
|
1556 | bc51c5c9 | bellard | { |
1557 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1558 | bc51c5c9 | bellard | { "cvtdq2pd", XM, EX, XX },
|
1559 | bc51c5c9 | bellard | { "cvttpd2dq", XM, EX, XX },
|
1560 | bc51c5c9 | bellard | { "cvtpd2dq", XM, EX, XX },
|
1561 | bc51c5c9 | bellard | }, |
1562 | bc51c5c9 | bellard | /* PREGRP16 */
|
1563 | bc51c5c9 | bellard | { |
1564 | bc51c5c9 | bellard | { "cvtdq2ps", XM, EX, XX },
|
1565 | bc51c5c9 | bellard | { "cvttps2dq",XM, EX, XX },
|
1566 | bc51c5c9 | bellard | { "cvtps2dq",XM, EX, XX },
|
1567 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1568 | bc51c5c9 | bellard | }, |
1569 | bc51c5c9 | bellard | /* PREGRP17 */
|
1570 | bc51c5c9 | bellard | { |
1571 | bc51c5c9 | bellard | { "cvtps2pd", XM, EX, XX },
|
1572 | bc51c5c9 | bellard | { "cvtss2sd", XM, EX, XX },
|
1573 | bc51c5c9 | bellard | { "cvtpd2ps", XM, EX, XX },
|
1574 | bc51c5c9 | bellard | { "cvtsd2ss", XM, EX, XX },
|
1575 | bc51c5c9 | bellard | }, |
1576 | bc51c5c9 | bellard | /* PREGRP18 */
|
1577 | bc51c5c9 | bellard | { |
1578 | bc51c5c9 | bellard | { "maskmovq", MX, MS, XX },
|
1579 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1580 | bc51c5c9 | bellard | { "maskmovdqu", XM, EX, XX },
|
1581 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1582 | bc51c5c9 | bellard | }, |
1583 | bc51c5c9 | bellard | /* PREGRP19 */
|
1584 | bc51c5c9 | bellard | { |
1585 | bc51c5c9 | bellard | { "movq", MX, EM, XX },
|
1586 | bc51c5c9 | bellard | { "movdqu", XM, EX, XX },
|
1587 | bc51c5c9 | bellard | { "movdqa", XM, EX, XX },
|
1588 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1589 | bc51c5c9 | bellard | }, |
1590 | bc51c5c9 | bellard | /* PREGRP20 */
|
1591 | bc51c5c9 | bellard | { |
1592 | bc51c5c9 | bellard | { "movq", EM, MX, XX },
|
1593 | bc51c5c9 | bellard | { "movdqu", EX, XM, XX },
|
1594 | bc51c5c9 | bellard | { "movdqa", EX, XM, XX },
|
1595 | bc51c5c9 | bellard | { "(bad)", EX, XM, XX },
|
1596 | bc51c5c9 | bellard | }, |
1597 | bc51c5c9 | bellard | /* PREGRP21 */
|
1598 | bc51c5c9 | bellard | { |
1599 | bc51c5c9 | bellard | { "(bad)", EX, XM, XX },
|
1600 | bc51c5c9 | bellard | { "movq2dq", XM, MS, XX },
|
1601 | bc51c5c9 | bellard | { "movq", EX, XM, XX },
|
1602 | bc51c5c9 | bellard | { "movdq2q", MX, XS, XX },
|
1603 | bc51c5c9 | bellard | }, |
1604 | bc51c5c9 | bellard | /* PREGRP22 */
|
1605 | bc51c5c9 | bellard | { |
1606 | bc51c5c9 | bellard | { "pshufw", MX, EM, Ib },
|
1607 | bc51c5c9 | bellard | { "pshufhw", XM, EX, Ib },
|
1608 | bc51c5c9 | bellard | { "pshufd", XM, EX, Ib },
|
1609 | bc51c5c9 | bellard | { "pshuflw", XM, EX, Ib },
|
1610 | bc51c5c9 | bellard | }, |
1611 | bc51c5c9 | bellard | /* PREGRP23 */
|
1612 | bc51c5c9 | bellard | { |
1613 | bc51c5c9 | bellard | { "movd", Ed, MX, XX },
|
1614 | bc51c5c9 | bellard | { "movq", XM, EX, XX },
|
1615 | bc51c5c9 | bellard | { "movd", Ed, XM, XX },
|
1616 | bc51c5c9 | bellard | { "(bad)", Ed, XM, XX },
|
1617 | bc51c5c9 | bellard | }, |
1618 | bc51c5c9 | bellard | /* PREGRP24 */
|
1619 | bc51c5c9 | bellard | { |
1620 | bc51c5c9 | bellard | { "(bad)", MX, EX, XX },
|
1621 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1622 | bc51c5c9 | bellard | { "punpckhqdq", XM, EX, XX },
|
1623 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1624 | bc51c5c9 | bellard | }, |
1625 | bc51c5c9 | bellard | /* PREGRP25 */
|
1626 | bc51c5c9 | bellard | { |
1627 | bc51c5c9 | bellard | { "movntq", Ev, MX, XX },
|
1628 | bc51c5c9 | bellard | { "(bad)", Ev, XM, XX },
|
1629 | bc51c5c9 | bellard | { "movntdq", Ev, XM, XX },
|
1630 | bc51c5c9 | bellard | { "(bad)", Ev, XM, XX },
|
1631 | bc51c5c9 | bellard | }, |
1632 | bc51c5c9 | bellard | /* PREGRP26 */
|
1633 | bc51c5c9 | bellard | { |
1634 | bc51c5c9 | bellard | { "(bad)", MX, EX, XX },
|
1635 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1636 | bc51c5c9 | bellard | { "punpcklqdq", XM, EX, XX },
|
1637 | bc51c5c9 | bellard | { "(bad)", XM, EX, XX },
|
1638 | bc51c5c9 | bellard | }, |
1639 | bc51c5c9 | bellard | }; |
1640 | dc99065b | bellard | |
1641 | bc51c5c9 | bellard | static const struct dis386 x86_64_table[][2] = { |
1642 | bc51c5c9 | bellard | { |
1643 | bc51c5c9 | bellard | { "arpl", Ew, Gw, XX },
|
1644 | bc51c5c9 | bellard | { "movs{||lq|xd}", Gv, Ed, XX },
|
1645 | bc51c5c9 | bellard | }, |
1646 | bc51c5c9 | bellard | }; |
1647 | bc51c5c9 | bellard | |
1648 | bc51c5c9 | bellard | #define INTERNAL_DISASSEMBLER_ERROR _("<internal disassembler error>") |
1649 | dc99065b | bellard | |
1650 | dc99065b | bellard | static void |
1651 | dc99065b | bellard | ckprefix () |
1652 | dc99065b | bellard | { |
1653 | bc51c5c9 | bellard | int newrex;
|
1654 | bc51c5c9 | bellard | rex = 0;
|
1655 | dc99065b | bellard | prefixes = 0;
|
1656 | bc51c5c9 | bellard | used_prefixes = 0;
|
1657 | bc51c5c9 | bellard | rex_used = 0;
|
1658 | dc99065b | bellard | while (1) |
1659 | dc99065b | bellard | { |
1660 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
1661 | bc51c5c9 | bellard | newrex = 0;
|
1662 | dc99065b | bellard | switch (*codep)
|
1663 | dc99065b | bellard | { |
1664 | bc51c5c9 | bellard | /* REX prefixes family. */
|
1665 | bc51c5c9 | bellard | case 0x40: |
1666 | bc51c5c9 | bellard | case 0x41: |
1667 | bc51c5c9 | bellard | case 0x42: |
1668 | bc51c5c9 | bellard | case 0x43: |
1669 | bc51c5c9 | bellard | case 0x44: |
1670 | bc51c5c9 | bellard | case 0x45: |
1671 | bc51c5c9 | bellard | case 0x46: |
1672 | bc51c5c9 | bellard | case 0x47: |
1673 | bc51c5c9 | bellard | case 0x48: |
1674 | bc51c5c9 | bellard | case 0x49: |
1675 | bc51c5c9 | bellard | case 0x4a: |
1676 | bc51c5c9 | bellard | case 0x4b: |
1677 | bc51c5c9 | bellard | case 0x4c: |
1678 | bc51c5c9 | bellard | case 0x4d: |
1679 | bc51c5c9 | bellard | case 0x4e: |
1680 | bc51c5c9 | bellard | case 0x4f: |
1681 | bc51c5c9 | bellard | if (mode_64bit)
|
1682 | bc51c5c9 | bellard | newrex = *codep; |
1683 | bc51c5c9 | bellard | else
|
1684 | bc51c5c9 | bellard | return;
|
1685 | bc51c5c9 | bellard | break;
|
1686 | dc99065b | bellard | case 0xf3: |
1687 | dc99065b | bellard | prefixes |= PREFIX_REPZ; |
1688 | dc99065b | bellard | break;
|
1689 | dc99065b | bellard | case 0xf2: |
1690 | dc99065b | bellard | prefixes |= PREFIX_REPNZ; |
1691 | dc99065b | bellard | break;
|
1692 | dc99065b | bellard | case 0xf0: |
1693 | dc99065b | bellard | prefixes |= PREFIX_LOCK; |
1694 | dc99065b | bellard | break;
|
1695 | dc99065b | bellard | case 0x2e: |
1696 | dc99065b | bellard | prefixes |= PREFIX_CS; |
1697 | dc99065b | bellard | break;
|
1698 | dc99065b | bellard | case 0x36: |
1699 | dc99065b | bellard | prefixes |= PREFIX_SS; |
1700 | dc99065b | bellard | break;
|
1701 | dc99065b | bellard | case 0x3e: |
1702 | dc99065b | bellard | prefixes |= PREFIX_DS; |
1703 | dc99065b | bellard | break;
|
1704 | dc99065b | bellard | case 0x26: |
1705 | dc99065b | bellard | prefixes |= PREFIX_ES; |
1706 | dc99065b | bellard | break;
|
1707 | dc99065b | bellard | case 0x64: |
1708 | dc99065b | bellard | prefixes |= PREFIX_FS; |
1709 | dc99065b | bellard | break;
|
1710 | dc99065b | bellard | case 0x65: |
1711 | dc99065b | bellard | prefixes |= PREFIX_GS; |
1712 | dc99065b | bellard | break;
|
1713 | dc99065b | bellard | case 0x66: |
1714 | dc99065b | bellard | prefixes |= PREFIX_DATA; |
1715 | dc99065b | bellard | break;
|
1716 | dc99065b | bellard | case 0x67: |
1717 | bc51c5c9 | bellard | prefixes |= PREFIX_ADDR; |
1718 | dc99065b | bellard | break;
|
1719 | bc51c5c9 | bellard | case FWAIT_OPCODE:
|
1720 | bc51c5c9 | bellard | /* fwait is really an instruction. If there are prefixes
|
1721 | bc51c5c9 | bellard | before the fwait, they belong to the fwait, *not* to the
|
1722 | bc51c5c9 | bellard | following instruction. */
|
1723 | bc51c5c9 | bellard | if (prefixes)
|
1724 | bc51c5c9 | bellard | { |
1725 | bc51c5c9 | bellard | prefixes |= PREFIX_FWAIT; |
1726 | bc51c5c9 | bellard | codep++; |
1727 | bc51c5c9 | bellard | return;
|
1728 | bc51c5c9 | bellard | } |
1729 | bc51c5c9 | bellard | prefixes = PREFIX_FWAIT; |
1730 | dc99065b | bellard | break;
|
1731 | dc99065b | bellard | default:
|
1732 | dc99065b | bellard | return;
|
1733 | dc99065b | bellard | } |
1734 | bc51c5c9 | bellard | /* Rex is ignored when followed by another prefix. */
|
1735 | bc51c5c9 | bellard | if (rex)
|
1736 | bc51c5c9 | bellard | { |
1737 | bc51c5c9 | bellard | oappend (prefix_name (rex, 0));
|
1738 | bc51c5c9 | bellard | oappend (" ");
|
1739 | bc51c5c9 | bellard | } |
1740 | bc51c5c9 | bellard | rex = newrex; |
1741 | dc99065b | bellard | codep++; |
1742 | dc99065b | bellard | } |
1743 | dc99065b | bellard | } |
1744 | dc99065b | bellard | |
1745 | bc51c5c9 | bellard | /* Return the name of the prefix byte PREF, or NULL if PREF is not a
|
1746 | bc51c5c9 | bellard | prefix byte. */
|
1747 | bc51c5c9 | bellard | |
1748 | bc51c5c9 | bellard | static const char * |
1749 | bc51c5c9 | bellard | prefix_name (pref, sizeflag) |
1750 | bc51c5c9 | bellard | int pref;
|
1751 | bc51c5c9 | bellard | int sizeflag;
|
1752 | bc51c5c9 | bellard | { |
1753 | bc51c5c9 | bellard | switch (pref)
|
1754 | bc51c5c9 | bellard | { |
1755 | bc51c5c9 | bellard | /* REX prefixes family. */
|
1756 | bc51c5c9 | bellard | case 0x40: |
1757 | bc51c5c9 | bellard | return "rex"; |
1758 | bc51c5c9 | bellard | case 0x41: |
1759 | bc51c5c9 | bellard | return "rexZ"; |
1760 | bc51c5c9 | bellard | case 0x42: |
1761 | bc51c5c9 | bellard | return "rexY"; |
1762 | bc51c5c9 | bellard | case 0x43: |
1763 | bc51c5c9 | bellard | return "rexYZ"; |
1764 | bc51c5c9 | bellard | case 0x44: |
1765 | bc51c5c9 | bellard | return "rexX"; |
1766 | bc51c5c9 | bellard | case 0x45: |
1767 | bc51c5c9 | bellard | return "rexXZ"; |
1768 | bc51c5c9 | bellard | case 0x46: |
1769 | bc51c5c9 | bellard | return "rexXY"; |
1770 | bc51c5c9 | bellard | case 0x47: |
1771 | bc51c5c9 | bellard | return "rexXYZ"; |
1772 | bc51c5c9 | bellard | case 0x48: |
1773 | bc51c5c9 | bellard | return "rex64"; |
1774 | bc51c5c9 | bellard | case 0x49: |
1775 | bc51c5c9 | bellard | return "rex64Z"; |
1776 | bc51c5c9 | bellard | case 0x4a: |
1777 | bc51c5c9 | bellard | return "rex64Y"; |
1778 | bc51c5c9 | bellard | case 0x4b: |
1779 | bc51c5c9 | bellard | return "rex64YZ"; |
1780 | bc51c5c9 | bellard | case 0x4c: |
1781 | bc51c5c9 | bellard | return "rex64X"; |
1782 | bc51c5c9 | bellard | case 0x4d: |
1783 | bc51c5c9 | bellard | return "rex64XZ"; |
1784 | bc51c5c9 | bellard | case 0x4e: |
1785 | bc51c5c9 | bellard | return "rex64XY"; |
1786 | bc51c5c9 | bellard | case 0x4f: |
1787 | bc51c5c9 | bellard | return "rex64XYZ"; |
1788 | bc51c5c9 | bellard | case 0xf3: |
1789 | bc51c5c9 | bellard | return "repz"; |
1790 | bc51c5c9 | bellard | case 0xf2: |
1791 | bc51c5c9 | bellard | return "repnz"; |
1792 | bc51c5c9 | bellard | case 0xf0: |
1793 | bc51c5c9 | bellard | return "lock"; |
1794 | bc51c5c9 | bellard | case 0x2e: |
1795 | bc51c5c9 | bellard | return "cs"; |
1796 | bc51c5c9 | bellard | case 0x36: |
1797 | bc51c5c9 | bellard | return "ss"; |
1798 | bc51c5c9 | bellard | case 0x3e: |
1799 | bc51c5c9 | bellard | return "ds"; |
1800 | bc51c5c9 | bellard | case 0x26: |
1801 | bc51c5c9 | bellard | return "es"; |
1802 | bc51c5c9 | bellard | case 0x64: |
1803 | bc51c5c9 | bellard | return "fs"; |
1804 | bc51c5c9 | bellard | case 0x65: |
1805 | bc51c5c9 | bellard | return "gs"; |
1806 | bc51c5c9 | bellard | case 0x66: |
1807 | bc51c5c9 | bellard | return (sizeflag & DFLAG) ? "data16" : "data32"; |
1808 | bc51c5c9 | bellard | case 0x67: |
1809 | bc51c5c9 | bellard | if (mode_64bit)
|
1810 | bc51c5c9 | bellard | return (sizeflag & AFLAG) ? "addr32" : "addr64"; |
1811 | bc51c5c9 | bellard | else
|
1812 | bc51c5c9 | bellard | return ((sizeflag & AFLAG) && !mode_64bit) ? "addr16" : "addr32"; |
1813 | bc51c5c9 | bellard | case FWAIT_OPCODE:
|
1814 | bc51c5c9 | bellard | return "fwait"; |
1815 | bc51c5c9 | bellard | default:
|
1816 | bc51c5c9 | bellard | return NULL; |
1817 | bc51c5c9 | bellard | } |
1818 | bc51c5c9 | bellard | } |
1819 | dc99065b | bellard | |
1820 | bc51c5c9 | bellard | static char op1out[100], op2out[100], op3out[100]; |
1821 | bc51c5c9 | bellard | static int op_ad, op_index[3]; |
1822 | bc51c5c9 | bellard | static bfd_vma op_address[3]; |
1823 | bc51c5c9 | bellard | static bfd_vma op_riprel[3]; |
1824 | bc51c5c9 | bellard | static bfd_vma start_pc;
|
1825 | dc99065b | bellard | |
1826 | dc99065b | bellard | /*
|
1827 | dc99065b | bellard | * On the 386's of 1988, the maximum length of an instruction is 15 bytes.
|
1828 | dc99065b | bellard | * (see topic "Redundant prefixes" in the "Differences from 8086"
|
1829 | dc99065b | bellard | * section of the "Virtual 8086 Mode" chapter.)
|
1830 | dc99065b | bellard | * 'pc' should be the address of this instruction, it will
|
1831 | dc99065b | bellard | * be used to print the target address if this is a relative jump or call
|
1832 | dc99065b | bellard | * The function returns the length of this instruction in bytes.
|
1833 | dc99065b | bellard | */
|
1834 | dc99065b | bellard | |
1835 | b8b5ac63 | bellard | static int8_t intel_syntax;
|
1836 | bc51c5c9 | bellard | static char open_char; |
1837 | bc51c5c9 | bellard | static char close_char; |
1838 | bc51c5c9 | bellard | static char separator_char; |
1839 | bc51c5c9 | bellard | static char scale_char; |
1840 | bc51c5c9 | bellard | |
1841 | dc99065b | bellard | int
|
1842 | bc51c5c9 | bellard | print_insn_i386 (pc, info) |
1843 | bc51c5c9 | bellard | bfd_vma pc; |
1844 | bc51c5c9 | bellard | disassemble_info *info; |
1845 | bc51c5c9 | bellard | { |
1846 | bc51c5c9 | bellard | intel_syntax = -1;
|
1847 | bc51c5c9 | bellard | |
1848 | bc51c5c9 | bellard | return print_insn (pc, info);
|
1849 | bc51c5c9 | bellard | } |
1850 | bc51c5c9 | bellard | |
1851 | bc51c5c9 | bellard | static int |
1852 | bc51c5c9 | bellard | print_insn (pc, info) |
1853 | dc99065b | bellard | bfd_vma pc; |
1854 | dc99065b | bellard | disassemble_info *info; |
1855 | dc99065b | bellard | { |
1856 | bc51c5c9 | bellard | const struct dis386 *dp; |
1857 | dc99065b | bellard | int i;
|
1858 | bc51c5c9 | bellard | int two_source_ops;
|
1859 | dc99065b | bellard | char *first, *second, *third;
|
1860 | dc99065b | bellard | int needcomma;
|
1861 | bc51c5c9 | bellard | unsigned char uses_SSE_prefix; |
1862 | bc51c5c9 | bellard | int sizeflag;
|
1863 | bc51c5c9 | bellard | const char *p; |
1864 | dc99065b | bellard | struct dis_private priv;
|
1865 | dc99065b | bellard | |
1866 | bc51c5c9 | bellard | mode_64bit = (info->mach == bfd_mach_x86_64_intel_syntax |
1867 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64); |
1868 | bc51c5c9 | bellard | |
1869 | bc51c5c9 | bellard | if (intel_syntax == -1) |
1870 | bc51c5c9 | bellard | intel_syntax = (info->mach == bfd_mach_i386_i386_intel_syntax |
1871 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64_intel_syntax); |
1872 | bc51c5c9 | bellard | |
1873 | bc51c5c9 | bellard | if (info->mach == bfd_mach_i386_i386
|
1874 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64 |
1875 | bc51c5c9 | bellard | || info->mach == bfd_mach_i386_i386_intel_syntax |
1876 | bc51c5c9 | bellard | || info->mach == bfd_mach_x86_64_intel_syntax) |
1877 | bc51c5c9 | bellard | priv.orig_sizeflag = AFLAG | DFLAG; |
1878 | bc51c5c9 | bellard | else if (info->mach == bfd_mach_i386_i8086) |
1879 | bc51c5c9 | bellard | priv.orig_sizeflag = 0;
|
1880 | bc51c5c9 | bellard | else
|
1881 | bc51c5c9 | bellard | abort (); |
1882 | bc51c5c9 | bellard | |
1883 | bc51c5c9 | bellard | for (p = info->disassembler_options; p != NULL; ) |
1884 | bc51c5c9 | bellard | { |
1885 | bc51c5c9 | bellard | if (strncmp (p, "x86-64", 6) == 0) |
1886 | bc51c5c9 | bellard | { |
1887 | bc51c5c9 | bellard | mode_64bit = 1;
|
1888 | bc51c5c9 | bellard | priv.orig_sizeflag = AFLAG | DFLAG; |
1889 | bc51c5c9 | bellard | } |
1890 | bc51c5c9 | bellard | else if (strncmp (p, "i386", 4) == 0) |
1891 | bc51c5c9 | bellard | { |
1892 | bc51c5c9 | bellard | mode_64bit = 0;
|
1893 | bc51c5c9 | bellard | priv.orig_sizeflag = AFLAG | DFLAG; |
1894 | bc51c5c9 | bellard | } |
1895 | bc51c5c9 | bellard | else if (strncmp (p, "i8086", 5) == 0) |
1896 | bc51c5c9 | bellard | { |
1897 | bc51c5c9 | bellard | mode_64bit = 0;
|
1898 | bc51c5c9 | bellard | priv.orig_sizeflag = 0;
|
1899 | bc51c5c9 | bellard | } |
1900 | bc51c5c9 | bellard | else if (strncmp (p, "intel", 5) == 0) |
1901 | bc51c5c9 | bellard | { |
1902 | bc51c5c9 | bellard | intel_syntax = 1;
|
1903 | bc51c5c9 | bellard | } |
1904 | bc51c5c9 | bellard | else if (strncmp (p, "att", 3) == 0) |
1905 | bc51c5c9 | bellard | { |
1906 | bc51c5c9 | bellard | intel_syntax = 0;
|
1907 | bc51c5c9 | bellard | } |
1908 | bc51c5c9 | bellard | else if (strncmp (p, "addr", 4) == 0) |
1909 | bc51c5c9 | bellard | { |
1910 | bc51c5c9 | bellard | if (p[4] == '1' && p[5] == '6') |
1911 | bc51c5c9 | bellard | priv.orig_sizeflag &= ~AFLAG; |
1912 | bc51c5c9 | bellard | else if (p[4] == '3' && p[5] == '2') |
1913 | bc51c5c9 | bellard | priv.orig_sizeflag |= AFLAG; |
1914 | bc51c5c9 | bellard | } |
1915 | bc51c5c9 | bellard | else if (strncmp (p, "data", 4) == 0) |
1916 | bc51c5c9 | bellard | { |
1917 | bc51c5c9 | bellard | if (p[4] == '1' && p[5] == '6') |
1918 | bc51c5c9 | bellard | priv.orig_sizeflag &= ~DFLAG; |
1919 | bc51c5c9 | bellard | else if (p[4] == '3' && p[5] == '2') |
1920 | bc51c5c9 | bellard | priv.orig_sizeflag |= DFLAG; |
1921 | bc51c5c9 | bellard | } |
1922 | bc51c5c9 | bellard | else if (strncmp (p, "suffix", 6) == 0) |
1923 | bc51c5c9 | bellard | priv.orig_sizeflag |= SUFFIX_ALWAYS; |
1924 | bc51c5c9 | bellard | |
1925 | bc51c5c9 | bellard | p = strchr (p, ',');
|
1926 | bc51c5c9 | bellard | if (p != NULL) |
1927 | bc51c5c9 | bellard | p++; |
1928 | bc51c5c9 | bellard | } |
1929 | bc51c5c9 | bellard | |
1930 | bc51c5c9 | bellard | if (intel_syntax)
|
1931 | bc51c5c9 | bellard | { |
1932 | bc51c5c9 | bellard | names64 = intel_names64; |
1933 | bc51c5c9 | bellard | names32 = intel_names32; |
1934 | bc51c5c9 | bellard | names16 = intel_names16; |
1935 | bc51c5c9 | bellard | names8 = intel_names8; |
1936 | bc51c5c9 | bellard | names8rex = intel_names8rex; |
1937 | bc51c5c9 | bellard | names_seg = intel_names_seg; |
1938 | bc51c5c9 | bellard | index16 = intel_index16; |
1939 | bc51c5c9 | bellard | open_char = '[';
|
1940 | bc51c5c9 | bellard | close_char = ']';
|
1941 | bc51c5c9 | bellard | separator_char = '+';
|
1942 | bc51c5c9 | bellard | scale_char = '*';
|
1943 | bc51c5c9 | bellard | } |
1944 | bc51c5c9 | bellard | else
|
1945 | bc51c5c9 | bellard | { |
1946 | bc51c5c9 | bellard | names64 = att_names64; |
1947 | bc51c5c9 | bellard | names32 = att_names32; |
1948 | bc51c5c9 | bellard | names16 = att_names16; |
1949 | bc51c5c9 | bellard | names8 = att_names8; |
1950 | bc51c5c9 | bellard | names8rex = att_names8rex; |
1951 | bc51c5c9 | bellard | names_seg = att_names_seg; |
1952 | bc51c5c9 | bellard | index16 = att_index16; |
1953 | bc51c5c9 | bellard | open_char = '(';
|
1954 | bc51c5c9 | bellard | close_char = ')';
|
1955 | bc51c5c9 | bellard | separator_char = ',';
|
1956 | bc51c5c9 | bellard | scale_char = ',';
|
1957 | bc51c5c9 | bellard | } |
1958 | bc51c5c9 | bellard | |
1959 | bc51c5c9 | bellard | /* The output looks better if we put 7 bytes on a line, since that
|
1960 | bc51c5c9 | bellard | puts most long word instructions on a single line. */
|
1961 | bc51c5c9 | bellard | info->bytes_per_line = 7;
|
1962 | dc99065b | bellard | |
1963 | dc99065b | bellard | info->private_data = (PTR) &priv; |
1964 | dc99065b | bellard | priv.max_fetched = priv.the_buffer; |
1965 | dc99065b | bellard | priv.insn_start = pc; |
1966 | dc99065b | bellard | |
1967 | dc99065b | bellard | obuf[0] = 0; |
1968 | dc99065b | bellard | op1out[0] = 0; |
1969 | dc99065b | bellard | op2out[0] = 0; |
1970 | dc99065b | bellard | op3out[0] = 0; |
1971 | dc99065b | bellard | |
1972 | dc99065b | bellard | op_index[0] = op_index[1] = op_index[2] = -1; |
1973 | dc99065b | bellard | |
1974 | dc99065b | bellard | the_info = info; |
1975 | dc99065b | bellard | start_pc = pc; |
1976 | bc51c5c9 | bellard | start_codep = priv.the_buffer; |
1977 | bc51c5c9 | bellard | codep = priv.the_buffer; |
1978 | bc51c5c9 | bellard | |
1979 | bc51c5c9 | bellard | if (setjmp (priv.bailout) != 0) |
1980 | bc51c5c9 | bellard | { |
1981 | bc51c5c9 | bellard | const char *name; |
1982 | bc51c5c9 | bellard | |
1983 | bc51c5c9 | bellard | /* Getting here means we tried for data but didn't get it. That
|
1984 | bc51c5c9 | bellard | means we have an incomplete instruction of some sort. Just
|
1985 | bc51c5c9 | bellard | print the first byte as a prefix or a .byte pseudo-op. */
|
1986 | bc51c5c9 | bellard | if (codep > priv.the_buffer)
|
1987 | bc51c5c9 | bellard | { |
1988 | bc51c5c9 | bellard | name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
|
1989 | bc51c5c9 | bellard | if (name != NULL) |
1990 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s", name);
|
1991 | bc51c5c9 | bellard | else
|
1992 | bc51c5c9 | bellard | { |
1993 | bc51c5c9 | bellard | /* Just print the first byte as a .byte instruction. */
|
1994 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, ".byte 0x%x",
|
1995 | bc51c5c9 | bellard | (unsigned int) priv.the_buffer[0]); |
1996 | bc51c5c9 | bellard | } |
1997 | bc51c5c9 | bellard | |
1998 | bc51c5c9 | bellard | return 1; |
1999 | bc51c5c9 | bellard | } |
2000 | bc51c5c9 | bellard | |
2001 | bc51c5c9 | bellard | return -1; |
2002 | bc51c5c9 | bellard | } |
2003 | bc51c5c9 | bellard | |
2004 | bc51c5c9 | bellard | obufp = obuf; |
2005 | dc99065b | bellard | ckprefix (); |
2006 | dc99065b | bellard | |
2007 | bc51c5c9 | bellard | insn_codep = codep; |
2008 | bc51c5c9 | bellard | sizeflag = priv.orig_sizeflag; |
2009 | bc51c5c9 | bellard | |
2010 | dc99065b | bellard | FETCH_DATA (info, codep + 1);
|
2011 | bc51c5c9 | bellard | two_source_ops = (*codep == 0x62) || (*codep == 0xc8); |
2012 | bc51c5c9 | bellard | |
2013 | dc99065b | bellard | if ((prefixes & PREFIX_FWAIT)
|
2014 | dc99065b | bellard | && ((*codep < 0xd8) || (*codep > 0xdf))) |
2015 | dc99065b | bellard | { |
2016 | bc51c5c9 | bellard | const char *name; |
2017 | bc51c5c9 | bellard | |
2018 | bc51c5c9 | bellard | /* fwait not followed by floating point instruction. Print the
|
2019 | bc51c5c9 | bellard | first prefix, which is probably fwait itself. */
|
2020 | bc51c5c9 | bellard | name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
|
2021 | bc51c5c9 | bellard | if (name == NULL) |
2022 | bc51c5c9 | bellard | name = INTERNAL_DISASSEMBLER_ERROR; |
2023 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s", name);
|
2024 | bc51c5c9 | bellard | return 1; |
2025 | dc99065b | bellard | } |
2026 | bc51c5c9 | bellard | |
2027 | dc99065b | bellard | if (*codep == 0x0f) |
2028 | dc99065b | bellard | { |
2029 | dc99065b | bellard | FETCH_DATA (info, codep + 2);
|
2030 | dc99065b | bellard | dp = &dis386_twobyte[*++codep]; |
2031 | dc99065b | bellard | need_modrm = twobyte_has_modrm[*codep]; |
2032 | bc51c5c9 | bellard | uses_SSE_prefix = twobyte_uses_SSE_prefix[*codep]; |
2033 | dc99065b | bellard | } |
2034 | dc99065b | bellard | else
|
2035 | dc99065b | bellard | { |
2036 | dc99065b | bellard | dp = &dis386[*codep]; |
2037 | dc99065b | bellard | need_modrm = onebyte_has_modrm[*codep]; |
2038 | bc51c5c9 | bellard | uses_SSE_prefix = 0;
|
2039 | dc99065b | bellard | } |
2040 | dc99065b | bellard | codep++; |
2041 | dc99065b | bellard | |
2042 | bc51c5c9 | bellard | if (!uses_SSE_prefix && (prefixes & PREFIX_REPZ))
|
2043 | bc51c5c9 | bellard | { |
2044 | bc51c5c9 | bellard | oappend ("repz ");
|
2045 | bc51c5c9 | bellard | used_prefixes |= PREFIX_REPZ; |
2046 | bc51c5c9 | bellard | } |
2047 | bc51c5c9 | bellard | if (!uses_SSE_prefix && (prefixes & PREFIX_REPNZ))
|
2048 | bc51c5c9 | bellard | { |
2049 | bc51c5c9 | bellard | oappend ("repnz ");
|
2050 | bc51c5c9 | bellard | used_prefixes |= PREFIX_REPNZ; |
2051 | bc51c5c9 | bellard | } |
2052 | bc51c5c9 | bellard | if (prefixes & PREFIX_LOCK)
|
2053 | bc51c5c9 | bellard | { |
2054 | bc51c5c9 | bellard | oappend ("lock ");
|
2055 | bc51c5c9 | bellard | used_prefixes |= PREFIX_LOCK; |
2056 | bc51c5c9 | bellard | } |
2057 | bc51c5c9 | bellard | |
2058 | bc51c5c9 | bellard | if (prefixes & PREFIX_ADDR)
|
2059 | bc51c5c9 | bellard | { |
2060 | bc51c5c9 | bellard | sizeflag ^= AFLAG; |
2061 | bc51c5c9 | bellard | if (dp->bytemode3 != loop_jcxz_mode || intel_syntax)
|
2062 | bc51c5c9 | bellard | { |
2063 | bc51c5c9 | bellard | if ((sizeflag & AFLAG) || mode_64bit)
|
2064 | bc51c5c9 | bellard | oappend ("addr32 ");
|
2065 | bc51c5c9 | bellard | else
|
2066 | bc51c5c9 | bellard | oappend ("addr16 ");
|
2067 | bc51c5c9 | bellard | used_prefixes |= PREFIX_ADDR; |
2068 | bc51c5c9 | bellard | } |
2069 | bc51c5c9 | bellard | } |
2070 | bc51c5c9 | bellard | |
2071 | bc51c5c9 | bellard | if (!uses_SSE_prefix && (prefixes & PREFIX_DATA))
|
2072 | bc51c5c9 | bellard | { |
2073 | bc51c5c9 | bellard | sizeflag ^= DFLAG; |
2074 | bc51c5c9 | bellard | if (dp->bytemode3 == cond_jump_mode
|
2075 | bc51c5c9 | bellard | && dp->bytemode1 == v_mode |
2076 | bc51c5c9 | bellard | && !intel_syntax) |
2077 | bc51c5c9 | bellard | { |
2078 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
2079 | bc51c5c9 | bellard | oappend ("data32 ");
|
2080 | bc51c5c9 | bellard | else
|
2081 | bc51c5c9 | bellard | oappend ("data16 ");
|
2082 | bc51c5c9 | bellard | used_prefixes |= PREFIX_DATA; |
2083 | bc51c5c9 | bellard | } |
2084 | bc51c5c9 | bellard | } |
2085 | bc51c5c9 | bellard | |
2086 | dc99065b | bellard | if (need_modrm)
|
2087 | dc99065b | bellard | { |
2088 | dc99065b | bellard | FETCH_DATA (info, codep + 1);
|
2089 | dc99065b | bellard | mod = (*codep >> 6) & 3; |
2090 | dc99065b | bellard | reg = (*codep >> 3) & 7; |
2091 | dc99065b | bellard | rm = *codep & 7;
|
2092 | dc99065b | bellard | } |
2093 | dc99065b | bellard | |
2094 | dc99065b | bellard | if (dp->name == NULL && dp->bytemode1 == FLOATCODE) |
2095 | dc99065b | bellard | { |
2096 | bc51c5c9 | bellard | dofloat (sizeflag); |
2097 | dc99065b | bellard | } |
2098 | dc99065b | bellard | else
|
2099 | dc99065b | bellard | { |
2100 | bc51c5c9 | bellard | int index;
|
2101 | dc99065b | bellard | if (dp->name == NULL) |
2102 | bc51c5c9 | bellard | { |
2103 | bc51c5c9 | bellard | switch (dp->bytemode1)
|
2104 | bc51c5c9 | bellard | { |
2105 | bc51c5c9 | bellard | case USE_GROUPS:
|
2106 | bc51c5c9 | bellard | dp = &grps[dp->bytemode2][reg]; |
2107 | bc51c5c9 | bellard | break;
|
2108 | bc51c5c9 | bellard | |
2109 | bc51c5c9 | bellard | case USE_PREFIX_USER_TABLE:
|
2110 | bc51c5c9 | bellard | index = 0;
|
2111 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPZ); |
2112 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPZ)
|
2113 | bc51c5c9 | bellard | index = 1;
|
2114 | bc51c5c9 | bellard | else
|
2115 | bc51c5c9 | bellard | { |
2116 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2117 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
2118 | bc51c5c9 | bellard | index = 2;
|
2119 | bc51c5c9 | bellard | else
|
2120 | bc51c5c9 | bellard | { |
2121 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPNZ); |
2122 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPNZ)
|
2123 | bc51c5c9 | bellard | index = 3;
|
2124 | bc51c5c9 | bellard | } |
2125 | bc51c5c9 | bellard | } |
2126 | bc51c5c9 | bellard | dp = &prefix_user_table[dp->bytemode2][index]; |
2127 | bc51c5c9 | bellard | break;
|
2128 | bc51c5c9 | bellard | |
2129 | bc51c5c9 | bellard | case X86_64_SPECIAL:
|
2130 | bc51c5c9 | bellard | dp = &x86_64_table[dp->bytemode2][mode_64bit]; |
2131 | bc51c5c9 | bellard | break;
|
2132 | bc51c5c9 | bellard | |
2133 | bc51c5c9 | bellard | default:
|
2134 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
2135 | bc51c5c9 | bellard | break;
|
2136 | bc51c5c9 | bellard | } |
2137 | bc51c5c9 | bellard | } |
2138 | bc51c5c9 | bellard | |
2139 | bc51c5c9 | bellard | if (putop (dp->name, sizeflag) == 0) |
2140 | bc51c5c9 | bellard | { |
2141 | bc51c5c9 | bellard | obufp = op1out; |
2142 | bc51c5c9 | bellard | op_ad = 2;
|
2143 | bc51c5c9 | bellard | if (dp->op1)
|
2144 | bc51c5c9 | bellard | (*dp->op1) (dp->bytemode1, sizeflag); |
2145 | bc51c5c9 | bellard | |
2146 | bc51c5c9 | bellard | obufp = op2out; |
2147 | bc51c5c9 | bellard | op_ad = 1;
|
2148 | bc51c5c9 | bellard | if (dp->op2)
|
2149 | bc51c5c9 | bellard | (*dp->op2) (dp->bytemode2, sizeflag); |
2150 | bc51c5c9 | bellard | |
2151 | bc51c5c9 | bellard | obufp = op3out; |
2152 | bc51c5c9 | bellard | op_ad = 0;
|
2153 | bc51c5c9 | bellard | if (dp->op3)
|
2154 | bc51c5c9 | bellard | (*dp->op3) (dp->bytemode3, sizeflag); |
2155 | bc51c5c9 | bellard | } |
2156 | bc51c5c9 | bellard | } |
2157 | bc51c5c9 | bellard | |
2158 | bc51c5c9 | bellard | /* See if any prefixes were not used. If so, print the first one
|
2159 | bc51c5c9 | bellard | separately. If we don't do this, we'll wind up printing an
|
2160 | bc51c5c9 | bellard | instruction stream which does not precisely correspond to the
|
2161 | bc51c5c9 | bellard | bytes we are disassembling. */
|
2162 | bc51c5c9 | bellard | if ((prefixes & ~used_prefixes) != 0) |
2163 | bc51c5c9 | bellard | { |
2164 | bc51c5c9 | bellard | const char *name; |
2165 | bc51c5c9 | bellard | |
2166 | bc51c5c9 | bellard | name = prefix_name (priv.the_buffer[0], priv.orig_sizeflag);
|
2167 | bc51c5c9 | bellard | if (name == NULL) |
2168 | bc51c5c9 | bellard | name = INTERNAL_DISASSEMBLER_ERROR; |
2169 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s", name);
|
2170 | bc51c5c9 | bellard | return 1; |
2171 | bc51c5c9 | bellard | } |
2172 | bc51c5c9 | bellard | if (rex & ~rex_used)
|
2173 | bc51c5c9 | bellard | { |
2174 | bc51c5c9 | bellard | const char *name; |
2175 | bc51c5c9 | bellard | name = prefix_name (rex | 0x40, priv.orig_sizeflag);
|
2176 | bc51c5c9 | bellard | if (name == NULL) |
2177 | bc51c5c9 | bellard | name = INTERNAL_DISASSEMBLER_ERROR; |
2178 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, "%s ", name);
|
2179 | dc99065b | bellard | } |
2180 | bc51c5c9 | bellard | |
2181 | dc99065b | bellard | obufp = obuf + strlen (obuf); |
2182 | dc99065b | bellard | for (i = strlen (obuf); i < 6; i++) |
2183 | dc99065b | bellard | oappend (" ");
|
2184 | dc99065b | bellard | oappend (" ");
|
2185 | dc99065b | bellard | (*info->fprintf_func) (info->stream, "%s", obuf);
|
2186 | bc51c5c9 | bellard | |
2187 | bc51c5c9 | bellard | /* The enter and bound instructions are printed with operands in the same
|
2188 | bc51c5c9 | bellard | order as the intel book; everything else is printed in reverse order. */
|
2189 | bc51c5c9 | bellard | if (intel_syntax || two_source_ops)
|
2190 | dc99065b | bellard | { |
2191 | dc99065b | bellard | first = op1out; |
2192 | dc99065b | bellard | second = op2out; |
2193 | dc99065b | bellard | third = op3out; |
2194 | dc99065b | bellard | op_ad = op_index[0];
|
2195 | dc99065b | bellard | op_index[0] = op_index[2]; |
2196 | dc99065b | bellard | op_index[2] = op_ad;
|
2197 | dc99065b | bellard | } |
2198 | dc99065b | bellard | else
|
2199 | dc99065b | bellard | { |
2200 | dc99065b | bellard | first = op3out; |
2201 | dc99065b | bellard | second = op2out; |
2202 | dc99065b | bellard | third = op1out; |
2203 | dc99065b | bellard | } |
2204 | dc99065b | bellard | needcomma = 0;
|
2205 | dc99065b | bellard | if (*first)
|
2206 | dc99065b | bellard | { |
2207 | bc51c5c9 | bellard | if (op_index[0] != -1 && !op_riprel[0]) |
2208 | bc51c5c9 | bellard | (*info->print_address_func) ((bfd_vma) op_address[op_index[0]], info);
|
2209 | dc99065b | bellard | else
|
2210 | dc99065b | bellard | (*info->fprintf_func) (info->stream, "%s", first);
|
2211 | dc99065b | bellard | needcomma = 1;
|
2212 | dc99065b | bellard | } |
2213 | dc99065b | bellard | if (*second)
|
2214 | dc99065b | bellard | { |
2215 | dc99065b | bellard | if (needcomma)
|
2216 | dc99065b | bellard | (*info->fprintf_func) (info->stream, ",");
|
2217 | bc51c5c9 | bellard | if (op_index[1] != -1 && !op_riprel[1]) |
2218 | bc51c5c9 | bellard | (*info->print_address_func) ((bfd_vma) op_address[op_index[1]], info);
|
2219 | dc99065b | bellard | else
|
2220 | dc99065b | bellard | (*info->fprintf_func) (info->stream, "%s", second);
|
2221 | dc99065b | bellard | needcomma = 1;
|
2222 | dc99065b | bellard | } |
2223 | dc99065b | bellard | if (*third)
|
2224 | dc99065b | bellard | { |
2225 | dc99065b | bellard | if (needcomma)
|
2226 | dc99065b | bellard | (*info->fprintf_func) (info->stream, ",");
|
2227 | bc51c5c9 | bellard | if (op_index[2] != -1 && !op_riprel[2]) |
2228 | bc51c5c9 | bellard | (*info->print_address_func) ((bfd_vma) op_address[op_index[2]], info);
|
2229 | dc99065b | bellard | else
|
2230 | dc99065b | bellard | (*info->fprintf_func) (info->stream, "%s", third);
|
2231 | dc99065b | bellard | } |
2232 | bc51c5c9 | bellard | for (i = 0; i < 3; i++) |
2233 | bc51c5c9 | bellard | if (op_index[i] != -1 && op_riprel[i]) |
2234 | bc51c5c9 | bellard | { |
2235 | bc51c5c9 | bellard | (*info->fprintf_func) (info->stream, " # ");
|
2236 | bc51c5c9 | bellard | (*info->print_address_func) ((bfd_vma) (start_pc + codep - start_codep |
2237 | bc51c5c9 | bellard | + op_address[op_index[i]]), info); |
2238 | bc51c5c9 | bellard | } |
2239 | bc51c5c9 | bellard | return codep - priv.the_buffer;
|
2240 | dc99065b | bellard | } |
2241 | dc99065b | bellard | |
2242 | bc51c5c9 | bellard | static const char *float_mem[] = { |
2243 | dc99065b | bellard | /* d8 */
|
2244 | bc51c5c9 | bellard | "fadd{s||s|}",
|
2245 | bc51c5c9 | bellard | "fmul{s||s|}",
|
2246 | bc51c5c9 | bellard | "fcom{s||s|}",
|
2247 | bc51c5c9 | bellard | "fcomp{s||s|}",
|
2248 | bc51c5c9 | bellard | "fsub{s||s|}",
|
2249 | bc51c5c9 | bellard | "fsubr{s||s|}",
|
2250 | bc51c5c9 | bellard | "fdiv{s||s|}",
|
2251 | bc51c5c9 | bellard | "fdivr{s||s|}",
|
2252 | dc99065b | bellard | /* d9 */
|
2253 | bc51c5c9 | bellard | "fld{s||s|}",
|
2254 | dc99065b | bellard | "(bad)",
|
2255 | bc51c5c9 | bellard | "fst{s||s|}",
|
2256 | bc51c5c9 | bellard | "fstp{s||s|}",
|
2257 | dc99065b | bellard | "fldenv",
|
2258 | dc99065b | bellard | "fldcw",
|
2259 | dc99065b | bellard | "fNstenv",
|
2260 | dc99065b | bellard | "fNstcw",
|
2261 | dc99065b | bellard | /* da */
|
2262 | bc51c5c9 | bellard | "fiadd{l||l|}",
|
2263 | bc51c5c9 | bellard | "fimul{l||l|}",
|
2264 | bc51c5c9 | bellard | "ficom{l||l|}",
|
2265 | bc51c5c9 | bellard | "ficomp{l||l|}",
|
2266 | bc51c5c9 | bellard | "fisub{l||l|}",
|
2267 | bc51c5c9 | bellard | "fisubr{l||l|}",
|
2268 | bc51c5c9 | bellard | "fidiv{l||l|}",
|
2269 | bc51c5c9 | bellard | "fidivr{l||l|}",
|
2270 | dc99065b | bellard | /* db */
|
2271 | bc51c5c9 | bellard | "fild{l||l|}",
|
2272 | dc99065b | bellard | "(bad)",
|
2273 | bc51c5c9 | bellard | "fist{l||l|}",
|
2274 | bc51c5c9 | bellard | "fistp{l||l|}",
|
2275 | dc99065b | bellard | "(bad)",
|
2276 | bc51c5c9 | bellard | "fld{t||t|}",
|
2277 | dc99065b | bellard | "(bad)",
|
2278 | bc51c5c9 | bellard | "fstp{t||t|}",
|
2279 | dc99065b | bellard | /* dc */
|
2280 | bc51c5c9 | bellard | "fadd{l||l|}",
|
2281 | bc51c5c9 | bellard | "fmul{l||l|}",
|
2282 | bc51c5c9 | bellard | "fcom{l||l|}",
|
2283 | bc51c5c9 | bellard | "fcomp{l||l|}",
|
2284 | bc51c5c9 | bellard | "fsub{l||l|}",
|
2285 | bc51c5c9 | bellard | "fsubr{l||l|}",
|
2286 | bc51c5c9 | bellard | "fdiv{l||l|}",
|
2287 | bc51c5c9 | bellard | "fdivr{l||l|}",
|
2288 | dc99065b | bellard | /* dd */
|
2289 | bc51c5c9 | bellard | "fld{l||l|}",
|
2290 | dc99065b | bellard | "(bad)",
|
2291 | bc51c5c9 | bellard | "fst{l||l|}",
|
2292 | bc51c5c9 | bellard | "fstp{l||l|}",
|
2293 | dc99065b | bellard | "frstor",
|
2294 | dc99065b | bellard | "(bad)",
|
2295 | dc99065b | bellard | "fNsave",
|
2296 | dc99065b | bellard | "fNstsw",
|
2297 | dc99065b | bellard | /* de */
|
2298 | dc99065b | bellard | "fiadd",
|
2299 | dc99065b | bellard | "fimul",
|
2300 | dc99065b | bellard | "ficom",
|
2301 | dc99065b | bellard | "ficomp",
|
2302 | dc99065b | bellard | "fisub",
|
2303 | dc99065b | bellard | "fisubr",
|
2304 | dc99065b | bellard | "fidiv",
|
2305 | dc99065b | bellard | "fidivr",
|
2306 | dc99065b | bellard | /* df */
|
2307 | dc99065b | bellard | "fild",
|
2308 | dc99065b | bellard | "(bad)",
|
2309 | dc99065b | bellard | "fist",
|
2310 | dc99065b | bellard | "fistp",
|
2311 | dc99065b | bellard | "fbld",
|
2312 | bc51c5c9 | bellard | "fild{ll||ll|}",
|
2313 | dc99065b | bellard | "fbstp",
|
2314 | dc99065b | bellard | "fistpll",
|
2315 | dc99065b | bellard | }; |
2316 | dc99065b | bellard | |
2317 | dc99065b | bellard | #define ST OP_ST, 0 |
2318 | dc99065b | bellard | #define STi OP_STi, 0 |
2319 | dc99065b | bellard | |
2320 | bc51c5c9 | bellard | #define FGRPd9_2 NULL, NULL, 0, NULL, 0, NULL, 0 |
2321 | bc51c5c9 | bellard | #define FGRPd9_4 NULL, NULL, 1, NULL, 0, NULL, 0 |
2322 | bc51c5c9 | bellard | #define FGRPd9_5 NULL, NULL, 2, NULL, 0, NULL, 0 |
2323 | bc51c5c9 | bellard | #define FGRPd9_6 NULL, NULL, 3, NULL, 0, NULL, 0 |
2324 | bc51c5c9 | bellard | #define FGRPd9_7 NULL, NULL, 4, NULL, 0, NULL, 0 |
2325 | bc51c5c9 | bellard | #define FGRPda_5 NULL, NULL, 5, NULL, 0, NULL, 0 |
2326 | bc51c5c9 | bellard | #define FGRPdb_4 NULL, NULL, 6, NULL, 0, NULL, 0 |
2327 | bc51c5c9 | bellard | #define FGRPde_3 NULL, NULL, 7, NULL, 0, NULL, 0 |
2328 | bc51c5c9 | bellard | #define FGRPdf_4 NULL, NULL, 8, NULL, 0, NULL, 0 |
2329 | bc51c5c9 | bellard | |
2330 | bc51c5c9 | bellard | static const struct dis386 float_reg[][8] = { |
2331 | dc99065b | bellard | /* d8 */
|
2332 | dc99065b | bellard | { |
2333 | bc51c5c9 | bellard | { "fadd", ST, STi, XX },
|
2334 | bc51c5c9 | bellard | { "fmul", ST, STi, XX },
|
2335 | bc51c5c9 | bellard | { "fcom", STi, XX, XX },
|
2336 | bc51c5c9 | bellard | { "fcomp", STi, XX, XX },
|
2337 | bc51c5c9 | bellard | { "fsub", ST, STi, XX },
|
2338 | bc51c5c9 | bellard | { "fsubr", ST, STi, XX },
|
2339 | bc51c5c9 | bellard | { "fdiv", ST, STi, XX },
|
2340 | bc51c5c9 | bellard | { "fdivr", ST, STi, XX },
|
2341 | dc99065b | bellard | }, |
2342 | dc99065b | bellard | /* d9 */
|
2343 | dc99065b | bellard | { |
2344 | bc51c5c9 | bellard | { "fld", STi, XX, XX },
|
2345 | bc51c5c9 | bellard | { "fxch", STi, XX, XX },
|
2346 | dc99065b | bellard | { FGRPd9_2 }, |
2347 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2348 | dc99065b | bellard | { FGRPd9_4 }, |
2349 | dc99065b | bellard | { FGRPd9_5 }, |
2350 | dc99065b | bellard | { FGRPd9_6 }, |
2351 | dc99065b | bellard | { FGRPd9_7 }, |
2352 | dc99065b | bellard | }, |
2353 | dc99065b | bellard | /* da */
|
2354 | dc99065b | bellard | { |
2355 | bc51c5c9 | bellard | { "fcmovb", ST, STi, XX },
|
2356 | bc51c5c9 | bellard | { "fcmove", ST, STi, XX },
|
2357 | bc51c5c9 | bellard | { "fcmovbe",ST, STi, XX },
|
2358 | bc51c5c9 | bellard | { "fcmovu", ST, STi, XX },
|
2359 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2360 | dc99065b | bellard | { FGRPda_5 }, |
2361 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2362 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2363 | dc99065b | bellard | }, |
2364 | dc99065b | bellard | /* db */
|
2365 | dc99065b | bellard | { |
2366 | bc51c5c9 | bellard | { "fcmovnb",ST, STi, XX },
|
2367 | bc51c5c9 | bellard | { "fcmovne",ST, STi, XX },
|
2368 | bc51c5c9 | bellard | { "fcmovnbe",ST, STi, XX },
|
2369 | bc51c5c9 | bellard | { "fcmovnu",ST, STi, XX },
|
2370 | dc99065b | bellard | { FGRPdb_4 }, |
2371 | bc51c5c9 | bellard | { "fucomi", ST, STi, XX },
|
2372 | bc51c5c9 | bellard | { "fcomi", ST, STi, XX },
|
2373 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2374 | dc99065b | bellard | }, |
2375 | dc99065b | bellard | /* dc */
|
2376 | dc99065b | bellard | { |
2377 | bc51c5c9 | bellard | { "fadd", STi, ST, XX },
|
2378 | bc51c5c9 | bellard | { "fmul", STi, ST, XX },
|
2379 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2380 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2381 | bc51c5c9 | bellard | #if UNIXWARE_COMPAT
|
2382 | bc51c5c9 | bellard | { "fsub", STi, ST, XX },
|
2383 | bc51c5c9 | bellard | { "fsubr", STi, ST, XX },
|
2384 | bc51c5c9 | bellard | { "fdiv", STi, ST, XX },
|
2385 | bc51c5c9 | bellard | { "fdivr", STi, ST, XX },
|
2386 | bc51c5c9 | bellard | #else
|
2387 | bc51c5c9 | bellard | { "fsubr", STi, ST, XX },
|
2388 | bc51c5c9 | bellard | { "fsub", STi, ST, XX },
|
2389 | bc51c5c9 | bellard | { "fdivr", STi, ST, XX },
|
2390 | bc51c5c9 | bellard | { "fdiv", STi, ST, XX },
|
2391 | bc51c5c9 | bellard | #endif
|
2392 | dc99065b | bellard | }, |
2393 | dc99065b | bellard | /* dd */
|
2394 | dc99065b | bellard | { |
2395 | bc51c5c9 | bellard | { "ffree", STi, XX, XX },
|
2396 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2397 | bc51c5c9 | bellard | { "fst", STi, XX, XX },
|
2398 | bc51c5c9 | bellard | { "fstp", STi, XX, XX },
|
2399 | bc51c5c9 | bellard | { "fucom", STi, XX, XX },
|
2400 | bc51c5c9 | bellard | { "fucomp", STi, XX, XX },
|
2401 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2402 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2403 | dc99065b | bellard | }, |
2404 | dc99065b | bellard | /* de */
|
2405 | dc99065b | bellard | { |
2406 | bc51c5c9 | bellard | { "faddp", STi, ST, XX },
|
2407 | bc51c5c9 | bellard | { "fmulp", STi, ST, XX },
|
2408 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2409 | dc99065b | bellard | { FGRPde_3 }, |
2410 | bc51c5c9 | bellard | #if UNIXWARE_COMPAT
|
2411 | bc51c5c9 | bellard | { "fsubp", STi, ST, XX },
|
2412 | bc51c5c9 | bellard | { "fsubrp", STi, ST, XX },
|
2413 | bc51c5c9 | bellard | { "fdivp", STi, ST, XX },
|
2414 | bc51c5c9 | bellard | { "fdivrp", STi, ST, XX },
|
2415 | bc51c5c9 | bellard | #else
|
2416 | bc51c5c9 | bellard | { "fsubrp", STi, ST, XX },
|
2417 | bc51c5c9 | bellard | { "fsubp", STi, ST, XX },
|
2418 | bc51c5c9 | bellard | { "fdivrp", STi, ST, XX },
|
2419 | bc51c5c9 | bellard | { "fdivp", STi, ST, XX },
|
2420 | bc51c5c9 | bellard | #endif
|
2421 | dc99065b | bellard | }, |
2422 | dc99065b | bellard | /* df */
|
2423 | dc99065b | bellard | { |
2424 | bc51c5c9 | bellard | { "ffreep", STi, XX, XX },
|
2425 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2426 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2427 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2428 | dc99065b | bellard | { FGRPdf_4 }, |
2429 | bc51c5c9 | bellard | { "fucomip",ST, STi, XX },
|
2430 | bc51c5c9 | bellard | { "fcomip", ST, STi, XX },
|
2431 | bc51c5c9 | bellard | { "(bad)", XX, XX, XX },
|
2432 | dc99065b | bellard | }, |
2433 | dc99065b | bellard | }; |
2434 | dc99065b | bellard | |
2435 | 4c7d9dc7 | ths | static const char *fgrps[][8] = { |
2436 | dc99065b | bellard | /* d9_2 0 */
|
2437 | dc99065b | bellard | { |
2438 | dc99065b | bellard | "fnop","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
2439 | dc99065b | bellard | }, |
2440 | dc99065b | bellard | |
2441 | dc99065b | bellard | /* d9_4 1 */
|
2442 | dc99065b | bellard | { |
2443 | dc99065b | bellard | "fchs","fabs","(bad)","(bad)","ftst","fxam","(bad)","(bad)", |
2444 | dc99065b | bellard | }, |
2445 | dc99065b | bellard | |
2446 | dc99065b | bellard | /* d9_5 2 */
|
2447 | dc99065b | bellard | { |
2448 | dc99065b | bellard | "fld1","fldl2t","fldl2e","fldpi","fldlg2","fldln2","fldz","(bad)", |
2449 | dc99065b | bellard | }, |
2450 | dc99065b | bellard | |
2451 | dc99065b | bellard | /* d9_6 3 */
|
2452 | dc99065b | bellard | { |
2453 | dc99065b | bellard | "f2xm1","fyl2x","fptan","fpatan","fxtract","fprem1","fdecstp","fincstp", |
2454 | dc99065b | bellard | }, |
2455 | dc99065b | bellard | |
2456 | dc99065b | bellard | /* d9_7 4 */
|
2457 | dc99065b | bellard | { |
2458 | dc99065b | bellard | "fprem","fyl2xp1","fsqrt","fsincos","frndint","fscale","fsin","fcos", |
2459 | dc99065b | bellard | }, |
2460 | dc99065b | bellard | |
2461 | dc99065b | bellard | /* da_5 5 */
|
2462 | dc99065b | bellard | { |
2463 | dc99065b | bellard | "(bad)","fucompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
2464 | dc99065b | bellard | }, |
2465 | dc99065b | bellard | |
2466 | dc99065b | bellard | /* db_4 6 */
|
2467 | dc99065b | bellard | { |
2468 | dc99065b | bellard | "feni(287 only)","fdisi(287 only)","fNclex","fNinit", |
2469 | dc99065b | bellard | "fNsetpm(287 only)","(bad)","(bad)","(bad)", |
2470 | dc99065b | bellard | }, |
2471 | dc99065b | bellard | |
2472 | dc99065b | bellard | /* de_3 7 */
|
2473 | dc99065b | bellard | { |
2474 | dc99065b | bellard | "(bad)","fcompp","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
2475 | dc99065b | bellard | }, |
2476 | dc99065b | bellard | |
2477 | dc99065b | bellard | /* df_4 8 */
|
2478 | dc99065b | bellard | { |
2479 | dc99065b | bellard | "fNstsw","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)","(bad)", |
2480 | dc99065b | bellard | }, |
2481 | dc99065b | bellard | }; |
2482 | dc99065b | bellard | |
2483 | dc99065b | bellard | static void |
2484 | bc51c5c9 | bellard | dofloat (sizeflag) |
2485 | bc51c5c9 | bellard | int sizeflag;
|
2486 | dc99065b | bellard | { |
2487 | bc51c5c9 | bellard | const struct dis386 *dp; |
2488 | dc99065b | bellard | unsigned char floatop; |
2489 | bc51c5c9 | bellard | |
2490 | dc99065b | bellard | floatop = codep[-1];
|
2491 | bc51c5c9 | bellard | |
2492 | dc99065b | bellard | if (mod != 3) |
2493 | dc99065b | bellard | { |
2494 | bc51c5c9 | bellard | putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); |
2495 | dc99065b | bellard | obufp = op1out; |
2496 | bc51c5c9 | bellard | if (floatop == 0xdb) |
2497 | bc51c5c9 | bellard | OP_E (x_mode, sizeflag); |
2498 | bc51c5c9 | bellard | else if (floatop == 0xdd) |
2499 | bc51c5c9 | bellard | OP_E (d_mode, sizeflag); |
2500 | bc51c5c9 | bellard | else
|
2501 | bc51c5c9 | bellard | OP_E (v_mode, sizeflag); |
2502 | dc99065b | bellard | return;
|
2503 | dc99065b | bellard | } |
2504 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
2505 | bc51c5c9 | bellard | MODRM_CHECK; |
2506 | dc99065b | bellard | codep++; |
2507 | bc51c5c9 | bellard | |
2508 | dc99065b | bellard | dp = &float_reg[floatop - 0xd8][reg];
|
2509 | dc99065b | bellard | if (dp->name == NULL) |
2510 | dc99065b | bellard | { |
2511 | bc51c5c9 | bellard | putop (fgrps[dp->bytemode1][rm], sizeflag); |
2512 | bc51c5c9 | bellard | |
2513 | bc51c5c9 | bellard | /* Instruction fnstsw is only one with strange arg. */
|
2514 | bc51c5c9 | bellard | if (floatop == 0xdf && codep[-1] == 0xe0) |
2515 | bc51c5c9 | bellard | strcpy (op1out, names16[0]);
|
2516 | dc99065b | bellard | } |
2517 | dc99065b | bellard | else
|
2518 | dc99065b | bellard | { |
2519 | bc51c5c9 | bellard | putop (dp->name, sizeflag); |
2520 | bc51c5c9 | bellard | |
2521 | dc99065b | bellard | obufp = op1out; |
2522 | dc99065b | bellard | if (dp->op1)
|
2523 | bc51c5c9 | bellard | (*dp->op1) (dp->bytemode1, sizeflag); |
2524 | dc99065b | bellard | obufp = op2out; |
2525 | dc99065b | bellard | if (dp->op2)
|
2526 | bc51c5c9 | bellard | (*dp->op2) (dp->bytemode2, sizeflag); |
2527 | dc99065b | bellard | } |
2528 | dc99065b | bellard | } |
2529 | dc99065b | bellard | |
2530 | bc51c5c9 | bellard | static void |
2531 | bc51c5c9 | bellard | OP_ST (bytemode, sizeflag) |
2532 | bc51c5c9 | bellard | int bytemode;
|
2533 | bc51c5c9 | bellard | int sizeflag;
|
2534 | dc99065b | bellard | { |
2535 | dc99065b | bellard | oappend ("%st");
|
2536 | dc99065b | bellard | } |
2537 | dc99065b | bellard | |
2538 | bc51c5c9 | bellard | static void |
2539 | bc51c5c9 | bellard | OP_STi (bytemode, sizeflag) |
2540 | bc51c5c9 | bellard | int bytemode;
|
2541 | bc51c5c9 | bellard | int sizeflag;
|
2542 | dc99065b | bellard | { |
2543 | dc99065b | bellard | sprintf (scratchbuf, "%%st(%d)", rm);
|
2544 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
2545 | dc99065b | bellard | } |
2546 | dc99065b | bellard | |
2547 | bc51c5c9 | bellard | /* Capital letters in template are macros. */
|
2548 | bc51c5c9 | bellard | static int |
2549 | bc51c5c9 | bellard | putop (template, sizeflag) |
2550 | bc51c5c9 | bellard | const char *template; |
2551 | bc51c5c9 | bellard | int sizeflag;
|
2552 | dc99065b | bellard | { |
2553 | bc51c5c9 | bellard | const char *p; |
2554 | bc51c5c9 | bellard | int alt;
|
2555 | bc51c5c9 | bellard | |
2556 | dc99065b | bellard | for (p = template; *p; p++)
|
2557 | dc99065b | bellard | { |
2558 | dc99065b | bellard | switch (*p)
|
2559 | dc99065b | bellard | { |
2560 | dc99065b | bellard | default:
|
2561 | dc99065b | bellard | *obufp++ = *p; |
2562 | dc99065b | bellard | break;
|
2563 | bc51c5c9 | bellard | case '{': |
2564 | bc51c5c9 | bellard | alt = 0;
|
2565 | bc51c5c9 | bellard | if (intel_syntax)
|
2566 | bc51c5c9 | bellard | alt += 1;
|
2567 | bc51c5c9 | bellard | if (mode_64bit)
|
2568 | bc51c5c9 | bellard | alt += 2;
|
2569 | bc51c5c9 | bellard | while (alt != 0) |
2570 | bc51c5c9 | bellard | { |
2571 | bc51c5c9 | bellard | while (*++p != '|') |
2572 | bc51c5c9 | bellard | { |
2573 | bc51c5c9 | bellard | if (*p == '}') |
2574 | bc51c5c9 | bellard | { |
2575 | bc51c5c9 | bellard | /* Alternative not valid. */
|
2576 | bc51c5c9 | bellard | strcpy (obuf, "(bad)");
|
2577 | bc51c5c9 | bellard | obufp = obuf + 5;
|
2578 | bc51c5c9 | bellard | return 1; |
2579 | bc51c5c9 | bellard | } |
2580 | bc51c5c9 | bellard | else if (*p == '\0') |
2581 | bc51c5c9 | bellard | abort (); |
2582 | bc51c5c9 | bellard | } |
2583 | bc51c5c9 | bellard | alt--; |
2584 | bc51c5c9 | bellard | } |
2585 | bc51c5c9 | bellard | break;
|
2586 | bc51c5c9 | bellard | case '|': |
2587 | bc51c5c9 | bellard | while (*++p != '}') |
2588 | bc51c5c9 | bellard | { |
2589 | bc51c5c9 | bellard | if (*p == '\0') |
2590 | bc51c5c9 | bellard | abort (); |
2591 | bc51c5c9 | bellard | } |
2592 | bc51c5c9 | bellard | break;
|
2593 | bc51c5c9 | bellard | case '}': |
2594 | bc51c5c9 | bellard | break;
|
2595 | bc51c5c9 | bellard | case 'A': |
2596 | bc51c5c9 | bellard | if (intel_syntax)
|
2597 | bc51c5c9 | bellard | break;
|
2598 | bc51c5c9 | bellard | if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) |
2599 | bc51c5c9 | bellard | *obufp++ = 'b';
|
2600 | bc51c5c9 | bellard | break;
|
2601 | bc51c5c9 | bellard | case 'B': |
2602 | bc51c5c9 | bellard | if (intel_syntax)
|
2603 | bc51c5c9 | bellard | break;
|
2604 | bc51c5c9 | bellard | if (sizeflag & SUFFIX_ALWAYS)
|
2605 | bc51c5c9 | bellard | *obufp++ = 'b';
|
2606 | bc51c5c9 | bellard | break;
|
2607 | bc51c5c9 | bellard | case 'E': /* For jcxz/jecxz */ |
2608 | bc51c5c9 | bellard | if (mode_64bit)
|
2609 | bc51c5c9 | bellard | { |
2610 | bc51c5c9 | bellard | if (sizeflag & AFLAG)
|
2611 | bc51c5c9 | bellard | *obufp++ = 'r';
|
2612 | bc51c5c9 | bellard | else
|
2613 | bc51c5c9 | bellard | *obufp++ = 'e';
|
2614 | bc51c5c9 | bellard | } |
2615 | bc51c5c9 | bellard | else
|
2616 | bc51c5c9 | bellard | if (sizeflag & AFLAG)
|
2617 | bc51c5c9 | bellard | *obufp++ = 'e';
|
2618 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_ADDR); |
2619 | bc51c5c9 | bellard | break;
|
2620 | bc51c5c9 | bellard | case 'F': |
2621 | bc51c5c9 | bellard | if (intel_syntax)
|
2622 | bc51c5c9 | bellard | break;
|
2623 | bc51c5c9 | bellard | if ((prefixes & PREFIX_ADDR) || (sizeflag & SUFFIX_ALWAYS))
|
2624 | bc51c5c9 | bellard | { |
2625 | bc51c5c9 | bellard | if (sizeflag & AFLAG)
|
2626 | bc51c5c9 | bellard | *obufp++ = mode_64bit ? 'q' : 'l'; |
2627 | bc51c5c9 | bellard | else
|
2628 | bc51c5c9 | bellard | *obufp++ = mode_64bit ? 'l' : 'w'; |
2629 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_ADDR); |
2630 | bc51c5c9 | bellard | } |
2631 | bc51c5c9 | bellard | break;
|
2632 | bc51c5c9 | bellard | case 'H': |
2633 | bc51c5c9 | bellard | if (intel_syntax)
|
2634 | bc51c5c9 | bellard | break;
|
2635 | bc51c5c9 | bellard | if ((prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_CS
|
2636 | bc51c5c9 | bellard | || (prefixes & (PREFIX_CS | PREFIX_DS)) == PREFIX_DS) |
2637 | bc51c5c9 | bellard | { |
2638 | bc51c5c9 | bellard | used_prefixes |= prefixes & (PREFIX_CS | PREFIX_DS); |
2639 | bc51c5c9 | bellard | *obufp++ = ',';
|
2640 | bc51c5c9 | bellard | *obufp++ = 'p';
|
2641 | bc51c5c9 | bellard | if (prefixes & PREFIX_DS)
|
2642 | bc51c5c9 | bellard | *obufp++ = 't';
|
2643 | bc51c5c9 | bellard | else
|
2644 | bc51c5c9 | bellard | *obufp++ = 'n';
|
2645 | bc51c5c9 | bellard | } |
2646 | bc51c5c9 | bellard | break;
|
2647 | bc51c5c9 | bellard | case 'L': |
2648 | bc51c5c9 | bellard | if (intel_syntax)
|
2649 | bc51c5c9 | bellard | break;
|
2650 | bc51c5c9 | bellard | if (sizeflag & SUFFIX_ALWAYS)
|
2651 | bc51c5c9 | bellard | *obufp++ = 'l';
|
2652 | dc99065b | bellard | break;
|
2653 | dc99065b | bellard | case 'N': |
2654 | dc99065b | bellard | if ((prefixes & PREFIX_FWAIT) == 0) |
2655 | dc99065b | bellard | *obufp++ = 'n';
|
2656 | bc51c5c9 | bellard | else
|
2657 | bc51c5c9 | bellard | used_prefixes |= PREFIX_FWAIT; |
2658 | bc51c5c9 | bellard | break;
|
2659 | bc51c5c9 | bellard | case 'O': |
2660 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
2661 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2662 | bc51c5c9 | bellard | *obufp++ = 'o';
|
2663 | bc51c5c9 | bellard | else
|
2664 | bc51c5c9 | bellard | *obufp++ = 'd';
|
2665 | bc51c5c9 | bellard | break;
|
2666 | bc51c5c9 | bellard | case 'T': |
2667 | bc51c5c9 | bellard | if (intel_syntax)
|
2668 | bc51c5c9 | bellard | break;
|
2669 | bc51c5c9 | bellard | if (mode_64bit)
|
2670 | bc51c5c9 | bellard | { |
2671 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2672 | bc51c5c9 | bellard | break;
|
2673 | bc51c5c9 | bellard | } |
2674 | bc51c5c9 | bellard | /* Fall through. */
|
2675 | bc51c5c9 | bellard | case 'P': |
2676 | bc51c5c9 | bellard | if (intel_syntax)
|
2677 | bc51c5c9 | bellard | break;
|
2678 | bc51c5c9 | bellard | if ((prefixes & PREFIX_DATA)
|
2679 | bc51c5c9 | bellard | || (rex & REX_MODE64) |
2680 | bc51c5c9 | bellard | || (sizeflag & SUFFIX_ALWAYS)) |
2681 | bc51c5c9 | bellard | { |
2682 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
2683 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2684 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2685 | bc51c5c9 | bellard | else
|
2686 | bc51c5c9 | bellard | { |
2687 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
2688 | bc51c5c9 | bellard | *obufp++ = 'l';
|
2689 | bc51c5c9 | bellard | else
|
2690 | bc51c5c9 | bellard | *obufp++ = 'w';
|
2691 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2692 | bc51c5c9 | bellard | } |
2693 | bc51c5c9 | bellard | } |
2694 | bc51c5c9 | bellard | break;
|
2695 | bc51c5c9 | bellard | case 'U': |
2696 | bc51c5c9 | bellard | if (intel_syntax)
|
2697 | bc51c5c9 | bellard | break;
|
2698 | bc51c5c9 | bellard | if (mode_64bit)
|
2699 | bc51c5c9 | bellard | { |
2700 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2701 | bc51c5c9 | bellard | break;
|
2702 | bc51c5c9 | bellard | } |
2703 | bc51c5c9 | bellard | /* Fall through. */
|
2704 | bc51c5c9 | bellard | case 'Q': |
2705 | bc51c5c9 | bellard | if (intel_syntax)
|
2706 | bc51c5c9 | bellard | break;
|
2707 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
2708 | bc51c5c9 | bellard | if (mod != 3 || (sizeflag & SUFFIX_ALWAYS)) |
2709 | bc51c5c9 | bellard | { |
2710 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2711 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2712 | bc51c5c9 | bellard | else
|
2713 | bc51c5c9 | bellard | { |
2714 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
2715 | bc51c5c9 | bellard | *obufp++ = 'l';
|
2716 | bc51c5c9 | bellard | else
|
2717 | bc51c5c9 | bellard | *obufp++ = 'w';
|
2718 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2719 | bc51c5c9 | bellard | } |
2720 | bc51c5c9 | bellard | } |
2721 | bc51c5c9 | bellard | break;
|
2722 | bc51c5c9 | bellard | case 'R': |
2723 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
2724 | bc51c5c9 | bellard | if (intel_syntax)
|
2725 | bc51c5c9 | bellard | { |
2726 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2727 | bc51c5c9 | bellard | { |
2728 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2729 | bc51c5c9 | bellard | *obufp++ = 't';
|
2730 | bc51c5c9 | bellard | } |
2731 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
2732 | bc51c5c9 | bellard | { |
2733 | bc51c5c9 | bellard | *obufp++ = 'd';
|
2734 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2735 | bc51c5c9 | bellard | } |
2736 | bc51c5c9 | bellard | else
|
2737 | bc51c5c9 | bellard | { |
2738 | bc51c5c9 | bellard | *obufp++ = 'w';
|
2739 | bc51c5c9 | bellard | *obufp++ = 'd';
|
2740 | bc51c5c9 | bellard | } |
2741 | bc51c5c9 | bellard | } |
2742 | bc51c5c9 | bellard | else
|
2743 | bc51c5c9 | bellard | { |
2744 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2745 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2746 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
2747 | bc51c5c9 | bellard | *obufp++ = 'l';
|
2748 | bc51c5c9 | bellard | else
|
2749 | bc51c5c9 | bellard | *obufp++ = 'w';
|
2750 | bc51c5c9 | bellard | } |
2751 | bc51c5c9 | bellard | if (!(rex & REX_MODE64))
|
2752 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2753 | dc99065b | bellard | break;
|
2754 | dc99065b | bellard | case 'S': |
2755 | bc51c5c9 | bellard | if (intel_syntax)
|
2756 | bc51c5c9 | bellard | break;
|
2757 | bc51c5c9 | bellard | if (sizeflag & SUFFIX_ALWAYS)
|
2758 | bc51c5c9 | bellard | { |
2759 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2760 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2761 | bc51c5c9 | bellard | else
|
2762 | bc51c5c9 | bellard | { |
2763 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
2764 | bc51c5c9 | bellard | *obufp++ = 'l';
|
2765 | bc51c5c9 | bellard | else
|
2766 | bc51c5c9 | bellard | *obufp++ = 'w';
|
2767 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2768 | bc51c5c9 | bellard | } |
2769 | bc51c5c9 | bellard | } |
2770 | bc51c5c9 | bellard | break;
|
2771 | bc51c5c9 | bellard | case 'X': |
2772 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
2773 | bc51c5c9 | bellard | *obufp++ = 'd';
|
2774 | dc99065b | bellard | else
|
2775 | bc51c5c9 | bellard | *obufp++ = 's';
|
2776 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2777 | bc51c5c9 | bellard | break;
|
2778 | bc51c5c9 | bellard | case 'Y': |
2779 | bc51c5c9 | bellard | if (intel_syntax)
|
2780 | bc51c5c9 | bellard | break;
|
2781 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2782 | bc51c5c9 | bellard | { |
2783 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
2784 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2785 | bc51c5c9 | bellard | } |
2786 | dc99065b | bellard | break;
|
2787 | bc51c5c9 | bellard | /* implicit operand size 'l' for i386 or 'q' for x86-64 */
|
2788 | dc99065b | bellard | case 'W': |
2789 | dc99065b | bellard | /* operand size flag for cwtl, cbtw */
|
2790 | bc51c5c9 | bellard | USED_REX (0);
|
2791 | bc51c5c9 | bellard | if (rex)
|
2792 | bc51c5c9 | bellard | *obufp++ = 'l';
|
2793 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
2794 | dc99065b | bellard | *obufp++ = 'w';
|
2795 | dc99065b | bellard | else
|
2796 | dc99065b | bellard | *obufp++ = 'b';
|
2797 | bc51c5c9 | bellard | if (intel_syntax)
|
2798 | bc51c5c9 | bellard | { |
2799 | bc51c5c9 | bellard | if (rex)
|
2800 | bc51c5c9 | bellard | { |
2801 | bc51c5c9 | bellard | *obufp++ = 'q';
|
2802 | bc51c5c9 | bellard | *obufp++ = 'e';
|
2803 | bc51c5c9 | bellard | } |
2804 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
2805 | bc51c5c9 | bellard | { |
2806 | bc51c5c9 | bellard | *obufp++ = 'd';
|
2807 | bc51c5c9 | bellard | *obufp++ = 'e';
|
2808 | bc51c5c9 | bellard | } |
2809 | bc51c5c9 | bellard | else
|
2810 | bc51c5c9 | bellard | { |
2811 | bc51c5c9 | bellard | *obufp++ = 'w';
|
2812 | bc51c5c9 | bellard | } |
2813 | bc51c5c9 | bellard | } |
2814 | bc51c5c9 | bellard | if (!rex)
|
2815 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2816 | dc99065b | bellard | break;
|
2817 | dc99065b | bellard | } |
2818 | dc99065b | bellard | } |
2819 | dc99065b | bellard | *obufp = 0;
|
2820 | bc51c5c9 | bellard | return 0; |
2821 | dc99065b | bellard | } |
2822 | dc99065b | bellard | |
2823 | dc99065b | bellard | static void |
2824 | dc99065b | bellard | oappend (s) |
2825 | bc51c5c9 | bellard | const char *s; |
2826 | dc99065b | bellard | { |
2827 | dc99065b | bellard | strcpy (obufp, s); |
2828 | dc99065b | bellard | obufp += strlen (s); |
2829 | dc99065b | bellard | } |
2830 | dc99065b | bellard | |
2831 | dc99065b | bellard | static void |
2832 | bc51c5c9 | bellard | append_seg () |
2833 | dc99065b | bellard | { |
2834 | dc99065b | bellard | if (prefixes & PREFIX_CS)
|
2835 | bc51c5c9 | bellard | { |
2836 | bc51c5c9 | bellard | used_prefixes |= PREFIX_CS; |
2837 | bc51c5c9 | bellard | oappend ("%cs:" + intel_syntax);
|
2838 | bc51c5c9 | bellard | } |
2839 | dc99065b | bellard | if (prefixes & PREFIX_DS)
|
2840 | bc51c5c9 | bellard | { |
2841 | bc51c5c9 | bellard | used_prefixes |= PREFIX_DS; |
2842 | bc51c5c9 | bellard | oappend ("%ds:" + intel_syntax);
|
2843 | bc51c5c9 | bellard | } |
2844 | dc99065b | bellard | if (prefixes & PREFIX_SS)
|
2845 | bc51c5c9 | bellard | { |
2846 | bc51c5c9 | bellard | used_prefixes |= PREFIX_SS; |
2847 | bc51c5c9 | bellard | oappend ("%ss:" + intel_syntax);
|
2848 | bc51c5c9 | bellard | } |
2849 | dc99065b | bellard | if (prefixes & PREFIX_ES)
|
2850 | bc51c5c9 | bellard | { |
2851 | bc51c5c9 | bellard | used_prefixes |= PREFIX_ES; |
2852 | bc51c5c9 | bellard | oappend ("%es:" + intel_syntax);
|
2853 | bc51c5c9 | bellard | } |
2854 | dc99065b | bellard | if (prefixes & PREFIX_FS)
|
2855 | bc51c5c9 | bellard | { |
2856 | bc51c5c9 | bellard | used_prefixes |= PREFIX_FS; |
2857 | bc51c5c9 | bellard | oappend ("%fs:" + intel_syntax);
|
2858 | bc51c5c9 | bellard | } |
2859 | dc99065b | bellard | if (prefixes & PREFIX_GS)
|
2860 | bc51c5c9 | bellard | { |
2861 | bc51c5c9 | bellard | used_prefixes |= PREFIX_GS; |
2862 | bc51c5c9 | bellard | oappend ("%gs:" + intel_syntax);
|
2863 | bc51c5c9 | bellard | } |
2864 | dc99065b | bellard | } |
2865 | dc99065b | bellard | |
2866 | bc51c5c9 | bellard | static void |
2867 | bc51c5c9 | bellard | OP_indirE (bytemode, sizeflag) |
2868 | dc99065b | bellard | int bytemode;
|
2869 | bc51c5c9 | bellard | int sizeflag;
|
2870 | dc99065b | bellard | { |
2871 | bc51c5c9 | bellard | if (!intel_syntax)
|
2872 | bc51c5c9 | bellard | oappend ("*");
|
2873 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
2874 | dc99065b | bellard | } |
2875 | dc99065b | bellard | |
2876 | bc51c5c9 | bellard | static void |
2877 | bc51c5c9 | bellard | print_operand_value (buf, hex, disp) |
2878 | bc51c5c9 | bellard | char *buf;
|
2879 | bc51c5c9 | bellard | int hex;
|
2880 | bc51c5c9 | bellard | bfd_vma disp; |
2881 | bc51c5c9 | bellard | { |
2882 | bc51c5c9 | bellard | if (mode_64bit)
|
2883 | bc51c5c9 | bellard | { |
2884 | bc51c5c9 | bellard | if (hex)
|
2885 | bc51c5c9 | bellard | { |
2886 | bc51c5c9 | bellard | char tmp[30]; |
2887 | bc51c5c9 | bellard | int i;
|
2888 | bc51c5c9 | bellard | buf[0] = '0'; |
2889 | bc51c5c9 | bellard | buf[1] = 'x'; |
2890 | bc51c5c9 | bellard | sprintf_vma (tmp, disp); |
2891 | bc51c5c9 | bellard | for (i = 0; tmp[i] == '0' && tmp[i + 1]; i++); |
2892 | bc51c5c9 | bellard | strcpy (buf + 2, tmp + i);
|
2893 | bc51c5c9 | bellard | } |
2894 | bc51c5c9 | bellard | else
|
2895 | bc51c5c9 | bellard | { |
2896 | bc51c5c9 | bellard | bfd_signed_vma v = disp; |
2897 | bc51c5c9 | bellard | char tmp[30]; |
2898 | bc51c5c9 | bellard | int i;
|
2899 | bc51c5c9 | bellard | if (v < 0) |
2900 | bc51c5c9 | bellard | { |
2901 | bc51c5c9 | bellard | *(buf++) = '-';
|
2902 | bc51c5c9 | bellard | v = -disp; |
2903 | bc51c5c9 | bellard | /* Check for possible overflow on 0x8000000000000000. */
|
2904 | bc51c5c9 | bellard | if (v < 0) |
2905 | bc51c5c9 | bellard | { |
2906 | bc51c5c9 | bellard | strcpy (buf, "9223372036854775808");
|
2907 | bc51c5c9 | bellard | return;
|
2908 | bc51c5c9 | bellard | } |
2909 | bc51c5c9 | bellard | } |
2910 | bc51c5c9 | bellard | if (!v)
|
2911 | bc51c5c9 | bellard | { |
2912 | bc51c5c9 | bellard | strcpy (buf, "0");
|
2913 | bc51c5c9 | bellard | return;
|
2914 | bc51c5c9 | bellard | } |
2915 | bc51c5c9 | bellard | |
2916 | bc51c5c9 | bellard | i = 0;
|
2917 | bc51c5c9 | bellard | tmp[29] = 0; |
2918 | bc51c5c9 | bellard | while (v)
|
2919 | bc51c5c9 | bellard | { |
2920 | bc51c5c9 | bellard | tmp[28 - i] = (v % 10) + '0'; |
2921 | bc51c5c9 | bellard | v /= 10;
|
2922 | bc51c5c9 | bellard | i++; |
2923 | bc51c5c9 | bellard | } |
2924 | bc51c5c9 | bellard | strcpy (buf, tmp + 29 - i);
|
2925 | bc51c5c9 | bellard | } |
2926 | bc51c5c9 | bellard | } |
2927 | bc51c5c9 | bellard | else
|
2928 | bc51c5c9 | bellard | { |
2929 | bc51c5c9 | bellard | if (hex)
|
2930 | bc51c5c9 | bellard | sprintf (buf, "0x%x", (unsigned int) disp); |
2931 | bc51c5c9 | bellard | else
|
2932 | bc51c5c9 | bellard | sprintf (buf, "%d", (int) disp); |
2933 | bc51c5c9 | bellard | } |
2934 | bc51c5c9 | bellard | } |
2935 | bc51c5c9 | bellard | |
2936 | bc51c5c9 | bellard | static void |
2937 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag) |
2938 | dc99065b | bellard | int bytemode;
|
2939 | bc51c5c9 | bellard | int sizeflag;
|
2940 | dc99065b | bellard | { |
2941 | bc51c5c9 | bellard | bfd_vma disp; |
2942 | bc51c5c9 | bellard | int add = 0; |
2943 | bc51c5c9 | bellard | int riprel = 0; |
2944 | bc51c5c9 | bellard | USED_REX (REX_EXTZ); |
2945 | bc51c5c9 | bellard | if (rex & REX_EXTZ)
|
2946 | bc51c5c9 | bellard | add += 8;
|
2947 | dc99065b | bellard | |
2948 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
2949 | bc51c5c9 | bellard | MODRM_CHECK; |
2950 | dc99065b | bellard | codep++; |
2951 | dc99065b | bellard | |
2952 | dc99065b | bellard | if (mod == 3) |
2953 | dc99065b | bellard | { |
2954 | dc99065b | bellard | switch (bytemode)
|
2955 | dc99065b | bellard | { |
2956 | dc99065b | bellard | case b_mode:
|
2957 | bc51c5c9 | bellard | USED_REX (0);
|
2958 | bc51c5c9 | bellard | if (rex)
|
2959 | bc51c5c9 | bellard | oappend (names8rex[rm + add]); |
2960 | bc51c5c9 | bellard | else
|
2961 | bc51c5c9 | bellard | oappend (names8[rm + add]); |
2962 | dc99065b | bellard | break;
|
2963 | dc99065b | bellard | case w_mode:
|
2964 | bc51c5c9 | bellard | oappend (names16[rm + add]); |
2965 | bc51c5c9 | bellard | break;
|
2966 | bc51c5c9 | bellard | case d_mode:
|
2967 | bc51c5c9 | bellard | oappend (names32[rm + add]); |
2968 | bc51c5c9 | bellard | break;
|
2969 | bc51c5c9 | bellard | case q_mode:
|
2970 | bc51c5c9 | bellard | oappend (names64[rm + add]); |
2971 | bc51c5c9 | bellard | break;
|
2972 | bc51c5c9 | bellard | case m_mode:
|
2973 | bc51c5c9 | bellard | if (mode_64bit)
|
2974 | bc51c5c9 | bellard | oappend (names64[rm + add]); |
2975 | bc51c5c9 | bellard | else
|
2976 | bc51c5c9 | bellard | oappend (names32[rm + add]); |
2977 | dc99065b | bellard | break;
|
2978 | dc99065b | bellard | case v_mode:
|
2979 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
2980 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
2981 | bc51c5c9 | bellard | oappend (names64[rm + add]); |
2982 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
2983 | bc51c5c9 | bellard | oappend (names32[rm + add]); |
2984 | dc99065b | bellard | else
|
2985 | bc51c5c9 | bellard | oappend (names16[rm + add]); |
2986 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
2987 | bc51c5c9 | bellard | break;
|
2988 | bc51c5c9 | bellard | case 0: |
2989 | bc51c5c9 | bellard | if (!(codep[-2] == 0xAE && codep[-1] == 0xF8 /* sfence */) |
2990 | bc51c5c9 | bellard | && !(codep[-2] == 0xAE && codep[-1] == 0xF0 /* mfence */) |
2991 | bc51c5c9 | bellard | && !(codep[-2] == 0xAE && codep[-1] == 0xe8 /* lfence */)) |
2992 | bc51c5c9 | bellard | BadOp (); /* bad sfence,lea,lds,les,lfs,lgs,lss modrm */
|
2993 | dc99065b | bellard | break;
|
2994 | dc99065b | bellard | default:
|
2995 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
2996 | dc99065b | bellard | break;
|
2997 | dc99065b | bellard | } |
2998 | bc51c5c9 | bellard | return;
|
2999 | dc99065b | bellard | } |
3000 | dc99065b | bellard | |
3001 | dc99065b | bellard | disp = 0;
|
3002 | bc51c5c9 | bellard | append_seg (); |
3003 | dc99065b | bellard | |
3004 | bc51c5c9 | bellard | if ((sizeflag & AFLAG) || mode_64bit) /* 32 bit address mode */ |
3005 | dc99065b | bellard | { |
3006 | dc99065b | bellard | int havesib;
|
3007 | dc99065b | bellard | int havebase;
|
3008 | dc99065b | bellard | int base;
|
3009 | dc99065b | bellard | int index = 0; |
3010 | dc99065b | bellard | int scale = 0; |
3011 | dc99065b | bellard | |
3012 | dc99065b | bellard | havesib = 0;
|
3013 | dc99065b | bellard | havebase = 1;
|
3014 | dc99065b | bellard | base = rm; |
3015 | dc99065b | bellard | |
3016 | dc99065b | bellard | if (base == 4) |
3017 | dc99065b | bellard | { |
3018 | dc99065b | bellard | havesib = 1;
|
3019 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3020 | dc99065b | bellard | scale = (*codep >> 6) & 3; |
3021 | dc99065b | bellard | index = (*codep >> 3) & 7; |
3022 | dc99065b | bellard | base = *codep & 7;
|
3023 | bc51c5c9 | bellard | USED_REX (REX_EXTY); |
3024 | bc51c5c9 | bellard | USED_REX (REX_EXTZ); |
3025 | bc51c5c9 | bellard | if (rex & REX_EXTY)
|
3026 | bc51c5c9 | bellard | index += 8;
|
3027 | bc51c5c9 | bellard | if (rex & REX_EXTZ)
|
3028 | bc51c5c9 | bellard | base += 8;
|
3029 | dc99065b | bellard | codep++; |
3030 | dc99065b | bellard | } |
3031 | dc99065b | bellard | |
3032 | dc99065b | bellard | switch (mod)
|
3033 | dc99065b | bellard | { |
3034 | dc99065b | bellard | case 0: |
3035 | bc51c5c9 | bellard | if ((base & 7) == 5) |
3036 | dc99065b | bellard | { |
3037 | dc99065b | bellard | havebase = 0;
|
3038 | bc51c5c9 | bellard | if (mode_64bit && !havesib && (sizeflag & AFLAG))
|
3039 | bc51c5c9 | bellard | riprel = 1;
|
3040 | bc51c5c9 | bellard | disp = get32s (); |
3041 | dc99065b | bellard | } |
3042 | dc99065b | bellard | break;
|
3043 | dc99065b | bellard | case 1: |
3044 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3045 | dc99065b | bellard | disp = *codep++; |
3046 | dc99065b | bellard | if ((disp & 0x80) != 0) |
3047 | dc99065b | bellard | disp -= 0x100;
|
3048 | dc99065b | bellard | break;
|
3049 | dc99065b | bellard | case 2: |
3050 | bc51c5c9 | bellard | disp = get32s (); |
3051 | dc99065b | bellard | break;
|
3052 | dc99065b | bellard | } |
3053 | dc99065b | bellard | |
3054 | bc51c5c9 | bellard | if (!intel_syntax)
|
3055 | bc51c5c9 | bellard | if (mod != 0 || (base & 7) == 5) |
3056 | bc51c5c9 | bellard | { |
3057 | bc51c5c9 | bellard | print_operand_value (scratchbuf, !riprel, disp); |
3058 | bc51c5c9 | bellard | oappend (scratchbuf); |
3059 | bc51c5c9 | bellard | if (riprel)
|
3060 | bc51c5c9 | bellard | { |
3061 | bc51c5c9 | bellard | set_op (disp, 1);
|
3062 | bc51c5c9 | bellard | oappend ("(%rip)");
|
3063 | bc51c5c9 | bellard | } |
3064 | bc51c5c9 | bellard | } |
3065 | dc99065b | bellard | |
3066 | dc99065b | bellard | if (havebase || (havesib && (index != 4 || scale != 0))) |
3067 | dc99065b | bellard | { |
3068 | bc51c5c9 | bellard | if (intel_syntax)
|
3069 | bc51c5c9 | bellard | { |
3070 | bc51c5c9 | bellard | switch (bytemode)
|
3071 | bc51c5c9 | bellard | { |
3072 | bc51c5c9 | bellard | case b_mode:
|
3073 | bc51c5c9 | bellard | oappend ("BYTE PTR ");
|
3074 | bc51c5c9 | bellard | break;
|
3075 | bc51c5c9 | bellard | case w_mode:
|
3076 | bc51c5c9 | bellard | oappend ("WORD PTR ");
|
3077 | bc51c5c9 | bellard | break;
|
3078 | bc51c5c9 | bellard | case v_mode:
|
3079 | bc51c5c9 | bellard | oappend ("DWORD PTR ");
|
3080 | bc51c5c9 | bellard | break;
|
3081 | bc51c5c9 | bellard | case d_mode:
|
3082 | bc51c5c9 | bellard | oappend ("QWORD PTR ");
|
3083 | bc51c5c9 | bellard | break;
|
3084 | bc51c5c9 | bellard | case m_mode:
|
3085 | bc51c5c9 | bellard | if (mode_64bit)
|
3086 | bc51c5c9 | bellard | oappend ("DWORD PTR ");
|
3087 | bc51c5c9 | bellard | else
|
3088 | bc51c5c9 | bellard | oappend ("QWORD PTR ");
|
3089 | bc51c5c9 | bellard | break;
|
3090 | bc51c5c9 | bellard | case x_mode:
|
3091 | bc51c5c9 | bellard | oappend ("XWORD PTR ");
|
3092 | bc51c5c9 | bellard | break;
|
3093 | bc51c5c9 | bellard | default:
|
3094 | bc51c5c9 | bellard | break;
|
3095 | bc51c5c9 | bellard | } |
3096 | bc51c5c9 | bellard | } |
3097 | bc51c5c9 | bellard | *obufp++ = open_char; |
3098 | bc51c5c9 | bellard | if (intel_syntax && riprel)
|
3099 | bc51c5c9 | bellard | oappend ("rip + ");
|
3100 | bc51c5c9 | bellard | *obufp = '\0';
|
3101 | bc51c5c9 | bellard | USED_REX (REX_EXTZ); |
3102 | bc51c5c9 | bellard | if (!havesib && (rex & REX_EXTZ))
|
3103 | bc51c5c9 | bellard | base += 8;
|
3104 | dc99065b | bellard | if (havebase)
|
3105 | bc51c5c9 | bellard | oappend (mode_64bit && (sizeflag & AFLAG) |
3106 | bc51c5c9 | bellard | ? names64[base] : names32[base]); |
3107 | dc99065b | bellard | if (havesib)
|
3108 | dc99065b | bellard | { |
3109 | dc99065b | bellard | if (index != 4) |
3110 | dc99065b | bellard | { |
3111 | bc51c5c9 | bellard | if (intel_syntax)
|
3112 | bc51c5c9 | bellard | { |
3113 | bc51c5c9 | bellard | if (havebase)
|
3114 | bc51c5c9 | bellard | { |
3115 | bc51c5c9 | bellard | *obufp++ = separator_char; |
3116 | bc51c5c9 | bellard | *obufp = '\0';
|
3117 | bc51c5c9 | bellard | } |
3118 | bc51c5c9 | bellard | sprintf (scratchbuf, "%s",
|
3119 | bc51c5c9 | bellard | mode_64bit && (sizeflag & AFLAG) |
3120 | bc51c5c9 | bellard | ? names64[index] : names32[index]); |
3121 | bc51c5c9 | bellard | } |
3122 | bc51c5c9 | bellard | else
|
3123 | bc51c5c9 | bellard | sprintf (scratchbuf, ",%s",
|
3124 | bc51c5c9 | bellard | mode_64bit && (sizeflag & AFLAG) |
3125 | bc51c5c9 | bellard | ? names64[index] : names32[index]); |
3126 | dc99065b | bellard | oappend (scratchbuf); |
3127 | dc99065b | bellard | } |
3128 | bc51c5c9 | bellard | if (!intel_syntax
|
3129 | bc51c5c9 | bellard | || (intel_syntax |
3130 | bc51c5c9 | bellard | && bytemode != b_mode |
3131 | bc51c5c9 | bellard | && bytemode != w_mode |
3132 | bc51c5c9 | bellard | && bytemode != v_mode)) |
3133 | bc51c5c9 | bellard | { |
3134 | bc51c5c9 | bellard | *obufp++ = scale_char; |
3135 | bc51c5c9 | bellard | *obufp = '\0';
|
3136 | bc51c5c9 | bellard | sprintf (scratchbuf, "%d", 1 << scale); |
3137 | bc51c5c9 | bellard | oappend (scratchbuf); |
3138 | bc51c5c9 | bellard | } |
3139 | dc99065b | bellard | } |
3140 | bc51c5c9 | bellard | if (intel_syntax)
|
3141 | bc51c5c9 | bellard | if (mod != 0 || (base & 7) == 5) |
3142 | bc51c5c9 | bellard | { |
3143 | bc51c5c9 | bellard | /* Don't print zero displacements. */
|
3144 | bc51c5c9 | bellard | if (disp != 0) |
3145 | bc51c5c9 | bellard | { |
3146 | bc51c5c9 | bellard | if ((bfd_signed_vma) disp > 0) |
3147 | bc51c5c9 | bellard | { |
3148 | bc51c5c9 | bellard | *obufp++ = '+';
|
3149 | bc51c5c9 | bellard | *obufp = '\0';
|
3150 | bc51c5c9 | bellard | } |
3151 | bc51c5c9 | bellard | |
3152 | bc51c5c9 | bellard | print_operand_value (scratchbuf, 0, disp);
|
3153 | bc51c5c9 | bellard | oappend (scratchbuf); |
3154 | bc51c5c9 | bellard | } |
3155 | bc51c5c9 | bellard | } |
3156 | bc51c5c9 | bellard | |
3157 | bc51c5c9 | bellard | *obufp++ = close_char; |
3158 | bc51c5c9 | bellard | *obufp = '\0';
|
3159 | dc99065b | bellard | } |
3160 | bc51c5c9 | bellard | else if (intel_syntax) |
3161 | bc51c5c9 | bellard | { |
3162 | bc51c5c9 | bellard | if (mod != 0 || (base & 7) == 5) |
3163 | bc51c5c9 | bellard | { |
3164 | bc51c5c9 | bellard | if (prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
3165 | bc51c5c9 | bellard | | PREFIX_ES | PREFIX_FS | PREFIX_GS)) |
3166 | bc51c5c9 | bellard | ; |
3167 | bc51c5c9 | bellard | else
|
3168 | bc51c5c9 | bellard | { |
3169 | bc51c5c9 | bellard | oappend (names_seg[ds_reg - es_reg]); |
3170 | bc51c5c9 | bellard | oappend (":");
|
3171 | bc51c5c9 | bellard | } |
3172 | bc51c5c9 | bellard | print_operand_value (scratchbuf, 1, disp);
|
3173 | bc51c5c9 | bellard | oappend (scratchbuf); |
3174 | bc51c5c9 | bellard | } |
3175 | bc51c5c9 | bellard | } |
3176 | dc99065b | bellard | } |
3177 | dc99065b | bellard | else
|
3178 | dc99065b | bellard | { /* 16 bit address mode */
|
3179 | dc99065b | bellard | switch (mod)
|
3180 | dc99065b | bellard | { |
3181 | dc99065b | bellard | case 0: |
3182 | bc51c5c9 | bellard | if ((rm & 7) == 6) |
3183 | dc99065b | bellard | { |
3184 | dc99065b | bellard | disp = get16 (); |
3185 | dc99065b | bellard | if ((disp & 0x8000) != 0) |
3186 | dc99065b | bellard | disp -= 0x10000;
|
3187 | dc99065b | bellard | } |
3188 | dc99065b | bellard | break;
|
3189 | dc99065b | bellard | case 1: |
3190 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3191 | dc99065b | bellard | disp = *codep++; |
3192 | dc99065b | bellard | if ((disp & 0x80) != 0) |
3193 | dc99065b | bellard | disp -= 0x100;
|
3194 | dc99065b | bellard | break;
|
3195 | dc99065b | bellard | case 2: |
3196 | dc99065b | bellard | disp = get16 (); |
3197 | dc99065b | bellard | if ((disp & 0x8000) != 0) |
3198 | dc99065b | bellard | disp -= 0x10000;
|
3199 | dc99065b | bellard | break;
|
3200 | dc99065b | bellard | } |
3201 | dc99065b | bellard | |
3202 | bc51c5c9 | bellard | if (!intel_syntax)
|
3203 | bc51c5c9 | bellard | if (mod != 0 || (rm & 7) == 6) |
3204 | bc51c5c9 | bellard | { |
3205 | bc51c5c9 | bellard | print_operand_value (scratchbuf, 0, disp);
|
3206 | bc51c5c9 | bellard | oappend (scratchbuf); |
3207 | bc51c5c9 | bellard | } |
3208 | dc99065b | bellard | |
3209 | bc51c5c9 | bellard | if (mod != 0 || (rm & 7) != 6) |
3210 | dc99065b | bellard | { |
3211 | bc51c5c9 | bellard | *obufp++ = open_char; |
3212 | bc51c5c9 | bellard | *obufp = '\0';
|
3213 | bc51c5c9 | bellard | oappend (index16[rm + add]); |
3214 | bc51c5c9 | bellard | *obufp++ = close_char; |
3215 | bc51c5c9 | bellard | *obufp = '\0';
|
3216 | dc99065b | bellard | } |
3217 | dc99065b | bellard | } |
3218 | dc99065b | bellard | } |
3219 | dc99065b | bellard | |
3220 | bc51c5c9 | bellard | static void |
3221 | bc51c5c9 | bellard | OP_G (bytemode, sizeflag) |
3222 | dc99065b | bellard | int bytemode;
|
3223 | bc51c5c9 | bellard | int sizeflag;
|
3224 | dc99065b | bellard | { |
3225 | bc51c5c9 | bellard | int add = 0; |
3226 | bc51c5c9 | bellard | USED_REX (REX_EXTX); |
3227 | bc51c5c9 | bellard | if (rex & REX_EXTX)
|
3228 | bc51c5c9 | bellard | add += 8;
|
3229 | bc51c5c9 | bellard | switch (bytemode)
|
3230 | dc99065b | bellard | { |
3231 | dc99065b | bellard | case b_mode:
|
3232 | bc51c5c9 | bellard | USED_REX (0);
|
3233 | bc51c5c9 | bellard | if (rex)
|
3234 | bc51c5c9 | bellard | oappend (names8rex[reg + add]); |
3235 | bc51c5c9 | bellard | else
|
3236 | bc51c5c9 | bellard | oappend (names8[reg + add]); |
3237 | dc99065b | bellard | break;
|
3238 | dc99065b | bellard | case w_mode:
|
3239 | bc51c5c9 | bellard | oappend (names16[reg + add]); |
3240 | dc99065b | bellard | break;
|
3241 | dc99065b | bellard | case d_mode:
|
3242 | bc51c5c9 | bellard | oappend (names32[reg + add]); |
3243 | bc51c5c9 | bellard | break;
|
3244 | bc51c5c9 | bellard | case q_mode:
|
3245 | bc51c5c9 | bellard | oappend (names64[reg + add]); |
3246 | dc99065b | bellard | break;
|
3247 | dc99065b | bellard | case v_mode:
|
3248 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3249 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3250 | bc51c5c9 | bellard | oappend (names64[reg + add]); |
3251 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
3252 | bc51c5c9 | bellard | oappend (names32[reg + add]); |
3253 | dc99065b | bellard | else
|
3254 | bc51c5c9 | bellard | oappend (names16[reg + add]); |
3255 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3256 | dc99065b | bellard | break;
|
3257 | dc99065b | bellard | default:
|
3258 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
3259 | dc99065b | bellard | break;
|
3260 | dc99065b | bellard | } |
3261 | dc99065b | bellard | } |
3262 | dc99065b | bellard | |
3263 | bc51c5c9 | bellard | static bfd_vma
|
3264 | bc51c5c9 | bellard | get64 () |
3265 | bc51c5c9 | bellard | { |
3266 | bc51c5c9 | bellard | bfd_vma x; |
3267 | bc51c5c9 | bellard | #ifdef BFD64
|
3268 | bc51c5c9 | bellard | unsigned int a; |
3269 | bc51c5c9 | bellard | unsigned int b; |
3270 | bc51c5c9 | bellard | |
3271 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 8);
|
3272 | bc51c5c9 | bellard | a = *codep++ & 0xff;
|
3273 | bc51c5c9 | bellard | a |= (*codep++ & 0xff) << 8; |
3274 | bc51c5c9 | bellard | a |= (*codep++ & 0xff) << 16; |
3275 | bc51c5c9 | bellard | a |= (*codep++ & 0xff) << 24; |
3276 | bc51c5c9 | bellard | b = *codep++ & 0xff;
|
3277 | bc51c5c9 | bellard | b |= (*codep++ & 0xff) << 8; |
3278 | bc51c5c9 | bellard | b |= (*codep++ & 0xff) << 16; |
3279 | bc51c5c9 | bellard | b |= (*codep++ & 0xff) << 24; |
3280 | bc51c5c9 | bellard | x = a + ((bfd_vma) b << 32);
|
3281 | bc51c5c9 | bellard | #else
|
3282 | bc51c5c9 | bellard | abort (); |
3283 | bc51c5c9 | bellard | x = 0;
|
3284 | bc51c5c9 | bellard | #endif
|
3285 | bc51c5c9 | bellard | return x;
|
3286 | bc51c5c9 | bellard | } |
3287 | bc51c5c9 | bellard | |
3288 | bc51c5c9 | bellard | static bfd_signed_vma
|
3289 | dc99065b | bellard | get32 () |
3290 | dc99065b | bellard | { |
3291 | bc51c5c9 | bellard | bfd_signed_vma x = 0;
|
3292 | dc99065b | bellard | |
3293 | dc99065b | bellard | FETCH_DATA (the_info, codep + 4);
|
3294 | bc51c5c9 | bellard | x = *codep++ & (bfd_signed_vma) 0xff;
|
3295 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; |
3296 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; |
3297 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; |
3298 | bc51c5c9 | bellard | return x;
|
3299 | bc51c5c9 | bellard | } |
3300 | bc51c5c9 | bellard | |
3301 | bc51c5c9 | bellard | static bfd_signed_vma
|
3302 | bc51c5c9 | bellard | get32s () |
3303 | bc51c5c9 | bellard | { |
3304 | bc51c5c9 | bellard | bfd_signed_vma x = 0;
|
3305 | bc51c5c9 | bellard | |
3306 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 4);
|
3307 | bc51c5c9 | bellard | x = *codep++ & (bfd_signed_vma) 0xff;
|
3308 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 8; |
3309 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 16; |
3310 | bc51c5c9 | bellard | x |= (*codep++ & (bfd_signed_vma) 0xff) << 24; |
3311 | bc51c5c9 | bellard | |
3312 | bc51c5c9 | bellard | x = (x ^ ((bfd_signed_vma) 1 << 31)) - ((bfd_signed_vma) 1 << 31); |
3313 | bc51c5c9 | bellard | |
3314 | bc51c5c9 | bellard | return x;
|
3315 | dc99065b | bellard | } |
3316 | dc99065b | bellard | |
3317 | dc99065b | bellard | static int |
3318 | dc99065b | bellard | get16 () |
3319 | dc99065b | bellard | { |
3320 | dc99065b | bellard | int x = 0; |
3321 | dc99065b | bellard | |
3322 | dc99065b | bellard | FETCH_DATA (the_info, codep + 2);
|
3323 | dc99065b | bellard | x = *codep++ & 0xff;
|
3324 | dc99065b | bellard | x |= (*codep++ & 0xff) << 8; |
3325 | bc51c5c9 | bellard | return x;
|
3326 | dc99065b | bellard | } |
3327 | dc99065b | bellard | |
3328 | dc99065b | bellard | static void |
3329 | bc51c5c9 | bellard | set_op (op, riprel) |
3330 | bc51c5c9 | bellard | bfd_vma op; |
3331 | bc51c5c9 | bellard | int riprel;
|
3332 | dc99065b | bellard | { |
3333 | dc99065b | bellard | op_index[op_ad] = op_ad; |
3334 | bc51c5c9 | bellard | if (mode_64bit)
|
3335 | bc51c5c9 | bellard | { |
3336 | bc51c5c9 | bellard | op_address[op_ad] = op; |
3337 | bc51c5c9 | bellard | op_riprel[op_ad] = riprel; |
3338 | bc51c5c9 | bellard | } |
3339 | bc51c5c9 | bellard | else
|
3340 | bc51c5c9 | bellard | { |
3341 | bc51c5c9 | bellard | /* Mask to get a 32-bit address. */
|
3342 | bc51c5c9 | bellard | op_address[op_ad] = op & 0xffffffff;
|
3343 | bc51c5c9 | bellard | op_riprel[op_ad] = riprel & 0xffffffff;
|
3344 | bc51c5c9 | bellard | } |
3345 | dc99065b | bellard | } |
3346 | dc99065b | bellard | |
3347 | bc51c5c9 | bellard | static void |
3348 | bc51c5c9 | bellard | OP_REG (code, sizeflag) |
3349 | bc51c5c9 | bellard | int code;
|
3350 | bc51c5c9 | bellard | int sizeflag;
|
3351 | bc51c5c9 | bellard | { |
3352 | bc51c5c9 | bellard | const char *s; |
3353 | bc51c5c9 | bellard | int add = 0; |
3354 | bc51c5c9 | bellard | USED_REX (REX_EXTZ); |
3355 | bc51c5c9 | bellard | if (rex & REX_EXTZ)
|
3356 | bc51c5c9 | bellard | add = 8;
|
3357 | bc51c5c9 | bellard | |
3358 | bc51c5c9 | bellard | switch (code)
|
3359 | bc51c5c9 | bellard | { |
3360 | bc51c5c9 | bellard | case indir_dx_reg:
|
3361 | bc51c5c9 | bellard | if (intel_syntax)
|
3362 | bc51c5c9 | bellard | s = "[dx]";
|
3363 | bc51c5c9 | bellard | else
|
3364 | bc51c5c9 | bellard | s = "(%dx)";
|
3365 | bc51c5c9 | bellard | break;
|
3366 | bc51c5c9 | bellard | case ax_reg: case cx_reg: case dx_reg: case bx_reg: |
3367 | bc51c5c9 | bellard | case sp_reg: case bp_reg: case si_reg: case di_reg: |
3368 | bc51c5c9 | bellard | s = names16[code - ax_reg + add]; |
3369 | bc51c5c9 | bellard | break;
|
3370 | bc51c5c9 | bellard | case es_reg: case ss_reg: case cs_reg: |
3371 | bc51c5c9 | bellard | case ds_reg: case fs_reg: case gs_reg: |
3372 | bc51c5c9 | bellard | s = names_seg[code - es_reg + add]; |
3373 | bc51c5c9 | bellard | break;
|
3374 | bc51c5c9 | bellard | case al_reg: case ah_reg: case cl_reg: case ch_reg: |
3375 | bc51c5c9 | bellard | case dl_reg: case dh_reg: case bl_reg: case bh_reg: |
3376 | bc51c5c9 | bellard | USED_REX (0);
|
3377 | bc51c5c9 | bellard | if (rex)
|
3378 | bc51c5c9 | bellard | s = names8rex[code - al_reg + add]; |
3379 | bc51c5c9 | bellard | else
|
3380 | bc51c5c9 | bellard | s = names8[code - al_reg]; |
3381 | bc51c5c9 | bellard | break;
|
3382 | bc51c5c9 | bellard | case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg: |
3383 | bc51c5c9 | bellard | case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg: |
3384 | bc51c5c9 | bellard | if (mode_64bit)
|
3385 | bc51c5c9 | bellard | { |
3386 | bc51c5c9 | bellard | s = names64[code - rAX_reg + add]; |
3387 | bc51c5c9 | bellard | break;
|
3388 | bc51c5c9 | bellard | } |
3389 | bc51c5c9 | bellard | code += eAX_reg - rAX_reg; |
3390 | bc51c5c9 | bellard | /* Fall through. */
|
3391 | bc51c5c9 | bellard | case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: |
3392 | bc51c5c9 | bellard | case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: |
3393 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3394 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3395 | bc51c5c9 | bellard | s = names64[code - eAX_reg + add]; |
3396 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
3397 | bc51c5c9 | bellard | s = names32[code - eAX_reg + add]; |
3398 | bc51c5c9 | bellard | else
|
3399 | bc51c5c9 | bellard | s = names16[code - eAX_reg + add]; |
3400 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3401 | bc51c5c9 | bellard | break;
|
3402 | bc51c5c9 | bellard | default:
|
3403 | bc51c5c9 | bellard | s = INTERNAL_DISASSEMBLER_ERROR; |
3404 | bc51c5c9 | bellard | break;
|
3405 | bc51c5c9 | bellard | } |
3406 | bc51c5c9 | bellard | oappend (s); |
3407 | bc51c5c9 | bellard | } |
3408 | bc51c5c9 | bellard | |
3409 | bc51c5c9 | bellard | static void |
3410 | bc51c5c9 | bellard | OP_IMREG (code, sizeflag) |
3411 | dc99065b | bellard | int code;
|
3412 | bc51c5c9 | bellard | int sizeflag;
|
3413 | dc99065b | bellard | { |
3414 | bc51c5c9 | bellard | const char *s; |
3415 | bc51c5c9 | bellard | |
3416 | bc51c5c9 | bellard | switch (code)
|
3417 | dc99065b | bellard | { |
3418 | bc51c5c9 | bellard | case indir_dx_reg:
|
3419 | bc51c5c9 | bellard | if (intel_syntax)
|
3420 | bc51c5c9 | bellard | s = "[dx]";
|
3421 | bc51c5c9 | bellard | else
|
3422 | bc51c5c9 | bellard | s = "(%dx)";
|
3423 | bc51c5c9 | bellard | break;
|
3424 | bc51c5c9 | bellard | case ax_reg: case cx_reg: case dx_reg: case bx_reg: |
3425 | bc51c5c9 | bellard | case sp_reg: case bp_reg: case si_reg: case di_reg: |
3426 | bc51c5c9 | bellard | s = names16[code - ax_reg]; |
3427 | bc51c5c9 | bellard | break;
|
3428 | bc51c5c9 | bellard | case es_reg: case ss_reg: case cs_reg: |
3429 | bc51c5c9 | bellard | case ds_reg: case fs_reg: case gs_reg: |
3430 | bc51c5c9 | bellard | s = names_seg[code - es_reg]; |
3431 | bc51c5c9 | bellard | break;
|
3432 | bc51c5c9 | bellard | case al_reg: case ah_reg: case cl_reg: case ch_reg: |
3433 | bc51c5c9 | bellard | case dl_reg: case dh_reg: case bl_reg: case bh_reg: |
3434 | bc51c5c9 | bellard | USED_REX (0);
|
3435 | bc51c5c9 | bellard | if (rex)
|
3436 | bc51c5c9 | bellard | s = names8rex[code - al_reg]; |
3437 | bc51c5c9 | bellard | else
|
3438 | bc51c5c9 | bellard | s = names8[code - al_reg]; |
3439 | bc51c5c9 | bellard | break;
|
3440 | bc51c5c9 | bellard | case eAX_reg: case eCX_reg: case eDX_reg: case eBX_reg: |
3441 | bc51c5c9 | bellard | case eSP_reg: case eBP_reg: case eSI_reg: case eDI_reg: |
3442 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3443 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3444 | bc51c5c9 | bellard | s = names64[code - eAX_reg]; |
3445 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
3446 | dc99065b | bellard | s = names32[code - eAX_reg]; |
3447 | dc99065b | bellard | else
|
3448 | dc99065b | bellard | s = names16[code - eAX_reg]; |
3449 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3450 | dc99065b | bellard | break;
|
3451 | dc99065b | bellard | default:
|
3452 | bc51c5c9 | bellard | s = INTERNAL_DISASSEMBLER_ERROR; |
3453 | dc99065b | bellard | break;
|
3454 | dc99065b | bellard | } |
3455 | dc99065b | bellard | oappend (s); |
3456 | dc99065b | bellard | } |
3457 | dc99065b | bellard | |
3458 | bc51c5c9 | bellard | static void |
3459 | bc51c5c9 | bellard | OP_I (bytemode, sizeflag) |
3460 | bc51c5c9 | bellard | int bytemode;
|
3461 | bc51c5c9 | bellard | int sizeflag;
|
3462 | bc51c5c9 | bellard | { |
3463 | bc51c5c9 | bellard | bfd_signed_vma op; |
3464 | bc51c5c9 | bellard | bfd_signed_vma mask = -1;
|
3465 | bc51c5c9 | bellard | |
3466 | bc51c5c9 | bellard | switch (bytemode)
|
3467 | bc51c5c9 | bellard | { |
3468 | bc51c5c9 | bellard | case b_mode:
|
3469 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 1);
|
3470 | bc51c5c9 | bellard | op = *codep++; |
3471 | bc51c5c9 | bellard | mask = 0xff;
|
3472 | bc51c5c9 | bellard | break;
|
3473 | bc51c5c9 | bellard | case q_mode:
|
3474 | bc51c5c9 | bellard | if (mode_64bit)
|
3475 | bc51c5c9 | bellard | { |
3476 | bc51c5c9 | bellard | op = get32s (); |
3477 | bc51c5c9 | bellard | break;
|
3478 | bc51c5c9 | bellard | } |
3479 | bc51c5c9 | bellard | /* Fall through. */
|
3480 | bc51c5c9 | bellard | case v_mode:
|
3481 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3482 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3483 | bc51c5c9 | bellard | op = get32s (); |
3484 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
3485 | bc51c5c9 | bellard | { |
3486 | bc51c5c9 | bellard | op = get32 (); |
3487 | bc51c5c9 | bellard | mask = 0xffffffff;
|
3488 | bc51c5c9 | bellard | } |
3489 | bc51c5c9 | bellard | else
|
3490 | bc51c5c9 | bellard | { |
3491 | bc51c5c9 | bellard | op = get16 (); |
3492 | bc51c5c9 | bellard | mask = 0xfffff;
|
3493 | bc51c5c9 | bellard | } |
3494 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3495 | bc51c5c9 | bellard | break;
|
3496 | bc51c5c9 | bellard | case w_mode:
|
3497 | bc51c5c9 | bellard | mask = 0xfffff;
|
3498 | bc51c5c9 | bellard | op = get16 (); |
3499 | bc51c5c9 | bellard | break;
|
3500 | bc51c5c9 | bellard | default:
|
3501 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
3502 | bc51c5c9 | bellard | return;
|
3503 | bc51c5c9 | bellard | } |
3504 | bc51c5c9 | bellard | |
3505 | bc51c5c9 | bellard | op &= mask; |
3506 | bc51c5c9 | bellard | scratchbuf[0] = '$'; |
3507 | bc51c5c9 | bellard | print_operand_value (scratchbuf + 1, 1, op); |
3508 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3509 | bc51c5c9 | bellard | scratchbuf[0] = '\0'; |
3510 | bc51c5c9 | bellard | } |
3511 | bc51c5c9 | bellard | |
3512 | bc51c5c9 | bellard | static void |
3513 | bc51c5c9 | bellard | OP_I64 (bytemode, sizeflag) |
3514 | dc99065b | bellard | int bytemode;
|
3515 | bc51c5c9 | bellard | int sizeflag;
|
3516 | dc99065b | bellard | { |
3517 | bc51c5c9 | bellard | bfd_signed_vma op; |
3518 | bc51c5c9 | bellard | bfd_signed_vma mask = -1;
|
3519 | bc51c5c9 | bellard | |
3520 | bc51c5c9 | bellard | if (!mode_64bit)
|
3521 | bc51c5c9 | bellard | { |
3522 | bc51c5c9 | bellard | OP_I (bytemode, sizeflag); |
3523 | bc51c5c9 | bellard | return;
|
3524 | bc51c5c9 | bellard | } |
3525 | bc51c5c9 | bellard | |
3526 | bc51c5c9 | bellard | switch (bytemode)
|
3527 | dc99065b | bellard | { |
3528 | dc99065b | bellard | case b_mode:
|
3529 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3530 | bc51c5c9 | bellard | op = *codep++; |
3531 | bc51c5c9 | bellard | mask = 0xff;
|
3532 | dc99065b | bellard | break;
|
3533 | dc99065b | bellard | case v_mode:
|
3534 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3535 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3536 | bc51c5c9 | bellard | op = get64 (); |
3537 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
3538 | bc51c5c9 | bellard | { |
3539 | bc51c5c9 | bellard | op = get32 (); |
3540 | bc51c5c9 | bellard | mask = 0xffffffff;
|
3541 | bc51c5c9 | bellard | } |
3542 | dc99065b | bellard | else
|
3543 | bc51c5c9 | bellard | { |
3544 | bc51c5c9 | bellard | op = get16 (); |
3545 | bc51c5c9 | bellard | mask = 0xfffff;
|
3546 | bc51c5c9 | bellard | } |
3547 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3548 | dc99065b | bellard | break;
|
3549 | dc99065b | bellard | case w_mode:
|
3550 | bc51c5c9 | bellard | mask = 0xfffff;
|
3551 | dc99065b | bellard | op = get16 (); |
3552 | dc99065b | bellard | break;
|
3553 | dc99065b | bellard | default:
|
3554 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
3555 | bc51c5c9 | bellard | return;
|
3556 | dc99065b | bellard | } |
3557 | bc51c5c9 | bellard | |
3558 | bc51c5c9 | bellard | op &= mask; |
3559 | bc51c5c9 | bellard | scratchbuf[0] = '$'; |
3560 | bc51c5c9 | bellard | print_operand_value (scratchbuf + 1, 1, op); |
3561 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3562 | bc51c5c9 | bellard | scratchbuf[0] = '\0'; |
3563 | dc99065b | bellard | } |
3564 | dc99065b | bellard | |
3565 | bc51c5c9 | bellard | static void |
3566 | bc51c5c9 | bellard | OP_sI (bytemode, sizeflag) |
3567 | dc99065b | bellard | int bytemode;
|
3568 | bc51c5c9 | bellard | int sizeflag;
|
3569 | dc99065b | bellard | { |
3570 | bc51c5c9 | bellard | bfd_signed_vma op; |
3571 | bc51c5c9 | bellard | bfd_signed_vma mask = -1;
|
3572 | bc51c5c9 | bellard | |
3573 | bc51c5c9 | bellard | switch (bytemode)
|
3574 | dc99065b | bellard | { |
3575 | dc99065b | bellard | case b_mode:
|
3576 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3577 | dc99065b | bellard | op = *codep++; |
3578 | dc99065b | bellard | if ((op & 0x80) != 0) |
3579 | dc99065b | bellard | op -= 0x100;
|
3580 | bc51c5c9 | bellard | mask = 0xffffffff;
|
3581 | dc99065b | bellard | break;
|
3582 | dc99065b | bellard | case v_mode:
|
3583 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3584 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3585 | bc51c5c9 | bellard | op = get32s (); |
3586 | bc51c5c9 | bellard | else if (sizeflag & DFLAG) |
3587 | bc51c5c9 | bellard | { |
3588 | bc51c5c9 | bellard | op = get32s (); |
3589 | bc51c5c9 | bellard | mask = 0xffffffff;
|
3590 | bc51c5c9 | bellard | } |
3591 | dc99065b | bellard | else
|
3592 | dc99065b | bellard | { |
3593 | bc51c5c9 | bellard | mask = 0xffffffff;
|
3594 | bc51c5c9 | bellard | op = get16 (); |
3595 | dc99065b | bellard | if ((op & 0x8000) != 0) |
3596 | dc99065b | bellard | op -= 0x10000;
|
3597 | dc99065b | bellard | } |
3598 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3599 | dc99065b | bellard | break;
|
3600 | dc99065b | bellard | case w_mode:
|
3601 | dc99065b | bellard | op = get16 (); |
3602 | bc51c5c9 | bellard | mask = 0xffffffff;
|
3603 | dc99065b | bellard | if ((op & 0x8000) != 0) |
3604 | dc99065b | bellard | op -= 0x10000;
|
3605 | dc99065b | bellard | break;
|
3606 | dc99065b | bellard | default:
|
3607 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
3608 | bc51c5c9 | bellard | return;
|
3609 | dc99065b | bellard | } |
3610 | bc51c5c9 | bellard | |
3611 | bc51c5c9 | bellard | scratchbuf[0] = '$'; |
3612 | bc51c5c9 | bellard | print_operand_value (scratchbuf + 1, 1, op); |
3613 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3614 | dc99065b | bellard | } |
3615 | dc99065b | bellard | |
3616 | bc51c5c9 | bellard | static void |
3617 | bc51c5c9 | bellard | OP_J (bytemode, sizeflag) |
3618 | dc99065b | bellard | int bytemode;
|
3619 | bc51c5c9 | bellard | int sizeflag;
|
3620 | dc99065b | bellard | { |
3621 | bc51c5c9 | bellard | bfd_vma disp; |
3622 | bc51c5c9 | bellard | bfd_vma mask = -1;
|
3623 | bc51c5c9 | bellard | |
3624 | bc51c5c9 | bellard | switch (bytemode)
|
3625 | dc99065b | bellard | { |
3626 | dc99065b | bellard | case b_mode:
|
3627 | dc99065b | bellard | FETCH_DATA (the_info, codep + 1);
|
3628 | dc99065b | bellard | disp = *codep++; |
3629 | dc99065b | bellard | if ((disp & 0x80) != 0) |
3630 | dc99065b | bellard | disp -= 0x100;
|
3631 | dc99065b | bellard | break;
|
3632 | dc99065b | bellard | case v_mode:
|
3633 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
3634 | bc51c5c9 | bellard | disp = get32s (); |
3635 | dc99065b | bellard | else
|
3636 | dc99065b | bellard | { |
3637 | dc99065b | bellard | disp = get16 (); |
3638 | bc51c5c9 | bellard | /* For some reason, a data16 prefix on a jump instruction
|
3639 | dc99065b | bellard | means that the pc is masked to 16 bits after the
|
3640 | dc99065b | bellard | displacement is added! */
|
3641 | dc99065b | bellard | mask = 0xffff;
|
3642 | dc99065b | bellard | } |
3643 | dc99065b | bellard | break;
|
3644 | dc99065b | bellard | default:
|
3645 | bc51c5c9 | bellard | oappend (INTERNAL_DISASSEMBLER_ERROR); |
3646 | bc51c5c9 | bellard | return;
|
3647 | dc99065b | bellard | } |
3648 | dc99065b | bellard | disp = (start_pc + codep - start_codep + disp) & mask; |
3649 | bc51c5c9 | bellard | set_op (disp, 0);
|
3650 | bc51c5c9 | bellard | print_operand_value (scratchbuf, 1, disp);
|
3651 | dc99065b | bellard | oappend (scratchbuf); |
3652 | dc99065b | bellard | } |
3653 | dc99065b | bellard | |
3654 | bc51c5c9 | bellard | static void |
3655 | bc51c5c9 | bellard | OP_SEG (dummy, sizeflag) |
3656 | dc99065b | bellard | int dummy;
|
3657 | bc51c5c9 | bellard | int sizeflag;
|
3658 | dc99065b | bellard | { |
3659 | bc51c5c9 | bellard | oappend (names_seg[reg]); |
3660 | dc99065b | bellard | } |
3661 | dc99065b | bellard | |
3662 | bc51c5c9 | bellard | static void |
3663 | bc51c5c9 | bellard | OP_DIR (dummy, sizeflag) |
3664 | bc51c5c9 | bellard | int dummy;
|
3665 | bc51c5c9 | bellard | int sizeflag;
|
3666 | dc99065b | bellard | { |
3667 | dc99065b | bellard | int seg, offset;
|
3668 | bc51c5c9 | bellard | |
3669 | bc51c5c9 | bellard | if (sizeflag & DFLAG)
|
3670 | dc99065b | bellard | { |
3671 | bc51c5c9 | bellard | offset = get32 (); |
3672 | bc51c5c9 | bellard | seg = get16 (); |
3673 | dc99065b | bellard | } |
3674 | bc51c5c9 | bellard | else
|
3675 | bc51c5c9 | bellard | { |
3676 | bc51c5c9 | bellard | offset = get16 (); |
3677 | bc51c5c9 | bellard | seg = get16 (); |
3678 | bc51c5c9 | bellard | } |
3679 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3680 | bc51c5c9 | bellard | if (intel_syntax)
|
3681 | bc51c5c9 | bellard | sprintf (scratchbuf, "0x%x,0x%x", seg, offset);
|
3682 | bc51c5c9 | bellard | else
|
3683 | bc51c5c9 | bellard | sprintf (scratchbuf, "$0x%x,$0x%x", seg, offset);
|
3684 | bc51c5c9 | bellard | oappend (scratchbuf); |
3685 | dc99065b | bellard | } |
3686 | dc99065b | bellard | |
3687 | bc51c5c9 | bellard | static void |
3688 | bc51c5c9 | bellard | OP_OFF (bytemode, sizeflag) |
3689 | dc99065b | bellard | int bytemode;
|
3690 | bc51c5c9 | bellard | int sizeflag;
|
3691 | dc99065b | bellard | { |
3692 | bc51c5c9 | bellard | bfd_vma off; |
3693 | dc99065b | bellard | |
3694 | bc51c5c9 | bellard | append_seg (); |
3695 | dc99065b | bellard | |
3696 | bc51c5c9 | bellard | if ((sizeflag & AFLAG) || mode_64bit)
|
3697 | dc99065b | bellard | off = get32 (); |
3698 | dc99065b | bellard | else
|
3699 | dc99065b | bellard | off = get16 (); |
3700 | bc51c5c9 | bellard | |
3701 | bc51c5c9 | bellard | if (intel_syntax)
|
3702 | bc51c5c9 | bellard | { |
3703 | bc51c5c9 | bellard | if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
3704 | bc51c5c9 | bellard | | PREFIX_ES | PREFIX_FS | PREFIX_GS))) |
3705 | bc51c5c9 | bellard | { |
3706 | bc51c5c9 | bellard | oappend (names_seg[ds_reg - es_reg]); |
3707 | bc51c5c9 | bellard | oappend (":");
|
3708 | bc51c5c9 | bellard | } |
3709 | bc51c5c9 | bellard | } |
3710 | bc51c5c9 | bellard | print_operand_value (scratchbuf, 1, off);
|
3711 | dc99065b | bellard | oappend (scratchbuf); |
3712 | dc99065b | bellard | } |
3713 | dc99065b | bellard | |
3714 | bc51c5c9 | bellard | static void |
3715 | bc51c5c9 | bellard | OP_OFF64 (bytemode, sizeflag) |
3716 | bc51c5c9 | bellard | int bytemode;
|
3717 | bc51c5c9 | bellard | int sizeflag;
|
3718 | dc99065b | bellard | { |
3719 | bc51c5c9 | bellard | bfd_vma off; |
3720 | bc51c5c9 | bellard | |
3721 | bc51c5c9 | bellard | if (!mode_64bit)
|
3722 | bc51c5c9 | bellard | { |
3723 | bc51c5c9 | bellard | OP_OFF (bytemode, sizeflag); |
3724 | bc51c5c9 | bellard | return;
|
3725 | bc51c5c9 | bellard | } |
3726 | bc51c5c9 | bellard | |
3727 | bc51c5c9 | bellard | append_seg (); |
3728 | bc51c5c9 | bellard | |
3729 | bc51c5c9 | bellard | off = get64 (); |
3730 | bc51c5c9 | bellard | |
3731 | bc51c5c9 | bellard | if (intel_syntax)
|
3732 | bc51c5c9 | bellard | { |
3733 | bc51c5c9 | bellard | if (!(prefixes & (PREFIX_CS | PREFIX_SS | PREFIX_DS
|
3734 | bc51c5c9 | bellard | | PREFIX_ES | PREFIX_FS | PREFIX_GS))) |
3735 | bc51c5c9 | bellard | { |
3736 | bc51c5c9 | bellard | oappend (names_seg[ds_reg - es_reg]); |
3737 | bc51c5c9 | bellard | oappend (":");
|
3738 | bc51c5c9 | bellard | } |
3739 | bc51c5c9 | bellard | } |
3740 | bc51c5c9 | bellard | print_operand_value (scratchbuf, 1, off);
|
3741 | bc51c5c9 | bellard | oappend (scratchbuf); |
3742 | dc99065b | bellard | } |
3743 | dc99065b | bellard | |
3744 | bc51c5c9 | bellard | static void |
3745 | bc51c5c9 | bellard | ptr_reg (code, sizeflag) |
3746 | bc51c5c9 | bellard | int code;
|
3747 | bc51c5c9 | bellard | int sizeflag;
|
3748 | bc51c5c9 | bellard | { |
3749 | bc51c5c9 | bellard | const char *s; |
3750 | bc51c5c9 | bellard | if (intel_syntax)
|
3751 | bc51c5c9 | bellard | oappend ("[");
|
3752 | bc51c5c9 | bellard | else
|
3753 | bc51c5c9 | bellard | oappend ("(");
|
3754 | bc51c5c9 | bellard | |
3755 | bc51c5c9 | bellard | USED_REX (REX_MODE64); |
3756 | bc51c5c9 | bellard | if (rex & REX_MODE64)
|
3757 | bc51c5c9 | bellard | { |
3758 | bc51c5c9 | bellard | if (!(sizeflag & AFLAG))
|
3759 | bc51c5c9 | bellard | s = names32[code - eAX_reg]; |
3760 | bc51c5c9 | bellard | else
|
3761 | bc51c5c9 | bellard | s = names64[code - eAX_reg]; |
3762 | bc51c5c9 | bellard | } |
3763 | bc51c5c9 | bellard | else if (sizeflag & AFLAG) |
3764 | bc51c5c9 | bellard | s = names32[code - eAX_reg]; |
3765 | bc51c5c9 | bellard | else
|
3766 | bc51c5c9 | bellard | s = names16[code - eAX_reg]; |
3767 | bc51c5c9 | bellard | oappend (s); |
3768 | bc51c5c9 | bellard | if (intel_syntax)
|
3769 | bc51c5c9 | bellard | oappend ("]");
|
3770 | bc51c5c9 | bellard | else
|
3771 | bc51c5c9 | bellard | oappend (")");
|
3772 | bc51c5c9 | bellard | } |
3773 | bc51c5c9 | bellard | |
3774 | bc51c5c9 | bellard | static void |
3775 | bc51c5c9 | bellard | OP_ESreg (code, sizeflag) |
3776 | bc51c5c9 | bellard | int code;
|
3777 | bc51c5c9 | bellard | int sizeflag;
|
3778 | bc51c5c9 | bellard | { |
3779 | bc51c5c9 | bellard | oappend ("%es:" + intel_syntax);
|
3780 | bc51c5c9 | bellard | ptr_reg (code, sizeflag); |
3781 | bc51c5c9 | bellard | } |
3782 | bc51c5c9 | bellard | |
3783 | bc51c5c9 | bellard | static void |
3784 | bc51c5c9 | bellard | OP_DSreg (code, sizeflag) |
3785 | bc51c5c9 | bellard | int code;
|
3786 | bc51c5c9 | bellard | int sizeflag;
|
3787 | dc99065b | bellard | { |
3788 | dc99065b | bellard | if ((prefixes
|
3789 | dc99065b | bellard | & (PREFIX_CS |
3790 | dc99065b | bellard | | PREFIX_DS |
3791 | dc99065b | bellard | | PREFIX_SS |
3792 | dc99065b | bellard | | PREFIX_ES |
3793 | dc99065b | bellard | | PREFIX_FS |
3794 | dc99065b | bellard | | PREFIX_GS)) == 0)
|
3795 | dc99065b | bellard | prefixes |= PREFIX_DS; |
3796 | bc51c5c9 | bellard | append_seg (); |
3797 | bc51c5c9 | bellard | ptr_reg (code, sizeflag); |
3798 | dc99065b | bellard | } |
3799 | dc99065b | bellard | |
3800 | bc51c5c9 | bellard | static void |
3801 | bc51c5c9 | bellard | OP_C (dummy, sizeflag) |
3802 | dc99065b | bellard | int dummy;
|
3803 | bc51c5c9 | bellard | int sizeflag;
|
3804 | dc99065b | bellard | { |
3805 | bc51c5c9 | bellard | int add = 0; |
3806 | bc51c5c9 | bellard | USED_REX (REX_EXTX); |
3807 | bc51c5c9 | bellard | if (rex & REX_EXTX)
|
3808 | bc51c5c9 | bellard | add = 8;
|
3809 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%cr%d", reg + add);
|
3810 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3811 | dc99065b | bellard | } |
3812 | dc99065b | bellard | |
3813 | bc51c5c9 | bellard | static void |
3814 | bc51c5c9 | bellard | OP_D (dummy, sizeflag) |
3815 | dc99065b | bellard | int dummy;
|
3816 | bc51c5c9 | bellard | int sizeflag;
|
3817 | dc99065b | bellard | { |
3818 | bc51c5c9 | bellard | int add = 0; |
3819 | bc51c5c9 | bellard | USED_REX (REX_EXTX); |
3820 | bc51c5c9 | bellard | if (rex & REX_EXTX)
|
3821 | bc51c5c9 | bellard | add = 8;
|
3822 | bc51c5c9 | bellard | if (intel_syntax)
|
3823 | bc51c5c9 | bellard | sprintf (scratchbuf, "db%d", reg + add);
|
3824 | bc51c5c9 | bellard | else
|
3825 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%db%d", reg + add);
|
3826 | dc99065b | bellard | oappend (scratchbuf); |
3827 | dc99065b | bellard | } |
3828 | dc99065b | bellard | |
3829 | bc51c5c9 | bellard | static void |
3830 | bc51c5c9 | bellard | OP_T (dummy, sizeflag) |
3831 | dc99065b | bellard | int dummy;
|
3832 | bc51c5c9 | bellard | int sizeflag;
|
3833 | dc99065b | bellard | { |
3834 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%tr%d", reg);
|
3835 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3836 | dc99065b | bellard | } |
3837 | dc99065b | bellard | |
3838 | bc51c5c9 | bellard | static void |
3839 | bc51c5c9 | bellard | OP_Rd (bytemode, sizeflag) |
3840 | bc51c5c9 | bellard | int bytemode;
|
3841 | bc51c5c9 | bellard | int sizeflag;
|
3842 | dc99065b | bellard | { |
3843 | bc51c5c9 | bellard | if (mod == 3) |
3844 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
3845 | bc51c5c9 | bellard | else
|
3846 | bc51c5c9 | bellard | BadOp (); |
3847 | dc99065b | bellard | } |
3848 | dc99065b | bellard | |
3849 | bc51c5c9 | bellard | static void |
3850 | bc51c5c9 | bellard | OP_MMX (bytemode, sizeflag) |
3851 | dc99065b | bellard | int bytemode;
|
3852 | bc51c5c9 | bellard | int sizeflag;
|
3853 | dc99065b | bellard | { |
3854 | bc51c5c9 | bellard | int add = 0; |
3855 | bc51c5c9 | bellard | USED_REX (REX_EXTX); |
3856 | bc51c5c9 | bellard | if (rex & REX_EXTX)
|
3857 | bc51c5c9 | bellard | add = 8;
|
3858 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3859 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
3860 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%xmm%d", reg + add);
|
3861 | bc51c5c9 | bellard | else
|
3862 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%mm%d", reg + add);
|
3863 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3864 | dc99065b | bellard | } |
3865 | dc99065b | bellard | |
3866 | bc51c5c9 | bellard | static void |
3867 | bc51c5c9 | bellard | OP_XMM (bytemode, sizeflag) |
3868 | dc99065b | bellard | int bytemode;
|
3869 | bc51c5c9 | bellard | int sizeflag;
|
3870 | dc99065b | bellard | { |
3871 | bc51c5c9 | bellard | int add = 0; |
3872 | bc51c5c9 | bellard | USED_REX (REX_EXTX); |
3873 | bc51c5c9 | bellard | if (rex & REX_EXTX)
|
3874 | bc51c5c9 | bellard | add = 8;
|
3875 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%xmm%d", reg + add);
|
3876 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3877 | dc99065b | bellard | } |
3878 | dc99065b | bellard | |
3879 | bc51c5c9 | bellard | static void |
3880 | bc51c5c9 | bellard | OP_EM (bytemode, sizeflag) |
3881 | dc99065b | bellard | int bytemode;
|
3882 | bc51c5c9 | bellard | int sizeflag;
|
3883 | dc99065b | bellard | { |
3884 | bc51c5c9 | bellard | int add = 0; |
3885 | dc99065b | bellard | if (mod != 3) |
3886 | bc51c5c9 | bellard | { |
3887 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
3888 | bc51c5c9 | bellard | return;
|
3889 | bc51c5c9 | bellard | } |
3890 | bc51c5c9 | bellard | USED_REX (REX_EXTZ); |
3891 | bc51c5c9 | bellard | if (rex & REX_EXTZ)
|
3892 | bc51c5c9 | bellard | add = 8;
|
3893 | dc99065b | bellard | |
3894 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
3895 | bc51c5c9 | bellard | MODRM_CHECK; |
3896 | dc99065b | bellard | codep++; |
3897 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
3898 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
3899 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%xmm%d", rm + add);
|
3900 | bc51c5c9 | bellard | else
|
3901 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%mm%d", rm + add);
|
3902 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3903 | dc99065b | bellard | } |
3904 | dc99065b | bellard | |
3905 | bc51c5c9 | bellard | static void |
3906 | bc51c5c9 | bellard | OP_EX (bytemode, sizeflag) |
3907 | dc99065b | bellard | int bytemode;
|
3908 | bc51c5c9 | bellard | int sizeflag;
|
3909 | dc99065b | bellard | { |
3910 | bc51c5c9 | bellard | int add = 0; |
3911 | bc51c5c9 | bellard | if (mod != 3) |
3912 | bc51c5c9 | bellard | { |
3913 | bc51c5c9 | bellard | OP_E (bytemode, sizeflag); |
3914 | bc51c5c9 | bellard | return;
|
3915 | bc51c5c9 | bellard | } |
3916 | bc51c5c9 | bellard | USED_REX (REX_EXTZ); |
3917 | bc51c5c9 | bellard | if (rex & REX_EXTZ)
|
3918 | bc51c5c9 | bellard | add = 8;
|
3919 | bc51c5c9 | bellard | |
3920 | bc51c5c9 | bellard | /* Skip mod/rm byte. */
|
3921 | bc51c5c9 | bellard | MODRM_CHECK; |
3922 | bc51c5c9 | bellard | codep++; |
3923 | bc51c5c9 | bellard | sprintf (scratchbuf, "%%xmm%d", rm + add);
|
3924 | bc51c5c9 | bellard | oappend (scratchbuf + intel_syntax); |
3925 | bc51c5c9 | bellard | } |
3926 | bc51c5c9 | bellard | |
3927 | bc51c5c9 | bellard | static void |
3928 | bc51c5c9 | bellard | OP_MS (bytemode, sizeflag) |
3929 | bc51c5c9 | bellard | int bytemode;
|
3930 | bc51c5c9 | bellard | int sizeflag;
|
3931 | bc51c5c9 | bellard | { |
3932 | bc51c5c9 | bellard | if (mod == 3) |
3933 | bc51c5c9 | bellard | OP_EM (bytemode, sizeflag); |
3934 | bc51c5c9 | bellard | else
|
3935 | bc51c5c9 | bellard | BadOp (); |
3936 | bc51c5c9 | bellard | } |
3937 | bc51c5c9 | bellard | |
3938 | bc51c5c9 | bellard | static void |
3939 | bc51c5c9 | bellard | OP_XS (bytemode, sizeflag) |
3940 | bc51c5c9 | bellard | int bytemode;
|
3941 | bc51c5c9 | bellard | int sizeflag;
|
3942 | bc51c5c9 | bellard | { |
3943 | bc51c5c9 | bellard | if (mod == 3) |
3944 | bc51c5c9 | bellard | OP_EX (bytemode, sizeflag); |
3945 | bc51c5c9 | bellard | else
|
3946 | bc51c5c9 | bellard | BadOp (); |
3947 | bc51c5c9 | bellard | } |
3948 | bc51c5c9 | bellard | |
3949 | bc51c5c9 | bellard | static const char *Suffix3DNow[] = { |
3950 | bc51c5c9 | bellard | /* 00 */ NULL, NULL, NULL, NULL, |
3951 | bc51c5c9 | bellard | /* 04 */ NULL, NULL, NULL, NULL, |
3952 | bc51c5c9 | bellard | /* 08 */ NULL, NULL, NULL, NULL, |
3953 | bc51c5c9 | bellard | /* 0C */ "pi2fw", "pi2fd", NULL, NULL, |
3954 | bc51c5c9 | bellard | /* 10 */ NULL, NULL, NULL, NULL, |
3955 | bc51c5c9 | bellard | /* 14 */ NULL, NULL, NULL, NULL, |
3956 | bc51c5c9 | bellard | /* 18 */ NULL, NULL, NULL, NULL, |
3957 | bc51c5c9 | bellard | /* 1C */ "pf2iw", "pf2id", NULL, NULL, |
3958 | bc51c5c9 | bellard | /* 20 */ NULL, NULL, NULL, NULL, |
3959 | bc51c5c9 | bellard | /* 24 */ NULL, NULL, NULL, NULL, |
3960 | bc51c5c9 | bellard | /* 28 */ NULL, NULL, NULL, NULL, |
3961 | bc51c5c9 | bellard | /* 2C */ NULL, NULL, NULL, NULL, |
3962 | bc51c5c9 | bellard | /* 30 */ NULL, NULL, NULL, NULL, |
3963 | bc51c5c9 | bellard | /* 34 */ NULL, NULL, NULL, NULL, |
3964 | bc51c5c9 | bellard | /* 38 */ NULL, NULL, NULL, NULL, |
3965 | bc51c5c9 | bellard | /* 3C */ NULL, NULL, NULL, NULL, |
3966 | bc51c5c9 | bellard | /* 40 */ NULL, NULL, NULL, NULL, |
3967 | bc51c5c9 | bellard | /* 44 */ NULL, NULL, NULL, NULL, |
3968 | bc51c5c9 | bellard | /* 48 */ NULL, NULL, NULL, NULL, |
3969 | bc51c5c9 | bellard | /* 4C */ NULL, NULL, NULL, NULL, |
3970 | bc51c5c9 | bellard | /* 50 */ NULL, NULL, NULL, NULL, |
3971 | bc51c5c9 | bellard | /* 54 */ NULL, NULL, NULL, NULL, |
3972 | bc51c5c9 | bellard | /* 58 */ NULL, NULL, NULL, NULL, |
3973 | bc51c5c9 | bellard | /* 5C */ NULL, NULL, NULL, NULL, |
3974 | bc51c5c9 | bellard | /* 60 */ NULL, NULL, NULL, NULL, |
3975 | bc51c5c9 | bellard | /* 64 */ NULL, NULL, NULL, NULL, |
3976 | bc51c5c9 | bellard | /* 68 */ NULL, NULL, NULL, NULL, |
3977 | bc51c5c9 | bellard | /* 6C */ NULL, NULL, NULL, NULL, |
3978 | bc51c5c9 | bellard | /* 70 */ NULL, NULL, NULL, NULL, |
3979 | bc51c5c9 | bellard | /* 74 */ NULL, NULL, NULL, NULL, |
3980 | bc51c5c9 | bellard | /* 78 */ NULL, NULL, NULL, NULL, |
3981 | bc51c5c9 | bellard | /* 7C */ NULL, NULL, NULL, NULL, |
3982 | bc51c5c9 | bellard | /* 80 */ NULL, NULL, NULL, NULL, |
3983 | bc51c5c9 | bellard | /* 84 */ NULL, NULL, NULL, NULL, |
3984 | bc51c5c9 | bellard | /* 88 */ NULL, NULL, "pfnacc", NULL, |
3985 | bc51c5c9 | bellard | /* 8C */ NULL, NULL, "pfpnacc", NULL, |
3986 | bc51c5c9 | bellard | /* 90 */ "pfcmpge", NULL, NULL, NULL, |
3987 | bc51c5c9 | bellard | /* 94 */ "pfmin", NULL, "pfrcp", "pfrsqrt", |
3988 | bc51c5c9 | bellard | /* 98 */ NULL, NULL, "pfsub", NULL, |
3989 | bc51c5c9 | bellard | /* 9C */ NULL, NULL, "pfadd", NULL, |
3990 | bc51c5c9 | bellard | /* A0 */ "pfcmpgt", NULL, NULL, NULL, |
3991 | bc51c5c9 | bellard | /* A4 */ "pfmax", NULL, "pfrcpit1", "pfrsqit1", |
3992 | bc51c5c9 | bellard | /* A8 */ NULL, NULL, "pfsubr", NULL, |
3993 | bc51c5c9 | bellard | /* AC */ NULL, NULL, "pfacc", NULL, |
3994 | bc51c5c9 | bellard | /* B0 */ "pfcmpeq", NULL, NULL, NULL, |
3995 | bc51c5c9 | bellard | /* B4 */ "pfmul", NULL, "pfrcpit2", "pfmulhrw", |
3996 | bc51c5c9 | bellard | /* B8 */ NULL, NULL, NULL, "pswapd", |
3997 | bc51c5c9 | bellard | /* BC */ NULL, NULL, NULL, "pavgusb", |
3998 | bc51c5c9 | bellard | /* C0 */ NULL, NULL, NULL, NULL, |
3999 | bc51c5c9 | bellard | /* C4 */ NULL, NULL, NULL, NULL, |
4000 | bc51c5c9 | bellard | /* C8 */ NULL, NULL, NULL, NULL, |
4001 | bc51c5c9 | bellard | /* CC */ NULL, NULL, NULL, NULL, |
4002 | bc51c5c9 | bellard | /* D0 */ NULL, NULL, NULL, NULL, |
4003 | bc51c5c9 | bellard | /* D4 */ NULL, NULL, NULL, NULL, |
4004 | bc51c5c9 | bellard | /* D8 */ NULL, NULL, NULL, NULL, |
4005 | bc51c5c9 | bellard | /* DC */ NULL, NULL, NULL, NULL, |
4006 | bc51c5c9 | bellard | /* E0 */ NULL, NULL, NULL, NULL, |
4007 | bc51c5c9 | bellard | /* E4 */ NULL, NULL, NULL, NULL, |
4008 | bc51c5c9 | bellard | /* E8 */ NULL, NULL, NULL, NULL, |
4009 | bc51c5c9 | bellard | /* EC */ NULL, NULL, NULL, NULL, |
4010 | bc51c5c9 | bellard | /* F0 */ NULL, NULL, NULL, NULL, |
4011 | bc51c5c9 | bellard | /* F4 */ NULL, NULL, NULL, NULL, |
4012 | bc51c5c9 | bellard | /* F8 */ NULL, NULL, NULL, NULL, |
4013 | bc51c5c9 | bellard | /* FC */ NULL, NULL, NULL, NULL, |
4014 | bc51c5c9 | bellard | }; |
4015 | bc51c5c9 | bellard | |
4016 | bc51c5c9 | bellard | static void |
4017 | bc51c5c9 | bellard | OP_3DNowSuffix (bytemode, sizeflag) |
4018 | bc51c5c9 | bellard | int bytemode;
|
4019 | bc51c5c9 | bellard | int sizeflag;
|
4020 | bc51c5c9 | bellard | { |
4021 | bc51c5c9 | bellard | const char *mnemonic; |
4022 | bc51c5c9 | bellard | |
4023 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 1);
|
4024 | bc51c5c9 | bellard | /* AMD 3DNow! instructions are specified by an opcode suffix in the
|
4025 | bc51c5c9 | bellard | place where an 8-bit immediate would normally go. ie. the last
|
4026 | bc51c5c9 | bellard | byte of the instruction. */
|
4027 | bc51c5c9 | bellard | obufp = obuf + strlen (obuf); |
4028 | bc51c5c9 | bellard | mnemonic = Suffix3DNow[*codep++ & 0xff];
|
4029 | bc51c5c9 | bellard | if (mnemonic)
|
4030 | bc51c5c9 | bellard | oappend (mnemonic); |
4031 | bc51c5c9 | bellard | else
|
4032 | bc51c5c9 | bellard | { |
4033 | bc51c5c9 | bellard | /* Since a variable sized modrm/sib chunk is between the start
|
4034 | bc51c5c9 | bellard | of the opcode (0x0f0f) and the opcode suffix, we need to do
|
4035 | bc51c5c9 | bellard | all the modrm processing first, and don't know until now that
|
4036 | bc51c5c9 | bellard | we have a bad opcode. This necessitates some cleaning up. */
|
4037 | bc51c5c9 | bellard | op1out[0] = '\0'; |
4038 | bc51c5c9 | bellard | op2out[0] = '\0'; |
4039 | bc51c5c9 | bellard | BadOp (); |
4040 | bc51c5c9 | bellard | } |
4041 | bc51c5c9 | bellard | } |
4042 | bc51c5c9 | bellard | |
4043 | bc51c5c9 | bellard | static const char *simd_cmp_op[] = { |
4044 | bc51c5c9 | bellard | "eq",
|
4045 | bc51c5c9 | bellard | "lt",
|
4046 | bc51c5c9 | bellard | "le",
|
4047 | bc51c5c9 | bellard | "unord",
|
4048 | bc51c5c9 | bellard | "neq",
|
4049 | bc51c5c9 | bellard | "nlt",
|
4050 | bc51c5c9 | bellard | "nle",
|
4051 | bc51c5c9 | bellard | "ord"
|
4052 | bc51c5c9 | bellard | }; |
4053 | bc51c5c9 | bellard | |
4054 | bc51c5c9 | bellard | static void |
4055 | bc51c5c9 | bellard | OP_SIMD_Suffix (bytemode, sizeflag) |
4056 | bc51c5c9 | bellard | int bytemode;
|
4057 | bc51c5c9 | bellard | int sizeflag;
|
4058 | bc51c5c9 | bellard | { |
4059 | bc51c5c9 | bellard | unsigned int cmp_type; |
4060 | bc51c5c9 | bellard | |
4061 | bc51c5c9 | bellard | FETCH_DATA (the_info, codep + 1);
|
4062 | bc51c5c9 | bellard | obufp = obuf + strlen (obuf); |
4063 | bc51c5c9 | bellard | cmp_type = *codep++ & 0xff;
|
4064 | bc51c5c9 | bellard | if (cmp_type < 8) |
4065 | bc51c5c9 | bellard | { |
4066 | bc51c5c9 | bellard | char suffix1 = 'p', suffix2 = 's'; |
4067 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPZ); |
4068 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPZ)
|
4069 | bc51c5c9 | bellard | suffix1 = 's';
|
4070 | bc51c5c9 | bellard | else
|
4071 | bc51c5c9 | bellard | { |
4072 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_DATA); |
4073 | bc51c5c9 | bellard | if (prefixes & PREFIX_DATA)
|
4074 | bc51c5c9 | bellard | suffix2 = 'd';
|
4075 | bc51c5c9 | bellard | else
|
4076 | bc51c5c9 | bellard | { |
4077 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPNZ); |
4078 | bc51c5c9 | bellard | if (prefixes & PREFIX_REPNZ)
|
4079 | bc51c5c9 | bellard | suffix1 = 's', suffix2 = 'd'; |
4080 | bc51c5c9 | bellard | } |
4081 | bc51c5c9 | bellard | } |
4082 | bc51c5c9 | bellard | sprintf (scratchbuf, "cmp%s%c%c",
|
4083 | bc51c5c9 | bellard | simd_cmp_op[cmp_type], suffix1, suffix2); |
4084 | bc51c5c9 | bellard | used_prefixes |= (prefixes & PREFIX_REPZ); |
4085 | bc51c5c9 | bellard | oappend (scratchbuf); |
4086 | bc51c5c9 | bellard | } |
4087 | bc51c5c9 | bellard | else
|
4088 | bc51c5c9 | bellard | { |
4089 | bc51c5c9 | bellard | /* We have a bad extension byte. Clean up. */
|
4090 | bc51c5c9 | bellard | op1out[0] = '\0'; |
4091 | bc51c5c9 | bellard | op2out[0] = '\0'; |
4092 | bc51c5c9 | bellard | BadOp (); |
4093 | bc51c5c9 | bellard | } |
4094 | bc51c5c9 | bellard | } |
4095 | bc51c5c9 | bellard | |
4096 | bc51c5c9 | bellard | static void |
4097 | bc51c5c9 | bellard | SIMD_Fixup (extrachar, sizeflag) |
4098 | bc51c5c9 | bellard | int extrachar;
|
4099 | bc51c5c9 | bellard | int sizeflag;
|
4100 | bc51c5c9 | bellard | { |
4101 | bc51c5c9 | bellard | /* Change movlps/movhps to movhlps/movlhps for 2 register operand
|
4102 | bc51c5c9 | bellard | forms of these instructions. */
|
4103 | bc51c5c9 | bellard | if (mod == 3) |
4104 | bc51c5c9 | bellard | { |
4105 | bc51c5c9 | bellard | char *p = obuf + strlen (obuf);
|
4106 | bc51c5c9 | bellard | *(p + 1) = '\0'; |
4107 | bc51c5c9 | bellard | *p = *(p - 1);
|
4108 | bc51c5c9 | bellard | *(p - 1) = *(p - 2); |
4109 | bc51c5c9 | bellard | *(p - 2) = *(p - 3); |
4110 | bc51c5c9 | bellard | *(p - 3) = extrachar;
|
4111 | bc51c5c9 | bellard | } |
4112 | bc51c5c9 | bellard | } |
4113 | bc51c5c9 | bellard | |
4114 | bc51c5c9 | bellard | static void |
4115 | bc51c5c9 | bellard | BadOp (void)
|
4116 | bc51c5c9 | bellard | { |
4117 | bc51c5c9 | bellard | /* Throw away prefixes and 1st. opcode byte. */
|
4118 | bc51c5c9 | bellard | codep = insn_codep + 1;
|
4119 | bc51c5c9 | bellard | oappend ("(bad)");
|
4120 | dc99065b | bellard | } |