root / hw / pc.c @ a245f2e7
History | View | Annotate | Download (30.3 kB)
1 |
/*
|
---|---|
2 |
* QEMU PC System Emulator
|
3 |
*
|
4 |
* Copyright (c) 2003-2004 Fabrice Bellard
|
5 |
*
|
6 |
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 |
* of this software and associated documentation files (the "Software"), to deal
|
8 |
* in the Software without restriction, including without limitation the rights
|
9 |
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 |
* copies of the Software, and to permit persons to whom the Software is
|
11 |
* furnished to do so, subject to the following conditions:
|
12 |
*
|
13 |
* The above copyright notice and this permission notice shall be included in
|
14 |
* all copies or substantial portions of the Software.
|
15 |
*
|
16 |
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 |
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 |
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 |
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 |
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 |
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 |
* THE SOFTWARE.
|
23 |
*/
|
24 |
#include "hw.h" |
25 |
#include "pc.h" |
26 |
#include "fdc.h" |
27 |
#include "pci.h" |
28 |
#include "block.h" |
29 |
#include "sysemu.h" |
30 |
#include "audio/audio.h" |
31 |
#include "net.h" |
32 |
#include "smbus.h" |
33 |
#include "boards.h" |
34 |
#include "console.h" |
35 |
|
36 |
/* output Bochs bios info messages */
|
37 |
//#define DEBUG_BIOS
|
38 |
|
39 |
#define BIOS_FILENAME "bios.bin" |
40 |
#define VGABIOS_FILENAME "vgabios.bin" |
41 |
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
42 |
|
43 |
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024) |
44 |
|
45 |
/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
|
46 |
#define ACPI_DATA_SIZE 0x10000 |
47 |
|
48 |
#define MAX_IDE_BUS 2 |
49 |
|
50 |
static fdctrl_t *floppy_controller;
|
51 |
static RTCState *rtc_state;
|
52 |
static PITState *pit;
|
53 |
static IOAPICState *ioapic;
|
54 |
static PCIDevice *i440fx_state;
|
55 |
|
56 |
static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
57 |
{ |
58 |
} |
59 |
|
60 |
/* MSDOS compatibility mode FPU exception support */
|
61 |
static qemu_irq ferr_irq;
|
62 |
/* XXX: add IGNNE support */
|
63 |
void cpu_set_ferr(CPUX86State *s)
|
64 |
{ |
65 |
qemu_irq_raise(ferr_irq); |
66 |
} |
67 |
|
68 |
static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
69 |
{ |
70 |
qemu_irq_lower(ferr_irq); |
71 |
} |
72 |
|
73 |
/* TSC handling */
|
74 |
uint64_t cpu_get_tsc(CPUX86State *env) |
75 |
{ |
76 |
/* Note: when using kqemu, it is more logical to return the host TSC
|
77 |
because kqemu does not trap the RDTSC instruction for
|
78 |
performance reasons */
|
79 |
#if USE_KQEMU
|
80 |
if (env->kqemu_enabled) {
|
81 |
return cpu_get_real_ticks();
|
82 |
} else
|
83 |
#endif
|
84 |
{ |
85 |
return cpu_get_ticks();
|
86 |
} |
87 |
} |
88 |
|
89 |
/* SMM support */
|
90 |
void cpu_smm_update(CPUState *env)
|
91 |
{ |
92 |
if (i440fx_state && env == first_cpu)
|
93 |
i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
|
94 |
} |
95 |
|
96 |
|
97 |
/* IRQ handling */
|
98 |
int cpu_get_pic_interrupt(CPUState *env)
|
99 |
{ |
100 |
int intno;
|
101 |
|
102 |
intno = apic_get_interrupt(env); |
103 |
if (intno >= 0) { |
104 |
/* set irq request if a PIC irq is still pending */
|
105 |
/* XXX: improve that */
|
106 |
pic_update_irq(isa_pic); |
107 |
return intno;
|
108 |
} |
109 |
/* read the irq from the PIC */
|
110 |
if (!apic_accept_pic_intr(env))
|
111 |
return -1; |
112 |
|
113 |
intno = pic_read_irq(isa_pic); |
114 |
return intno;
|
115 |
} |
116 |
|
117 |
static void pic_irq_request(void *opaque, int irq, int level) |
118 |
{ |
119 |
CPUState *env = first_cpu; |
120 |
|
121 |
if (!level)
|
122 |
return;
|
123 |
|
124 |
while (env) {
|
125 |
if (apic_accept_pic_intr(env))
|
126 |
apic_local_deliver(env, APIC_LINT0); |
127 |
env = env->next_cpu; |
128 |
} |
129 |
} |
130 |
|
131 |
/* PC cmos mappings */
|
132 |
|
133 |
#define REG_EQUIPMENT_BYTE 0x14 |
134 |
|
135 |
static int cmos_get_fd_drive_type(int fd0) |
136 |
{ |
137 |
int val;
|
138 |
|
139 |
switch (fd0) {
|
140 |
case 0: |
141 |
/* 1.44 Mb 3"5 drive */
|
142 |
val = 4;
|
143 |
break;
|
144 |
case 1: |
145 |
/* 2.88 Mb 3"5 drive */
|
146 |
val = 5;
|
147 |
break;
|
148 |
case 2: |
149 |
/* 1.2 Mb 5"5 drive */
|
150 |
val = 2;
|
151 |
break;
|
152 |
default:
|
153 |
val = 0;
|
154 |
break;
|
155 |
} |
156 |
return val;
|
157 |
} |
158 |
|
159 |
static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
160 |
{ |
161 |
RTCState *s = rtc_state; |
162 |
int cylinders, heads, sectors;
|
163 |
bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
164 |
rtc_set_memory(s, type_ofs, 47);
|
165 |
rtc_set_memory(s, info_ofs, cylinders); |
166 |
rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
167 |
rtc_set_memory(s, info_ofs + 2, heads);
|
168 |
rtc_set_memory(s, info_ofs + 3, 0xff); |
169 |
rtc_set_memory(s, info_ofs + 4, 0xff); |
170 |
rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
171 |
rtc_set_memory(s, info_ofs + 6, cylinders);
|
172 |
rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
173 |
rtc_set_memory(s, info_ofs + 8, sectors);
|
174 |
} |
175 |
|
176 |
/* convert boot_device letter to something recognizable by the bios */
|
177 |
static int boot_device2nibble(char boot_device) |
178 |
{ |
179 |
switch(boot_device) {
|
180 |
case 'a': |
181 |
case 'b': |
182 |
return 0x01; /* floppy boot */ |
183 |
case 'c': |
184 |
return 0x02; /* hard drive boot */ |
185 |
case 'd': |
186 |
return 0x03; /* CD-ROM boot */ |
187 |
case 'n': |
188 |
return 0x04; /* Network boot */ |
189 |
} |
190 |
return 0; |
191 |
} |
192 |
|
193 |
/* copy/pasted from cmos_init, should be made a general function
|
194 |
and used there as well */
|
195 |
static int pc_boot_set(void *opaque, const char *boot_device) |
196 |
{ |
197 |
#define PC_MAX_BOOT_DEVICES 3 |
198 |
RTCState *s = (RTCState *)opaque; |
199 |
int nbds, bds[3] = { 0, }; |
200 |
int i;
|
201 |
|
202 |
nbds = strlen(boot_device); |
203 |
if (nbds > PC_MAX_BOOT_DEVICES) {
|
204 |
term_printf("Too many boot devices for PC\n");
|
205 |
return(1); |
206 |
} |
207 |
for (i = 0; i < nbds; i++) { |
208 |
bds[i] = boot_device2nibble(boot_device[i]); |
209 |
if (bds[i] == 0) { |
210 |
term_printf("Invalid boot device for PC: '%c'\n",
|
211 |
boot_device[i]); |
212 |
return(1); |
213 |
} |
214 |
} |
215 |
rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
216 |
rtc_set_memory(s, 0x38, (bds[2] << 4)); |
217 |
return(0); |
218 |
} |
219 |
|
220 |
/* hd_table must contain 4 block drivers */
|
221 |
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size, |
222 |
const char *boot_device, BlockDriverState **hd_table) |
223 |
{ |
224 |
RTCState *s = rtc_state; |
225 |
int nbds, bds[3] = { 0, }; |
226 |
int val;
|
227 |
int fd0, fd1, nb;
|
228 |
int i;
|
229 |
|
230 |
/* various important CMOS locations needed by PC/Bochs bios */
|
231 |
|
232 |
/* memory size */
|
233 |
val = 640; /* base memory in K */ |
234 |
rtc_set_memory(s, 0x15, val);
|
235 |
rtc_set_memory(s, 0x16, val >> 8); |
236 |
|
237 |
val = (ram_size / 1024) - 1024; |
238 |
if (val > 65535) |
239 |
val = 65535;
|
240 |
rtc_set_memory(s, 0x17, val);
|
241 |
rtc_set_memory(s, 0x18, val >> 8); |
242 |
rtc_set_memory(s, 0x30, val);
|
243 |
rtc_set_memory(s, 0x31, val >> 8); |
244 |
|
245 |
if (above_4g_mem_size) {
|
246 |
rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16); |
247 |
rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24); |
248 |
rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32); |
249 |
} |
250 |
|
251 |
if (ram_size > (16 * 1024 * 1024)) |
252 |
val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
253 |
else
|
254 |
val = 0;
|
255 |
if (val > 65535) |
256 |
val = 65535;
|
257 |
rtc_set_memory(s, 0x34, val);
|
258 |
rtc_set_memory(s, 0x35, val >> 8); |
259 |
|
260 |
/* set the number of CPU */
|
261 |
rtc_set_memory(s, 0x5f, smp_cpus - 1); |
262 |
|
263 |
/* set boot devices, and disable floppy signature check if requested */
|
264 |
#define PC_MAX_BOOT_DEVICES 3 |
265 |
nbds = strlen(boot_device); |
266 |
if (nbds > PC_MAX_BOOT_DEVICES) {
|
267 |
fprintf(stderr, "Too many boot devices for PC\n");
|
268 |
exit(1);
|
269 |
} |
270 |
for (i = 0; i < nbds; i++) { |
271 |
bds[i] = boot_device2nibble(boot_device[i]); |
272 |
if (bds[i] == 0) { |
273 |
fprintf(stderr, "Invalid boot device for PC: '%c'\n",
|
274 |
boot_device[i]); |
275 |
exit(1);
|
276 |
} |
277 |
} |
278 |
rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]); |
279 |
rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1)); |
280 |
|
281 |
/* floppy type */
|
282 |
|
283 |
fd0 = fdctrl_get_drive_type(floppy_controller, 0);
|
284 |
fd1 = fdctrl_get_drive_type(floppy_controller, 1);
|
285 |
|
286 |
val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
|
287 |
rtc_set_memory(s, 0x10, val);
|
288 |
|
289 |
val = 0;
|
290 |
nb = 0;
|
291 |
if (fd0 < 3) |
292 |
nb++; |
293 |
if (fd1 < 3) |
294 |
nb++; |
295 |
switch (nb) {
|
296 |
case 0: |
297 |
break;
|
298 |
case 1: |
299 |
val |= 0x01; /* 1 drive, ready for boot */ |
300 |
break;
|
301 |
case 2: |
302 |
val |= 0x41; /* 2 drives, ready for boot */ |
303 |
break;
|
304 |
} |
305 |
val |= 0x02; /* FPU is there */ |
306 |
val |= 0x04; /* PS/2 mouse installed */ |
307 |
rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
308 |
|
309 |
/* hard drives */
|
310 |
|
311 |
rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
312 |
if (hd_table[0]) |
313 |
cmos_init_hd(0x19, 0x1b, hd_table[0]); |
314 |
if (hd_table[1]) |
315 |
cmos_init_hd(0x1a, 0x24, hd_table[1]); |
316 |
|
317 |
val = 0;
|
318 |
for (i = 0; i < 4; i++) { |
319 |
if (hd_table[i]) {
|
320 |
int cylinders, heads, sectors, translation;
|
321 |
/* NOTE: bdrv_get_geometry_hint() returns the physical
|
322 |
geometry. It is always such that: 1 <= sects <= 63, 1
|
323 |
<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
|
324 |
geometry can be different if a translation is done. */
|
325 |
translation = bdrv_get_translation_hint(hd_table[i]); |
326 |
if (translation == BIOS_ATA_TRANSLATION_AUTO) {
|
327 |
bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
328 |
if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
329 |
/* No translation. */
|
330 |
translation = 0;
|
331 |
} else {
|
332 |
/* LBA translation. */
|
333 |
translation = 1;
|
334 |
} |
335 |
} else {
|
336 |
translation--; |
337 |
} |
338 |
val |= translation << (i * 2);
|
339 |
} |
340 |
} |
341 |
rtc_set_memory(s, 0x39, val);
|
342 |
} |
343 |
|
344 |
void ioport_set_a20(int enable) |
345 |
{ |
346 |
/* XXX: send to all CPUs ? */
|
347 |
cpu_x86_set_a20(first_cpu, enable); |
348 |
} |
349 |
|
350 |
int ioport_get_a20(void) |
351 |
{ |
352 |
return ((first_cpu->a20_mask >> 20) & 1); |
353 |
} |
354 |
|
355 |
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
356 |
{ |
357 |
ioport_set_a20((val >> 1) & 1); |
358 |
/* XXX: bit 0 is fast reset */
|
359 |
} |
360 |
|
361 |
static uint32_t ioport92_read(void *opaque, uint32_t addr) |
362 |
{ |
363 |
return ioport_get_a20() << 1; |
364 |
} |
365 |
|
366 |
/***********************************************************/
|
367 |
/* Bochs BIOS debug ports */
|
368 |
|
369 |
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
370 |
{ |
371 |
static const char shutdown_str[8] = "Shutdown"; |
372 |
static int shutdown_index = 0; |
373 |
|
374 |
switch(addr) {
|
375 |
/* Bochs BIOS messages */
|
376 |
case 0x400: |
377 |
case 0x401: |
378 |
fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
|
379 |
exit(1);
|
380 |
case 0x402: |
381 |
case 0x403: |
382 |
#ifdef DEBUG_BIOS
|
383 |
fprintf(stderr, "%c", val);
|
384 |
#endif
|
385 |
break;
|
386 |
case 0x8900: |
387 |
/* same as Bochs power off */
|
388 |
if (val == shutdown_str[shutdown_index]) {
|
389 |
shutdown_index++; |
390 |
if (shutdown_index == 8) { |
391 |
shutdown_index = 0;
|
392 |
qemu_system_shutdown_request(); |
393 |
} |
394 |
} else {
|
395 |
shutdown_index = 0;
|
396 |
} |
397 |
break;
|
398 |
|
399 |
/* LGPL'ed VGA BIOS messages */
|
400 |
case 0x501: |
401 |
case 0x502: |
402 |
fprintf(stderr, "VGA BIOS panic, line %d\n", val);
|
403 |
exit(1);
|
404 |
case 0x500: |
405 |
case 0x503: |
406 |
#ifdef DEBUG_BIOS
|
407 |
fprintf(stderr, "%c", val);
|
408 |
#endif
|
409 |
break;
|
410 |
} |
411 |
} |
412 |
|
413 |
static void bochs_bios_init(void) |
414 |
{ |
415 |
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
416 |
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
417 |
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
418 |
register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
419 |
register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
420 |
|
421 |
register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
422 |
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
423 |
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
424 |
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
425 |
} |
426 |
|
427 |
/* Generate an initial boot sector which sets state and jump to
|
428 |
a specified vector */
|
429 |
static void generate_bootsect(uint32_t gpr[8], uint16_t segs[6], uint16_t ip) |
430 |
{ |
431 |
uint8_t bootsect[512], *p;
|
432 |
int i;
|
433 |
int hda;
|
434 |
|
435 |
hda = drive_get_index(IF_IDE, 0, 0); |
436 |
if (hda == -1) { |
437 |
fprintf(stderr, "A disk image must be given for 'hda' when booting "
|
438 |
"a Linux kernel\n");
|
439 |
exit(1);
|
440 |
} |
441 |
|
442 |
memset(bootsect, 0, sizeof(bootsect)); |
443 |
|
444 |
/* Copy the MSDOS partition table if possible */
|
445 |
bdrv_read(drives_table[hda].bdrv, 0, bootsect, 1); |
446 |
|
447 |
/* Make sure we have a partition signature */
|
448 |
bootsect[510] = 0x55; |
449 |
bootsect[511] = 0xaa; |
450 |
|
451 |
/* Actual code */
|
452 |
p = bootsect; |
453 |
*p++ = 0xfa; /* CLI */ |
454 |
*p++ = 0xfc; /* CLD */ |
455 |
|
456 |
for (i = 0; i < 6; i++) { |
457 |
if (i == 1) /* Skip CS */ |
458 |
continue;
|
459 |
|
460 |
*p++ = 0xb8; /* MOV AX,imm16 */ |
461 |
*p++ = segs[i]; |
462 |
*p++ = segs[i] >> 8;
|
463 |
*p++ = 0x8e; /* MOV <seg>,AX */ |
464 |
*p++ = 0xc0 + (i << 3); |
465 |
} |
466 |
|
467 |
for (i = 0; i < 8; i++) { |
468 |
*p++ = 0x66; /* 32-bit operand size */ |
469 |
*p++ = 0xb8 + i; /* MOV <reg>,imm32 */ |
470 |
*p++ = gpr[i]; |
471 |
*p++ = gpr[i] >> 8;
|
472 |
*p++ = gpr[i] >> 16;
|
473 |
*p++ = gpr[i] >> 24;
|
474 |
} |
475 |
|
476 |
*p++ = 0xea; /* JMP FAR */ |
477 |
*p++ = ip; /* IP */
|
478 |
*p++ = ip >> 8;
|
479 |
*p++ = segs[1]; /* CS */ |
480 |
*p++ = segs[1] >> 8; |
481 |
|
482 |
bdrv_set_boot_sector(drives_table[hda].bdrv, bootsect, sizeof(bootsect));
|
483 |
} |
484 |
|
485 |
static long get_file_size(FILE *f) |
486 |
{ |
487 |
long where, size;
|
488 |
|
489 |
/* XXX: on Unix systems, using fstat() probably makes more sense */
|
490 |
|
491 |
where = ftell(f); |
492 |
fseek(f, 0, SEEK_END);
|
493 |
size = ftell(f); |
494 |
fseek(f, where, SEEK_SET); |
495 |
|
496 |
return size;
|
497 |
} |
498 |
|
499 |
static void load_linux(const char *kernel_filename, |
500 |
const char *initrd_filename, |
501 |
const char *kernel_cmdline) |
502 |
{ |
503 |
uint16_t protocol; |
504 |
uint32_t gpr[8];
|
505 |
uint16_t seg[6];
|
506 |
uint16_t real_seg; |
507 |
int setup_size, kernel_size, initrd_size, cmdline_size;
|
508 |
uint32_t initrd_max; |
509 |
uint8_t header[1024];
|
510 |
target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr; |
511 |
FILE *f, *fi; |
512 |
|
513 |
/* Align to 16 bytes as a paranoia measure */
|
514 |
cmdline_size = (strlen(kernel_cmdline)+16) & ~15; |
515 |
|
516 |
/* load the kernel header */
|
517 |
f = fopen(kernel_filename, "rb");
|
518 |
if (!f || !(kernel_size = get_file_size(f)) ||
|
519 |
fread(header, 1, 1024, f) != 1024) { |
520 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
521 |
kernel_filename); |
522 |
exit(1);
|
523 |
} |
524 |
|
525 |
/* kernel protocol version */
|
526 |
#if 0
|
527 |
fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
|
528 |
#endif
|
529 |
if (ldl_p(header+0x202) == 0x53726448) |
530 |
protocol = lduw_p(header+0x206);
|
531 |
else
|
532 |
protocol = 0;
|
533 |
|
534 |
if (protocol < 0x200 || !(header[0x211] & 0x01)) { |
535 |
/* Low kernel */
|
536 |
real_addr = 0x90000;
|
537 |
cmdline_addr = 0x9a000 - cmdline_size;
|
538 |
prot_addr = 0x10000;
|
539 |
} else if (protocol < 0x202) { |
540 |
/* High but ancient kernel */
|
541 |
real_addr = 0x90000;
|
542 |
cmdline_addr = 0x9a000 - cmdline_size;
|
543 |
prot_addr = 0x100000;
|
544 |
} else {
|
545 |
/* High and recent kernel */
|
546 |
real_addr = 0x10000;
|
547 |
cmdline_addr = 0x20000;
|
548 |
prot_addr = 0x100000;
|
549 |
} |
550 |
|
551 |
#if 0
|
552 |
fprintf(stderr,
|
553 |
"qemu: real_addr = 0x" TARGET_FMT_plx "\n"
|
554 |
"qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
|
555 |
"qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
|
556 |
real_addr,
|
557 |
cmdline_addr,
|
558 |
prot_addr);
|
559 |
#endif
|
560 |
|
561 |
/* highest address for loading the initrd */
|
562 |
if (protocol >= 0x203) |
563 |
initrd_max = ldl_p(header+0x22c);
|
564 |
else
|
565 |
initrd_max = 0x37ffffff;
|
566 |
|
567 |
if (initrd_max >= ram_size-ACPI_DATA_SIZE)
|
568 |
initrd_max = ram_size-ACPI_DATA_SIZE-1;
|
569 |
|
570 |
/* kernel command line */
|
571 |
pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
|
572 |
|
573 |
if (protocol >= 0x202) { |
574 |
stl_p(header+0x228, cmdline_addr);
|
575 |
} else {
|
576 |
stw_p(header+0x20, 0xA33F); |
577 |
stw_p(header+0x22, cmdline_addr-real_addr);
|
578 |
} |
579 |
|
580 |
/* loader type */
|
581 |
/* High nybble = B reserved for Qemu; low nybble is revision number.
|
582 |
If this code is substantially changed, you may want to consider
|
583 |
incrementing the revision. */
|
584 |
if (protocol >= 0x200) |
585 |
header[0x210] = 0xB0; |
586 |
|
587 |
/* heap */
|
588 |
if (protocol >= 0x201) { |
589 |
header[0x211] |= 0x80; /* CAN_USE_HEAP */ |
590 |
stw_p(header+0x224, cmdline_addr-real_addr-0x200); |
591 |
} |
592 |
|
593 |
/* load initrd */
|
594 |
if (initrd_filename) {
|
595 |
if (protocol < 0x200) { |
596 |
fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
|
597 |
exit(1);
|
598 |
} |
599 |
|
600 |
fi = fopen(initrd_filename, "rb");
|
601 |
if (!fi) {
|
602 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
603 |
initrd_filename); |
604 |
exit(1);
|
605 |
} |
606 |
|
607 |
initrd_size = get_file_size(fi); |
608 |
initrd_addr = (initrd_max-initrd_size) & ~4095;
|
609 |
|
610 |
fprintf(stderr, "qemu: loading initrd (%#x bytes) at 0x" TARGET_FMT_plx
|
611 |
"\n", initrd_size, initrd_addr);
|
612 |
|
613 |
if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
|
614 |
fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
|
615 |
initrd_filename); |
616 |
exit(1);
|
617 |
} |
618 |
fclose(fi); |
619 |
|
620 |
stl_p(header+0x218, initrd_addr);
|
621 |
stl_p(header+0x21c, initrd_size);
|
622 |
} |
623 |
|
624 |
/* store the finalized header and load the rest of the kernel */
|
625 |
cpu_physical_memory_write(real_addr, header, 1024);
|
626 |
|
627 |
setup_size = header[0x1f1];
|
628 |
if (setup_size == 0) |
629 |
setup_size = 4;
|
630 |
|
631 |
setup_size = (setup_size+1)*512; |
632 |
kernel_size -= setup_size; /* Size of protected-mode code */
|
633 |
|
634 |
if (!fread_targphys_ok(real_addr+1024, setup_size-1024, f) || |
635 |
!fread_targphys_ok(prot_addr, kernel_size, f)) { |
636 |
fprintf(stderr, "qemu: read error on kernel '%s'\n",
|
637 |
kernel_filename); |
638 |
exit(1);
|
639 |
} |
640 |
fclose(f); |
641 |
|
642 |
/* generate bootsector to set up the initial register state */
|
643 |
real_seg = real_addr >> 4;
|
644 |
seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg; |
645 |
seg[1] = real_seg+0x20; /* CS */ |
646 |
memset(gpr, 0, sizeof gpr); |
647 |
gpr[4] = cmdline_addr-real_addr-16; /* SP (-16 is paranoia) */ |
648 |
|
649 |
generate_bootsect(gpr, seg, 0);
|
650 |
} |
651 |
|
652 |
static void main_cpu_reset(void *opaque) |
653 |
{ |
654 |
CPUState *env = opaque; |
655 |
cpu_reset(env); |
656 |
} |
657 |
|
658 |
static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
659 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
660 |
static const int ide_irq[2] = { 14, 15 }; |
661 |
|
662 |
#define NE2000_NB_MAX 6 |
663 |
|
664 |
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
665 |
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
666 |
|
667 |
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
668 |
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
669 |
|
670 |
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
671 |
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
672 |
|
673 |
#ifdef HAS_AUDIO
|
674 |
static void audio_init (PCIBus *pci_bus, qemu_irq *pic) |
675 |
{ |
676 |
struct soundhw *c;
|
677 |
int audio_enabled = 0; |
678 |
|
679 |
for (c = soundhw; !audio_enabled && c->name; ++c) {
|
680 |
audio_enabled = c->enabled; |
681 |
} |
682 |
|
683 |
if (audio_enabled) {
|
684 |
AudioState *s; |
685 |
|
686 |
s = AUD_init (); |
687 |
if (s) {
|
688 |
for (c = soundhw; c->name; ++c) {
|
689 |
if (c->enabled) {
|
690 |
if (c->isa) {
|
691 |
c->init.init_isa (s, pic); |
692 |
} |
693 |
else {
|
694 |
if (pci_bus) {
|
695 |
c->init.init_pci (pci_bus, s); |
696 |
} |
697 |
} |
698 |
} |
699 |
} |
700 |
} |
701 |
} |
702 |
} |
703 |
#endif
|
704 |
|
705 |
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic) |
706 |
{ |
707 |
static int nb_ne2k = 0; |
708 |
|
709 |
if (nb_ne2k == NE2000_NB_MAX)
|
710 |
return;
|
711 |
isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd); |
712 |
nb_ne2k++; |
713 |
} |
714 |
|
715 |
/* PC hardware initialisation */
|
716 |
static void pc_init1(ram_addr_t ram_size, int vga_ram_size, |
717 |
const char *boot_device, DisplayState *ds, |
718 |
const char *kernel_filename, const char *kernel_cmdline, |
719 |
const char *initrd_filename, |
720 |
int pci_enabled, const char *cpu_model) |
721 |
{ |
722 |
char buf[1024]; |
723 |
int ret, linux_boot, i;
|
724 |
ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
725 |
ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
|
726 |
int bios_size, isa_bios_size, vga_bios_size;
|
727 |
PCIBus *pci_bus; |
728 |
int piix3_devfn = -1; |
729 |
CPUState *env; |
730 |
NICInfo *nd; |
731 |
qemu_irq *cpu_irq; |
732 |
qemu_irq *i8259; |
733 |
int index;
|
734 |
BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
735 |
BlockDriverState *fd[MAX_FD]; |
736 |
|
737 |
if (ram_size >= 0xe0000000 ) { |
738 |
above_4g_mem_size = ram_size - 0xe0000000;
|
739 |
below_4g_mem_size = 0xe0000000;
|
740 |
} else {
|
741 |
below_4g_mem_size = ram_size; |
742 |
} |
743 |
|
744 |
linux_boot = (kernel_filename != NULL);
|
745 |
|
746 |
/* init CPUs */
|
747 |
if (cpu_model == NULL) { |
748 |
#ifdef TARGET_X86_64
|
749 |
cpu_model = "qemu64";
|
750 |
#else
|
751 |
cpu_model = "qemu32";
|
752 |
#endif
|
753 |
} |
754 |
|
755 |
for(i = 0; i < smp_cpus; i++) { |
756 |
env = cpu_init(cpu_model); |
757 |
if (!env) {
|
758 |
fprintf(stderr, "Unable to find x86 CPU definition\n");
|
759 |
exit(1);
|
760 |
} |
761 |
if (i != 0) |
762 |
env->halted = 1;
|
763 |
if (smp_cpus > 1) { |
764 |
/* XXX: enable it in all cases */
|
765 |
env->cpuid_features |= CPUID_APIC; |
766 |
} |
767 |
qemu_register_reset(main_cpu_reset, env); |
768 |
if (pci_enabled) {
|
769 |
apic_init(env); |
770 |
} |
771 |
} |
772 |
|
773 |
vmport_init(); |
774 |
|
775 |
/* allocate RAM */
|
776 |
ram_addr = qemu_ram_alloc(ram_size); |
777 |
cpu_register_physical_memory(0, below_4g_mem_size, ram_addr);
|
778 |
|
779 |
/* above 4giga memory allocation */
|
780 |
if (above_4g_mem_size > 0) { |
781 |
cpu_register_physical_memory((target_phys_addr_t) 0x100000000ULL,
|
782 |
above_4g_mem_size, |
783 |
ram_addr + below_4g_mem_size); |
784 |
} |
785 |
|
786 |
/* allocate VGA RAM */
|
787 |
vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
788 |
|
789 |
/* BIOS load */
|
790 |
if (bios_name == NULL) |
791 |
bios_name = BIOS_FILENAME; |
792 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
793 |
bios_size = get_image_size(buf); |
794 |
if (bios_size <= 0 || |
795 |
(bios_size % 65536) != 0) { |
796 |
goto bios_error;
|
797 |
} |
798 |
bios_offset = qemu_ram_alloc(bios_size); |
799 |
ret = load_image(buf, phys_ram_base + bios_offset); |
800 |
if (ret != bios_size) {
|
801 |
bios_error:
|
802 |
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
803 |
exit(1);
|
804 |
} |
805 |
|
806 |
/* VGA BIOS load */
|
807 |
if (cirrus_vga_enabled) {
|
808 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
809 |
} else {
|
810 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
811 |
} |
812 |
vga_bios_size = get_image_size(buf); |
813 |
if (vga_bios_size <= 0 || vga_bios_size > 65536) |
814 |
goto vga_bios_error;
|
815 |
vga_bios_offset = qemu_ram_alloc(65536);
|
816 |
|
817 |
ret = load_image(buf, phys_ram_base + vga_bios_offset); |
818 |
if (ret != vga_bios_size) {
|
819 |
vga_bios_error:
|
820 |
fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
|
821 |
exit(1);
|
822 |
} |
823 |
|
824 |
/* setup basic memory access */
|
825 |
cpu_register_physical_memory(0xc0000, 0x10000, |
826 |
vga_bios_offset | IO_MEM_ROM); |
827 |
|
828 |
/* map the last 128KB of the BIOS in ISA space */
|
829 |
isa_bios_size = bios_size; |
830 |
if (isa_bios_size > (128 * 1024)) |
831 |
isa_bios_size = 128 * 1024; |
832 |
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
833 |
IO_MEM_UNASSIGNED); |
834 |
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
835 |
isa_bios_size, |
836 |
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
837 |
|
838 |
{ |
839 |
ram_addr_t option_rom_offset; |
840 |
int size, offset;
|
841 |
|
842 |
offset = 0;
|
843 |
for (i = 0; i < nb_option_roms; i++) { |
844 |
size = get_image_size(option_rom[i]); |
845 |
if (size < 0) { |
846 |
fprintf(stderr, "Could not load option rom '%s'\n",
|
847 |
option_rom[i]); |
848 |
exit(1);
|
849 |
} |
850 |
if (size > (0x10000 - offset)) |
851 |
goto option_rom_error;
|
852 |
option_rom_offset = qemu_ram_alloc(size); |
853 |
ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); |
854 |
if (ret != size) {
|
855 |
option_rom_error:
|
856 |
fprintf(stderr, "Too many option ROMS\n");
|
857 |
exit(1);
|
858 |
} |
859 |
size = (size + 4095) & ~4095; |
860 |
cpu_register_physical_memory(0xd0000 + offset,
|
861 |
size, option_rom_offset | IO_MEM_ROM); |
862 |
offset += size; |
863 |
} |
864 |
} |
865 |
|
866 |
/* map all the bios at the top of memory */
|
867 |
cpu_register_physical_memory((uint32_t)(-bios_size), |
868 |
bios_size, bios_offset | IO_MEM_ROM); |
869 |
|
870 |
bochs_bios_init(); |
871 |
|
872 |
if (linux_boot)
|
873 |
load_linux(kernel_filename, initrd_filename, kernel_cmdline); |
874 |
|
875 |
cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1); |
876 |
i8259 = i8259_init(cpu_irq[0]);
|
877 |
ferr_irq = i8259[13];
|
878 |
|
879 |
if (pci_enabled) {
|
880 |
pci_bus = i440fx_init(&i440fx_state, i8259); |
881 |
piix3_devfn = piix3_init(pci_bus, -1);
|
882 |
} else {
|
883 |
pci_bus = NULL;
|
884 |
} |
885 |
|
886 |
/* init basic PC hardware */
|
887 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
888 |
|
889 |
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
890 |
|
891 |
if (cirrus_vga_enabled) {
|
892 |
if (pci_enabled) {
|
893 |
pci_cirrus_vga_init(pci_bus, |
894 |
ds, phys_ram_base + vga_ram_addr, |
895 |
vga_ram_addr, vga_ram_size); |
896 |
} else {
|
897 |
isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
898 |
vga_ram_addr, vga_ram_size); |
899 |
} |
900 |
} else if (vmsvga_enabled) { |
901 |
if (pci_enabled)
|
902 |
pci_vmsvga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
903 |
vga_ram_addr, vga_ram_size); |
904 |
else
|
905 |
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
906 |
} else {
|
907 |
if (pci_enabled) {
|
908 |
pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
909 |
vga_ram_addr, vga_ram_size, 0, 0); |
910 |
} else {
|
911 |
isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
912 |
vga_ram_addr, vga_ram_size); |
913 |
} |
914 |
} |
915 |
|
916 |
rtc_state = rtc_init(0x70, i8259[8]); |
917 |
|
918 |
qemu_register_boot_set(pc_boot_set, rtc_state); |
919 |
|
920 |
register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
921 |
register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
922 |
|
923 |
if (pci_enabled) {
|
924 |
ioapic = ioapic_init(); |
925 |
} |
926 |
pit = pit_init(0x40, i8259[0]); |
927 |
pcspk_init(pit); |
928 |
if (pci_enabled) {
|
929 |
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
930 |
} |
931 |
|
932 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
933 |
if (serial_hds[i]) {
|
934 |
serial_init(serial_io[i], i8259[serial_irq[i]], 115200,
|
935 |
serial_hds[i]); |
936 |
} |
937 |
} |
938 |
|
939 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
940 |
if (parallel_hds[i]) {
|
941 |
parallel_init(parallel_io[i], i8259[parallel_irq[i]], |
942 |
parallel_hds[i]); |
943 |
} |
944 |
} |
945 |
|
946 |
for(i = 0; i < nb_nics; i++) { |
947 |
nd = &nd_table[i]; |
948 |
if (!nd->model) {
|
949 |
if (pci_enabled) {
|
950 |
nd->model = "ne2k_pci";
|
951 |
} else {
|
952 |
nd->model = "ne2k_isa";
|
953 |
} |
954 |
} |
955 |
if (strcmp(nd->model, "ne2k_isa") == 0) { |
956 |
pc_init_ne2k_isa(nd, i8259); |
957 |
} else if (pci_enabled) { |
958 |
if (strcmp(nd->model, "?") == 0) |
959 |
fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
960 |
pci_nic_init(pci_bus, nd, -1);
|
961 |
} else if (strcmp(nd->model, "?") == 0) { |
962 |
fprintf(stderr, "qemu: Supported ISA NICs: ne2k_isa\n");
|
963 |
exit(1);
|
964 |
} else {
|
965 |
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
966 |
exit(1);
|
967 |
} |
968 |
} |
969 |
|
970 |
if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
|
971 |
fprintf(stderr, "qemu: too many IDE bus\n");
|
972 |
exit(1);
|
973 |
} |
974 |
|
975 |
for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { |
976 |
index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
977 |
if (index != -1) |
978 |
hd[i] = drives_table[index].bdrv; |
979 |
else
|
980 |
hd[i] = NULL;
|
981 |
} |
982 |
|
983 |
if (pci_enabled) {
|
984 |
pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, i8259);
|
985 |
} else {
|
986 |
for(i = 0; i < MAX_IDE_BUS; i++) { |
987 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], i8259[ide_irq[i]], |
988 |
hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
|
989 |
} |
990 |
} |
991 |
|
992 |
i8042_init(i8259[1], i8259[12], 0x60); |
993 |
DMA_init(0);
|
994 |
#ifdef HAS_AUDIO
|
995 |
audio_init(pci_enabled ? pci_bus : NULL, i8259);
|
996 |
#endif
|
997 |
|
998 |
for(i = 0; i < MAX_FD; i++) { |
999 |
index = drive_get_index(IF_FLOPPY, 0, i);
|
1000 |
if (index != -1) |
1001 |
fd[i] = drives_table[index].bdrv; |
1002 |
else
|
1003 |
fd[i] = NULL;
|
1004 |
} |
1005 |
floppy_controller = fdctrl_init(i8259[6], 2, 0, 0x3f0, fd); |
1006 |
|
1007 |
cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd); |
1008 |
|
1009 |
if (pci_enabled && usb_enabled) {
|
1010 |
usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
|
1011 |
} |
1012 |
|
1013 |
if (pci_enabled && acpi_enabled) {
|
1014 |
uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
1015 |
i2c_bus *smbus; |
1016 |
|
1017 |
/* TODO: Populate SPD eeprom data. */
|
1018 |
smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, i8259[9]); |
1019 |
for (i = 0; i < 8; i++) { |
1020 |
smbus_eeprom_device_init(smbus, 0x50 + i, eeprom_buf + (i * 256)); |
1021 |
} |
1022 |
} |
1023 |
|
1024 |
if (i440fx_state) {
|
1025 |
i440fx_init_memory_mappings(i440fx_state); |
1026 |
} |
1027 |
|
1028 |
if (pci_enabled) {
|
1029 |
int max_bus;
|
1030 |
int bus, unit;
|
1031 |
void *scsi;
|
1032 |
|
1033 |
max_bus = drive_get_max_bus(IF_SCSI); |
1034 |
|
1035 |
for (bus = 0; bus <= max_bus; bus++) { |
1036 |
scsi = lsi_scsi_init(pci_bus, -1);
|
1037 |
for (unit = 0; unit < LSI_MAX_DEVS; unit++) { |
1038 |
index = drive_get_index(IF_SCSI, bus, unit); |
1039 |
if (index == -1) |
1040 |
continue;
|
1041 |
lsi_scsi_attach(scsi, drives_table[index].bdrv, unit); |
1042 |
} |
1043 |
} |
1044 |
} |
1045 |
} |
1046 |
|
1047 |
static void pc_init_pci(ram_addr_t ram_size, int vga_ram_size, |
1048 |
const char *boot_device, DisplayState *ds, |
1049 |
const char *kernel_filename, |
1050 |
const char *kernel_cmdline, |
1051 |
const char *initrd_filename, |
1052 |
const char *cpu_model) |
1053 |
{ |
1054 |
pc_init1(ram_size, vga_ram_size, boot_device, ds, |
1055 |
kernel_filename, kernel_cmdline, |
1056 |
initrd_filename, 1, cpu_model);
|
1057 |
} |
1058 |
|
1059 |
static void pc_init_isa(ram_addr_t ram_size, int vga_ram_size, |
1060 |
const char *boot_device, DisplayState *ds, |
1061 |
const char *kernel_filename, |
1062 |
const char *kernel_cmdline, |
1063 |
const char *initrd_filename, |
1064 |
const char *cpu_model) |
1065 |
{ |
1066 |
pc_init1(ram_size, vga_ram_size, boot_device, ds, |
1067 |
kernel_filename, kernel_cmdline, |
1068 |
initrd_filename, 0, cpu_model);
|
1069 |
} |
1070 |
|
1071 |
QEMUMachine pc_machine = { |
1072 |
.name = "pc",
|
1073 |
.desc = "Standard PC",
|
1074 |
.init = pc_init_pci, |
1075 |
.ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, |
1076 |
}; |
1077 |
|
1078 |
QEMUMachine isapc_machine = { |
1079 |
.name = "isapc",
|
1080 |
.desc = "ISA-only PC",
|
1081 |
.init = pc_init_isa, |
1082 |
.ram_require = VGA_RAM_SIZE + PC_MAX_BIOS_SIZE, |
1083 |
}; |