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/*
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 * QEMU Floppy disk emulator (Intel 82078)
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 * 
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 * Copyright (c) 2003 Jocelyn Mayer
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 * 
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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/*
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 * The controller is used in Sun4m systems in a slightly different
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 * way. There are changes in DOR register and DMA is not available.
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 */
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#include "vl.h"
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/********************************************************/
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/* debug Floppy devices */
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//#define DEBUG_FLOPPY
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#ifdef DEBUG_FLOPPY
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#define FLOPPY_DPRINTF(fmt, args...) \
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do { printf("FLOPPY: " fmt , ##args); } while (0)
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#else
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#define FLOPPY_DPRINTF(fmt, args...)
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#endif
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#define FLOPPY_ERROR(fmt, args...) \
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do { printf("FLOPPY ERROR: %s: " fmt, __func__ , ##args); } while (0)
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/********************************************************/
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/* Floppy drive emulation                               */
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/* Will always be a fixed parameter for us */
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#define FD_SECTOR_LEN 512
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#define FD_SECTOR_SC  2   /* Sector size code */
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/* Floppy disk drive emulation */
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typedef enum fdisk_type_t {
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    FDRIVE_DISK_288   = 0x01, /* 2.88 MB disk           */
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    FDRIVE_DISK_144   = 0x02, /* 1.44 MB disk           */
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    FDRIVE_DISK_720   = 0x03, /* 720 kB disk            */
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    FDRIVE_DISK_USER  = 0x04, /* User defined geometry  */
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    FDRIVE_DISK_NONE  = 0x05, /* No disk                */
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} fdisk_type_t;
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typedef enum fdrive_type_t {
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    FDRIVE_DRV_144  = 0x00,   /* 1.44 MB 3"5 drive      */
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    FDRIVE_DRV_288  = 0x01,   /* 2.88 MB 3"5 drive      */
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    FDRIVE_DRV_120  = 0x02,   /* 1.2  MB 5"25 drive     */
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    FDRIVE_DRV_NONE = 0x03,   /* No drive connected     */
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} fdrive_type_t;
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typedef enum fdrive_flags_t {
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    FDRIVE_MOTOR_ON   = 0x01, /* motor on/off           */
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} fdrive_flags_t;
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typedef enum fdisk_flags_t {
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    FDISK_DBL_SIDES  = 0x01,
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} fdisk_flags_t;
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typedef struct fdrive_t {
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    BlockDriverState *bs;
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    /* Drive status */
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    fdrive_type_t drive;
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    fdrive_flags_t drflags;
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    uint8_t perpendicular;    /* 2.88 MB access mode    */
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    /* Position */
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    uint8_t head;
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    uint8_t track;
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    uint8_t sect;
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    /* Last operation status */
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    uint8_t dir;              /* Direction              */
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    uint8_t rw;               /* Read/write             */
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    /* Media */
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    fdisk_flags_t flags;
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    uint8_t last_sect;        /* Nb sector per track    */
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    uint8_t max_track;        /* Nb of tracks           */
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    uint16_t bps;             /* Bytes per sector       */
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    uint8_t ro;               /* Is read-only           */
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} fdrive_t;
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static void fd_init (fdrive_t *drv, BlockDriverState *bs)
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{
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    /* Drive */
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    drv->bs = bs;
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    drv->drive = FDRIVE_DRV_NONE;
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    drv->drflags = 0;
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    drv->perpendicular = 0;
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    /* Disk */
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    drv->last_sect = 0;
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    drv->max_track = 0;
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}
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static int _fd_sector (uint8_t head, uint8_t track,
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                        uint8_t sect, uint8_t last_sect)
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{
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    return (((track * 2) + head) * last_sect) + sect - 1;
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}
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/* Returns current position, in sectors, for given drive */
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static int fd_sector (fdrive_t *drv)
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{
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    return _fd_sector(drv->head, drv->track, drv->sect, drv->last_sect);
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}
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static int fd_seek (fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
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                    int enable_seek)
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{
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    uint32_t sector;
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    int ret;
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    if (track > drv->max_track ||
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        (head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
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        FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
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                       head, track, sect, 1,
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                       (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
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                       drv->max_track, drv->last_sect);
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        return 2;
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    }
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    if (sect > drv->last_sect) {
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        FLOPPY_DPRINTF("try to read %d %02x %02x (max=%d %d %02x %02x)\n",
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                       head, track, sect, 1,
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                       (drv->flags & FDISK_DBL_SIDES) == 0 ? 0 : 1,
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                       drv->max_track, drv->last_sect);
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        return 3;
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    }
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    sector = _fd_sector(head, track, sect, drv->last_sect);
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    ret = 0;
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    if (sector != fd_sector(drv)) {
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#if 0
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        if (!enable_seek) {
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            FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
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                         head, track, sect, 1, drv->max_track, drv->last_sect);
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            return 4;
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        }
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#endif
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        drv->head = head;
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        if (drv->track != track)
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            ret = 1;
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        drv->track = track;
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        drv->sect = sect;
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    }
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    return ret;
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}
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/* Set drive back to track 0 */
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static void fd_recalibrate (fdrive_t *drv)
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{
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    FLOPPY_DPRINTF("recalibrate\n");
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    drv->head = 0;
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    drv->track = 0;
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    drv->sect = 1;
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    drv->dir = 1;
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    drv->rw = 0;
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}
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/* Recognize floppy formats */
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typedef struct fd_format_t {
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    fdrive_type_t drive;
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    fdisk_type_t  disk;
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    uint8_t last_sect;
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    uint8_t max_track;
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    uint8_t max_head;
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    const unsigned char *str;
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} fd_format_t;
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static fd_format_t fd_formats[] = {
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    /* First entry is default format */
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    /* 1.44 MB 3"1/2 floppy disks */
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 18, 80, 1, "1.44 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 20, 80, 1,  "1.6 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 80, 1, "1.68 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 82, 1, "1.72 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 21, 83, 1, "1.74 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 22, 80, 1, "1.76 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 23, 80, 1, "1.84 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_144, 24, 80, 1, "1.92 MB 3\"1/2", },
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    /* 2.88 MB 3"1/2 floppy disks */
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    { FDRIVE_DRV_288, FDRIVE_DISK_288, 36, 80, 1, "2.88 MB 3\"1/2", },
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    { FDRIVE_DRV_288, FDRIVE_DISK_288, 39, 80, 1, "3.12 MB 3\"1/2", },
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    { FDRIVE_DRV_288, FDRIVE_DISK_288, 40, 80, 1,  "3.2 MB 3\"1/2", },
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    { FDRIVE_DRV_288, FDRIVE_DISK_288, 44, 80, 1, "3.52 MB 3\"1/2", },
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    { FDRIVE_DRV_288, FDRIVE_DISK_288, 48, 80, 1, "3.84 MB 3\"1/2", },
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    /* 720 kB 3"1/2 floppy disks */
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    { FDRIVE_DRV_144, FDRIVE_DISK_720,  9, 80, 1,  "720 kB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 80, 1,  "800 kB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 82, 1,  "820 kB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_720, 10, 83, 1,  "830 kB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_720, 13, 80, 1, "1.04 MB 3\"1/2", },
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    { FDRIVE_DRV_144, FDRIVE_DISK_720, 14, 80, 1, "1.12 MB 3\"1/2", },
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    /* 1.2 MB 5"1/4 floppy disks */
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 15, 80, 1,  "1.2 kB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 80, 1, "1.44 MB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 82, 1, "1.48 MB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 18, 83, 1, "1.49 MB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 20, 80, 1,  "1.6 MB 5\"1/4", },
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    /* 720 kB 5"1/4 floppy disks */
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    { FDRIVE_DRV_120, FDRIVE_DISK_288,  9, 80, 1,  "720 kB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 11, 80, 1,  "880 kB 5\"1/4", },
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    /* 360 kB 5"1/4 floppy disks */
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    { FDRIVE_DRV_120, FDRIVE_DISK_288,  9, 40, 1,  "360 kB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288,  9, 40, 0,  "180 kB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 41, 1,  "410 kB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288, 10, 42, 1,  "420 kB 5\"1/4", },
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    /* 320 kB 5"1/4 floppy disks */ 
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    { FDRIVE_DRV_120, FDRIVE_DISK_288,  8, 40, 1,  "320 kB 5\"1/4", },
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    { FDRIVE_DRV_120, FDRIVE_DISK_288,  8, 40, 0,  "160 kB 5\"1/4", },
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    /* 360 kB must match 5"1/4 better than 3"1/2... */
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    { FDRIVE_DRV_144, FDRIVE_DISK_720,  9, 80, 0,  "360 kB 3\"1/2", },
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    /* end */
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    { FDRIVE_DRV_NONE, FDRIVE_DISK_NONE, -1, -1, 0, NULL, },
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};
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/* Revalidate a disk drive after a disk change */
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static void fd_revalidate (fdrive_t *drv)
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{
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    fd_format_t *parse;
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    int64_t nb_sectors, size;
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    int i, first_match, match;
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    int nb_heads, max_track, last_sect, ro;
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    FLOPPY_DPRINTF("revalidate\n");
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    if (drv->bs != NULL && bdrv_is_inserted(drv->bs)) {
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        ro = bdrv_is_read_only(drv->bs);
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        bdrv_get_geometry_hint(drv->bs, &nb_heads, &max_track, &last_sect);
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        if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
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            FLOPPY_DPRINTF("User defined disk (%d %d %d)",
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                           nb_heads - 1, max_track, last_sect);
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        } else {
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            bdrv_get_geometry(drv->bs, &nb_sectors);
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            match = -1;
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            first_match = -1;
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            for (i = 0;; i++) {
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                parse = &fd_formats[i];
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                if (parse->drive == FDRIVE_DRV_NONE)
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                    break;
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                if (drv->drive == parse->drive ||
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                    drv->drive == FDRIVE_DRV_NONE) {
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                    size = (parse->max_head + 1) * parse->max_track *
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                        parse->last_sect;
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                    if (nb_sectors == size) {
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                        match = i;
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                        break;
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                    }
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                    if (first_match == -1)
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                        first_match = i;
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                }
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            }
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            if (match == -1) {
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                if (first_match == -1)
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                    match = 1;
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                else
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                    match = first_match;
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                parse = &fd_formats[match];
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            }
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            nb_heads = parse->max_head + 1;
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            max_track = parse->max_track;
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            last_sect = parse->last_sect;
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            drv->drive = parse->drive;
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            FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
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                           nb_heads, max_track, last_sect, ro ? "ro" : "rw");
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        }
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            if (nb_heads == 1) {
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                drv->flags &= ~FDISK_DBL_SIDES;
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            } else {
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                drv->flags |= FDISK_DBL_SIDES;
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            }
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            drv->max_track = max_track;
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            drv->last_sect = last_sect;
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        drv->ro = ro;
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    } else {
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        FLOPPY_DPRINTF("No disk in drive\n");
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        drv->last_sect = 0;
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        drv->max_track = 0;
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        drv->flags &= ~FDISK_DBL_SIDES;
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    }
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}
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/* Motor control */
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static void fd_start (fdrive_t *drv)
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{
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    drv->drflags |= FDRIVE_MOTOR_ON;
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}
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static void fd_stop (fdrive_t *drv)
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{
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    drv->drflags &= ~FDRIVE_MOTOR_ON;
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}
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/* Re-initialise a drives (motor off, repositioned) */
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static void fd_reset (fdrive_t *drv)
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{
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    fd_stop(drv);
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    fd_recalibrate(drv);
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}
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/********************************************************/
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/* Intel 82078 floppy disk controller emulation          */
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static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq);
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static void fdctrl_reset_fifo (fdctrl_t *fdctrl);
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static int fdctrl_transfer_handler (void *opaque, int nchan,
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                                    int dma_pos, int dma_len);
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static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status);
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static void fdctrl_result_timer(void *opaque);
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static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl);
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static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl);
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static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value);
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static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl);
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static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value);
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static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl);
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static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value);
329 baca51fa bellard
static uint32_t fdctrl_read_data (fdctrl_t *fdctrl);
330 baca51fa bellard
static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value);
331 baca51fa bellard
static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl);
332 8977f3c1 bellard
333 8977f3c1 bellard
enum {
334 ed5fd2cc bellard
    FD_CTRL_ACTIVE = 0x01, /* XXX: suppress that */
335 8977f3c1 bellard
    FD_CTRL_RESET  = 0x02,
336 ed5fd2cc bellard
    FD_CTRL_SLEEP  = 0x04, /* XXX: suppress that */
337 ed5fd2cc bellard
    FD_CTRL_BUSY   = 0x08, /* dma transfer in progress */
338 8977f3c1 bellard
    FD_CTRL_INTR   = 0x10,
339 8977f3c1 bellard
};
340 8977f3c1 bellard
341 8977f3c1 bellard
enum {
342 8977f3c1 bellard
    FD_DIR_WRITE   = 0,
343 8977f3c1 bellard
    FD_DIR_READ    = 1,
344 8977f3c1 bellard
    FD_DIR_SCANE   = 2,
345 8977f3c1 bellard
    FD_DIR_SCANL   = 3,
346 8977f3c1 bellard
    FD_DIR_SCANH   = 4,
347 8977f3c1 bellard
};
348 8977f3c1 bellard
349 8977f3c1 bellard
enum {
350 8977f3c1 bellard
    FD_STATE_CMD    = 0x00,
351 8977f3c1 bellard
    FD_STATE_STATUS = 0x01,
352 8977f3c1 bellard
    FD_STATE_DATA   = 0x02,
353 8977f3c1 bellard
    FD_STATE_STATE  = 0x03,
354 8977f3c1 bellard
    FD_STATE_MULTI  = 0x10,
355 8977f3c1 bellard
    FD_STATE_SEEK   = 0x20,
356 baca51fa bellard
    FD_STATE_FORMAT = 0x40,
357 8977f3c1 bellard
};
358 8977f3c1 bellard
359 8977f3c1 bellard
#define FD_STATE(state) ((state) & FD_STATE_STATE)
360 baca51fa bellard
#define FD_SET_STATE(state, new_state) \
361 baca51fa bellard
do { (state) = ((state) & ~FD_STATE_STATE) | (new_state); } while (0)
362 8977f3c1 bellard
#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
363 8977f3c1 bellard
#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
364 baca51fa bellard
#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
365 8977f3c1 bellard
366 baca51fa bellard
struct fdctrl_t {
367 baca51fa bellard
    fdctrl_t *fdctrl;
368 4b19ec0c bellard
    /* Controller's identification */
369 8977f3c1 bellard
    uint8_t version;
370 8977f3c1 bellard
    /* HW */
371 8977f3c1 bellard
    int irq_lvl;
372 8977f3c1 bellard
    int dma_chann;
373 baca51fa bellard
    uint32_t io_base;
374 4b19ec0c bellard
    /* Controller state */
375 ed5fd2cc bellard
    QEMUTimer *result_timer;
376 8977f3c1 bellard
    uint8_t state;
377 8977f3c1 bellard
    uint8_t dma_en;
378 8977f3c1 bellard
    uint8_t cur_drv;
379 8977f3c1 bellard
    uint8_t bootsel;
380 8977f3c1 bellard
    /* Command FIFO */
381 8977f3c1 bellard
    uint8_t fifo[FD_SECTOR_LEN];
382 8977f3c1 bellard
    uint32_t data_pos;
383 8977f3c1 bellard
    uint32_t data_len;
384 8977f3c1 bellard
    uint8_t data_state;
385 8977f3c1 bellard
    uint8_t data_dir;
386 8977f3c1 bellard
    uint8_t int_status;
387 890fa6be bellard
    uint8_t eot; /* last wanted sector */
388 8977f3c1 bellard
    /* States kept only to be returned back */
389 8977f3c1 bellard
    /* Timers state */
390 8977f3c1 bellard
    uint8_t timer0;
391 8977f3c1 bellard
    uint8_t timer1;
392 8977f3c1 bellard
    /* precompensation */
393 8977f3c1 bellard
    uint8_t precomp_trk;
394 8977f3c1 bellard
    uint8_t config;
395 8977f3c1 bellard
    uint8_t lock;
396 8977f3c1 bellard
    /* Power down config (also with status regB access mode */
397 8977f3c1 bellard
    uint8_t pwrd;
398 8977f3c1 bellard
    /* Floppy drives */
399 8977f3c1 bellard
    fdrive_t drives[2];
400 baca51fa bellard
};
401 baca51fa bellard
402 baca51fa bellard
static uint32_t fdctrl_read (void *opaque, uint32_t reg)
403 baca51fa bellard
{
404 baca51fa bellard
    fdctrl_t *fdctrl = opaque;
405 baca51fa bellard
    uint32_t retval;
406 baca51fa bellard
407 a541f297 bellard
    switch (reg & 0x07) {
408 6f7e9aec bellard
#ifdef TARGET_SPARC
409 6f7e9aec bellard
    case 0x00:
410 6f7e9aec bellard
        // Identify to Linux as S82078B
411 6f7e9aec bellard
        retval = fdctrl_read_statusB(fdctrl);
412 6f7e9aec bellard
        break;
413 6f7e9aec bellard
#endif
414 a541f297 bellard
    case 0x01:
415 baca51fa bellard
        retval = fdctrl_read_statusB(fdctrl);
416 a541f297 bellard
        break;
417 a541f297 bellard
    case 0x02:
418 baca51fa bellard
        retval = fdctrl_read_dor(fdctrl);
419 a541f297 bellard
        break;
420 a541f297 bellard
    case 0x03:
421 baca51fa bellard
        retval = fdctrl_read_tape(fdctrl);
422 a541f297 bellard
        break;
423 a541f297 bellard
    case 0x04:
424 baca51fa bellard
        retval = fdctrl_read_main_status(fdctrl);
425 a541f297 bellard
        break;
426 a541f297 bellard
    case 0x05:
427 baca51fa bellard
        retval = fdctrl_read_data(fdctrl);
428 a541f297 bellard
        break;
429 a541f297 bellard
    case 0x07:
430 baca51fa bellard
        retval = fdctrl_read_dir(fdctrl);
431 a541f297 bellard
        break;
432 a541f297 bellard
    default:
433 baca51fa bellard
        retval = (uint32_t)(-1);
434 a541f297 bellard
        break;
435 a541f297 bellard
    }
436 ed5fd2cc bellard
    FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
437 baca51fa bellard
438 baca51fa bellard
    return retval;
439 baca51fa bellard
}
440 baca51fa bellard
441 baca51fa bellard
static void fdctrl_write (void *opaque, uint32_t reg, uint32_t value)
442 baca51fa bellard
{
443 baca51fa bellard
    fdctrl_t *fdctrl = opaque;
444 baca51fa bellard
445 ed5fd2cc bellard
    FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
446 ed5fd2cc bellard
447 a541f297 bellard
    switch (reg & 0x07) {
448 a541f297 bellard
    case 0x02:
449 baca51fa bellard
        fdctrl_write_dor(fdctrl, value);
450 a541f297 bellard
        break;
451 a541f297 bellard
    case 0x03:
452 baca51fa bellard
        fdctrl_write_tape(fdctrl, value);
453 a541f297 bellard
        break;
454 a541f297 bellard
    case 0x04:
455 baca51fa bellard
        fdctrl_write_rate(fdctrl, value);
456 a541f297 bellard
        break;
457 a541f297 bellard
    case 0x05:
458 baca51fa bellard
        fdctrl_write_data(fdctrl, value);
459 a541f297 bellard
        break;
460 a541f297 bellard
    default:
461 a541f297 bellard
        break;
462 a541f297 bellard
    }
463 baca51fa bellard
}
464 baca51fa bellard
465 62a46c61 bellard
static uint32_t fdctrl_read_mem (void *opaque, target_phys_addr_t reg)
466 62a46c61 bellard
{
467 62a46c61 bellard
    return fdctrl_read(opaque, reg);
468 62a46c61 bellard
}
469 62a46c61 bellard
470 62a46c61 bellard
static void fdctrl_write_mem (void *opaque, 
471 62a46c61 bellard
                              target_phys_addr_t reg, uint32_t value)
472 62a46c61 bellard
{
473 62a46c61 bellard
    fdctrl_write(opaque, reg, value);
474 62a46c61 bellard
}
475 62a46c61 bellard
476 e80cfcfc bellard
static CPUReadMemoryFunc *fdctrl_mem_read[3] = {
477 62a46c61 bellard
    fdctrl_read_mem,
478 62a46c61 bellard
    fdctrl_read_mem,
479 62a46c61 bellard
    fdctrl_read_mem,
480 e80cfcfc bellard
};
481 e80cfcfc bellard
482 e80cfcfc bellard
static CPUWriteMemoryFunc *fdctrl_mem_write[3] = {
483 62a46c61 bellard
    fdctrl_write_mem,
484 62a46c61 bellard
    fdctrl_write_mem,
485 62a46c61 bellard
    fdctrl_write_mem,
486 e80cfcfc bellard
};
487 e80cfcfc bellard
488 baca51fa bellard
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, 
489 baca51fa bellard
                       uint32_t io_base,
490 baca51fa bellard
                       BlockDriverState **fds)
491 8977f3c1 bellard
{
492 baca51fa bellard
    fdctrl_t *fdctrl;
493 e80cfcfc bellard
    int io_mem;
494 8977f3c1 bellard
    int i;
495 8977f3c1 bellard
496 4b19ec0c bellard
    FLOPPY_DPRINTF("init controller\n");
497 baca51fa bellard
    fdctrl = qemu_mallocz(sizeof(fdctrl_t));
498 baca51fa bellard
    if (!fdctrl)
499 baca51fa bellard
        return NULL;
500 ed5fd2cc bellard
    fdctrl->result_timer = qemu_new_timer(vm_clock, 
501 ed5fd2cc bellard
                                          fdctrl_result_timer, fdctrl);
502 ed5fd2cc bellard
503 4b19ec0c bellard
    fdctrl->version = 0x90; /* Intel 82078 controller */
504 baca51fa bellard
    fdctrl->irq_lvl = irq_lvl;
505 baca51fa bellard
    fdctrl->dma_chann = dma_chann;
506 baca51fa bellard
    fdctrl->io_base = io_base;
507 a541f297 bellard
    fdctrl->config = 0x60; /* Implicit seek, polling & FIFO enabled */
508 baca51fa bellard
    if (fdctrl->dma_chann != -1) {
509 baca51fa bellard
        fdctrl->dma_en = 1;
510 baca51fa bellard
        DMA_register_channel(dma_chann, &fdctrl_transfer_handler, fdctrl);
511 8977f3c1 bellard
    } else {
512 baca51fa bellard
        fdctrl->dma_en = 0;
513 8977f3c1 bellard
    }
514 baca51fa bellard
    for (i = 0; i < 2; i++) {
515 baca51fa bellard
        fd_init(&fdctrl->drives[i], fds[i]);
516 caed8802 bellard
    }
517 baca51fa bellard
    fdctrl_reset(fdctrl, 0);
518 baca51fa bellard
    fdctrl->state = FD_CTRL_ACTIVE;
519 8977f3c1 bellard
    if (mem_mapped) {
520 e80cfcfc bellard
        io_mem = cpu_register_io_memory(0, fdctrl_mem_read, fdctrl_mem_write, fdctrl);
521 e80cfcfc bellard
        cpu_register_physical_memory(io_base, 0x08, io_mem);
522 8977f3c1 bellard
    } else {
523 baca51fa bellard
        register_ioport_read(io_base + 0x01, 5, 1, &fdctrl_read, fdctrl);
524 baca51fa bellard
        register_ioport_read(io_base + 0x07, 1, 1, &fdctrl_read, fdctrl);
525 baca51fa bellard
        register_ioport_write(io_base + 0x01, 5, 1, &fdctrl_write, fdctrl);
526 baca51fa bellard
        register_ioport_write(io_base + 0x07, 1, 1, &fdctrl_write, fdctrl);
527 8977f3c1 bellard
    }
528 a541f297 bellard
    for (i = 0; i < 2; i++) {
529 baca51fa bellard
        fd_revalidate(&fdctrl->drives[i]);
530 8977f3c1 bellard
    }
531 a541f297 bellard
532 baca51fa bellard
    return fdctrl;
533 caed8802 bellard
}
534 8977f3c1 bellard
535 baca51fa bellard
/* XXX: may change if moved to bdrv */
536 baca51fa bellard
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num)
537 caed8802 bellard
{
538 baca51fa bellard
    return fdctrl->drives[drive_num].drive;
539 8977f3c1 bellard
}
540 8977f3c1 bellard
541 8977f3c1 bellard
/* Change IRQ state */
542 baca51fa bellard
static void fdctrl_reset_irq (fdctrl_t *fdctrl)
543 8977f3c1 bellard
{
544 ed5fd2cc bellard
    FLOPPY_DPRINTF("Reset interrupt\n");
545 ed5fd2cc bellard
    pic_set_irq(fdctrl->irq_lvl, 0);
546 ed5fd2cc bellard
    fdctrl->state &= ~FD_CTRL_INTR;
547 8977f3c1 bellard
}
548 8977f3c1 bellard
549 baca51fa bellard
static void fdctrl_raise_irq (fdctrl_t *fdctrl, uint8_t status)
550 8977f3c1 bellard
{
551 6f7e9aec bellard
#ifdef TARGET_SPARC
552 6f7e9aec bellard
    // Sparc mutation
553 6f7e9aec bellard
    if (!fdctrl->dma_en) {
554 6f7e9aec bellard
        fdctrl->state &= ~FD_CTRL_BUSY;
555 6f7e9aec bellard
        fdctrl->int_status = status;
556 6f7e9aec bellard
        return;
557 6f7e9aec bellard
    }
558 6f7e9aec bellard
#endif
559 baca51fa bellard
    if (~(fdctrl->state & FD_CTRL_INTR)) {
560 baca51fa bellard
        pic_set_irq(fdctrl->irq_lvl, 1);
561 baca51fa bellard
        fdctrl->state |= FD_CTRL_INTR;
562 8977f3c1 bellard
    }
563 8977f3c1 bellard
    FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", status);
564 baca51fa bellard
    fdctrl->int_status = status;
565 8977f3c1 bellard
}
566 8977f3c1 bellard
567 4b19ec0c bellard
/* Reset controller */
568 baca51fa bellard
static void fdctrl_reset (fdctrl_t *fdctrl, int do_irq)
569 8977f3c1 bellard
{
570 8977f3c1 bellard
    int i;
571 8977f3c1 bellard
572 4b19ec0c bellard
    FLOPPY_DPRINTF("reset controller\n");
573 baca51fa bellard
    fdctrl_reset_irq(fdctrl);
574 4b19ec0c bellard
    /* Initialise controller */
575 baca51fa bellard
    fdctrl->cur_drv = 0;
576 8977f3c1 bellard
    /* FIFO state */
577 baca51fa bellard
    fdctrl->data_pos = 0;
578 baca51fa bellard
    fdctrl->data_len = 0;
579 baca51fa bellard
    fdctrl->data_state = FD_STATE_CMD;
580 baca51fa bellard
    fdctrl->data_dir = FD_DIR_WRITE;
581 8977f3c1 bellard
    for (i = 0; i < MAX_FD; i++)
582 baca51fa bellard
        fd_reset(&fdctrl->drives[i]);
583 baca51fa bellard
    fdctrl_reset_fifo(fdctrl);
584 8977f3c1 bellard
    if (do_irq)
585 ed5fd2cc bellard
        fdctrl_raise_irq(fdctrl, 0xc0);
586 baca51fa bellard
}
587 baca51fa bellard
588 baca51fa bellard
static inline fdrive_t *drv0 (fdctrl_t *fdctrl)
589 baca51fa bellard
{
590 baca51fa bellard
    return &fdctrl->drives[fdctrl->bootsel];
591 baca51fa bellard
}
592 baca51fa bellard
593 baca51fa bellard
static inline fdrive_t *drv1 (fdctrl_t *fdctrl)
594 baca51fa bellard
{
595 baca51fa bellard
    return &fdctrl->drives[1 - fdctrl->bootsel];
596 baca51fa bellard
}
597 baca51fa bellard
598 baca51fa bellard
static fdrive_t *get_cur_drv (fdctrl_t *fdctrl)
599 baca51fa bellard
{
600 baca51fa bellard
    return fdctrl->cur_drv == 0 ? drv0(fdctrl) : drv1(fdctrl);
601 8977f3c1 bellard
}
602 8977f3c1 bellard
603 8977f3c1 bellard
/* Status B register : 0x01 (read-only) */
604 baca51fa bellard
static uint32_t fdctrl_read_statusB (fdctrl_t *fdctrl)
605 8977f3c1 bellard
{
606 8977f3c1 bellard
    FLOPPY_DPRINTF("status register: 0x00\n");
607 8977f3c1 bellard
    return 0;
608 8977f3c1 bellard
}
609 8977f3c1 bellard
610 8977f3c1 bellard
/* Digital output register : 0x02 */
611 baca51fa bellard
static uint32_t fdctrl_read_dor (fdctrl_t *fdctrl)
612 8977f3c1 bellard
{
613 8977f3c1 bellard
    uint32_t retval = 0;
614 8977f3c1 bellard
615 8977f3c1 bellard
    /* Drive motors state indicators */
616 baca51fa bellard
    if (drv0(fdctrl)->drflags & FDRIVE_MOTOR_ON)
617 baca51fa bellard
        retval |= 1 << 5;
618 baca51fa bellard
    if (drv1(fdctrl)->drflags & FDRIVE_MOTOR_ON)
619 baca51fa bellard
        retval |= 1 << 4;
620 8977f3c1 bellard
    /* DMA enable */
621 baca51fa bellard
    retval |= fdctrl->dma_en << 3;
622 8977f3c1 bellard
    /* Reset indicator */
623 baca51fa bellard
    retval |= (fdctrl->state & FD_CTRL_RESET) == 0 ? 0x04 : 0;
624 8977f3c1 bellard
    /* Selected drive */
625 baca51fa bellard
    retval |= fdctrl->cur_drv;
626 8977f3c1 bellard
    FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
627 8977f3c1 bellard
628 8977f3c1 bellard
    return retval;
629 8977f3c1 bellard
}
630 8977f3c1 bellard
631 baca51fa bellard
static void fdctrl_write_dor (fdctrl_t *fdctrl, uint32_t value)
632 8977f3c1 bellard
{
633 8977f3c1 bellard
    /* Reset mode */
634 baca51fa bellard
    if (fdctrl->state & FD_CTRL_RESET) {
635 8977f3c1 bellard
        if (!(value & 0x04)) {
636 4b19ec0c bellard
            FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
637 8977f3c1 bellard
            return;
638 8977f3c1 bellard
        }
639 8977f3c1 bellard
    }
640 8977f3c1 bellard
    FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
641 8977f3c1 bellard
    /* Drive motors state indicators */
642 8977f3c1 bellard
    if (value & 0x20)
643 baca51fa bellard
        fd_start(drv1(fdctrl));
644 8977f3c1 bellard
    else
645 baca51fa bellard
        fd_stop(drv1(fdctrl));
646 8977f3c1 bellard
    if (value & 0x10)
647 baca51fa bellard
        fd_start(drv0(fdctrl));
648 8977f3c1 bellard
    else
649 baca51fa bellard
        fd_stop(drv0(fdctrl));
650 8977f3c1 bellard
    /* DMA enable */
651 8977f3c1 bellard
#if 0
652 baca51fa bellard
    if (fdctrl->dma_chann != -1)
653 baca51fa bellard
        fdctrl->dma_en = 1 - ((value >> 3) & 1);
654 8977f3c1 bellard
#endif
655 8977f3c1 bellard
    /* Reset */
656 8977f3c1 bellard
    if (!(value & 0x04)) {
657 baca51fa bellard
        if (!(fdctrl->state & FD_CTRL_RESET)) {
658 4b19ec0c bellard
            FLOPPY_DPRINTF("controller enter RESET state\n");
659 baca51fa bellard
            fdctrl->state |= FD_CTRL_RESET;
660 8977f3c1 bellard
        }
661 8977f3c1 bellard
    } else {
662 baca51fa bellard
        if (fdctrl->state & FD_CTRL_RESET) {
663 4b19ec0c bellard
            FLOPPY_DPRINTF("controller out of RESET state\n");
664 fb6cf1d0 bellard
            fdctrl_reset(fdctrl, 1);
665 baca51fa bellard
            fdctrl->state &= ~(FD_CTRL_RESET | FD_CTRL_SLEEP);
666 8977f3c1 bellard
        }
667 8977f3c1 bellard
    }
668 8977f3c1 bellard
    /* Selected drive */
669 baca51fa bellard
    fdctrl->cur_drv = value & 1;
670 8977f3c1 bellard
}
671 8977f3c1 bellard
672 8977f3c1 bellard
/* Tape drive register : 0x03 */
673 baca51fa bellard
static uint32_t fdctrl_read_tape (fdctrl_t *fdctrl)
674 8977f3c1 bellard
{
675 8977f3c1 bellard
    uint32_t retval = 0;
676 8977f3c1 bellard
677 8977f3c1 bellard
    /* Disk boot selection indicator */
678 baca51fa bellard
    retval |= fdctrl->bootsel << 2;
679 8977f3c1 bellard
    /* Tape indicators: never allowed */
680 8977f3c1 bellard
    FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
681 8977f3c1 bellard
682 8977f3c1 bellard
    return retval;
683 8977f3c1 bellard
}
684 8977f3c1 bellard
685 baca51fa bellard
static void fdctrl_write_tape (fdctrl_t *fdctrl, uint32_t value)
686 8977f3c1 bellard
{
687 8977f3c1 bellard
    /* Reset mode */
688 baca51fa bellard
    if (fdctrl->state & FD_CTRL_RESET) {
689 4b19ec0c bellard
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
690 8977f3c1 bellard
        return;
691 8977f3c1 bellard
    }
692 8977f3c1 bellard
    FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
693 8977f3c1 bellard
    /* Disk boot selection indicator */
694 baca51fa bellard
    fdctrl->bootsel = (value >> 2) & 1;
695 8977f3c1 bellard
    /* Tape indicators: never allow */
696 8977f3c1 bellard
}
697 8977f3c1 bellard
698 8977f3c1 bellard
/* Main status register : 0x04 (read) */
699 baca51fa bellard
static uint32_t fdctrl_read_main_status (fdctrl_t *fdctrl)
700 8977f3c1 bellard
{
701 8977f3c1 bellard
    uint32_t retval = 0;
702 8977f3c1 bellard
703 baca51fa bellard
    fdctrl->state &= ~(FD_CTRL_SLEEP | FD_CTRL_RESET);
704 baca51fa bellard
    if (!(fdctrl->state & FD_CTRL_BUSY)) {
705 8977f3c1 bellard
        /* Data transfer allowed */
706 8977f3c1 bellard
        retval |= 0x80;
707 8977f3c1 bellard
        /* Data transfer direction indicator */
708 baca51fa bellard
        if (fdctrl->data_dir == FD_DIR_READ)
709 8977f3c1 bellard
            retval |= 0x40;
710 8977f3c1 bellard
    }
711 8977f3c1 bellard
    /* Should handle 0x20 for SPECIFY command */
712 8977f3c1 bellard
    /* Command busy indicator */
713 baca51fa bellard
    if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA ||
714 baca51fa bellard
        FD_STATE(fdctrl->data_state) == FD_STATE_STATUS)
715 8977f3c1 bellard
        retval |= 0x10;
716 8977f3c1 bellard
    FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
717 8977f3c1 bellard
718 8977f3c1 bellard
    return retval;
719 8977f3c1 bellard
}
720 8977f3c1 bellard
721 8977f3c1 bellard
/* Data select rate register : 0x04 (write) */
722 baca51fa bellard
static void fdctrl_write_rate (fdctrl_t *fdctrl, uint32_t value)
723 8977f3c1 bellard
{
724 8977f3c1 bellard
    /* Reset mode */
725 baca51fa bellard
    if (fdctrl->state & FD_CTRL_RESET) {
726 4b19ec0c bellard
            FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
727 8977f3c1 bellard
            return;
728 8977f3c1 bellard
        }
729 8977f3c1 bellard
    FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
730 8977f3c1 bellard
    /* Reset: autoclear */
731 8977f3c1 bellard
    if (value & 0x80) {
732 baca51fa bellard
        fdctrl->state |= FD_CTRL_RESET;
733 baca51fa bellard
        fdctrl_reset(fdctrl, 1);
734 baca51fa bellard
        fdctrl->state &= ~FD_CTRL_RESET;
735 8977f3c1 bellard
    }
736 8977f3c1 bellard
    if (value & 0x40) {
737 baca51fa bellard
        fdctrl->state |= FD_CTRL_SLEEP;
738 baca51fa bellard
        fdctrl_reset(fdctrl, 1);
739 8977f3c1 bellard
    }
740 8977f3c1 bellard
//        fdctrl.precomp = (value >> 2) & 0x07;
741 8977f3c1 bellard
}
742 8977f3c1 bellard
743 ea185bbd bellard
static int fdctrl_media_changed(fdrive_t *drv)
744 ea185bbd bellard
{
745 ea185bbd bellard
    int ret;
746 ea185bbd bellard
    if (!drv->bs) 
747 ea185bbd bellard
        return 0;
748 ea185bbd bellard
    ret = bdrv_media_changed(drv->bs);
749 ea185bbd bellard
    if (ret) {
750 ea185bbd bellard
        fd_revalidate(drv);
751 ea185bbd bellard
    }
752 ea185bbd bellard
    return ret;
753 ea185bbd bellard
}
754 ea185bbd bellard
755 8977f3c1 bellard
/* Digital input register : 0x07 (read-only) */
756 baca51fa bellard
static uint32_t fdctrl_read_dir (fdctrl_t *fdctrl)
757 8977f3c1 bellard
{
758 8977f3c1 bellard
    uint32_t retval = 0;
759 8977f3c1 bellard
760 ea185bbd bellard
    if (fdctrl_media_changed(drv0(fdctrl)) ||
761 ea185bbd bellard
        fdctrl_media_changed(drv1(fdctrl)))
762 8977f3c1 bellard
        retval |= 0x80;
763 8977f3c1 bellard
    if (retval != 0)
764 baca51fa bellard
        FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
765 8977f3c1 bellard
766 8977f3c1 bellard
    return retval;
767 8977f3c1 bellard
}
768 8977f3c1 bellard
769 8977f3c1 bellard
/* FIFO state control */
770 baca51fa bellard
static void fdctrl_reset_fifo (fdctrl_t *fdctrl)
771 8977f3c1 bellard
{
772 baca51fa bellard
    fdctrl->data_dir = FD_DIR_WRITE;
773 baca51fa bellard
    fdctrl->data_pos = 0;
774 baca51fa bellard
    FD_SET_STATE(fdctrl->data_state, FD_STATE_CMD);
775 8977f3c1 bellard
}
776 8977f3c1 bellard
777 8977f3c1 bellard
/* Set FIFO status for the host to read */
778 baca51fa bellard
static void fdctrl_set_fifo (fdctrl_t *fdctrl, int fifo_len, int do_irq)
779 8977f3c1 bellard
{
780 baca51fa bellard
    fdctrl->data_dir = FD_DIR_READ;
781 baca51fa bellard
    fdctrl->data_len = fifo_len;
782 baca51fa bellard
    fdctrl->data_pos = 0;
783 baca51fa bellard
    FD_SET_STATE(fdctrl->data_state, FD_STATE_STATUS);
784 8977f3c1 bellard
    if (do_irq)
785 baca51fa bellard
        fdctrl_raise_irq(fdctrl, 0x00);
786 8977f3c1 bellard
}
787 8977f3c1 bellard
788 8977f3c1 bellard
/* Set an error: unimplemented/unknown command */
789 baca51fa bellard
static void fdctrl_unimplemented (fdctrl_t *fdctrl)
790 8977f3c1 bellard
{
791 8977f3c1 bellard
#if 0
792 baca51fa bellard
    fdrive_t *cur_drv;
793 baca51fa bellard

794 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
795 890fa6be bellard
    fdctrl->fifo[0] = 0x60 | (cur_drv->head << 2) | fdctrl->cur_drv;
796 baca51fa bellard
    fdctrl->fifo[1] = 0x00;
797 baca51fa bellard
    fdctrl->fifo[2] = 0x00;
798 baca51fa bellard
    fdctrl_set_fifo(fdctrl, 3, 1);
799 8977f3c1 bellard
#else
800 baca51fa bellard
    //    fdctrl_reset_fifo(fdctrl);
801 baca51fa bellard
    fdctrl->fifo[0] = 0x80;
802 baca51fa bellard
    fdctrl_set_fifo(fdctrl, 1, 0);
803 8977f3c1 bellard
#endif
804 8977f3c1 bellard
}
805 8977f3c1 bellard
806 8977f3c1 bellard
/* Callback for transfer end (stop or abort) */
807 baca51fa bellard
static void fdctrl_stop_transfer (fdctrl_t *fdctrl, uint8_t status0,
808 baca51fa bellard
                                  uint8_t status1, uint8_t status2)
809 8977f3c1 bellard
{
810 baca51fa bellard
    fdrive_t *cur_drv;
811 8977f3c1 bellard
812 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
813 8977f3c1 bellard
    FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
814 8977f3c1 bellard
                   status0, status1, status2,
815 890fa6be bellard
                   status0 | (cur_drv->head << 2) | fdctrl->cur_drv);
816 890fa6be bellard
    fdctrl->fifo[0] = status0 | (cur_drv->head << 2) | fdctrl->cur_drv;
817 baca51fa bellard
    fdctrl->fifo[1] = status1;
818 baca51fa bellard
    fdctrl->fifo[2] = status2;
819 baca51fa bellard
    fdctrl->fifo[3] = cur_drv->track;
820 baca51fa bellard
    fdctrl->fifo[4] = cur_drv->head;
821 baca51fa bellard
    fdctrl->fifo[5] = cur_drv->sect;
822 baca51fa bellard
    fdctrl->fifo[6] = FD_SECTOR_SC;
823 baca51fa bellard
    fdctrl->data_dir = FD_DIR_READ;
824 ed5fd2cc bellard
    if (fdctrl->state & FD_CTRL_BUSY) {
825 baca51fa bellard
        DMA_release_DREQ(fdctrl->dma_chann);
826 ed5fd2cc bellard
        fdctrl->state &= ~FD_CTRL_BUSY;
827 ed5fd2cc bellard
    }
828 baca51fa bellard
    fdctrl_set_fifo(fdctrl, 7, 1);
829 8977f3c1 bellard
}
830 8977f3c1 bellard
831 8977f3c1 bellard
/* Prepare a data transfer (either DMA or FIFO) */
832 baca51fa bellard
static void fdctrl_start_transfer (fdctrl_t *fdctrl, int direction)
833 8977f3c1 bellard
{
834 baca51fa bellard
    fdrive_t *cur_drv;
835 8977f3c1 bellard
    uint8_t kh, kt, ks;
836 8977f3c1 bellard
    int did_seek;
837 8977f3c1 bellard
838 baca51fa bellard
    fdctrl->cur_drv = fdctrl->fifo[1] & 1;
839 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
840 baca51fa bellard
    kt = fdctrl->fifo[2];
841 baca51fa bellard
    kh = fdctrl->fifo[3];
842 baca51fa bellard
    ks = fdctrl->fifo[4];
843 4b19ec0c bellard
    FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
844 baca51fa bellard
                   fdctrl->cur_drv, kh, kt, ks,
845 8977f3c1 bellard
                   _fd_sector(kh, kt, ks, cur_drv->last_sect));
846 8977f3c1 bellard
    did_seek = 0;
847 baca51fa bellard
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
848 8977f3c1 bellard
    case 2:
849 8977f3c1 bellard
        /* sect too big */
850 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
851 baca51fa bellard
        fdctrl->fifo[3] = kt;
852 baca51fa bellard
        fdctrl->fifo[4] = kh;
853 baca51fa bellard
        fdctrl->fifo[5] = ks;
854 8977f3c1 bellard
        return;
855 8977f3c1 bellard
    case 3:
856 8977f3c1 bellard
        /* track too big */
857 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00);
858 baca51fa bellard
        fdctrl->fifo[3] = kt;
859 baca51fa bellard
        fdctrl->fifo[4] = kh;
860 baca51fa bellard
        fdctrl->fifo[5] = ks;
861 8977f3c1 bellard
        return;
862 8977f3c1 bellard
    case 4:
863 8977f3c1 bellard
        /* No seek enabled */
864 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
865 baca51fa bellard
        fdctrl->fifo[3] = kt;
866 baca51fa bellard
        fdctrl->fifo[4] = kh;
867 baca51fa bellard
        fdctrl->fifo[5] = ks;
868 8977f3c1 bellard
        return;
869 8977f3c1 bellard
    case 1:
870 8977f3c1 bellard
        did_seek = 1;
871 8977f3c1 bellard
        break;
872 8977f3c1 bellard
    default:
873 8977f3c1 bellard
        break;
874 8977f3c1 bellard
    }
875 8977f3c1 bellard
    /* Set the FIFO state */
876 baca51fa bellard
    fdctrl->data_dir = direction;
877 baca51fa bellard
    fdctrl->data_pos = 0;
878 baca51fa bellard
    FD_SET_STATE(fdctrl->data_state, FD_STATE_DATA); /* FIFO ready for data */
879 baca51fa bellard
    if (fdctrl->fifo[0] & 0x80)
880 baca51fa bellard
        fdctrl->data_state |= FD_STATE_MULTI;
881 baca51fa bellard
    else
882 baca51fa bellard
        fdctrl->data_state &= ~FD_STATE_MULTI;
883 8977f3c1 bellard
    if (did_seek)
884 baca51fa bellard
        fdctrl->data_state |= FD_STATE_SEEK;
885 baca51fa bellard
    else
886 baca51fa bellard
        fdctrl->data_state &= ~FD_STATE_SEEK;
887 baca51fa bellard
    if (fdctrl->fifo[5] == 00) {
888 baca51fa bellard
        fdctrl->data_len = fdctrl->fifo[8];
889 baca51fa bellard
    } else {
890 baca51fa bellard
        int tmp;
891 3bcb80f1 ths
        fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
892 baca51fa bellard
        tmp = (cur_drv->last_sect - ks + 1);
893 baca51fa bellard
        if (fdctrl->fifo[0] & 0x80)
894 baca51fa bellard
            tmp += cur_drv->last_sect;
895 baca51fa bellard
        fdctrl->data_len *= tmp;
896 baca51fa bellard
    }
897 890fa6be bellard
    fdctrl->eot = fdctrl->fifo[6];
898 baca51fa bellard
    if (fdctrl->dma_en) {
899 8977f3c1 bellard
        int dma_mode;
900 8977f3c1 bellard
        /* DMA transfer are enabled. Check if DMA channel is well programmed */
901 baca51fa bellard
        dma_mode = DMA_get_channel_mode(fdctrl->dma_chann);
902 8977f3c1 bellard
        dma_mode = (dma_mode >> 2) & 3;
903 baca51fa bellard
        FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
904 baca51fa bellard
                       dma_mode, direction,
905 baca51fa bellard
                       (128 << fdctrl->fifo[5]) *
906 baca51fa bellard
                       (cur_drv->last_sect - ks + 1), fdctrl->data_len);
907 8977f3c1 bellard
        if (((direction == FD_DIR_SCANE || direction == FD_DIR_SCANL ||
908 8977f3c1 bellard
              direction == FD_DIR_SCANH) && dma_mode == 0) ||
909 8977f3c1 bellard
            (direction == FD_DIR_WRITE && dma_mode == 2) ||
910 8977f3c1 bellard
            (direction == FD_DIR_READ && dma_mode == 1)) {
911 8977f3c1 bellard
            /* No access is allowed until DMA transfer has completed */
912 baca51fa bellard
            fdctrl->state |= FD_CTRL_BUSY;
913 4b19ec0c bellard
            /* Now, we just have to wait for the DMA controller to
914 8977f3c1 bellard
             * recall us...
915 8977f3c1 bellard
             */
916 baca51fa bellard
            DMA_hold_DREQ(fdctrl->dma_chann);
917 baca51fa bellard
            DMA_schedule(fdctrl->dma_chann);
918 8977f3c1 bellard
            return;
919 baca51fa bellard
        } else {
920 baca51fa bellard
            FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
921 8977f3c1 bellard
        }
922 8977f3c1 bellard
    }
923 8977f3c1 bellard
    FLOPPY_DPRINTF("start non-DMA transfer\n");
924 8977f3c1 bellard
    /* IO based transfer: calculate len */
925 baca51fa bellard
    fdctrl_raise_irq(fdctrl, 0x00);
926 8977f3c1 bellard
927 8977f3c1 bellard
    return;
928 8977f3c1 bellard
}
929 8977f3c1 bellard
930 8977f3c1 bellard
/* Prepare a transfer of deleted data */
931 baca51fa bellard
static void fdctrl_start_transfer_del (fdctrl_t *fdctrl, int direction)
932 8977f3c1 bellard
{
933 8977f3c1 bellard
    /* We don't handle deleted data,
934 8977f3c1 bellard
     * so we don't return *ANYTHING*
935 8977f3c1 bellard
     */
936 baca51fa bellard
    fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
937 8977f3c1 bellard
}
938 8977f3c1 bellard
939 8977f3c1 bellard
/* handlers for DMA transfers */
940 85571bc7 bellard
static int fdctrl_transfer_handler (void *opaque, int nchan,
941 85571bc7 bellard
                                    int dma_pos, int dma_len)
942 8977f3c1 bellard
{
943 baca51fa bellard
    fdctrl_t *fdctrl;
944 baca51fa bellard
    fdrive_t *cur_drv;
945 baca51fa bellard
    int len, start_pos, rel_pos;
946 8977f3c1 bellard
    uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
947 8977f3c1 bellard
948 baca51fa bellard
    fdctrl = opaque;
949 baca51fa bellard
    if (!(fdctrl->state & FD_CTRL_BUSY)) {
950 8977f3c1 bellard
        FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
951 8977f3c1 bellard
        return 0;
952 8977f3c1 bellard
    }
953 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
954 baca51fa bellard
    if (fdctrl->data_dir == FD_DIR_SCANE || fdctrl->data_dir == FD_DIR_SCANL ||
955 baca51fa bellard
        fdctrl->data_dir == FD_DIR_SCANH)
956 8977f3c1 bellard
        status2 = 0x04;
957 85571bc7 bellard
    if (dma_len > fdctrl->data_len)
958 85571bc7 bellard
        dma_len = fdctrl->data_len;
959 890fa6be bellard
    if (cur_drv->bs == NULL) {
960 baca51fa bellard
        if (fdctrl->data_dir == FD_DIR_WRITE)
961 baca51fa bellard
            fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
962 baca51fa bellard
        else
963 baca51fa bellard
            fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
964 baca51fa bellard
        len = 0;
965 890fa6be bellard
        goto transfer_error;
966 890fa6be bellard
    }
967 baca51fa bellard
    rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
968 85571bc7 bellard
    for (start_pos = fdctrl->data_pos; fdctrl->data_pos < dma_len;) {
969 85571bc7 bellard
        len = dma_len - fdctrl->data_pos;
970 baca51fa bellard
        if (len + rel_pos > FD_SECTOR_LEN)
971 baca51fa bellard
            len = FD_SECTOR_LEN - rel_pos;
972 6f7e9aec bellard
        FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x "
973 6f7e9aec bellard
                       "(%d-0x%08x 0x%08x)\n", len, dma_len, fdctrl->data_pos,
974 baca51fa bellard
                       fdctrl->data_len, fdctrl->cur_drv, cur_drv->head,
975 baca51fa bellard
                       cur_drv->track, cur_drv->sect, fd_sector(cur_drv),
976 6f7e9aec bellard
                       fd_sector(cur_drv) * 512);
977 baca51fa bellard
        if (fdctrl->data_dir != FD_DIR_WRITE ||
978 baca51fa bellard
            len < FD_SECTOR_LEN || rel_pos != 0) {
979 baca51fa bellard
            /* READ & SCAN commands and realign to a sector for WRITE */
980 baca51fa bellard
            if (bdrv_read(cur_drv->bs, fd_sector(cur_drv),
981 baca51fa bellard
                          fdctrl->fifo, 1) < 0) {
982 8977f3c1 bellard
                FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
983 8977f3c1 bellard
                               fd_sector(cur_drv));
984 8977f3c1 bellard
                /* Sure, image size is too small... */
985 baca51fa bellard
                memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
986 8977f3c1 bellard
            }
987 890fa6be bellard
        }
988 baca51fa bellard
        switch (fdctrl->data_dir) {
989 baca51fa bellard
        case FD_DIR_READ:
990 baca51fa bellard
            /* READ commands */
991 85571bc7 bellard
            DMA_write_memory (nchan, fdctrl->fifo + rel_pos,
992 85571bc7 bellard
                              fdctrl->data_pos, len);
993 85571bc7 bellard
/*             cpu_physical_memory_write(addr + fdctrl->data_pos, */
994 85571bc7 bellard
/*                                       fdctrl->fifo + rel_pos, len); */
995 baca51fa bellard
            break;
996 baca51fa bellard
        case FD_DIR_WRITE:
997 baca51fa bellard
            /* WRITE commands */
998 85571bc7 bellard
            DMA_read_memory (nchan, fdctrl->fifo + rel_pos,
999 85571bc7 bellard
                             fdctrl->data_pos, len);
1000 85571bc7 bellard
/*             cpu_physical_memory_read(addr + fdctrl->data_pos, */
1001 85571bc7 bellard
/*                                      fdctrl->fifo + rel_pos, len); */
1002 baca51fa bellard
            if (bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1003 baca51fa bellard
                           fdctrl->fifo, 1) < 0) {
1004 baca51fa bellard
                FLOPPY_ERROR("writting sector %d\n", fd_sector(cur_drv));
1005 baca51fa bellard
                fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1006 baca51fa bellard
                goto transfer_error;
1007 890fa6be bellard
            }
1008 baca51fa bellard
            break;
1009 baca51fa bellard
        default:
1010 baca51fa bellard
            /* SCAN commands */
1011 baca51fa bellard
            {
1012 baca51fa bellard
                uint8_t tmpbuf[FD_SECTOR_LEN];
1013 baca51fa bellard
                int ret;
1014 85571bc7 bellard
                DMA_read_memory (nchan, tmpbuf, fdctrl->data_pos, len);
1015 85571bc7 bellard
/*                 cpu_physical_memory_read(addr + fdctrl->data_pos, */
1016 85571bc7 bellard
/*                                          tmpbuf, len); */
1017 baca51fa bellard
                ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1018 8977f3c1 bellard
                if (ret == 0) {
1019 8977f3c1 bellard
                    status2 = 0x08;
1020 8977f3c1 bellard
                    goto end_transfer;
1021 8977f3c1 bellard
                }
1022 baca51fa bellard
                if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) ||
1023 baca51fa bellard
                    (ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1024 8977f3c1 bellard
                    status2 = 0x00;
1025 8977f3c1 bellard
                    goto end_transfer;
1026 8977f3c1 bellard
                }
1027 8977f3c1 bellard
            }
1028 baca51fa bellard
            break;
1029 8977f3c1 bellard
        }
1030 baca51fa bellard
        fdctrl->data_pos += len;
1031 baca51fa bellard
        rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1032 baca51fa bellard
        if (rel_pos == 0) {
1033 8977f3c1 bellard
            /* Seek to next sector */
1034 baca51fa bellard
            FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d) (%d)\n",
1035 baca51fa bellard
                           cur_drv->head, cur_drv->track, cur_drv->sect,
1036 baca51fa bellard
                           fd_sector(cur_drv),
1037 6f7e9aec bellard
                           fdctrl->data_pos - len);
1038 890fa6be bellard
            /* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1039 890fa6be bellard
               error in fact */
1040 890fa6be bellard
            if (cur_drv->sect >= cur_drv->last_sect ||
1041 890fa6be bellard
                cur_drv->sect == fdctrl->eot) {
1042 baca51fa bellard
                cur_drv->sect = 1;
1043 baca51fa bellard
                if (FD_MULTI_TRACK(fdctrl->data_state)) {
1044 baca51fa bellard
                    if (cur_drv->head == 0 &&
1045 baca51fa bellard
                        (cur_drv->flags & FDISK_DBL_SIDES) != 0) {        
1046 890fa6be bellard
                        cur_drv->head = 1;
1047 890fa6be bellard
                    } else {
1048 890fa6be bellard
                        cur_drv->head = 0;
1049 baca51fa bellard
                        cur_drv->track++;
1050 baca51fa bellard
                        if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1051 baca51fa bellard
                            break;
1052 890fa6be bellard
                    }
1053 890fa6be bellard
                } else {
1054 890fa6be bellard
                    cur_drv->track++;
1055 890fa6be bellard
                    break;
1056 8977f3c1 bellard
                }
1057 baca51fa bellard
                FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1058 baca51fa bellard
                               cur_drv->head, cur_drv->track,
1059 baca51fa bellard
                               cur_drv->sect, fd_sector(cur_drv));
1060 890fa6be bellard
            } else {
1061 890fa6be bellard
                cur_drv->sect++;
1062 8977f3c1 bellard
            }
1063 8977f3c1 bellard
        }
1064 8977f3c1 bellard
    }
1065 8977f3c1 bellard
end_transfer:
1066 baca51fa bellard
    len = fdctrl->data_pos - start_pos;
1067 baca51fa bellard
    FLOPPY_DPRINTF("end transfer %d %d %d\n",
1068 baca51fa bellard
                   fdctrl->data_pos, len, fdctrl->data_len);
1069 baca51fa bellard
    if (fdctrl->data_dir == FD_DIR_SCANE ||
1070 baca51fa bellard
        fdctrl->data_dir == FD_DIR_SCANL ||
1071 baca51fa bellard
        fdctrl->data_dir == FD_DIR_SCANH)
1072 8977f3c1 bellard
        status2 = 0x08;
1073 baca51fa bellard
    if (FD_DID_SEEK(fdctrl->data_state))
1074 8977f3c1 bellard
        status0 |= 0x20;
1075 baca51fa bellard
    fdctrl->data_len -= len;
1076 baca51fa bellard
    //    if (fdctrl->data_len == 0)
1077 890fa6be bellard
    fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1078 8977f3c1 bellard
transfer_error:
1079 8977f3c1 bellard
1080 baca51fa bellard
    return len;
1081 8977f3c1 bellard
}
1082 8977f3c1 bellard
1083 8977f3c1 bellard
/* Data register : 0x05 */
1084 baca51fa bellard
static uint32_t fdctrl_read_data (fdctrl_t *fdctrl)
1085 8977f3c1 bellard
{
1086 baca51fa bellard
    fdrive_t *cur_drv;
1087 8977f3c1 bellard
    uint32_t retval = 0;
1088 8977f3c1 bellard
    int pos, len;
1089 8977f3c1 bellard
1090 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
1091 baca51fa bellard
    fdctrl->state &= ~FD_CTRL_SLEEP;
1092 baca51fa bellard
    if (FD_STATE(fdctrl->data_state) == FD_STATE_CMD) {
1093 8977f3c1 bellard
        FLOPPY_ERROR("can't read data in CMD state\n");
1094 8977f3c1 bellard
        return 0;
1095 8977f3c1 bellard
    }
1096 baca51fa bellard
    pos = fdctrl->data_pos;
1097 baca51fa bellard
    if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1098 8977f3c1 bellard
        pos %= FD_SECTOR_LEN;
1099 8977f3c1 bellard
        if (pos == 0) {
1100 baca51fa bellard
            len = fdctrl->data_len - fdctrl->data_pos;
1101 8977f3c1 bellard
            if (len > FD_SECTOR_LEN)
1102 8977f3c1 bellard
                len = FD_SECTOR_LEN;
1103 8977f3c1 bellard
            bdrv_read(cur_drv->bs, fd_sector(cur_drv),
1104 baca51fa bellard
                      fdctrl->fifo, len);
1105 8977f3c1 bellard
        }
1106 8977f3c1 bellard
    }
1107 baca51fa bellard
    retval = fdctrl->fifo[pos];
1108 baca51fa bellard
    if (++fdctrl->data_pos == fdctrl->data_len) {
1109 baca51fa bellard
        fdctrl->data_pos = 0;
1110 890fa6be bellard
        /* Switch from transfer mode to status mode
1111 8977f3c1 bellard
         * then from status mode to command mode
1112 8977f3c1 bellard
         */
1113 ed5fd2cc bellard
        if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1114 baca51fa bellard
            fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
1115 ed5fd2cc bellard
        } else {
1116 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1117 ed5fd2cc bellard
            fdctrl_reset_irq(fdctrl);
1118 ed5fd2cc bellard
        }
1119 8977f3c1 bellard
    }
1120 8977f3c1 bellard
    FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1121 8977f3c1 bellard
1122 8977f3c1 bellard
    return retval;
1123 8977f3c1 bellard
}
1124 8977f3c1 bellard
1125 baca51fa bellard
static void fdctrl_format_sector (fdctrl_t *fdctrl)
1126 8977f3c1 bellard
{
1127 baca51fa bellard
    fdrive_t *cur_drv;
1128 baca51fa bellard
    uint8_t kh, kt, ks;
1129 baca51fa bellard
    int did_seek;
1130 8977f3c1 bellard
1131 baca51fa bellard
    fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1132 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
1133 baca51fa bellard
    kt = fdctrl->fifo[6];
1134 baca51fa bellard
    kh = fdctrl->fifo[7];
1135 baca51fa bellard
    ks = fdctrl->fifo[8];
1136 baca51fa bellard
    FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1137 baca51fa bellard
                   fdctrl->cur_drv, kh, kt, ks,
1138 baca51fa bellard
                   _fd_sector(kh, kt, ks, cur_drv->last_sect));
1139 baca51fa bellard
    did_seek = 0;
1140 baca51fa bellard
    switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & 0x40)) {
1141 baca51fa bellard
    case 2:
1142 baca51fa bellard
        /* sect too big */
1143 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1144 baca51fa bellard
        fdctrl->fifo[3] = kt;
1145 baca51fa bellard
        fdctrl->fifo[4] = kh;
1146 baca51fa bellard
        fdctrl->fifo[5] = ks;
1147 baca51fa bellard
        return;
1148 baca51fa bellard
    case 3:
1149 baca51fa bellard
        /* track too big */
1150 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x40, 0x80, 0x00);
1151 baca51fa bellard
        fdctrl->fifo[3] = kt;
1152 baca51fa bellard
        fdctrl->fifo[4] = kh;
1153 baca51fa bellard
        fdctrl->fifo[5] = ks;
1154 baca51fa bellard
        return;
1155 baca51fa bellard
    case 4:
1156 baca51fa bellard
        /* No seek enabled */
1157 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x40, 0x00, 0x00);
1158 baca51fa bellard
        fdctrl->fifo[3] = kt;
1159 baca51fa bellard
        fdctrl->fifo[4] = kh;
1160 baca51fa bellard
        fdctrl->fifo[5] = ks;
1161 baca51fa bellard
        return;
1162 baca51fa bellard
    case 1:
1163 baca51fa bellard
        did_seek = 1;
1164 baca51fa bellard
        fdctrl->data_state |= FD_STATE_SEEK;
1165 baca51fa bellard
        break;
1166 baca51fa bellard
    default:
1167 baca51fa bellard
        break;
1168 baca51fa bellard
    }
1169 baca51fa bellard
    memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1170 baca51fa bellard
    if (cur_drv->bs == NULL ||
1171 baca51fa bellard
        bdrv_write(cur_drv->bs, fd_sector(cur_drv), fdctrl->fifo, 1) < 0) {
1172 baca51fa bellard
        FLOPPY_ERROR("formating sector %d\n", fd_sector(cur_drv));
1173 baca51fa bellard
        fdctrl_stop_transfer(fdctrl, 0x60, 0x00, 0x00);
1174 baca51fa bellard
    } else {
1175 baca51fa bellard
        if (cur_drv->sect == cur_drv->last_sect) {
1176 baca51fa bellard
            fdctrl->data_state &= ~FD_STATE_FORMAT;
1177 baca51fa bellard
            /* Last sector done */
1178 baca51fa bellard
            if (FD_DID_SEEK(fdctrl->data_state))
1179 baca51fa bellard
                fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
1180 baca51fa bellard
            else
1181 baca51fa bellard
                fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1182 baca51fa bellard
        } else {
1183 baca51fa bellard
            /* More to do */
1184 baca51fa bellard
            fdctrl->data_pos = 0;
1185 baca51fa bellard
            fdctrl->data_len = 4;
1186 baca51fa bellard
        }
1187 baca51fa bellard
    }
1188 baca51fa bellard
}
1189 baca51fa bellard
1190 baca51fa bellard
static void fdctrl_write_data (fdctrl_t *fdctrl, uint32_t value)
1191 baca51fa bellard
{
1192 baca51fa bellard
    fdrive_t *cur_drv;
1193 baca51fa bellard
1194 baca51fa bellard
    cur_drv = get_cur_drv(fdctrl);
1195 8977f3c1 bellard
    /* Reset mode */
1196 baca51fa bellard
    if (fdctrl->state & FD_CTRL_RESET) {
1197 4b19ec0c bellard
        FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1198 8977f3c1 bellard
        return;
1199 8977f3c1 bellard
    }
1200 baca51fa bellard
    fdctrl->state &= ~FD_CTRL_SLEEP;
1201 baca51fa bellard
    if (FD_STATE(fdctrl->data_state) == FD_STATE_STATUS) {
1202 8977f3c1 bellard
        FLOPPY_ERROR("can't write data in status mode\n");
1203 8977f3c1 bellard
        return;
1204 8977f3c1 bellard
    }
1205 8977f3c1 bellard
    /* Is it write command time ? */
1206 baca51fa bellard
    if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA) {
1207 8977f3c1 bellard
        /* FIFO data write */
1208 baca51fa bellard
        fdctrl->fifo[fdctrl->data_pos++] = value;
1209 baca51fa bellard
        if (fdctrl->data_pos % FD_SECTOR_LEN == (FD_SECTOR_LEN - 1) ||
1210 baca51fa bellard
            fdctrl->data_pos == fdctrl->data_len) {
1211 8977f3c1 bellard
            bdrv_write(cur_drv->bs, fd_sector(cur_drv),
1212 baca51fa bellard
                       fdctrl->fifo, FD_SECTOR_LEN);
1213 8977f3c1 bellard
        }
1214 890fa6be bellard
        /* Switch from transfer mode to status mode
1215 8977f3c1 bellard
         * then from status mode to command mode
1216 8977f3c1 bellard
         */
1217 baca51fa bellard
        if (FD_STATE(fdctrl->data_state) == FD_STATE_DATA)
1218 baca51fa bellard
            fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
1219 8977f3c1 bellard
        return;
1220 8977f3c1 bellard
    }
1221 baca51fa bellard
    if (fdctrl->data_pos == 0) {
1222 8977f3c1 bellard
        /* Command */
1223 8977f3c1 bellard
        switch (value & 0x5F) {
1224 8977f3c1 bellard
        case 0x46:
1225 8977f3c1 bellard
            /* READ variants */
1226 8977f3c1 bellard
            FLOPPY_DPRINTF("READ command\n");
1227 8977f3c1 bellard
            /* 8 parameters cmd */
1228 baca51fa bellard
            fdctrl->data_len = 9;
1229 8977f3c1 bellard
            goto enqueue;
1230 8977f3c1 bellard
        case 0x4C:
1231 8977f3c1 bellard
            /* READ_DELETED variants */
1232 8977f3c1 bellard
            FLOPPY_DPRINTF("READ_DELETED command\n");
1233 8977f3c1 bellard
            /* 8 parameters cmd */
1234 baca51fa bellard
            fdctrl->data_len = 9;
1235 8977f3c1 bellard
            goto enqueue;
1236 8977f3c1 bellard
        case 0x50:
1237 8977f3c1 bellard
            /* SCAN_EQUAL variants */
1238 8977f3c1 bellard
            FLOPPY_DPRINTF("SCAN_EQUAL command\n");
1239 8977f3c1 bellard
            /* 8 parameters cmd */
1240 baca51fa bellard
            fdctrl->data_len = 9;
1241 8977f3c1 bellard
            goto enqueue;
1242 8977f3c1 bellard
        case 0x56:
1243 8977f3c1 bellard
            /* VERIFY variants */
1244 8977f3c1 bellard
            FLOPPY_DPRINTF("VERIFY command\n");
1245 8977f3c1 bellard
            /* 8 parameters cmd */
1246 baca51fa bellard
            fdctrl->data_len = 9;
1247 8977f3c1 bellard
            goto enqueue;
1248 8977f3c1 bellard
        case 0x59:
1249 8977f3c1 bellard
            /* SCAN_LOW_OR_EQUAL variants */
1250 8977f3c1 bellard
            FLOPPY_DPRINTF("SCAN_LOW_OR_EQUAL command\n");
1251 8977f3c1 bellard
            /* 8 parameters cmd */
1252 baca51fa bellard
            fdctrl->data_len = 9;
1253 8977f3c1 bellard
            goto enqueue;
1254 8977f3c1 bellard
        case 0x5D:
1255 8977f3c1 bellard
            /* SCAN_HIGH_OR_EQUAL variants */
1256 8977f3c1 bellard
            FLOPPY_DPRINTF("SCAN_HIGH_OR_EQUAL command\n");
1257 8977f3c1 bellard
            /* 8 parameters cmd */
1258 baca51fa bellard
            fdctrl->data_len = 9;
1259 8977f3c1 bellard
            goto enqueue;
1260 8977f3c1 bellard
        default:
1261 8977f3c1 bellard
            break;
1262 8977f3c1 bellard
        }
1263 8977f3c1 bellard
        switch (value & 0x7F) {
1264 8977f3c1 bellard
        case 0x45:
1265 8977f3c1 bellard
            /* WRITE variants */
1266 8977f3c1 bellard
            FLOPPY_DPRINTF("WRITE command\n");
1267 8977f3c1 bellard
            /* 8 parameters cmd */
1268 baca51fa bellard
            fdctrl->data_len = 9;
1269 8977f3c1 bellard
            goto enqueue;
1270 8977f3c1 bellard
        case 0x49:
1271 8977f3c1 bellard
            /* WRITE_DELETED variants */
1272 8977f3c1 bellard
            FLOPPY_DPRINTF("WRITE_DELETED command\n");
1273 8977f3c1 bellard
            /* 8 parameters cmd */
1274 baca51fa bellard
            fdctrl->data_len = 9;
1275 8977f3c1 bellard
            goto enqueue;
1276 8977f3c1 bellard
        default:
1277 8977f3c1 bellard
            break;
1278 8977f3c1 bellard
        }
1279 8977f3c1 bellard
        switch (value) {
1280 8977f3c1 bellard
        case 0x03:
1281 8977f3c1 bellard
            /* SPECIFY */
1282 8977f3c1 bellard
            FLOPPY_DPRINTF("SPECIFY command\n");
1283 8977f3c1 bellard
            /* 1 parameter cmd */
1284 baca51fa bellard
            fdctrl->data_len = 3;
1285 8977f3c1 bellard
            goto enqueue;
1286 8977f3c1 bellard
        case 0x04:
1287 8977f3c1 bellard
            /* SENSE_DRIVE_STATUS */
1288 8977f3c1 bellard
            FLOPPY_DPRINTF("SENSE_DRIVE_STATUS command\n");
1289 8977f3c1 bellard
            /* 1 parameter cmd */
1290 baca51fa bellard
            fdctrl->data_len = 2;
1291 8977f3c1 bellard
            goto enqueue;
1292 8977f3c1 bellard
        case 0x07:
1293 8977f3c1 bellard
            /* RECALIBRATE */
1294 8977f3c1 bellard
            FLOPPY_DPRINTF("RECALIBRATE command\n");
1295 8977f3c1 bellard
            /* 1 parameter cmd */
1296 baca51fa bellard
            fdctrl->data_len = 2;
1297 8977f3c1 bellard
            goto enqueue;
1298 8977f3c1 bellard
        case 0x08:
1299 8977f3c1 bellard
            /* SENSE_INTERRUPT_STATUS */
1300 8977f3c1 bellard
            FLOPPY_DPRINTF("SENSE_INTERRUPT_STATUS command (%02x)\n",
1301 baca51fa bellard
                           fdctrl->int_status);
1302 8977f3c1 bellard
            /* No parameters cmd: returns status if no interrupt */
1303 953569d2 bellard
#if 0
1304 baca51fa bellard
            fdctrl->fifo[0] =
1305 baca51fa bellard
                fdctrl->int_status | (cur_drv->head << 2) | fdctrl->cur_drv;
1306 953569d2 bellard
#else
1307 953569d2 bellard
            /* XXX: int_status handling is broken for read/write
1308 953569d2 bellard
               commands, so we do this hack. It should be suppressed
1309 953569d2 bellard
               ASAP */
1310 953569d2 bellard
            fdctrl->fifo[0] =
1311 953569d2 bellard
                0x20 | (cur_drv->head << 2) | fdctrl->cur_drv;
1312 953569d2 bellard
#endif
1313 baca51fa bellard
            fdctrl->fifo[1] = cur_drv->track;
1314 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 2, 0);
1315 baca51fa bellard
            fdctrl_reset_irq(fdctrl);
1316 baca51fa bellard
            fdctrl->int_status = 0xC0;
1317 8977f3c1 bellard
            return;
1318 8977f3c1 bellard
        case 0x0E:
1319 8977f3c1 bellard
            /* DUMPREG */
1320 8977f3c1 bellard
            FLOPPY_DPRINTF("DUMPREG command\n");
1321 8977f3c1 bellard
            /* Drives position */
1322 baca51fa bellard
            fdctrl->fifo[0] = drv0(fdctrl)->track;
1323 baca51fa bellard
            fdctrl->fifo[1] = drv1(fdctrl)->track;
1324 baca51fa bellard
            fdctrl->fifo[2] = 0;
1325 baca51fa bellard
            fdctrl->fifo[3] = 0;
1326 8977f3c1 bellard
            /* timers */
1327 baca51fa bellard
            fdctrl->fifo[4] = fdctrl->timer0;
1328 baca51fa bellard
            fdctrl->fifo[5] = (fdctrl->timer1 << 1) | fdctrl->dma_en;
1329 baca51fa bellard
            fdctrl->fifo[6] = cur_drv->last_sect;
1330 baca51fa bellard
            fdctrl->fifo[7] = (fdctrl->lock << 7) |
1331 8977f3c1 bellard
                    (cur_drv->perpendicular << 2);
1332 baca51fa bellard
            fdctrl->fifo[8] = fdctrl->config;
1333 baca51fa bellard
            fdctrl->fifo[9] = fdctrl->precomp_trk;
1334 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 10, 0);
1335 8977f3c1 bellard
            return;
1336 8977f3c1 bellard
        case 0x0F:
1337 8977f3c1 bellard
            /* SEEK */
1338 8977f3c1 bellard
            FLOPPY_DPRINTF("SEEK command\n");
1339 8977f3c1 bellard
            /* 2 parameters cmd */
1340 baca51fa bellard
            fdctrl->data_len = 3;
1341 8977f3c1 bellard
            goto enqueue;
1342 8977f3c1 bellard
        case 0x10:
1343 8977f3c1 bellard
            /* VERSION */
1344 8977f3c1 bellard
            FLOPPY_DPRINTF("VERSION command\n");
1345 8977f3c1 bellard
            /* No parameters cmd */
1346 4b19ec0c bellard
            /* Controller's version */
1347 baca51fa bellard
            fdctrl->fifo[0] = fdctrl->version;
1348 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 1, 1);
1349 8977f3c1 bellard
            return;
1350 8977f3c1 bellard
        case 0x12:
1351 8977f3c1 bellard
            /* PERPENDICULAR_MODE */
1352 8977f3c1 bellard
            FLOPPY_DPRINTF("PERPENDICULAR_MODE command\n");
1353 8977f3c1 bellard
            /* 1 parameter cmd */
1354 baca51fa bellard
            fdctrl->data_len = 2;
1355 8977f3c1 bellard
            goto enqueue;
1356 8977f3c1 bellard
        case 0x13:
1357 8977f3c1 bellard
            /* CONFIGURE */
1358 8977f3c1 bellard
            FLOPPY_DPRINTF("CONFIGURE command\n");
1359 8977f3c1 bellard
            /* 3 parameters cmd */
1360 baca51fa bellard
            fdctrl->data_len = 4;
1361 8977f3c1 bellard
            goto enqueue;
1362 8977f3c1 bellard
        case 0x14:
1363 8977f3c1 bellard
            /* UNLOCK */
1364 8977f3c1 bellard
            FLOPPY_DPRINTF("UNLOCK command\n");
1365 8977f3c1 bellard
            /* No parameters cmd */
1366 baca51fa bellard
            fdctrl->lock = 0;
1367 baca51fa bellard
            fdctrl->fifo[0] = 0;
1368 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 1, 0);
1369 8977f3c1 bellard
            return;
1370 8977f3c1 bellard
        case 0x17:
1371 8977f3c1 bellard
            /* POWERDOWN_MODE */
1372 8977f3c1 bellard
            FLOPPY_DPRINTF("POWERDOWN_MODE command\n");
1373 8977f3c1 bellard
            /* 2 parameters cmd */
1374 baca51fa bellard
            fdctrl->data_len = 3;
1375 8977f3c1 bellard
            goto enqueue;
1376 8977f3c1 bellard
        case 0x18:
1377 8977f3c1 bellard
            /* PART_ID */
1378 8977f3c1 bellard
            FLOPPY_DPRINTF("PART_ID command\n");
1379 8977f3c1 bellard
            /* No parameters cmd */
1380 baca51fa bellard
            fdctrl->fifo[0] = 0x41; /* Stepping 1 */
1381 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 1, 0);
1382 8977f3c1 bellard
            return;
1383 8977f3c1 bellard
        case 0x2C:
1384 8977f3c1 bellard
            /* SAVE */
1385 8977f3c1 bellard
            FLOPPY_DPRINTF("SAVE command\n");
1386 8977f3c1 bellard
            /* No parameters cmd */
1387 baca51fa bellard
            fdctrl->fifo[0] = 0;
1388 baca51fa bellard
            fdctrl->fifo[1] = 0;
1389 8977f3c1 bellard
            /* Drives position */
1390 baca51fa bellard
            fdctrl->fifo[2] = drv0(fdctrl)->track;
1391 baca51fa bellard
            fdctrl->fifo[3] = drv1(fdctrl)->track;
1392 baca51fa bellard
            fdctrl->fifo[4] = 0;
1393 baca51fa bellard
            fdctrl->fifo[5] = 0;
1394 8977f3c1 bellard
            /* timers */
1395 baca51fa bellard
            fdctrl->fifo[6] = fdctrl->timer0;
1396 baca51fa bellard
            fdctrl->fifo[7] = fdctrl->timer1;
1397 baca51fa bellard
            fdctrl->fifo[8] = cur_drv->last_sect;
1398 baca51fa bellard
            fdctrl->fifo[9] = (fdctrl->lock << 7) |
1399 8977f3c1 bellard
                    (cur_drv->perpendicular << 2);
1400 baca51fa bellard
            fdctrl->fifo[10] = fdctrl->config;
1401 baca51fa bellard
            fdctrl->fifo[11] = fdctrl->precomp_trk;
1402 baca51fa bellard
            fdctrl->fifo[12] = fdctrl->pwrd;
1403 baca51fa bellard
            fdctrl->fifo[13] = 0;
1404 baca51fa bellard
            fdctrl->fifo[14] = 0;
1405 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 15, 1);
1406 8977f3c1 bellard
            return;
1407 8977f3c1 bellard
        case 0x33:
1408 8977f3c1 bellard
            /* OPTION */
1409 8977f3c1 bellard
            FLOPPY_DPRINTF("OPTION command\n");
1410 8977f3c1 bellard
            /* 1 parameter cmd */
1411 baca51fa bellard
            fdctrl->data_len = 2;
1412 8977f3c1 bellard
            goto enqueue;
1413 8977f3c1 bellard
        case 0x42:
1414 8977f3c1 bellard
            /* READ_TRACK */
1415 8977f3c1 bellard
            FLOPPY_DPRINTF("READ_TRACK command\n");
1416 8977f3c1 bellard
            /* 8 parameters cmd */
1417 baca51fa bellard
            fdctrl->data_len = 9;
1418 8977f3c1 bellard
            goto enqueue;
1419 8977f3c1 bellard
        case 0x4A:
1420 8977f3c1 bellard
            /* READ_ID */
1421 8977f3c1 bellard
            FLOPPY_DPRINTF("READ_ID command\n");
1422 8977f3c1 bellard
            /* 1 parameter cmd */
1423 baca51fa bellard
            fdctrl->data_len = 2;
1424 8977f3c1 bellard
            goto enqueue;
1425 8977f3c1 bellard
        case 0x4C:
1426 8977f3c1 bellard
            /* RESTORE */
1427 8977f3c1 bellard
            FLOPPY_DPRINTF("RESTORE command\n");
1428 8977f3c1 bellard
            /* 17 parameters cmd */
1429 baca51fa bellard
            fdctrl->data_len = 18;
1430 8977f3c1 bellard
            goto enqueue;
1431 8977f3c1 bellard
        case 0x4D:
1432 8977f3c1 bellard
            /* FORMAT_TRACK */
1433 8977f3c1 bellard
            FLOPPY_DPRINTF("FORMAT_TRACK command\n");
1434 8977f3c1 bellard
            /* 5 parameters cmd */
1435 baca51fa bellard
            fdctrl->data_len = 6;
1436 8977f3c1 bellard
            goto enqueue;
1437 8977f3c1 bellard
        case 0x8E:
1438 8977f3c1 bellard
            /* DRIVE_SPECIFICATION_COMMAND */
1439 8977f3c1 bellard
            FLOPPY_DPRINTF("DRIVE_SPECIFICATION_COMMAND command\n");
1440 8977f3c1 bellard
            /* 5 parameters cmd */
1441 baca51fa bellard
            fdctrl->data_len = 6;
1442 8977f3c1 bellard
            goto enqueue;
1443 8977f3c1 bellard
        case 0x8F:
1444 8977f3c1 bellard
            /* RELATIVE_SEEK_OUT */
1445 8977f3c1 bellard
            FLOPPY_DPRINTF("RELATIVE_SEEK_OUT command\n");
1446 8977f3c1 bellard
            /* 2 parameters cmd */
1447 baca51fa bellard
            fdctrl->data_len = 3;
1448 8977f3c1 bellard
            goto enqueue;
1449 8977f3c1 bellard
        case 0x94:
1450 8977f3c1 bellard
            /* LOCK */
1451 8977f3c1 bellard
            FLOPPY_DPRINTF("LOCK command\n");
1452 8977f3c1 bellard
            /* No parameters cmd */
1453 baca51fa bellard
            fdctrl->lock = 1;
1454 baca51fa bellard
            fdctrl->fifo[0] = 0x10;
1455 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 1, 1);
1456 8977f3c1 bellard
            return;
1457 8977f3c1 bellard
        case 0xCD:
1458 8977f3c1 bellard
            /* FORMAT_AND_WRITE */
1459 8977f3c1 bellard
            FLOPPY_DPRINTF("FORMAT_AND_WRITE command\n");
1460 8977f3c1 bellard
            /* 10 parameters cmd */
1461 baca51fa bellard
            fdctrl->data_len = 11;
1462 8977f3c1 bellard
            goto enqueue;
1463 8977f3c1 bellard
        case 0xCF:
1464 8977f3c1 bellard
            /* RELATIVE_SEEK_IN */
1465 8977f3c1 bellard
            FLOPPY_DPRINTF("RELATIVE_SEEK_IN command\n");
1466 8977f3c1 bellard
            /* 2 parameters cmd */
1467 baca51fa bellard
            fdctrl->data_len = 3;
1468 8977f3c1 bellard
            goto enqueue;
1469 8977f3c1 bellard
        default:
1470 8977f3c1 bellard
            /* Unknown command */
1471 8977f3c1 bellard
            FLOPPY_ERROR("unknown command: 0x%02x\n", value);
1472 baca51fa bellard
            fdctrl_unimplemented(fdctrl);
1473 8977f3c1 bellard
            return;
1474 8977f3c1 bellard
        }
1475 8977f3c1 bellard
    }
1476 8977f3c1 bellard
enqueue:
1477 baca51fa bellard
    FLOPPY_DPRINTF("%s: %02x\n", __func__, value);
1478 baca51fa bellard
    fdctrl->fifo[fdctrl->data_pos] = value;
1479 baca51fa bellard
    if (++fdctrl->data_pos == fdctrl->data_len) {
1480 8977f3c1 bellard
        /* We now have all parameters
1481 8977f3c1 bellard
         * and will be able to treat the command
1482 8977f3c1 bellard
         */
1483 baca51fa bellard
        if (fdctrl->data_state & FD_STATE_FORMAT) {
1484 baca51fa bellard
            fdctrl_format_sector(fdctrl);
1485 baca51fa bellard
            return;
1486 baca51fa bellard
        }
1487 baca51fa bellard
        switch (fdctrl->fifo[0] & 0x1F) {
1488 8977f3c1 bellard
        case 0x06:
1489 8977f3c1 bellard
        {
1490 8977f3c1 bellard
            /* READ variants */
1491 8977f3c1 bellard
            FLOPPY_DPRINTF("treat READ command\n");
1492 baca51fa bellard
            fdctrl_start_transfer(fdctrl, FD_DIR_READ);
1493 8977f3c1 bellard
            return;
1494 8977f3c1 bellard
        }
1495 8977f3c1 bellard
        case 0x0C:
1496 8977f3c1 bellard
            /* READ_DELETED variants */
1497 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat READ_DELETED command\n");
1498 8977f3c1 bellard
            FLOPPY_ERROR("treat READ_DELETED command\n");
1499 baca51fa bellard
            fdctrl_start_transfer_del(fdctrl, FD_DIR_READ);
1500 8977f3c1 bellard
            return;
1501 8977f3c1 bellard
        case 0x16:
1502 8977f3c1 bellard
            /* VERIFY variants */
1503 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat VERIFY command\n");
1504 8977f3c1 bellard
            FLOPPY_ERROR("treat VERIFY command\n");
1505 baca51fa bellard
            fdctrl_stop_transfer(fdctrl, 0x20, 0x00, 0x00);
1506 8977f3c1 bellard
            return;
1507 8977f3c1 bellard
        case 0x10:
1508 8977f3c1 bellard
            /* SCAN_EQUAL variants */
1509 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat SCAN_EQUAL command\n");
1510 8977f3c1 bellard
            FLOPPY_ERROR("treat SCAN_EQUAL command\n");
1511 baca51fa bellard
            fdctrl_start_transfer(fdctrl, FD_DIR_SCANE);
1512 8977f3c1 bellard
            return;
1513 8977f3c1 bellard
        case 0x19:
1514 8977f3c1 bellard
            /* SCAN_LOW_OR_EQUAL variants */
1515 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat SCAN_LOW_OR_EQUAL command\n");
1516 8977f3c1 bellard
            FLOPPY_ERROR("treat SCAN_LOW_OR_EQUAL command\n");
1517 baca51fa bellard
            fdctrl_start_transfer(fdctrl, FD_DIR_SCANL);
1518 8977f3c1 bellard
            return;
1519 8977f3c1 bellard
        case 0x1D:
1520 8977f3c1 bellard
            /* SCAN_HIGH_OR_EQUAL variants */
1521 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat SCAN_HIGH_OR_EQUAL command\n");
1522 8977f3c1 bellard
            FLOPPY_ERROR("treat SCAN_HIGH_OR_EQUAL command\n");
1523 baca51fa bellard
            fdctrl_start_transfer(fdctrl, FD_DIR_SCANH);
1524 8977f3c1 bellard
            return;
1525 8977f3c1 bellard
        default:
1526 8977f3c1 bellard
            break;
1527 8977f3c1 bellard
        }
1528 baca51fa bellard
        switch (fdctrl->fifo[0] & 0x3F) {
1529 8977f3c1 bellard
        case 0x05:
1530 8977f3c1 bellard
            /* WRITE variants */
1531 baca51fa bellard
            FLOPPY_DPRINTF("treat WRITE command (%02x)\n", fdctrl->fifo[0]);
1532 baca51fa bellard
            fdctrl_start_transfer(fdctrl, FD_DIR_WRITE);
1533 8977f3c1 bellard
            return;
1534 8977f3c1 bellard
        case 0x09:
1535 8977f3c1 bellard
            /* WRITE_DELETED variants */
1536 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat WRITE_DELETED command\n");
1537 8977f3c1 bellard
            FLOPPY_ERROR("treat WRITE_DELETED command\n");
1538 baca51fa bellard
            fdctrl_start_transfer_del(fdctrl, FD_DIR_WRITE);
1539 8977f3c1 bellard
            return;
1540 8977f3c1 bellard
        default:
1541 8977f3c1 bellard
            break;
1542 8977f3c1 bellard
        }
1543 baca51fa bellard
        switch (fdctrl->fifo[0]) {
1544 8977f3c1 bellard
        case 0x03:
1545 8977f3c1 bellard
            /* SPECIFY */
1546 8977f3c1 bellard
            FLOPPY_DPRINTF("treat SPECIFY command\n");
1547 baca51fa bellard
            fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1548 e309de25 bellard
            fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1549 baca51fa bellard
            fdctrl->dma_en = 1 - (fdctrl->fifo[2] & 1) ;
1550 8977f3c1 bellard
            /* No result back */
1551 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1552 8977f3c1 bellard
            break;
1553 8977f3c1 bellard
        case 0x04:
1554 8977f3c1 bellard
            /* SENSE_DRIVE_STATUS */
1555 8977f3c1 bellard
            FLOPPY_DPRINTF("treat SENSE_DRIVE_STATUS command\n");
1556 baca51fa bellard
            fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1557 baca51fa bellard
            cur_drv = get_cur_drv(fdctrl);
1558 baca51fa bellard
            cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1559 8977f3c1 bellard
            /* 1 Byte status back */
1560 baca51fa bellard
            fdctrl->fifo[0] = (cur_drv->ro << 6) |
1561 8977f3c1 bellard
                (cur_drv->track == 0 ? 0x10 : 0x00) |
1562 890fa6be bellard
                (cur_drv->head << 2) |
1563 890fa6be bellard
                fdctrl->cur_drv |
1564 890fa6be bellard
                0x28;
1565 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 1, 0);
1566 8977f3c1 bellard
            break;
1567 8977f3c1 bellard
        case 0x07:
1568 8977f3c1 bellard
            /* RECALIBRATE */
1569 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RECALIBRATE command\n");
1570 baca51fa bellard
            fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1571 baca51fa bellard
            cur_drv = get_cur_drv(fdctrl);
1572 8977f3c1 bellard
            fd_recalibrate(cur_drv);
1573 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1574 8977f3c1 bellard
            /* Raise Interrupt */
1575 baca51fa bellard
            fdctrl_raise_irq(fdctrl, 0x20);
1576 8977f3c1 bellard
            break;
1577 8977f3c1 bellard
        case 0x0F:
1578 8977f3c1 bellard
            /* SEEK */
1579 8977f3c1 bellard
            FLOPPY_DPRINTF("treat SEEK command\n");
1580 baca51fa bellard
            fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1581 baca51fa bellard
            cur_drv = get_cur_drv(fdctrl);
1582 baca51fa bellard
            fd_start(cur_drv);
1583 baca51fa bellard
            if (fdctrl->fifo[2] <= cur_drv->track)
1584 8977f3c1 bellard
                cur_drv->dir = 1;
1585 8977f3c1 bellard
            else
1586 8977f3c1 bellard
                cur_drv->dir = 0;
1587 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1588 baca51fa bellard
            if (fdctrl->fifo[2] > cur_drv->max_track) {
1589 baca51fa bellard
                fdctrl_raise_irq(fdctrl, 0x60);
1590 8977f3c1 bellard
            } else {
1591 baca51fa bellard
                cur_drv->track = fdctrl->fifo[2];
1592 8977f3c1 bellard
                /* Raise Interrupt */
1593 baca51fa bellard
                fdctrl_raise_irq(fdctrl, 0x20);
1594 8977f3c1 bellard
            }
1595 8977f3c1 bellard
            break;
1596 8977f3c1 bellard
        case 0x12:
1597 8977f3c1 bellard
            /* PERPENDICULAR_MODE */
1598 8977f3c1 bellard
            FLOPPY_DPRINTF("treat PERPENDICULAR_MODE command\n");
1599 baca51fa bellard
            if (fdctrl->fifo[1] & 0x80)
1600 baca51fa bellard
                cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
1601 8977f3c1 bellard
            /* No result back */
1602 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1603 8977f3c1 bellard
            break;
1604 8977f3c1 bellard
        case 0x13:
1605 8977f3c1 bellard
            /* CONFIGURE */
1606 8977f3c1 bellard
            FLOPPY_DPRINTF("treat CONFIGURE command\n");
1607 baca51fa bellard
            fdctrl->config = fdctrl->fifo[2];
1608 baca51fa bellard
            fdctrl->precomp_trk =  fdctrl->fifo[3];
1609 8977f3c1 bellard
            /* No result back */
1610 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1611 8977f3c1 bellard
            break;
1612 8977f3c1 bellard
        case 0x17:
1613 8977f3c1 bellard
            /* POWERDOWN_MODE */
1614 8977f3c1 bellard
            FLOPPY_DPRINTF("treat POWERDOWN_MODE command\n");
1615 baca51fa bellard
            fdctrl->pwrd = fdctrl->fifo[1];
1616 baca51fa bellard
            fdctrl->fifo[0] = fdctrl->fifo[1];
1617 baca51fa bellard
            fdctrl_set_fifo(fdctrl, 1, 1);
1618 8977f3c1 bellard
            break;
1619 8977f3c1 bellard
        case 0x33:
1620 8977f3c1 bellard
            /* OPTION */
1621 8977f3c1 bellard
            FLOPPY_DPRINTF("treat OPTION command\n");
1622 8977f3c1 bellard
            /* No result back */
1623 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1624 8977f3c1 bellard
            break;
1625 8977f3c1 bellard
        case 0x42:
1626 8977f3c1 bellard
            /* READ_TRACK */
1627 8977f3c1 bellard
//            FLOPPY_DPRINTF("treat READ_TRACK command\n");
1628 8977f3c1 bellard
            FLOPPY_ERROR("treat READ_TRACK command\n");
1629 baca51fa bellard
            fdctrl_start_transfer(fdctrl, FD_DIR_READ);
1630 8977f3c1 bellard
            break;
1631 8977f3c1 bellard
        case 0x4A:
1632 8977f3c1 bellard
                /* READ_ID */
1633 baca51fa bellard
            FLOPPY_DPRINTF("treat READ_ID command\n");
1634 ed5fd2cc bellard
            /* XXX: should set main status register to busy */
1635 890fa6be bellard
            cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1636 ed5fd2cc bellard
            qemu_mod_timer(fdctrl->result_timer, 
1637 ed5fd2cc bellard
                           qemu_get_clock(vm_clock) + (ticks_per_sec / 50));
1638 8977f3c1 bellard
            break;
1639 8977f3c1 bellard
        case 0x4C:
1640 8977f3c1 bellard
            /* RESTORE */
1641 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RESTORE command\n");
1642 8977f3c1 bellard
            /* Drives position */
1643 baca51fa bellard
            drv0(fdctrl)->track = fdctrl->fifo[3];
1644 baca51fa bellard
            drv1(fdctrl)->track = fdctrl->fifo[4];
1645 8977f3c1 bellard
            /* timers */
1646 baca51fa bellard
            fdctrl->timer0 = fdctrl->fifo[7];
1647 baca51fa bellard
            fdctrl->timer1 = fdctrl->fifo[8];
1648 baca51fa bellard
            cur_drv->last_sect = fdctrl->fifo[9];
1649 baca51fa bellard
            fdctrl->lock = fdctrl->fifo[10] >> 7;
1650 baca51fa bellard
            cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1651 baca51fa bellard
            fdctrl->config = fdctrl->fifo[11];
1652 baca51fa bellard
            fdctrl->precomp_trk = fdctrl->fifo[12];
1653 baca51fa bellard
            fdctrl->pwrd = fdctrl->fifo[13];
1654 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1655 8977f3c1 bellard
            break;
1656 8977f3c1 bellard
        case 0x4D:
1657 8977f3c1 bellard
            /* FORMAT_TRACK */
1658 baca51fa bellard
            FLOPPY_DPRINTF("treat FORMAT_TRACK command\n");
1659 baca51fa bellard
            fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1660 baca51fa bellard
            cur_drv = get_cur_drv(fdctrl);
1661 baca51fa bellard
            fdctrl->data_state |= FD_STATE_FORMAT;
1662 baca51fa bellard
            if (fdctrl->fifo[0] & 0x80)
1663 baca51fa bellard
                fdctrl->data_state |= FD_STATE_MULTI;
1664 baca51fa bellard
            else
1665 baca51fa bellard
                fdctrl->data_state &= ~FD_STATE_MULTI;
1666 baca51fa bellard
            fdctrl->data_state &= ~FD_STATE_SEEK;
1667 baca51fa bellard
            cur_drv->bps =
1668 baca51fa bellard
                fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1669 baca51fa bellard
#if 0
1670 baca51fa bellard
            cur_drv->last_sect =
1671 baca51fa bellard
                cur_drv->flags & FDISK_DBL_SIDES ? fdctrl->fifo[3] :
1672 baca51fa bellard
                fdctrl->fifo[3] / 2;
1673 baca51fa bellard
#else
1674 baca51fa bellard
            cur_drv->last_sect = fdctrl->fifo[3];
1675 baca51fa bellard
#endif
1676 baca51fa bellard
            /* Bochs BIOS is buggy and don't send format informations
1677 baca51fa bellard
             * for each sector. So, pretend all's done right now...
1678 baca51fa bellard
             */
1679 baca51fa bellard
            fdctrl->data_state &= ~FD_STATE_FORMAT;
1680 baca51fa bellard
            fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1681 8977f3c1 bellard
            break;
1682 8977f3c1 bellard
        case 0x8E:
1683 8977f3c1 bellard
            /* DRIVE_SPECIFICATION_COMMAND */
1684 8977f3c1 bellard
            FLOPPY_DPRINTF("treat DRIVE_SPECIFICATION_COMMAND command\n");
1685 baca51fa bellard
            if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80) {
1686 8977f3c1 bellard
                /* Command parameters done */
1687 baca51fa bellard
                if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
1688 baca51fa bellard
                    fdctrl->fifo[0] = fdctrl->fifo[1];
1689 baca51fa bellard
                    fdctrl->fifo[2] = 0;
1690 baca51fa bellard
                    fdctrl->fifo[3] = 0;
1691 baca51fa bellard
                    fdctrl_set_fifo(fdctrl, 4, 1);
1692 8977f3c1 bellard
                } else {
1693 baca51fa bellard
                    fdctrl_reset_fifo(fdctrl);
1694 8977f3c1 bellard
                }
1695 baca51fa bellard
            } else if (fdctrl->data_len > 7) {
1696 8977f3c1 bellard
                /* ERROR */
1697 baca51fa bellard
                fdctrl->fifo[0] = 0x80 |
1698 baca51fa bellard
                    (cur_drv->head << 2) | fdctrl->cur_drv;
1699 baca51fa bellard
                fdctrl_set_fifo(fdctrl, 1, 1);
1700 8977f3c1 bellard
            }
1701 8977f3c1 bellard
            break;
1702 8977f3c1 bellard
        case 0x8F:
1703 8977f3c1 bellard
            /* RELATIVE_SEEK_OUT */
1704 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RELATIVE_SEEK_OUT command\n");
1705 baca51fa bellard
            fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1706 baca51fa bellard
            cur_drv = get_cur_drv(fdctrl);
1707 baca51fa bellard
            fd_start(cur_drv);
1708 8977f3c1 bellard
                cur_drv->dir = 0;
1709 baca51fa bellard
            if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
1710 baca51fa bellard
                cur_drv->track = cur_drv->max_track - 1;
1711 baca51fa bellard
            } else {
1712 baca51fa bellard
                cur_drv->track += fdctrl->fifo[2];
1713 8977f3c1 bellard
            }
1714 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1715 baca51fa bellard
            fdctrl_raise_irq(fdctrl, 0x20);
1716 8977f3c1 bellard
            break;
1717 8977f3c1 bellard
        case 0xCD:
1718 8977f3c1 bellard
            /* FORMAT_AND_WRITE */
1719 8977f3c1 bellard
//                FLOPPY_DPRINTF("treat FORMAT_AND_WRITE command\n");
1720 8977f3c1 bellard
            FLOPPY_ERROR("treat FORMAT_AND_WRITE command\n");
1721 baca51fa bellard
            fdctrl_unimplemented(fdctrl);
1722 8977f3c1 bellard
            break;
1723 8977f3c1 bellard
        case 0xCF:
1724 8977f3c1 bellard
                /* RELATIVE_SEEK_IN */
1725 8977f3c1 bellard
            FLOPPY_DPRINTF("treat RELATIVE_SEEK_IN command\n");
1726 baca51fa bellard
            fdctrl->cur_drv = fdctrl->fifo[1] & 1;
1727 baca51fa bellard
            cur_drv = get_cur_drv(fdctrl);
1728 baca51fa bellard
            fd_start(cur_drv);
1729 8977f3c1 bellard
                cur_drv->dir = 1;
1730 baca51fa bellard
            if (fdctrl->fifo[2] > cur_drv->track) {
1731 baca51fa bellard
                cur_drv->track = 0;
1732 baca51fa bellard
            } else {
1733 baca51fa bellard
                cur_drv->track -= fdctrl->fifo[2];
1734 8977f3c1 bellard
            }
1735 baca51fa bellard
            fdctrl_reset_fifo(fdctrl);
1736 baca51fa bellard
            /* Raise Interrupt */
1737 baca51fa bellard
            fdctrl_raise_irq(fdctrl, 0x20);
1738 8977f3c1 bellard
            break;
1739 8977f3c1 bellard
        }
1740 8977f3c1 bellard
    }
1741 8977f3c1 bellard
}
1742 ed5fd2cc bellard
1743 ed5fd2cc bellard
static void fdctrl_result_timer(void *opaque)
1744 ed5fd2cc bellard
{
1745 ed5fd2cc bellard
    fdctrl_t *fdctrl = opaque;
1746 ed5fd2cc bellard
    fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1747 ed5fd2cc bellard
}