Statistics
| Branch: | Revision:

root / hw / tcx.c @ a2d4e44b

History | View | Annotate | Download (9.4 kB)

1 420557e8 bellard
/*
2 6f7e9aec bellard
 * QEMU TCX Frame buffer
3 420557e8 bellard
 * 
4 6f7e9aec bellard
 * Copyright (c) 2003-2005 Fabrice Bellard
5 420557e8 bellard
 * 
6 420557e8 bellard
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 420557e8 bellard
 * of this software and associated documentation files (the "Software"), to deal
8 420557e8 bellard
 * in the Software without restriction, including without limitation the rights
9 420557e8 bellard
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 420557e8 bellard
 * copies of the Software, and to permit persons to whom the Software is
11 420557e8 bellard
 * furnished to do so, subject to the following conditions:
12 420557e8 bellard
 *
13 420557e8 bellard
 * The above copyright notice and this permission notice shall be included in
14 420557e8 bellard
 * all copies or substantial portions of the Software.
15 420557e8 bellard
 *
16 420557e8 bellard
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 420557e8 bellard
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 420557e8 bellard
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 420557e8 bellard
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 420557e8 bellard
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 420557e8 bellard
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 420557e8 bellard
 * THE SOFTWARE.
23 420557e8 bellard
 */
24 420557e8 bellard
#include "vl.h"
25 420557e8 bellard
26 420557e8 bellard
#define MAXX 1024
27 420557e8 bellard
#define MAXY 768
28 6f7e9aec bellard
#define TCX_DAC_NREGS 16
29 420557e8 bellard
30 420557e8 bellard
typedef struct TCXState {
31 8d5f07fa bellard
    uint32_t addr;
32 420557e8 bellard
    DisplayState *ds;
33 8d5f07fa bellard
    uint8_t *vram;
34 550be127 bellard
    ram_addr_t vram_offset;
35 6f7e9aec bellard
    uint16_t width, height;
36 e80cfcfc bellard
    uint8_t r[256], g[256], b[256];
37 21206a10 bellard
    uint32_t palette[256];
38 6f7e9aec bellard
    uint8_t dac_index, dac_state;
39 420557e8 bellard
} TCXState;
40 420557e8 bellard
41 95219897 pbrook
static void tcx_screen_dump(void *opaque, const char *filename);
42 95219897 pbrook
43 21206a10 bellard
/* XXX: unify with vga draw line functions */
44 21206a10 bellard
static inline unsigned int rgb_to_pixel8(unsigned int r, unsigned int g, unsigned b)
45 21206a10 bellard
{
46 21206a10 bellard
    return ((r >> 5) << 5) | ((g >> 5) << 2) | (b >> 6);
47 21206a10 bellard
}
48 21206a10 bellard
49 21206a10 bellard
static inline unsigned int rgb_to_pixel15(unsigned int r, unsigned int g, unsigned b)
50 21206a10 bellard
{
51 21206a10 bellard
    return ((r >> 3) << 10) | ((g >> 3) << 5) | (b >> 3);
52 21206a10 bellard
}
53 21206a10 bellard
54 21206a10 bellard
static inline unsigned int rgb_to_pixel16(unsigned int r, unsigned int g, unsigned b)
55 21206a10 bellard
{
56 21206a10 bellard
    return ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3);
57 21206a10 bellard
}
58 21206a10 bellard
59 21206a10 bellard
static inline unsigned int rgb_to_pixel32(unsigned int r, unsigned int g, unsigned b)
60 21206a10 bellard
{
61 21206a10 bellard
    return (r << 16) | (g << 8) | b;
62 21206a10 bellard
}
63 21206a10 bellard
64 21206a10 bellard
static void update_palette_entries(TCXState *s, int start, int end)
65 21206a10 bellard
{
66 21206a10 bellard
    int i;
67 21206a10 bellard
    for(i = start; i < end; i++) {
68 21206a10 bellard
        switch(s->ds->depth) {
69 21206a10 bellard
        default:
70 21206a10 bellard
        case 8:
71 21206a10 bellard
            s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
72 21206a10 bellard
            break;
73 21206a10 bellard
        case 15:
74 21206a10 bellard
            s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]);
75 21206a10 bellard
            break;
76 21206a10 bellard
        case 16:
77 21206a10 bellard
            s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
78 21206a10 bellard
            break;
79 21206a10 bellard
        case 32:
80 21206a10 bellard
            s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
81 21206a10 bellard
            break;
82 21206a10 bellard
        }
83 21206a10 bellard
    }
84 21206a10 bellard
}
85 21206a10 bellard
86 e80cfcfc bellard
static void tcx_draw_line32(TCXState *s1, uint8_t *d, 
87 e80cfcfc bellard
                            const uint8_t *s, int width)
88 420557e8 bellard
{
89 e80cfcfc bellard
    int x;
90 e80cfcfc bellard
    uint8_t val;
91 e80cfcfc bellard
92 e80cfcfc bellard
    for(x = 0; x < width; x++) {
93 e80cfcfc bellard
        val = *s++;
94 21206a10 bellard
        *((uint32_t *)d)++ = s1->palette[val];
95 e80cfcfc bellard
    }
96 420557e8 bellard
}
97 420557e8 bellard
98 21206a10 bellard
static void tcx_draw_line16(TCXState *s1, uint8_t *d, 
99 e80cfcfc bellard
                            const uint8_t *s, int width)
100 e80cfcfc bellard
{
101 e80cfcfc bellard
    int x;
102 e80cfcfc bellard
    uint8_t val;
103 8d5f07fa bellard
104 e80cfcfc bellard
    for(x = 0; x < width; x++) {
105 e80cfcfc bellard
        val = *s++;
106 21206a10 bellard
        *((uint16_t *)d)++ = s1->palette[val];
107 e80cfcfc bellard
    }
108 e80cfcfc bellard
}
109 e80cfcfc bellard
110 e80cfcfc bellard
static void tcx_draw_line8(TCXState *s1, uint8_t *d, 
111 e80cfcfc bellard
                           const uint8_t *s, int width)
112 420557e8 bellard
{
113 e80cfcfc bellard
    int x;
114 e80cfcfc bellard
    uint8_t val;
115 e80cfcfc bellard
116 e80cfcfc bellard
    for(x = 0; x < width; x++) {
117 e80cfcfc bellard
        val = *s++;
118 21206a10 bellard
        *d++ = s1->palette[val];
119 420557e8 bellard
    }
120 420557e8 bellard
}
121 420557e8 bellard
122 e80cfcfc bellard
/* Fixed line length 1024 allows us to do nice tricks not possible on
123 e80cfcfc bellard
   VGA... */
124 95219897 pbrook
static void tcx_update_display(void *opaque)
125 420557e8 bellard
{
126 e80cfcfc bellard
    TCXState *ts = opaque;
127 550be127 bellard
    ram_addr_t page, page_min, page_max;
128 550be127 bellard
    int y, y_start, dd, ds;
129 e80cfcfc bellard
    uint8_t *d, *s;
130 e80cfcfc bellard
    void (*f)(TCXState *s1, uint8_t *d, const uint8_t *s, int width);
131 e80cfcfc bellard
132 e80cfcfc bellard
    if (ts->ds->depth == 0)
133 e80cfcfc bellard
        return;
134 6f7e9aec bellard
    page = ts->vram_offset;
135 e80cfcfc bellard
    y_start = -1;
136 550be127 bellard
    page_min = 0xffffffff;
137 550be127 bellard
    page_max = 0;
138 e80cfcfc bellard
    d = ts->ds->data;
139 6f7e9aec bellard
    s = ts->vram;
140 e80cfcfc bellard
    dd = ts->ds->linesize;
141 e80cfcfc bellard
    ds = 1024;
142 e80cfcfc bellard
143 e80cfcfc bellard
    switch (ts->ds->depth) {
144 e80cfcfc bellard
    case 32:
145 e80cfcfc bellard
        f = tcx_draw_line32;
146 e80cfcfc bellard
        break;
147 21206a10 bellard
    case 15:
148 21206a10 bellard
    case 16:
149 21206a10 bellard
        f = tcx_draw_line16;
150 e80cfcfc bellard
        break;
151 e80cfcfc bellard
    default:
152 e80cfcfc bellard
    case 8:
153 e80cfcfc bellard
        f = tcx_draw_line8;
154 e80cfcfc bellard
        break;
155 e80cfcfc bellard
    case 0:
156 e80cfcfc bellard
        return;
157 e80cfcfc bellard
    }
158 662f3c86 bellard
    
159 6f7e9aec bellard
    for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE) {
160 0a962c02 bellard
        if (cpu_physical_memory_get_dirty(page, VGA_DIRTY_FLAG)) {
161 e80cfcfc bellard
            if (y_start < 0)
162 e80cfcfc bellard
                y_start = y;
163 e80cfcfc bellard
            if (page < page_min)
164 e80cfcfc bellard
                page_min = page;
165 e80cfcfc bellard
            if (page > page_max)
166 e80cfcfc bellard
                page_max = page;
167 6f7e9aec bellard
            f(ts, d, s, ts->width);
168 e80cfcfc bellard
            d += dd;
169 e80cfcfc bellard
            s += ds;
170 6f7e9aec bellard
            f(ts, d, s, ts->width);
171 e80cfcfc bellard
            d += dd;
172 e80cfcfc bellard
            s += ds;
173 6f7e9aec bellard
            f(ts, d, s, ts->width);
174 e80cfcfc bellard
            d += dd;
175 e80cfcfc bellard
            s += ds;
176 6f7e9aec bellard
            f(ts, d, s, ts->width);
177 e80cfcfc bellard
            d += dd;
178 e80cfcfc bellard
            s += ds;
179 e80cfcfc bellard
        } else {
180 e80cfcfc bellard
            if (y_start >= 0) {
181 e80cfcfc bellard
                /* flush to display */
182 e80cfcfc bellard
                dpy_update(ts->ds, 0, y_start, 
183 6f7e9aec bellard
                           ts->width, y - y_start);
184 e80cfcfc bellard
                y_start = -1;
185 e80cfcfc bellard
            }
186 e80cfcfc bellard
            d += dd * 4;
187 e80cfcfc bellard
            s += ds * 4;
188 e80cfcfc bellard
        }
189 e80cfcfc bellard
    }
190 e80cfcfc bellard
    if (y_start >= 0) {
191 e80cfcfc bellard
        /* flush to display */
192 e80cfcfc bellard
        dpy_update(ts->ds, 0, y_start, 
193 6f7e9aec bellard
                   ts->width, y - y_start);
194 e80cfcfc bellard
    }
195 e80cfcfc bellard
    /* reset modified pages */
196 550be127 bellard
    if (page_min <= page_max) {
197 0a962c02 bellard
        cpu_physical_memory_reset_dirty(page_min, page_max + TARGET_PAGE_SIZE,
198 0a962c02 bellard
                                        VGA_DIRTY_FLAG);
199 e80cfcfc bellard
    }
200 420557e8 bellard
}
201 420557e8 bellard
202 95219897 pbrook
static void tcx_invalidate_display(void *opaque)
203 420557e8 bellard
{
204 e80cfcfc bellard
    TCXState *s = opaque;
205 e80cfcfc bellard
    int i;
206 e80cfcfc bellard
207 e80cfcfc bellard
    for (i = 0; i < MAXX*MAXY; i += TARGET_PAGE_SIZE) {
208 e80cfcfc bellard
        cpu_physical_memory_set_dirty(s->vram_offset + i);
209 e80cfcfc bellard
    }
210 420557e8 bellard
}
211 420557e8 bellard
212 e80cfcfc bellard
static void tcx_save(QEMUFile *f, void *opaque)
213 420557e8 bellard
{
214 420557e8 bellard
    TCXState *s = opaque;
215 e80cfcfc bellard
    
216 e80cfcfc bellard
    qemu_put_be32s(f, (uint32_t *)&s->addr);
217 e80cfcfc bellard
    qemu_put_be32s(f, (uint32_t *)&s->vram);
218 6f7e9aec bellard
    qemu_put_be16s(f, (uint16_t *)&s->height);
219 6f7e9aec bellard
    qemu_put_be16s(f, (uint16_t *)&s->width);
220 e80cfcfc bellard
    qemu_put_buffer(f, s->r, 256);
221 e80cfcfc bellard
    qemu_put_buffer(f, s->g, 256);
222 e80cfcfc bellard
    qemu_put_buffer(f, s->b, 256);
223 6f7e9aec bellard
    qemu_put_8s(f, &s->dac_index);
224 6f7e9aec bellard
    qemu_put_8s(f, &s->dac_state);
225 420557e8 bellard
}
226 420557e8 bellard
227 e80cfcfc bellard
static int tcx_load(QEMUFile *f, void *opaque, int version_id)
228 420557e8 bellard
{
229 e80cfcfc bellard
    TCXState *s = opaque;
230 e80cfcfc bellard
    
231 e80cfcfc bellard
    if (version_id != 1)
232 e80cfcfc bellard
        return -EINVAL;
233 e80cfcfc bellard
234 e80cfcfc bellard
    qemu_get_be32s(f, (uint32_t *)&s->addr);
235 e80cfcfc bellard
    qemu_get_be32s(f, (uint32_t *)&s->vram);
236 6f7e9aec bellard
    qemu_get_be16s(f, (uint16_t *)&s->height);
237 6f7e9aec bellard
    qemu_get_be16s(f, (uint16_t *)&s->width);
238 e80cfcfc bellard
    qemu_get_buffer(f, s->r, 256);
239 e80cfcfc bellard
    qemu_get_buffer(f, s->g, 256);
240 e80cfcfc bellard
    qemu_get_buffer(f, s->b, 256);
241 6f7e9aec bellard
    qemu_get_8s(f, &s->dac_index);
242 6f7e9aec bellard
    qemu_get_8s(f, &s->dac_state);
243 21206a10 bellard
    update_palette_entries(s, 0, 256);
244 e80cfcfc bellard
    return 0;
245 420557e8 bellard
}
246 420557e8 bellard
247 e80cfcfc bellard
static void tcx_reset(void *opaque)
248 420557e8 bellard
{
249 e80cfcfc bellard
    TCXState *s = opaque;
250 e80cfcfc bellard
251 e80cfcfc bellard
    /* Initialize palette */
252 e80cfcfc bellard
    memset(s->r, 0, 256);
253 e80cfcfc bellard
    memset(s->g, 0, 256);
254 e80cfcfc bellard
    memset(s->b, 0, 256);
255 e80cfcfc bellard
    s->r[255] = s->g[255] = s->b[255] = 255;
256 21206a10 bellard
    update_palette_entries(s, 0, 256);
257 e80cfcfc bellard
    memset(s->vram, 0, MAXX*MAXY);
258 0a962c02 bellard
    cpu_physical_memory_reset_dirty(s->vram_offset, s->vram_offset + MAXX*MAXY,
259 0a962c02 bellard
                                    VGA_DIRTY_FLAG);
260 6f7e9aec bellard
    s->dac_index = 0;
261 6f7e9aec bellard
    s->dac_state = 0;
262 6f7e9aec bellard
}
263 6f7e9aec bellard
264 6f7e9aec bellard
static uint32_t tcx_dac_readl(void *opaque, target_phys_addr_t addr)
265 6f7e9aec bellard
{
266 6f7e9aec bellard
    return 0;
267 6f7e9aec bellard
}
268 6f7e9aec bellard
269 6f7e9aec bellard
static void tcx_dac_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
270 6f7e9aec bellard
{
271 6f7e9aec bellard
    TCXState *s = opaque;
272 6f7e9aec bellard
    uint32_t saddr;
273 6f7e9aec bellard
274 6f7e9aec bellard
    saddr = (addr & (TCX_DAC_NREGS - 1)) >> 2;
275 6f7e9aec bellard
    switch (saddr) {
276 6f7e9aec bellard
    case 0:
277 6f7e9aec bellard
        s->dac_index = val >> 24;
278 6f7e9aec bellard
        s->dac_state = 0;
279 6f7e9aec bellard
        break;
280 6f7e9aec bellard
    case 1:
281 6f7e9aec bellard
        switch (s->dac_state) {
282 6f7e9aec bellard
        case 0:
283 6f7e9aec bellard
            s->r[s->dac_index] = val >> 24;
284 21206a10 bellard
            update_palette_entries(s, s->dac_index, s->dac_index + 1);
285 6f7e9aec bellard
            s->dac_state++;
286 6f7e9aec bellard
            break;
287 6f7e9aec bellard
        case 1:
288 6f7e9aec bellard
            s->g[s->dac_index] = val >> 24;
289 21206a10 bellard
            update_palette_entries(s, s->dac_index, s->dac_index + 1);
290 6f7e9aec bellard
            s->dac_state++;
291 6f7e9aec bellard
            break;
292 6f7e9aec bellard
        case 2:
293 6f7e9aec bellard
            s->b[s->dac_index] = val >> 24;
294 21206a10 bellard
            update_palette_entries(s, s->dac_index, s->dac_index + 1);
295 6f7e9aec bellard
        default:
296 6f7e9aec bellard
            s->dac_state = 0;
297 6f7e9aec bellard
            break;
298 6f7e9aec bellard
        }
299 6f7e9aec bellard
        break;
300 6f7e9aec bellard
    default:
301 6f7e9aec bellard
        break;
302 6f7e9aec bellard
    }
303 6f7e9aec bellard
    return;
304 420557e8 bellard
}
305 420557e8 bellard
306 6f7e9aec bellard
static CPUReadMemoryFunc *tcx_dac_read[3] = {
307 6f7e9aec bellard
    tcx_dac_readl,
308 6f7e9aec bellard
    tcx_dac_readl,
309 6f7e9aec bellard
    tcx_dac_readl,
310 6f7e9aec bellard
};
311 6f7e9aec bellard
312 6f7e9aec bellard
static CPUWriteMemoryFunc *tcx_dac_write[3] = {
313 6f7e9aec bellard
    tcx_dac_writel,
314 6f7e9aec bellard
    tcx_dac_writel,
315 6f7e9aec bellard
    tcx_dac_writel,
316 6f7e9aec bellard
};
317 6f7e9aec bellard
318 95219897 pbrook
void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
319 95219897 pbrook
              unsigned long vram_offset, int vram_size, int width, int height)
320 420557e8 bellard
{
321 420557e8 bellard
    TCXState *s;
322 6f7e9aec bellard
    int io_memory;
323 420557e8 bellard
324 420557e8 bellard
    s = qemu_mallocz(sizeof(TCXState));
325 420557e8 bellard
    if (!s)
326 95219897 pbrook
        return;
327 420557e8 bellard
    s->ds = ds;
328 8d5f07fa bellard
    s->addr = addr;
329 e80cfcfc bellard
    s->vram = vram_base;
330 e80cfcfc bellard
    s->vram_offset = vram_offset;
331 6f7e9aec bellard
    s->width = width;
332 6f7e9aec bellard
    s->height = height;
333 e80cfcfc bellard
334 6f7e9aec bellard
    cpu_register_physical_memory(addr + 0x800000, vram_size, vram_offset);
335 6f7e9aec bellard
    io_memory = cpu_register_io_memory(0, tcx_dac_read, tcx_dac_write, s);
336 6f7e9aec bellard
    cpu_register_physical_memory(addr + 0x200000, TCX_DAC_NREGS, io_memory);
337 e80cfcfc bellard
338 95219897 pbrook
    graphic_console_init(s->ds, tcx_update_display, tcx_invalidate_display,
339 95219897 pbrook
                         tcx_screen_dump, s);
340 e80cfcfc bellard
    register_savevm("tcx", addr, 1, tcx_save, tcx_load, s);
341 e80cfcfc bellard
    qemu_register_reset(tcx_reset, s);
342 e80cfcfc bellard
    tcx_reset(s);
343 6f7e9aec bellard
    dpy_resize(s->ds, width, height);
344 420557e8 bellard
}
345 420557e8 bellard
346 95219897 pbrook
static void tcx_screen_dump(void *opaque, const char *filename)
347 8d5f07fa bellard
{
348 e80cfcfc bellard
    TCXState *s = opaque;
349 8d5f07fa bellard
    FILE *f;
350 e80cfcfc bellard
    uint8_t *d, *d1, v;
351 8d5f07fa bellard
    int y, x;
352 8d5f07fa bellard
353 8d5f07fa bellard
    f = fopen(filename, "wb");
354 8d5f07fa bellard
    if (!f)
355 e80cfcfc bellard
        return;
356 6f7e9aec bellard
    fprintf(f, "P6\n%d %d\n%d\n", s->width, s->height, 255);
357 6f7e9aec bellard
    d1 = s->vram;
358 6f7e9aec bellard
    for(y = 0; y < s->height; y++) {
359 8d5f07fa bellard
        d = d1;
360 6f7e9aec bellard
        for(x = 0; x < s->width; x++) {
361 8d5f07fa bellard
            v = *d;
362 e80cfcfc bellard
            fputc(s->r[v], f);
363 e80cfcfc bellard
            fputc(s->g[v], f);
364 e80cfcfc bellard
            fputc(s->b[v], f);
365 8d5f07fa bellard
            d++;
366 8d5f07fa bellard
        }
367 e80cfcfc bellard
        d1 += MAXX;
368 8d5f07fa bellard
    }
369 8d5f07fa bellard
    fclose(f);
370 8d5f07fa bellard
    return;
371 8d5f07fa bellard
}
372 8d5f07fa bellard
373 8d5f07fa bellard