Revision a316d335 target-i386/cpu.h
| b/target-i386/cpu.h | ||
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| 497 | 497 |
int error_code; |
| 498 | 498 |
int exception_is_int; |
| 499 | 499 |
target_ulong exception_next_eip; |
| 500 |
struct TranslationBlock *current_tb; /* currently executing TB */ |
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| 501 | 500 |
target_ulong dr[8]; /* debug registers */ |
| 502 | 501 |
int interrupt_request; |
| 503 | 502 |
int user_mode_only; /* user mode only simulation */ |
| 504 | 503 |
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/* soft mmu support */ |
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/* in order to avoid passing too many arguments to the memory |
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write helpers, we store some rarely used information in the CPU |
|
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context) */ |
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unsigned long mem_write_pc; /* host pc at which the memory was |
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written */ |
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target_ulong mem_write_vaddr; /* target virtual addr at which the |
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memory was written */ |
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/* 0 = kernel, 1 = user */ |
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CPUTLBEntry tlb_read[2][CPU_TLB_SIZE]; |
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CPUTLBEntry tlb_write[2][CPU_TLB_SIZE]; |
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/* from this point: preserved by CPU reset */ |
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/* ice debug support */ |
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target_ulong breakpoints[MAX_BREAKPOINTS]; |
|
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int nb_breakpoints; |
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int singlestep_enabled; |
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CPU_COMMON |
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| 522 | 505 |
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| 523 | 506 |
/* processor features (e.g. for CPUID insn) */ |
| 524 | 507 |
uint32_t cpuid_level; |
| ... | ... | |
| 538 | 521 |
/* in order to simplify APIC support, we leave this pointer to the |
| 539 | 522 |
user */ |
| 540 | 523 |
struct APICState *apic_state; |
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/* user data */ |
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void *opaque; |
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| 543 | 524 |
} CPUX86State; |
| 544 | 525 |
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| 545 | 526 |
CPUX86State *cpu_x86_init(void); |
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