Revision a343df16 hw/ne2000.c
| b/hw/ne2000.c | ||
|---|---|---|
| 61 | 61 |
#define EN1_CURPAG 0x17 |
| 62 | 62 |
#define EN1_MULT 0x18 |
| 63 | 63 |
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| 64 |
#define EN2_STARTPG 0x21 /* Starting page of ring bfr RD */ |
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#define EN2_STOPPG 0x22 /* Ending page +1 of ring bfr RD */ |
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| 66 |
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/* Register accessed at EN_CMD, the 8390 base addr. */ |
| 65 | 68 |
#define E8390_STOP 0x01 /* Stop and reset the chip */ |
| 66 | 69 |
#define E8390_START 0x02 /* Start the chip, clear reset */ |
| ... | ... | |
| 150 | 153 |
static void ne2000_update_irq(NE2000State *s) |
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{
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int isr; |
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isr = s->isr & s->imr;
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isr = (s->isr & s->imr) & 0x7f;
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#if defined(DEBUG_NE2000) |
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printf("NE2000: Set IRQ line %d to %d (%02x %02x)\n",
|
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s->irq, isr ? 1 : 0, s->isr, s->imr); |
| ... | ... | |
| 255 | 258 |
if (addr == E8390_CMD) {
|
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/* control register */ |
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s->cmd = val; |
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if (val & E8390_START) {
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if (!(val & E8390_STOP)) { /* START bit makes no sense on RTL8029... */
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s->isr &= ~ENISR_RESET; |
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/* test specific case: zero length transfert */ |
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if ((val & (E8390_RREAD | E8390_RWRITE)) && |
| ... | ... | |
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case EN0_RSR: |
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ret = s->rsr; |
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break; |
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case EN2_STARTPG: |
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ret = s->start >> 8; |
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break; |
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case EN2_STOPPG: |
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ret = s->stop >> 8; |
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break; |
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default: |
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ret = 0x00; |
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break; |
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