Revision a455783b hw/ppce500_pci.c
b/hw/ppce500_pci.c | ||
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84 | 84 |
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typedef struct PPCE500PCIState PPCE500PCIState; |
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static uint32_t pcie500_cfgaddr_readl(void *opaque, target_phys_addr_t addr) |
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{ |
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PPCE500PCIState *pci = opaque; |
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pci_debug("%s: (addr:" TARGET_FMT_plx ") -> value:%x\n", __func__, addr, |
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pci->pci_state.config_reg); |
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return pci->pci_state.config_reg; |
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} |
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static CPUReadMemoryFunc * const pcie500_cfgaddr_read[] = { |
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&pcie500_cfgaddr_readl, |
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&pcie500_cfgaddr_readl, |
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&pcie500_cfgaddr_readl, |
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}; |
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static void pcie500_cfgaddr_writel(void *opaque, target_phys_addr_t addr, |
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uint32_t value) |
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{ |
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PPCE500PCIState *controller = opaque; |
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pci_debug("%s: value:%x -> (addr:" TARGET_FMT_plx ")\n", __func__, value, |
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addr); |
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controller->pci_state.config_reg = value & ~0x3; |
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} |
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static CPUWriteMemoryFunc * const pcie500_cfgaddr_write[] = { |
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&pcie500_cfgaddr_writel, |
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&pcie500_cfgaddr_writel, |
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&pcie500_cfgaddr_writel, |
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}; |
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static uint32_t pci_reg_read4(void *opaque, target_phys_addr_t addr) |
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{ |
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PPCE500PCIState *pci = opaque; |
... | ... | |
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controller->pci_dev = d; |
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/* CFGADDR */ |
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index = cpu_register_io_memory(pcie500_cfgaddr_read, |
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pcie500_cfgaddr_write, controller); |
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index = pci_host_config_register_io_memory_noswap(&controller->pci_state); |
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if (index < 0) |
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goto free; |
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cpu_register_physical_memory(registers + PCIE500_CFGADDR, 4, index); |
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