root / hw / cirrus_vga_rop.h @ a46007a0
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1 | a5082316 | bellard | /*
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2 | a5082316 | bellard | * QEMU Cirrus CLGD 54xx VGA Emulator.
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3 | 5fafdf24 | ths | *
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4 | a5082316 | bellard | * Copyright (c) 2004 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | a5082316 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | a5082316 | bellard | * of this software and associated documentation files (the "Software"), to deal
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8 | a5082316 | bellard | * in the Software without restriction, including without limitation the rights
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9 | a5082316 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | a5082316 | bellard | * copies of the Software, and to permit persons to whom the Software is
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11 | a5082316 | bellard | * furnished to do so, subject to the following conditions:
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12 | a5082316 | bellard | *
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13 | a5082316 | bellard | * The above copyright notice and this permission notice shall be included in
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14 | a5082316 | bellard | * all copies or substantial portions of the Software.
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15 | a5082316 | bellard | *
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16 | a5082316 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | a5082316 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | a5082316 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | a5082316 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | a5082316 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | a5082316 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | a5082316 | bellard | * THE SOFTWARE.
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23 | a5082316 | bellard | */
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24 | a5082316 | bellard | |
25 | a5082316 | bellard | static void |
26 | a5082316 | bellard | glue(cirrus_bitblt_rop_fwd_, ROP_NAME)(CirrusVGAState *s, |
27 | a5082316 | bellard | uint8_t *dst,const uint8_t *src,
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28 | a5082316 | bellard | int dstpitch,int srcpitch, |
29 | a5082316 | bellard | int bltwidth,int bltheight) |
30 | a5082316 | bellard | { |
31 | a5082316 | bellard | int x,y;
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32 | a5082316 | bellard | dstpitch -= bltwidth; |
33 | a5082316 | bellard | srcpitch -= bltwidth; |
34 | b2eb849d | aurel32 | |
35 | b2eb849d | aurel32 | if (dstpitch < 0 || srcpitch < 0) { |
36 | b2eb849d | aurel32 | /* is 0 valid? srcpitch == 0 could be useful */
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37 | b2eb849d | aurel32 | return;
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38 | b2eb849d | aurel32 | } |
39 | b2eb849d | aurel32 | |
40 | a5082316 | bellard | for (y = 0; y < bltheight; y++) { |
41 | a5082316 | bellard | for (x = 0; x < bltwidth; x++) { |
42 | a5082316 | bellard | ROP_OP(*dst, *src); |
43 | a5082316 | bellard | dst++; |
44 | a5082316 | bellard | src++; |
45 | a5082316 | bellard | } |
46 | a5082316 | bellard | dst += dstpitch; |
47 | a5082316 | bellard | src += srcpitch; |
48 | a5082316 | bellard | } |
49 | a5082316 | bellard | } |
50 | a5082316 | bellard | |
51 | a5082316 | bellard | static void |
52 | a5082316 | bellard | glue(cirrus_bitblt_rop_bkwd_, ROP_NAME)(CirrusVGAState *s, |
53 | a5082316 | bellard | uint8_t *dst,const uint8_t *src,
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54 | a5082316 | bellard | int dstpitch,int srcpitch, |
55 | a5082316 | bellard | int bltwidth,int bltheight) |
56 | a5082316 | bellard | { |
57 | a5082316 | bellard | int x,y;
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58 | a5082316 | bellard | dstpitch += bltwidth; |
59 | a5082316 | bellard | srcpitch += bltwidth; |
60 | a5082316 | bellard | for (y = 0; y < bltheight; y++) { |
61 | a5082316 | bellard | for (x = 0; x < bltwidth; x++) { |
62 | a5082316 | bellard | ROP_OP(*dst, *src); |
63 | a5082316 | bellard | dst--; |
64 | a5082316 | bellard | src--; |
65 | a5082316 | bellard | } |
66 | a5082316 | bellard | dst += dstpitch; |
67 | a5082316 | bellard | src += srcpitch; |
68 | a5082316 | bellard | } |
69 | a5082316 | bellard | } |
70 | a5082316 | bellard | |
71 | 96cf2df8 | ths | static void |
72 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_fwd_transp_, ROP_NAME),_8)(CirrusVGAState *s, |
73 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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74 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
75 | 96cf2df8 | ths | int bltwidth,int bltheight) |
76 | 96cf2df8 | ths | { |
77 | 96cf2df8 | ths | int x,y;
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78 | 96cf2df8 | ths | uint8_t p; |
79 | 96cf2df8 | ths | dstpitch -= bltwidth; |
80 | 96cf2df8 | ths | srcpitch -= bltwidth; |
81 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
82 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x++) { |
83 | 96cf2df8 | ths | p = *dst; |
84 | 96cf2df8 | ths | ROP_OP(p, *src); |
85 | 4e12cd94 | Avi Kivity | if (p != s->vga.gr[0x34]) *dst = p; |
86 | 96cf2df8 | ths | dst++; |
87 | 96cf2df8 | ths | src++; |
88 | 96cf2df8 | ths | } |
89 | 96cf2df8 | ths | dst += dstpitch; |
90 | 96cf2df8 | ths | src += srcpitch; |
91 | 96cf2df8 | ths | } |
92 | 96cf2df8 | ths | } |
93 | 96cf2df8 | ths | |
94 | 96cf2df8 | ths | static void |
95 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_bkwd_transp_, ROP_NAME),_8)(CirrusVGAState *s, |
96 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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97 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
98 | 96cf2df8 | ths | int bltwidth,int bltheight) |
99 | 96cf2df8 | ths | { |
100 | 96cf2df8 | ths | int x,y;
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101 | 96cf2df8 | ths | uint8_t p; |
102 | 96cf2df8 | ths | dstpitch += bltwidth; |
103 | 96cf2df8 | ths | srcpitch += bltwidth; |
104 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
105 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x++) { |
106 | 96cf2df8 | ths | p = *dst; |
107 | 96cf2df8 | ths | ROP_OP(p, *src); |
108 | 4e12cd94 | Avi Kivity | if (p != s->vga.gr[0x34]) *dst = p; |
109 | 96cf2df8 | ths | dst--; |
110 | 96cf2df8 | ths | src--; |
111 | 96cf2df8 | ths | } |
112 | 96cf2df8 | ths | dst += dstpitch; |
113 | 96cf2df8 | ths | src += srcpitch; |
114 | 96cf2df8 | ths | } |
115 | 96cf2df8 | ths | } |
116 | 96cf2df8 | ths | |
117 | 96cf2df8 | ths | static void |
118 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_fwd_transp_, ROP_NAME),_16)(CirrusVGAState *s, |
119 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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120 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
121 | 96cf2df8 | ths | int bltwidth,int bltheight) |
122 | 96cf2df8 | ths | { |
123 | 96cf2df8 | ths | int x,y;
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124 | 96cf2df8 | ths | uint8_t p1, p2; |
125 | 96cf2df8 | ths | dstpitch -= bltwidth; |
126 | 96cf2df8 | ths | srcpitch -= bltwidth; |
127 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
128 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x+=2) { |
129 | 96cf2df8 | ths | p1 = *dst; |
130 | 96cf2df8 | ths | p2 = *(dst+1);
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131 | 96cf2df8 | ths | ROP_OP(p1, *src); |
132 | 96cf2df8 | ths | ROP_OP(p2, *(src+1));
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133 | 4e12cd94 | Avi Kivity | if ((p1 != s->vga.gr[0x34]) || (p2 != s->vga.gr[0x35])) { |
134 | 96cf2df8 | ths | *dst = p1; |
135 | 96cf2df8 | ths | *(dst+1) = p2;
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136 | 96cf2df8 | ths | } |
137 | 96cf2df8 | ths | dst+=2;
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138 | 96cf2df8 | ths | src+=2;
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139 | 96cf2df8 | ths | } |
140 | 96cf2df8 | ths | dst += dstpitch; |
141 | 96cf2df8 | ths | src += srcpitch; |
142 | 96cf2df8 | ths | } |
143 | 96cf2df8 | ths | } |
144 | 96cf2df8 | ths | |
145 | 96cf2df8 | ths | static void |
146 | 96cf2df8 | ths | glue(glue(cirrus_bitblt_rop_bkwd_transp_, ROP_NAME),_16)(CirrusVGAState *s, |
147 | 96cf2df8 | ths | uint8_t *dst,const uint8_t *src,
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148 | 96cf2df8 | ths | int dstpitch,int srcpitch, |
149 | 96cf2df8 | ths | int bltwidth,int bltheight) |
150 | 96cf2df8 | ths | { |
151 | 96cf2df8 | ths | int x,y;
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152 | 96cf2df8 | ths | uint8_t p1, p2; |
153 | 96cf2df8 | ths | dstpitch += bltwidth; |
154 | 96cf2df8 | ths | srcpitch += bltwidth; |
155 | 96cf2df8 | ths | for (y = 0; y < bltheight; y++) { |
156 | 96cf2df8 | ths | for (x = 0; x < bltwidth; x+=2) { |
157 | 96cf2df8 | ths | p1 = *(dst-1);
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158 | 96cf2df8 | ths | p2 = *dst; |
159 | 96cf2df8 | ths | ROP_OP(p1, *(src-1));
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160 | 96cf2df8 | ths | ROP_OP(p2, *src); |
161 | 4e12cd94 | Avi Kivity | if ((p1 != s->vga.gr[0x34]) || (p2 != s->vga.gr[0x35])) { |
162 | 96cf2df8 | ths | *(dst-1) = p1;
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163 | 96cf2df8 | ths | *dst = p2; |
164 | 96cf2df8 | ths | } |
165 | 96cf2df8 | ths | dst-=2;
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166 | 96cf2df8 | ths | src-=2;
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167 | 96cf2df8 | ths | } |
168 | 96cf2df8 | ths | dst += dstpitch; |
169 | 96cf2df8 | ths | src += srcpitch; |
170 | 96cf2df8 | ths | } |
171 | 96cf2df8 | ths | } |
172 | 96cf2df8 | ths | |
173 | a5082316 | bellard | #define DEPTH 8 |
174 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
175 | a5082316 | bellard | |
176 | a5082316 | bellard | #define DEPTH 16 |
177 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
178 | a5082316 | bellard | |
179 | a5082316 | bellard | #define DEPTH 24 |
180 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
181 | a5082316 | bellard | |
182 | a5082316 | bellard | #define DEPTH 32 |
183 | a5082316 | bellard | #include "cirrus_vga_rop2.h" |
184 | a5082316 | bellard | |
185 | a5082316 | bellard | #undef ROP_NAME
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186 | a5082316 | bellard | #undef ROP_OP |