Revision a4773324
b/tcg/i386/tcg-target.c | ||
---|---|---|
168 | 168 |
tcg_regset_set32(ct->u.regs, 0, 0xf); |
169 | 169 |
} |
170 | 170 |
break; |
171 |
case 'Q': |
|
172 |
ct->ct |= TCG_CT_REG; |
|
173 |
tcg_regset_set32(ct->u.regs, 0, 0xf); |
|
174 |
break; |
|
171 | 175 |
case 'r': |
172 | 176 |
ct->ct |= TCG_CT_REG; |
173 | 177 |
if (TCG_TARGET_REG_BITS == 64) { |
... | ... | |
1747 | 1751 |
break; |
1748 | 1752 |
#endif |
1749 | 1753 |
|
1754 |
OP_32_64(deposit): |
|
1755 |
if (args[3] == 0 && args[4] == 8) { |
|
1756 |
/* load bits 0..7 */ |
|
1757 |
tcg_out_modrm(s, OPC_MOVB_EvGv | P_REXB_R | P_REXB_RM, |
|
1758 |
args[2], args[0]); |
|
1759 |
} else if (args[3] == 8 && args[4] == 8) { |
|
1760 |
/* load bits 8..15 */ |
|
1761 |
tcg_out_modrm(s, OPC_MOVB_EvGv, args[2], args[0] + 4); |
|
1762 |
} else if (args[3] == 0 && args[4] == 16) { |
|
1763 |
/* load bits 0..15 */ |
|
1764 |
tcg_out_modrm(s, OPC_MOVL_EvGv | P_DATA16, args[2], args[0]); |
|
1765 |
} else { |
|
1766 |
tcg_abort(); |
|
1767 |
} |
|
1768 |
break; |
|
1769 |
|
|
1750 | 1770 |
default: |
1751 | 1771 |
tcg_abort(); |
1752 | 1772 |
} |
... | ... | |
1802 | 1822 |
|
1803 | 1823 |
{ INDEX_op_setcond_i32, { "q", "r", "ri" } }, |
1804 | 1824 |
|
1825 |
{ INDEX_op_deposit_i32, { "Q", "0", "Q" } }, |
|
1826 |
|
|
1805 | 1827 |
#if TCG_TARGET_REG_BITS == 32 |
1806 | 1828 |
{ INDEX_op_mulu2_i32, { "a", "d", "a", "r" } }, |
1807 | 1829 |
{ INDEX_op_add2_i32, { "r", "r", "0", "1", "ri", "ri" } }, |
... | ... | |
1853 | 1875 |
{ INDEX_op_ext8u_i64, { "r", "r" } }, |
1854 | 1876 |
{ INDEX_op_ext16u_i64, { "r", "r" } }, |
1855 | 1877 |
{ INDEX_op_ext32u_i64, { "r", "r" } }, |
1878 |
|
|
1879 |
{ INDEX_op_deposit_i64, { "Q", "0", "Q" } }, |
|
1856 | 1880 |
#endif |
1857 | 1881 |
|
1858 | 1882 |
#if TCG_TARGET_REG_BITS == 64 |
b/tcg/i386/tcg-target.h | ||
---|---|---|
90 | 90 |
#define TCG_TARGET_HAS_eqv_i32 0 |
91 | 91 |
#define TCG_TARGET_HAS_nand_i32 0 |
92 | 92 |
#define TCG_TARGET_HAS_nor_i32 0 |
93 |
#define TCG_TARGET_HAS_deposit_i32 0
|
|
93 |
#define TCG_TARGET_HAS_deposit_i32 1
|
|
94 | 94 |
|
95 | 95 |
#if TCG_TARGET_REG_BITS == 64 |
96 | 96 |
#define TCG_TARGET_HAS_div2_i64 1 |
... | ... | |
111 | 111 |
#define TCG_TARGET_HAS_eqv_i64 0 |
112 | 112 |
#define TCG_TARGET_HAS_nand_i64 0 |
113 | 113 |
#define TCG_TARGET_HAS_nor_i64 0 |
114 |
#define TCG_TARGET_HAS_deposit_i64 0
|
|
114 |
#define TCG_TARGET_HAS_deposit_i64 1
|
|
115 | 115 |
#endif |
116 | 116 |
|
117 |
#define TCG_TARGET_deposit_i32_valid(ofs, len) \ |
|
118 |
(((ofs) == 0 && (len) == 8) || ((ofs) == 8 && (len) == 8) || \ |
|
119 |
((ofs) == 0 && (len) == 16)) |
|
120 |
#define TCG_TARGET_deposit_i64_valid TCG_TARGET_deposit_i32_valid |
|
121 |
|
|
117 | 122 |
#define TCG_TARGET_HAS_GUEST_BASE |
118 | 123 |
|
119 | 124 |
/* Note: must be synced with dyngen-exec.h */ |
b/tcg/tcg-op.h | ||
---|---|---|
2045 | 2045 |
TCGv_i32 arg2, unsigned int ofs, |
2046 | 2046 |
unsigned int len) |
2047 | 2047 |
{ |
2048 |
if (TCG_TARGET_HAS_deposit_i32) { |
|
2048 |
if (TCG_TARGET_HAS_deposit_i32 && TCG_TARGET_deposit_i32_valid(ofs, len)) {
|
|
2049 | 2049 |
tcg_gen_op5ii_i32(INDEX_op_deposit_i32, ret, arg1, arg2, ofs, len); |
2050 | 2050 |
} else { |
2051 | 2051 |
uint32_t mask = (1u << len) - 1; |
... | ... | |
2064 | 2064 |
TCGv_i64 arg2, unsigned int ofs, |
2065 | 2065 |
unsigned int len) |
2066 | 2066 |
{ |
2067 |
if (TCG_TARGET_HAS_deposit_i64) { |
|
2067 |
if (TCG_TARGET_HAS_deposit_i64 && TCG_TARGET_deposit_i64_valid(ofs, len)) {
|
|
2068 | 2068 |
tcg_gen_op5ii_i64(INDEX_op_deposit_i64, ret, arg1, arg2, ofs, len); |
2069 | 2069 |
} else { |
2070 | 2070 |
uint64_t mask = (1ull << len) - 1; |
b/tcg/tcg.h | ||
---|---|---|
81 | 81 |
#define TCG_TARGET_HAS_deposit_i64 0 |
82 | 82 |
#endif |
83 | 83 |
|
84 |
#ifndef TCG_TARGET_deposit_i32_valid |
|
85 |
#define TCG_TARGET_deposit_i32_valid(ofs, len) 1 |
|
86 |
#endif |
|
87 |
#ifndef TCG_TARGET_deposit_i64_valid |
|
88 |
#define TCG_TARGET_deposit_i64_valid(ofs, len) 1 |
|
89 |
#endif |
|
90 |
|
|
84 | 91 |
/* Only one of DIV or DIV2 should be defined. */ |
85 | 92 |
#if defined(TCG_TARGET_HAS_div_i32) |
86 | 93 |
#define TCG_TARGET_HAS_div2_i32 0 |
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