Revision a5973fbf tests/test-i386.c

b/tests/test-i386.c
30 30
#include <sys/mman.h>
31 31

  
32 32
#if !defined(__x86_64__)
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#define TEST_VM86
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//#define TEST_VM86
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#define TEST_SEGS
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#endif
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//#define LINUX_VM86_IOPL_FIX
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//#define TEST_P4_FLAGS
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#if defined(__x86_64__)
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#ifdef __SSE__
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#define TEST_SSE
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#define TEST_CMOV  1
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#define TEST_FCOMI 1
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#else
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//#define TEST_SSE
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#define TEST_CMOV  0
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#define TEST_FCOMI 0
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#undef TEST_SSE
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#define TEST_CMOV  1
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#define TEST_FCOMI 1
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#endif
47 47

  
48 48
#if defined(__x86_64__)
......
457 457
    TEST_JCC("ns", 0, 0);
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}
459 459

  
460
#define TEST_LOOP(insn) \
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{\
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    for(i = 0; i < sizeof(ecx_vals) / sizeof(long); i++) {\
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        ecx = ecx_vals[i];\
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        for(zf = 0; zf < 2; zf++) {\
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    asm("test %2, %2\n\t"\
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        "movl $1, %0\n\t"\
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          insn " 1f\n\t" \
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        "movl $0, %0\n\t"\
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        "1:\n\t"\
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        : "=a" (res)\
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        : "c" (ecx), "b" (!zf)); \
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    printf("%-10s ECX=" FMTLX " ZF=%ld r=%d\n", insn, ecx, zf, res);      \
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        }\
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   }\
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}
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void test_loop(void)
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{
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    long ecx, zf;
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    const long ecx_vals[] = {
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        0,
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        1,
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        0x10000,
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        0x10001,
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#if defined(__x86_64__)
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        0x100000000L,
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        0x100000001L,
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#endif
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    };
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    int i, res;
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    TEST_LOOP("jcxz");
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    TEST_LOOP("loopw");
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    TEST_LOOP("loopzw");
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    TEST_LOOP("loopnzw");
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    TEST_LOOP("jecxz");
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    TEST_LOOP("loopl");
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    TEST_LOOP("loopzl");
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    TEST_LOOP("loopnzl");
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}
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#undef CC_MASK
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#ifdef TEST_P4_FLAGS
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#define CC_MASK (CC_C | CC_P | CC_Z | CC_S | CC_O | CC_A)
......
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1151 1194
    {
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        uint64_t op0, op1, op2;
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        long eax, edx;
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        long i, eflags;
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1155 1199
        for(i = 0; i < 2; i++) {
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            op0 = 0x123456789abcdLL;
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            eax = i2l(op0 & 0xffffffff);
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            edx = i2l(op0 >> 32);
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            if (i == 0)
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                op1 = 0xfbca765423456LL;
1159 1205
            else
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                op1 = op0;
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            op2 = 0x6532432432434LL;
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            asm("cmpxchg8b %1\n"
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            asm("cmpxchg8b %2\n"
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                "pushf\n"
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                "pop %2\n"
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                : "=A" (op0), "=m" (op1), "=g" (eflags)
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                : "0" (op0), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
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            printf("cmpxchg8b: op0=" FMT64X " op1=" FMT64X " CC=%02lx\n",
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                    op0, op1, eflags & CC_Z);
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                "pop %3\n"
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                : "=a" (eax), "=d" (edx), "=m" (op1), "=g" (eflags)
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                : "0" (eax), "1" (edx), "m" (op1), "b" ((int)op2), "c" ((int)(op2 >> 32)));
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            printf("cmpxchg8b: eax=" FMTLX " edx=" FMTLX " op1=" FMT64X " CC=%02lx\n",
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                   eax, edx, op1, eflags & CC_Z);
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        }
1170 1216
    }
1171 1217
}
......
1196 1242
#define TEST_LR(op, size, seg, mask)\
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{\
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    int res, res2;\
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    uint16_t mseg = seg;\
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    res = 0x12345678;\
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    asm (op " %" size "2, %" size "0\n" \
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         "movl $0, %1\n"\
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         "jnz 1f\n"\
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         "movl $1, %1\n"\
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         "1:\n"\
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         : "=r" (res), "=r" (res2) : "m" (seg), "0" (res));\
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         : "=r" (res), "=r" (res2) : "m" (mseg), "0" (res));\
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    printf(op ": Z=%d %08x\n", res2, res & ~(mask));\
1207 1254
}
1208 1255

  
1256
#define TEST_ARPL(op, size, op1, op2)\
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{\
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    long a, b, c;                               \
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    a = (op1);                                  \
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    b = (op2);                                  \
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    asm volatile(op " %" size "3, %" size "0\n"\
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                 "movl $0,%1\n"\
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                 "jnz 1f\n"\
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                 "movl $1,%1\n"\
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                 "1:\n"\
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                 : "=r" (a), "=r" (c) : "0" (a), "r" (b));    \
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    printf(op size " A=" FMTLX " B=" FMTLX " R=" FMTLX " z=%ld\n",\
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           (long)(op1), (long)(op2), a, c);\
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}
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1209 1271
/* NOTE: we use Linux modify_ldt syscall */
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void test_segs(void)
1211 1273
{
......
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    TEST_LR("larl", "", 0xfff8, 0);
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    TEST_LR("lslw", "w", 0xfff8, 0);
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    TEST_LR("lsll", "", 0xfff8, 0);
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    TEST_ARPL("arpl", "w", 0x12345678 | 3, 0x762123c | 1);
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    TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 3);
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    TEST_ARPL("arpl", "w", 0x12345678 | 1, 0x762123c | 1);
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}
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1302 1368
/* 16 bit code test */
......
1931 1997
    0xc3, /* ret */
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};
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asm("smc_code2:\n"
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asm(".section \".data\"\n"
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    "smc_code2:\n"
1935 2002
    "movl 4(%esp), %eax\n"
1936 2003
    "movl %eax, smc_patch_addr2 + 1\n"
1937 2004
    "nop\n"
......
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    "nop\n"
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    "smc_patch_addr2:\n"
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    "movl $1, %eax\n"
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    "ret\n");
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    "ret\n"
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    ".previous\n"
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    );
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1949 2018
typedef int FuncType(void);
1950 2019
extern int smc_code2(int);
1951 2020
void test_self_modifying_code(void)
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{
1953 2022
    int i;
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1955 2023
    printf("self modifying code:\n");
1956 2024
    printf("func1 = 0x%x\n", ((FuncType *)code)());
1957 2025
    for(i = 2; i <= 4; i++) {
......
2211 2279
#define CVT_OP_XMM2MMX(op)\
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{\
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    asm volatile (#op " %1, %0" : "=y" (r.q[0]) : "x" (a.dq) \
2214
                  : "%xmm0");\
2282
                  : "%xmm0"); \
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    asm volatile("emms\n"); \
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    printf("%-9s: a=" FMT64X "" FMT64X " r=" FMT64X "\n",\
2216 2285
           #op,\
2217 2286
           a.q[1], a.q[0],\
......
2221 2290
#define CVT_OP_MMX2XMM(op)\
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{\
2223 2292
    asm volatile (#op " %1, %0" : "=x" (r.dq) : "y" (a.q[0]));\
2293
    asm volatile("emms\n"); \
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    printf("%-9s: a=" FMT64X " r=" FMT64X "" FMT64X "\n",\
2225 2295
           #op,\
2226 2296
           a.q[0],\
......
2657 2727
    test_bsx();
2658 2728
    test_mul();
2659 2729
    test_jcc();
2730
    test_loop();
2660 2731
    test_floats();
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#if !defined(__x86_64__)
2662 2733
    test_bcd();

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