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1 | 31e31b8a | bellard | /*
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2 | 3ef693a0 | bellard | * qemu main
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3 | 31e31b8a | bellard | *
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4 | 31e31b8a | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 31e31b8a | bellard | *
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6 | 31e31b8a | bellard | * This program is free software; you can redistribute it and/or modify
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7 | 31e31b8a | bellard | * it under the terms of the GNU General Public License as published by
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8 | 31e31b8a | bellard | * the Free Software Foundation; either version 2 of the License, or
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9 | 31e31b8a | bellard | * (at your option) any later version.
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10 | 31e31b8a | bellard | *
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11 | 31e31b8a | bellard | * This program is distributed in the hope that it will be useful,
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12 | 31e31b8a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 31e31b8a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | 31e31b8a | bellard | * GNU General Public License for more details.
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15 | 31e31b8a | bellard | *
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16 | 31e31b8a | bellard | * You should have received a copy of the GNU General Public License
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17 | 31e31b8a | bellard | * along with this program; if not, write to the Free Software
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18 | 31e31b8a | bellard | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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19 | 31e31b8a | bellard | */
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20 | 31e31b8a | bellard | #include <stdlib.h> |
21 | 31e31b8a | bellard | #include <stdio.h> |
22 | 31e31b8a | bellard | #include <stdarg.h> |
23 | 04369ff2 | bellard | #include <string.h> |
24 | 31e31b8a | bellard | #include <errno.h> |
25 | 0ecfa993 | bellard | #include <unistd.h> |
26 | 31e31b8a | bellard | |
27 | 3ef693a0 | bellard | #include "qemu.h" |
28 | 31e31b8a | bellard | |
29 | 0ecfa993 | bellard | #include "cpu-i386.h" |
30 | 31e31b8a | bellard | |
31 | 3ef693a0 | bellard | #define DEBUG_LOGFILE "/tmp/qemu.log" |
32 | 586314f2 | bellard | |
33 | 586314f2 | bellard | FILE *logfile = NULL;
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34 | 586314f2 | bellard | int loglevel;
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35 | 74cd30b8 | bellard | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
36 | 586314f2 | bellard | |
37 | f801f97e | bellard | #ifdef __i386__
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38 | f801f97e | bellard | /* Force usage of an ELF interpreter even if it is an ELF shared
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39 | f801f97e | bellard | object ! */
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40 | f801f97e | bellard | const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; |
41 | 74cd30b8 | bellard | |
42 | 74cd30b8 | bellard | /* for recent libc, we add these dummies symbol which are not declared
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43 | 74cd30b8 | bellard | when generating a linked object (bug in ld ?) */
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44 | 74cd30b8 | bellard | #if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3) |
45 | 74cd30b8 | bellard | long __init_array_start[0]; |
46 | 74cd30b8 | bellard | long __init_array_end[0]; |
47 | 74cd30b8 | bellard | long __fini_array_start[0]; |
48 | 74cd30b8 | bellard | long __fini_array_end[0]; |
49 | 74cd30b8 | bellard | #endif
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50 | 74cd30b8 | bellard | |
51 | f801f97e | bellard | #endif
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52 | f801f97e | bellard | |
53 | 9de5e440 | bellard | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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54 | 9de5e440 | bellard | we allocate a bigger stack. Need a better solution, for example
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55 | 9de5e440 | bellard | by remapping the process stack directly at the right place */
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56 | 9de5e440 | bellard | unsigned long x86_stack_size = 512 * 1024; |
57 | 31e31b8a | bellard | |
58 | 31e31b8a | bellard | void gemu_log(const char *fmt, ...) |
59 | 31e31b8a | bellard | { |
60 | 31e31b8a | bellard | va_list ap; |
61 | 31e31b8a | bellard | |
62 | 31e31b8a | bellard | va_start(ap, fmt); |
63 | 31e31b8a | bellard | vfprintf(stderr, fmt, ap); |
64 | 31e31b8a | bellard | va_end(ap); |
65 | 31e31b8a | bellard | } |
66 | 31e31b8a | bellard | |
67 | 31e31b8a | bellard | /***********************************************************/
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68 | 0ecfa993 | bellard | /* CPUX86 core interface */
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69 | 367e86e8 | bellard | |
70 | ba1c6e37 | bellard | void cpu_x86_outb(int addr, int val) |
71 | 367e86e8 | bellard | { |
72 | 367e86e8 | bellard | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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73 | 367e86e8 | bellard | } |
74 | 367e86e8 | bellard | |
75 | ba1c6e37 | bellard | void cpu_x86_outw(int addr, int val) |
76 | 367e86e8 | bellard | { |
77 | 367e86e8 | bellard | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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78 | 367e86e8 | bellard | } |
79 | 367e86e8 | bellard | |
80 | ba1c6e37 | bellard | void cpu_x86_outl(int addr, int val) |
81 | 367e86e8 | bellard | { |
82 | 367e86e8 | bellard | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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83 | 367e86e8 | bellard | } |
84 | 367e86e8 | bellard | |
85 | ba1c6e37 | bellard | int cpu_x86_inb(int addr) |
86 | 367e86e8 | bellard | { |
87 | 367e86e8 | bellard | fprintf(stderr, "inb: port=0x%04x\n", addr);
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88 | 367e86e8 | bellard | return 0; |
89 | 367e86e8 | bellard | } |
90 | 367e86e8 | bellard | |
91 | ba1c6e37 | bellard | int cpu_x86_inw(int addr) |
92 | 367e86e8 | bellard | { |
93 | 367e86e8 | bellard | fprintf(stderr, "inw: port=0x%04x\n", addr);
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94 | 367e86e8 | bellard | return 0; |
95 | 367e86e8 | bellard | } |
96 | 367e86e8 | bellard | |
97 | ba1c6e37 | bellard | int cpu_x86_inl(int addr) |
98 | 367e86e8 | bellard | { |
99 | 367e86e8 | bellard | fprintf(stderr, "inl: port=0x%04x\n", addr);
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100 | 367e86e8 | bellard | return 0; |
101 | 367e86e8 | bellard | } |
102 | 367e86e8 | bellard | |
103 | 6dbad63e | bellard | void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
104 | 6dbad63e | bellard | int seg32_bit)
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105 | 6dbad63e | bellard | { |
106 | 6dbad63e | bellard | unsigned int e1, e2, limit_in_pages; |
107 | 6dbad63e | bellard | limit_in_pages = 0;
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108 | 6dbad63e | bellard | if (limit > 0xffff) { |
109 | 6dbad63e | bellard | limit = limit >> 12;
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110 | 6dbad63e | bellard | limit_in_pages = 1;
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111 | 6dbad63e | bellard | } |
112 | 6dbad63e | bellard | e1 = (addr << 16) | (limit & 0xffff); |
113 | 6dbad63e | bellard | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
114 | 6dbad63e | bellard | e2 |= limit_in_pages << 23; /* byte granularity */ |
115 | 6dbad63e | bellard | e2 |= seg32_bit << 22; /* 32 bit segment */ |
116 | 6dbad63e | bellard | stl((uint8_t *)ptr, e1); |
117 | 6dbad63e | bellard | stl((uint8_t *)ptr + 4, e2);
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118 | 6dbad63e | bellard | } |
119 | 6dbad63e | bellard | |
120 | 6dbad63e | bellard | uint64_t gdt_table[6];
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121 | 31e31b8a | bellard | |
122 | 851e67a1 | bellard | //#define DEBUG_VM86
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123 | 851e67a1 | bellard | |
124 | bc8a22cc | bellard | static inline int is_revectored(int nr, struct target_revectored_struct *bitmap) |
125 | bc8a22cc | bellard | { |
126 | bc8a22cc | bellard | return (tswap32(bitmap->__map[nr >> 5]) >> (nr & 0x1f)) & 1; |
127 | bc8a22cc | bellard | } |
128 | bc8a22cc | bellard | |
129 | bc8a22cc | bellard | static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg) |
130 | bc8a22cc | bellard | { |
131 | bc8a22cc | bellard | return (uint8_t *)((seg << 4) + (reg & 0xffff)); |
132 | bc8a22cc | bellard | } |
133 | bc8a22cc | bellard | |
134 | bc8a22cc | bellard | static inline void pushw(CPUX86State *env, int val) |
135 | bc8a22cc | bellard | { |
136 | bc8a22cc | bellard | env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) |
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137 | bc8a22cc | bellard | ((env->regs[R_ESP] - 2) & 0xffff); |
138 | bc8a22cc | bellard | *(uint16_t *)seg_to_linear(env->segs[R_SS], env->regs[R_ESP]) = val; |
139 | bc8a22cc | bellard | } |
140 | bc8a22cc | bellard | |
141 | bc8a22cc | bellard | static inline unsigned int get_vflags(CPUX86State *env) |
142 | bc8a22cc | bellard | { |
143 | bc8a22cc | bellard | unsigned int eflags; |
144 | bc8a22cc | bellard | eflags = env->eflags & ~(VM_MASK | RF_MASK | IF_MASK); |
145 | bc8a22cc | bellard | if (eflags & VIF_MASK)
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146 | bc8a22cc | bellard | eflags |= IF_MASK; |
147 | bc8a22cc | bellard | return eflags;
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148 | bc8a22cc | bellard | } |
149 | bc8a22cc | bellard | |
150 | bc8a22cc | bellard | void save_v86_state(CPUX86State *env)
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151 | bc8a22cc | bellard | { |
152 | bc8a22cc | bellard | TaskState *ts = env->opaque; |
153 | bc8a22cc | bellard | #ifdef DEBUG_VM86
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154 | bc8a22cc | bellard | printf("save_v86_state\n");
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155 | bc8a22cc | bellard | #endif
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156 | bc8a22cc | bellard | |
157 | bc8a22cc | bellard | /* put the VM86 registers in the userspace register structure */
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158 | bc8a22cc | bellard | ts->target_v86->regs.eax = tswap32(env->regs[R_EAX]); |
159 | bc8a22cc | bellard | ts->target_v86->regs.ebx = tswap32(env->regs[R_EBX]); |
160 | bc8a22cc | bellard | ts->target_v86->regs.ecx = tswap32(env->regs[R_ECX]); |
161 | bc8a22cc | bellard | ts->target_v86->regs.edx = tswap32(env->regs[R_EDX]); |
162 | bc8a22cc | bellard | ts->target_v86->regs.esi = tswap32(env->regs[R_ESI]); |
163 | bc8a22cc | bellard | ts->target_v86->regs.edi = tswap32(env->regs[R_EDI]); |
164 | bc8a22cc | bellard | ts->target_v86->regs.ebp = tswap32(env->regs[R_EBP]); |
165 | bc8a22cc | bellard | ts->target_v86->regs.esp = tswap32(env->regs[R_ESP]); |
166 | bc8a22cc | bellard | ts->target_v86->regs.eip = tswap32(env->eip); |
167 | bc8a22cc | bellard | ts->target_v86->regs.cs = tswap16(env->segs[R_CS]); |
168 | bc8a22cc | bellard | ts->target_v86->regs.ss = tswap16(env->segs[R_SS]); |
169 | bc8a22cc | bellard | ts->target_v86->regs.ds = tswap16(env->segs[R_DS]); |
170 | bc8a22cc | bellard | ts->target_v86->regs.es = tswap16(env->segs[R_ES]); |
171 | bc8a22cc | bellard | ts->target_v86->regs.fs = tswap16(env->segs[R_FS]); |
172 | bc8a22cc | bellard | ts->target_v86->regs.gs = tswap16(env->segs[R_GS]); |
173 | bc8a22cc | bellard | ts->target_v86->regs.eflags = tswap32(env->eflags); |
174 | bc8a22cc | bellard | |
175 | bc8a22cc | bellard | /* restore 32 bit registers */
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176 | bc8a22cc | bellard | env->regs[R_EAX] = ts->vm86_saved_regs.eax; |
177 | bc8a22cc | bellard | env->regs[R_EBX] = ts->vm86_saved_regs.ebx; |
178 | bc8a22cc | bellard | env->regs[R_ECX] = ts->vm86_saved_regs.ecx; |
179 | bc8a22cc | bellard | env->regs[R_EDX] = ts->vm86_saved_regs.edx; |
180 | bc8a22cc | bellard | env->regs[R_ESI] = ts->vm86_saved_regs.esi; |
181 | bc8a22cc | bellard | env->regs[R_EDI] = ts->vm86_saved_regs.edi; |
182 | bc8a22cc | bellard | env->regs[R_EBP] = ts->vm86_saved_regs.ebp; |
183 | bc8a22cc | bellard | env->regs[R_ESP] = ts->vm86_saved_regs.esp; |
184 | bc8a22cc | bellard | env->eflags = ts->vm86_saved_regs.eflags; |
185 | bc8a22cc | bellard | env->eip = ts->vm86_saved_regs.eip; |
186 | bc8a22cc | bellard | |
187 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs); |
188 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss); |
189 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds); |
190 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es); |
191 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs); |
192 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs); |
193 | bc8a22cc | bellard | } |
194 | bc8a22cc | bellard | |
195 | bc8a22cc | bellard | /* return from vm86 mode to 32 bit. The vm86() syscall will return
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196 | bc8a22cc | bellard | 'retval' */
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197 | bc8a22cc | bellard | static inline void return_to_32bit(CPUX86State *env, int retval) |
198 | bc8a22cc | bellard | { |
199 | bc8a22cc | bellard | #ifdef DEBUG_VM86
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200 | bc8a22cc | bellard | printf("return_to_32bit: ret=0x%x\n", retval);
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201 | bc8a22cc | bellard | #endif
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202 | bc8a22cc | bellard | save_v86_state(env); |
203 | bc8a22cc | bellard | env->regs[R_EAX] = retval; |
204 | bc8a22cc | bellard | } |
205 | bc8a22cc | bellard | |
206 | bc8a22cc | bellard | /* handle VM86 interrupt (NOTE: the CPU core currently does not
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207 | bc8a22cc | bellard | support TSS interrupt revectoring, so this code is always executed) */
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208 | bc8a22cc | bellard | static void do_int(CPUX86State *env, int intno) |
209 | bc8a22cc | bellard | { |
210 | bc8a22cc | bellard | TaskState *ts = env->opaque; |
211 | bc8a22cc | bellard | uint32_t *int_ptr, segoffs; |
212 | bc8a22cc | bellard | |
213 | bc8a22cc | bellard | if (env->segs[R_CS] == TARGET_BIOSSEG)
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214 | bc8a22cc | bellard | goto cannot_handle; /* XXX: I am not sure this is really useful */ |
215 | bc8a22cc | bellard | if (is_revectored(intno, &ts->target_v86->int_revectored))
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216 | bc8a22cc | bellard | goto cannot_handle;
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217 | bc8a22cc | bellard | if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff, |
218 | bc8a22cc | bellard | &ts->target_v86->int21_revectored)) |
219 | bc8a22cc | bellard | goto cannot_handle;
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220 | bc8a22cc | bellard | int_ptr = (uint32_t *)(intno << 2);
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221 | bc8a22cc | bellard | segoffs = tswap32(*int_ptr); |
222 | bc8a22cc | bellard | if ((segoffs >> 16) == TARGET_BIOSSEG) |
223 | bc8a22cc | bellard | goto cannot_handle;
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224 | bc8a22cc | bellard | #ifdef DEBUG_VM86
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225 | bc8a22cc | bellard | printf("VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
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226 | bc8a22cc | bellard | intno, segoffs >> 16, segoffs & 0xffff); |
227 | bc8a22cc | bellard | #endif
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228 | bc8a22cc | bellard | /* save old state */
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229 | bc8a22cc | bellard | pushw(env, get_vflags(env)); |
230 | bc8a22cc | bellard | pushw(env, env->segs[R_CS]); |
231 | bc8a22cc | bellard | pushw(env, env->eip); |
232 | bc8a22cc | bellard | /* goto interrupt handler */
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233 | bc8a22cc | bellard | env->eip = segoffs & 0xffff;
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234 | bc8a22cc | bellard | cpu_x86_load_seg(env, R_CS, segoffs >> 16);
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235 | bc8a22cc | bellard | env->eflags &= ~(VIF_MASK | TF_MASK); |
236 | bc8a22cc | bellard | return;
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237 | bc8a22cc | bellard | cannot_handle:
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238 | bc8a22cc | bellard | #ifdef DEBUG_VM86
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239 | bc8a22cc | bellard | printf("VM86: return to 32 bits int 0x%x\n", intno);
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240 | bc8a22cc | bellard | #endif
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241 | bc8a22cc | bellard | return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
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242 | bc8a22cc | bellard | } |
243 | bc8a22cc | bellard | |
244 | 1b6b029e | bellard | void cpu_loop(struct CPUX86State *env) |
245 | 1b6b029e | bellard | { |
246 | bc8a22cc | bellard | int trapnr;
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247 | 9de5e440 | bellard | uint8_t *pc; |
248 | 9de5e440 | bellard | target_siginfo_t info; |
249 | 851e67a1 | bellard | |
250 | 1b6b029e | bellard | for(;;) {
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251 | bc8a22cc | bellard | trapnr = cpu_x86_exec(env); |
252 | 1b6b029e | bellard | pc = env->seg_cache[R_CS].base + env->eip; |
253 | bc8a22cc | bellard | switch(trapnr) {
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254 | 1b6b029e | bellard | case EXCP0D_GPF:
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255 | 851e67a1 | bellard | if (env->eflags & VM_MASK) {
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256 | 851e67a1 | bellard | #ifdef DEBUG_VM86
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257 | bc8a22cc | bellard | printf("VM86 exception %04x:%08x %02x %02x\n",
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258 | bc8a22cc | bellard | env->segs[R_CS], env->eip, pc[0], pc[1]); |
259 | 851e67a1 | bellard | #endif
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260 | 851e67a1 | bellard | /* VM86 mode */
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261 | 851e67a1 | bellard | switch(pc[0]) { |
262 | 851e67a1 | bellard | case 0xcd: /* int */ |
263 | 851e67a1 | bellard | env->eip += 2;
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264 | bc8a22cc | bellard | do_int(env, pc[1]);
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265 | bc8a22cc | bellard | break;
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266 | bc8a22cc | bellard | case 0x66: |
267 | bc8a22cc | bellard | switch(pc[1]) { |
268 | bc8a22cc | bellard | case 0xfb: /* sti */ |
269 | bc8a22cc | bellard | case 0x9d: /* popf */ |
270 | bc8a22cc | bellard | case 0xcf: /* iret */ |
271 | bc8a22cc | bellard | env->eip += 2;
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272 | bc8a22cc | bellard | return_to_32bit(env, TARGET_VM86_STI); |
273 | bc8a22cc | bellard | break;
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274 | bc8a22cc | bellard | default:
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275 | bc8a22cc | bellard | goto vm86_gpf;
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276 | bc8a22cc | bellard | } |
277 | bc8a22cc | bellard | break;
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278 | bc8a22cc | bellard | case 0xfb: /* sti */ |
279 | bc8a22cc | bellard | case 0x9d: /* popf */ |
280 | bc8a22cc | bellard | case 0xcf: /* iret */ |
281 | bc8a22cc | bellard | env->eip++; |
282 | bc8a22cc | bellard | return_to_32bit(env, TARGET_VM86_STI); |
283 | 851e67a1 | bellard | break;
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284 | 851e67a1 | bellard | default:
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285 | bc8a22cc | bellard | vm86_gpf:
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286 | 851e67a1 | bellard | /* real VM86 GPF exception */
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287 | bc8a22cc | bellard | return_to_32bit(env, TARGET_VM86_UNKNOWN); |
288 | 851e67a1 | bellard | break;
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289 | 851e67a1 | bellard | } |
290 | 1b6b029e | bellard | } else {
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291 | 851e67a1 | bellard | if (pc[0] == 0xcd && pc[1] == 0x80) { |
292 | 851e67a1 | bellard | /* syscall */
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293 | 851e67a1 | bellard | env->eip += 2;
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294 | 851e67a1 | bellard | env->regs[R_EAX] = do_syscall(env, |
295 | 851e67a1 | bellard | env->regs[R_EAX], |
296 | 851e67a1 | bellard | env->regs[R_EBX], |
297 | 851e67a1 | bellard | env->regs[R_ECX], |
298 | 851e67a1 | bellard | env->regs[R_EDX], |
299 | 851e67a1 | bellard | env->regs[R_ESI], |
300 | 851e67a1 | bellard | env->regs[R_EDI], |
301 | 851e67a1 | bellard | env->regs[R_EBP]); |
302 | 851e67a1 | bellard | } else {
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303 | 851e67a1 | bellard | /* XXX: more precise info */
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304 | 851e67a1 | bellard | info.si_signo = SIGSEGV; |
305 | 851e67a1 | bellard | info.si_errno = 0;
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306 | 851e67a1 | bellard | info.si_code = 0;
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307 | 851e67a1 | bellard | info._sifields._sigfault._addr = 0;
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308 | 851e67a1 | bellard | queue_signal(info.si_signo, &info); |
309 | 851e67a1 | bellard | } |
310 | 1b6b029e | bellard | } |
311 | 1b6b029e | bellard | break;
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312 | 9de5e440 | bellard | case EXCP00_DIVZ:
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313 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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314 | bc8a22cc | bellard | do_int(env, trapnr); |
315 | bc8a22cc | bellard | } else {
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316 | bc8a22cc | bellard | /* division by zero */
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317 | bc8a22cc | bellard | info.si_signo = SIGFPE; |
318 | bc8a22cc | bellard | info.si_errno = 0;
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319 | bc8a22cc | bellard | info.si_code = TARGET_FPE_INTDIV; |
320 | bc8a22cc | bellard | info._sifields._sigfault._addr = env->eip; |
321 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
322 | bc8a22cc | bellard | } |
323 | 9de5e440 | bellard | break;
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324 | 9de5e440 | bellard | case EXCP04_INTO:
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325 | 9de5e440 | bellard | case EXCP05_BOUND:
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326 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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327 | bc8a22cc | bellard | do_int(env, trapnr); |
328 | bc8a22cc | bellard | } else {
|
329 | bc8a22cc | bellard | info.si_signo = SIGSEGV; |
330 | bc8a22cc | bellard | info.si_errno = 0;
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331 | bc8a22cc | bellard | info.si_code = 0;
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332 | bc8a22cc | bellard | info._sifields._sigfault._addr = 0;
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333 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
334 | bc8a22cc | bellard | } |
335 | 9de5e440 | bellard | break;
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336 | 9de5e440 | bellard | case EXCP06_ILLOP:
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337 | 9de5e440 | bellard | info.si_signo = SIGILL; |
338 | 9de5e440 | bellard | info.si_errno = 0;
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339 | 9de5e440 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
340 | 9de5e440 | bellard | info._sifields._sigfault._addr = env->eip; |
341 | 9de5e440 | bellard | queue_signal(info.si_signo, &info); |
342 | 9de5e440 | bellard | break;
|
343 | 9de5e440 | bellard | case EXCP_INTERRUPT:
|
344 | 9de5e440 | bellard | /* just indicate that signals should be handled asap */
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345 | 9de5e440 | bellard | break;
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346 | 1b6b029e | bellard | default:
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347 | bc8a22cc | bellard | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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348 | bc8a22cc | bellard | (long)pc, trapnr);
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349 | 1b6b029e | bellard | abort(); |
350 | 1b6b029e | bellard | } |
351 | 66fb9763 | bellard | process_pending_signals(env); |
352 | 1b6b029e | bellard | } |
353 | 1b6b029e | bellard | } |
354 | 1b6b029e | bellard | |
355 | 31e31b8a | bellard | void usage(void) |
356 | 31e31b8a | bellard | { |
357 | 3ef693a0 | bellard | printf("qemu version " QEMU_VERSION ", Copyright (c) 2003 Fabrice Bellard\n" |
358 | d691f669 | bellard | "usage: qemu [-h] [-d] [-L path] [-s size] program [arguments...]\n"
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359 | 31e31b8a | bellard | "Linux x86 emulator\n"
|
360 | d691f669 | bellard | "\n"
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361 | d691f669 | bellard | "-h print this help\n"
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362 | d691f669 | bellard | "-d activate log (logfile=%s)\n"
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363 | d691f669 | bellard | "-L path set the x86 elf interpreter prefix (default=%s)\n"
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364 | d691f669 | bellard | "-s size set the x86 stack size in bytes (default=%ld)\n",
|
365 | d691f669 | bellard | DEBUG_LOGFILE, |
366 | d691f669 | bellard | interp_prefix, |
367 | d691f669 | bellard | x86_stack_size); |
368 | 74cd30b8 | bellard | _exit(1);
|
369 | 31e31b8a | bellard | } |
370 | 31e31b8a | bellard | |
371 | 9de5e440 | bellard | /* XXX: currently only used for async signals (see signal.c) */
|
372 | 9de5e440 | bellard | CPUX86State *global_env; |
373 | 851e67a1 | bellard | /* used to free thread contexts */
|
374 | 851e67a1 | bellard | TaskState *first_task_state; |
375 | 9de5e440 | bellard | |
376 | 31e31b8a | bellard | int main(int argc, char **argv) |
377 | 31e31b8a | bellard | { |
378 | 31e31b8a | bellard | const char *filename; |
379 | 01ffc75b | bellard | struct target_pt_regs regs1, *regs = ®s1;
|
380 | 31e31b8a | bellard | struct image_info info1, *info = &info1;
|
381 | 851e67a1 | bellard | TaskState ts1, *ts = &ts1; |
382 | 0ecfa993 | bellard | CPUX86State *env; |
383 | 586314f2 | bellard | int optind;
|
384 | d691f669 | bellard | const char *r; |
385 | d691f669 | bellard | |
386 | 31e31b8a | bellard | if (argc <= 1) |
387 | 31e31b8a | bellard | usage(); |
388 | f801f97e | bellard | |
389 | 586314f2 | bellard | loglevel = 0;
|
390 | 586314f2 | bellard | optind = 1;
|
391 | d691f669 | bellard | for(;;) {
|
392 | d691f669 | bellard | if (optind >= argc)
|
393 | d691f669 | bellard | break;
|
394 | d691f669 | bellard | r = argv[optind]; |
395 | d691f669 | bellard | if (r[0] != '-') |
396 | d691f669 | bellard | break;
|
397 | 586314f2 | bellard | optind++; |
398 | d691f669 | bellard | r++; |
399 | d691f669 | bellard | if (!strcmp(r, "-")) { |
400 | d691f669 | bellard | break;
|
401 | d691f669 | bellard | } else if (!strcmp(r, "d")) { |
402 | d691f669 | bellard | loglevel = 1;
|
403 | d691f669 | bellard | } else if (!strcmp(r, "s")) { |
404 | d691f669 | bellard | r = argv[optind++]; |
405 | d691f669 | bellard | x86_stack_size = strtol(r, (char **)&r, 0); |
406 | d691f669 | bellard | if (x86_stack_size <= 0) |
407 | d691f669 | bellard | usage(); |
408 | d691f669 | bellard | if (*r == 'M') |
409 | d691f669 | bellard | x86_stack_size *= 1024 * 1024; |
410 | d691f669 | bellard | else if (*r == 'k' || *r == 'K') |
411 | d691f669 | bellard | x86_stack_size *= 1024;
|
412 | d691f669 | bellard | } else if (!strcmp(r, "L")) { |
413 | d691f669 | bellard | interp_prefix = argv[optind++]; |
414 | d691f669 | bellard | } else {
|
415 | d691f669 | bellard | usage(); |
416 | d691f669 | bellard | } |
417 | 586314f2 | bellard | } |
418 | d691f669 | bellard | if (optind >= argc)
|
419 | d691f669 | bellard | usage(); |
420 | 586314f2 | bellard | filename = argv[optind]; |
421 | 586314f2 | bellard | |
422 | 586314f2 | bellard | /* init debug */
|
423 | 586314f2 | bellard | if (loglevel) {
|
424 | 586314f2 | bellard | logfile = fopen(DEBUG_LOGFILE, "w");
|
425 | 586314f2 | bellard | if (!logfile) {
|
426 | 586314f2 | bellard | perror(DEBUG_LOGFILE); |
427 | 74cd30b8 | bellard | _exit(1);
|
428 | 586314f2 | bellard | } |
429 | 586314f2 | bellard | setvbuf(logfile, NULL, _IOLBF, 0); |
430 | 586314f2 | bellard | } |
431 | 31e31b8a | bellard | |
432 | 31e31b8a | bellard | /* Zero out regs */
|
433 | 01ffc75b | bellard | memset(regs, 0, sizeof(struct target_pt_regs)); |
434 | 31e31b8a | bellard | |
435 | 31e31b8a | bellard | /* Zero out image_info */
|
436 | 31e31b8a | bellard | memset(info, 0, sizeof(struct image_info)); |
437 | 31e31b8a | bellard | |
438 | 74cd30b8 | bellard | /* Scan interp_prefix dir for replacement files. */
|
439 | 74cd30b8 | bellard | init_paths(interp_prefix); |
440 | 74cd30b8 | bellard | |
441 | 74cd30b8 | bellard | if (elf_exec(filename, argv+optind, environ, regs, info) != 0) { |
442 | 31e31b8a | bellard | printf("Error loading %s\n", filename);
|
443 | 74cd30b8 | bellard | _exit(1);
|
444 | 31e31b8a | bellard | } |
445 | 31e31b8a | bellard | |
446 | 4b74fe1f | bellard | if (loglevel) {
|
447 | 4b74fe1f | bellard | fprintf(logfile, "start_brk 0x%08lx\n" , info->start_brk);
|
448 | 4b74fe1f | bellard | fprintf(logfile, "end_code 0x%08lx\n" , info->end_code);
|
449 | 4b74fe1f | bellard | fprintf(logfile, "start_code 0x%08lx\n" , info->start_code);
|
450 | 4b74fe1f | bellard | fprintf(logfile, "end_data 0x%08lx\n" , info->end_data);
|
451 | 4b74fe1f | bellard | fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
|
452 | 4b74fe1f | bellard | fprintf(logfile, "brk 0x%08lx\n" , info->brk);
|
453 | 4b74fe1f | bellard | fprintf(logfile, "esp 0x%08lx\n" , regs->esp);
|
454 | 4b74fe1f | bellard | fprintf(logfile, "eip 0x%08lx\n" , regs->eip);
|
455 | 4b74fe1f | bellard | } |
456 | 31e31b8a | bellard | |
457 | 31e31b8a | bellard | target_set_brk((char *)info->brk);
|
458 | 31e31b8a | bellard | syscall_init(); |
459 | 66fb9763 | bellard | signal_init(); |
460 | 31e31b8a | bellard | |
461 | 0ecfa993 | bellard | env = cpu_x86_init(); |
462 | 9de5e440 | bellard | global_env = env; |
463 | 0ecfa993 | bellard | |
464 | 851e67a1 | bellard | /* build Task State */
|
465 | 851e67a1 | bellard | memset(ts, 0, sizeof(TaskState)); |
466 | 851e67a1 | bellard | env->opaque = ts; |
467 | 851e67a1 | bellard | ts->used = 1;
|
468 | 851e67a1 | bellard | |
469 | 6dbad63e | bellard | /* linux register setup */
|
470 | 0ecfa993 | bellard | env->regs[R_EAX] = regs->eax; |
471 | 0ecfa993 | bellard | env->regs[R_EBX] = regs->ebx; |
472 | 0ecfa993 | bellard | env->regs[R_ECX] = regs->ecx; |
473 | 0ecfa993 | bellard | env->regs[R_EDX] = regs->edx; |
474 | 0ecfa993 | bellard | env->regs[R_ESI] = regs->esi; |
475 | 0ecfa993 | bellard | env->regs[R_EDI] = regs->edi; |
476 | 0ecfa993 | bellard | env->regs[R_EBP] = regs->ebp; |
477 | 0ecfa993 | bellard | env->regs[R_ESP] = regs->esp; |
478 | dab2ed99 | bellard | env->eip = regs->eip; |
479 | 31e31b8a | bellard | |
480 | 6dbad63e | bellard | /* linux segment setup */
|
481 | 6dbad63e | bellard | env->gdt.base = (void *)gdt_table;
|
482 | 6dbad63e | bellard | env->gdt.limit = sizeof(gdt_table) - 1; |
483 | 6dbad63e | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xffffffff, 1); |
484 | 6dbad63e | bellard | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xffffffff, 1); |
485 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_CS, __USER_CS); |
486 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_DS, __USER_DS); |
487 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_ES, __USER_DS); |
488 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_SS, __USER_DS); |
489 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_FS, __USER_DS); |
490 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_GS, __USER_DS); |
491 | 31e31b8a | bellard | |
492 | 1b6b029e | bellard | cpu_loop(env); |
493 | 1b6b029e | bellard | /* never exits */
|
494 | 31e31b8a | bellard | return 0; |
495 | 31e31b8a | bellard | } |