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/*
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 *  qemu main
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 * 
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 *  Copyright (c) 2003 Fabrice Bellard
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 *
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 *  This program is free software; you can redistribute it and/or modify
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 *  it under the terms of the GNU General Public License as published by
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 *  the Free Software Foundation; either version 2 of the License, or
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 *  (at your option) any later version.
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 *
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 *  This program is distributed in the hope that it will be useful,
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 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
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 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 *  GNU General Public License for more details.
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 *
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 *  You should have received a copy of the GNU General Public License
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 *  along with this program; if not, write to the Free Software
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 *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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 */
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdarg.h>
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#include <string.h>
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#include <errno.h>
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#include <unistd.h>
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#include "qemu.h"
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#include "cpu-i386.h"
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#define DEBUG_LOGFILE "/tmp/qemu.log"
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FILE *logfile = NULL;
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int loglevel;
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static const char *interp_prefix = CONFIG_QEMU_PREFIX;
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#ifdef __i386__
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/* Force usage of an ELF interpreter even if it is an ELF shared
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   object ! */
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const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2";
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/* for recent libc, we add these dummies symbol which are not declared
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   when generating a linked object (bug in ld ?) */
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#if __GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)
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long __init_array_start[0];
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long __init_array_end[0];
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long __fini_array_start[0];
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long __fini_array_end[0];
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#endif
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#endif
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/* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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   we allocate a bigger stack. Need a better solution, for example
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   by remapping the process stack directly at the right place */
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unsigned long x86_stack_size = 512 * 1024;
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58 31e31b8a bellard
void gemu_log(const char *fmt, ...)
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{
60 31e31b8a bellard
    va_list ap;
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    va_start(ap, fmt);
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    vfprintf(stderr, fmt, ap);
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    va_end(ap);
65 31e31b8a bellard
}
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67 31e31b8a bellard
/***********************************************************/
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/* CPUX86 core interface */
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void cpu_x86_outb(int addr, int val)
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{
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    fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
73 367e86e8 bellard
}
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void cpu_x86_outw(int addr, int val)
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{
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    fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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}
79 367e86e8 bellard
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void cpu_x86_outl(int addr, int val)
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{
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    fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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}
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int cpu_x86_inb(int addr)
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{
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    fprintf(stderr, "inb: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_x86_inw(int addr)
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{
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    fprintf(stderr, "inw: port=0x%04x\n", addr);
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    return 0;
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}
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int cpu_x86_inl(int addr)
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{
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    fprintf(stderr, "inl: port=0x%04x\n", addr);
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    return 0;
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}
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void write_dt(void *ptr, unsigned long addr, unsigned long limit, 
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              int seg32_bit)
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{
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    unsigned int e1, e2, limit_in_pages;
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    limit_in_pages = 0;
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    if (limit > 0xffff) {
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        limit = limit >> 12;
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        limit_in_pages = 1;
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    }
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    e1 = (addr << 16) | (limit & 0xffff);
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    e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000);
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    e2 |= limit_in_pages << 23; /* byte granularity */
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    e2 |= seg32_bit << 22; /* 32 bit segment */
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    stl((uint8_t *)ptr, e1);
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    stl((uint8_t *)ptr + 4, e2);
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}
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uint64_t gdt_table[6];
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//#define DEBUG_VM86
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static inline int is_revectored(int nr, struct target_revectored_struct *bitmap)
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{
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    return (tswap32(bitmap->__map[nr >> 5]) >> (nr & 0x1f)) & 1;
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}
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static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
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{
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    return (uint8_t *)((seg << 4) + (reg & 0xffff));
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}
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static inline void pushw(CPUX86State *env, int val)
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{
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    env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) | 
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        ((env->regs[R_ESP] - 2) & 0xffff);
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    *(uint16_t *)seg_to_linear(env->segs[R_SS], env->regs[R_ESP]) = val;
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}
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static inline unsigned int get_vflags(CPUX86State *env)
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{
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    unsigned int eflags;
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    eflags = env->eflags & ~(VM_MASK | RF_MASK | IF_MASK);
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    if (eflags & VIF_MASK)
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        eflags |= IF_MASK;
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    return eflags;
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}
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void save_v86_state(CPUX86State *env)
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{
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    TaskState *ts = env->opaque;
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#ifdef DEBUG_VM86
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    printf("save_v86_state\n");
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#endif
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    /* put the VM86 registers in the userspace register structure */
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    ts->target_v86->regs.eax = tswap32(env->regs[R_EAX]);
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    ts->target_v86->regs.ebx = tswap32(env->regs[R_EBX]);
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    ts->target_v86->regs.ecx = tswap32(env->regs[R_ECX]);
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    ts->target_v86->regs.edx = tswap32(env->regs[R_EDX]);
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    ts->target_v86->regs.esi = tswap32(env->regs[R_ESI]);
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    ts->target_v86->regs.edi = tswap32(env->regs[R_EDI]);
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    ts->target_v86->regs.ebp = tswap32(env->regs[R_EBP]);
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    ts->target_v86->regs.esp = tswap32(env->regs[R_ESP]);
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    ts->target_v86->regs.eip = tswap32(env->eip);
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    ts->target_v86->regs.cs = tswap16(env->segs[R_CS]);
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    ts->target_v86->regs.ss = tswap16(env->segs[R_SS]);
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    ts->target_v86->regs.ds = tswap16(env->segs[R_DS]);
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    ts->target_v86->regs.es = tswap16(env->segs[R_ES]);
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    ts->target_v86->regs.fs = tswap16(env->segs[R_FS]);
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    ts->target_v86->regs.gs = tswap16(env->segs[R_GS]);
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    ts->target_v86->regs.eflags = tswap32(env->eflags);
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    /* restore 32 bit registers */
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    env->regs[R_EAX] = ts->vm86_saved_regs.eax;
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    env->regs[R_EBX] = ts->vm86_saved_regs.ebx;
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    env->regs[R_ECX] = ts->vm86_saved_regs.ecx;
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    env->regs[R_EDX] = ts->vm86_saved_regs.edx;
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    env->regs[R_ESI] = ts->vm86_saved_regs.esi;
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    env->regs[R_EDI] = ts->vm86_saved_regs.edi;
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    env->regs[R_EBP] = ts->vm86_saved_regs.ebp;
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    env->regs[R_ESP] = ts->vm86_saved_regs.esp;
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    env->eflags = ts->vm86_saved_regs.eflags;
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    env->eip = ts->vm86_saved_regs.eip;
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    cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs);
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    cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss);
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    cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds);
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    cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es);
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    cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs);
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    cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs);
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}
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/* return from vm86 mode to 32 bit. The vm86() syscall will return
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   'retval' */
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static inline void return_to_32bit(CPUX86State *env, int retval)
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{
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#ifdef DEBUG_VM86
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    printf("return_to_32bit: ret=0x%x\n", retval);
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#endif
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    save_v86_state(env);
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    env->regs[R_EAX] = retval;
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}
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/* handle VM86 interrupt (NOTE: the CPU core currently does not
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   support TSS interrupt revectoring, so this code is always executed) */
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static void do_int(CPUX86State *env, int intno)
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{
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    TaskState *ts = env->opaque;
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    uint32_t *int_ptr, segoffs;
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    if (env->segs[R_CS] == TARGET_BIOSSEG)
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        goto cannot_handle; /* XXX: I am not sure this is really useful */
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    if (is_revectored(intno, &ts->target_v86->int_revectored))
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        goto cannot_handle;
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    if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff, 
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                                       &ts->target_v86->int21_revectored))
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        goto cannot_handle;
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    int_ptr = (uint32_t *)(intno << 2);
221 bc8a22cc bellard
    segoffs = tswap32(*int_ptr);
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    if ((segoffs >> 16) == TARGET_BIOSSEG)
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        goto cannot_handle;
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#ifdef DEBUG_VM86
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    printf("VM86: emulating int 0x%x. CS:IP=%04x:%04x\n", 
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           intno, segoffs >> 16, segoffs & 0xffff);
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#endif
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    /* save old state */
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    pushw(env, get_vflags(env));
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    pushw(env, env->segs[R_CS]);
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    pushw(env, env->eip);
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    /* goto interrupt handler */
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    env->eip = segoffs & 0xffff;
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    cpu_x86_load_seg(env, R_CS, segoffs >> 16);
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    env->eflags &= ~(VIF_MASK | TF_MASK);
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    return;
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 cannot_handle:
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#ifdef DEBUG_VM86
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    printf("VM86: return to 32 bits int 0x%x\n", intno);
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#endif
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    return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
242 bc8a22cc bellard
}
243 bc8a22cc bellard
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void cpu_loop(struct CPUX86State *env)
245 1b6b029e bellard
{
246 bc8a22cc bellard
    int trapnr;
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    uint8_t *pc;
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    target_siginfo_t info;
249 851e67a1 bellard
250 1b6b029e bellard
    for(;;) {
251 bc8a22cc bellard
        trapnr = cpu_x86_exec(env);
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        pc = env->seg_cache[R_CS].base + env->eip;
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        switch(trapnr) {
254 1b6b029e bellard
        case EXCP0D_GPF:
255 851e67a1 bellard
            if (env->eflags & VM_MASK) {
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#ifdef DEBUG_VM86
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                printf("VM86 exception %04x:%08x %02x %02x\n",
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                       env->segs[R_CS], env->eip, pc[0], pc[1]);
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#endif
260 851e67a1 bellard
                /* VM86 mode */
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                switch(pc[0]) {
262 851e67a1 bellard
                case 0xcd: /* int */
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                    env->eip += 2;
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                    do_int(env, pc[1]);
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                    break;
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                case 0x66:
267 bc8a22cc bellard
                    switch(pc[1]) {
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                    case 0xfb: /* sti */
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                    case 0x9d: /* popf */
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                    case 0xcf: /* iret */
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                        env->eip += 2;
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                        return_to_32bit(env, TARGET_VM86_STI);
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                        break;
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                    default:
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                        goto vm86_gpf;
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                    }
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                    break;
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                case 0xfb: /* sti */
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                case 0x9d: /* popf */
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                case 0xcf: /* iret */
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                    env->eip++;
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                    return_to_32bit(env, TARGET_VM86_STI);
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                    break;
284 851e67a1 bellard
                default:
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                vm86_gpf:
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                    /* real VM86 GPF exception */
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                    return_to_32bit(env, TARGET_VM86_UNKNOWN);
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                    break;
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                }
290 1b6b029e bellard
            } else {
291 851e67a1 bellard
                if (pc[0] == 0xcd && pc[1] == 0x80) {
292 851e67a1 bellard
                    /* syscall */
293 851e67a1 bellard
                    env->eip += 2;
294 851e67a1 bellard
                    env->regs[R_EAX] = do_syscall(env, 
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                                                  env->regs[R_EAX], 
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                                                  env->regs[R_EBX],
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                                                  env->regs[R_ECX],
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                                                  env->regs[R_EDX],
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                                                  env->regs[R_ESI],
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                                                  env->regs[R_EDI],
301 851e67a1 bellard
                                                  env->regs[R_EBP]);
302 851e67a1 bellard
                } else {
303 851e67a1 bellard
                    /* XXX: more precise info */
304 851e67a1 bellard
                    info.si_signo = SIGSEGV;
305 851e67a1 bellard
                    info.si_errno = 0;
306 851e67a1 bellard
                    info.si_code = 0;
307 851e67a1 bellard
                    info._sifields._sigfault._addr = 0;
308 851e67a1 bellard
                    queue_signal(info.si_signo, &info);
309 851e67a1 bellard
                }
310 1b6b029e bellard
            }
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            break;
312 9de5e440 bellard
        case EXCP00_DIVZ:
313 bc8a22cc bellard
            if (env->eflags & VM_MASK) {
314 bc8a22cc bellard
                do_int(env, trapnr);
315 bc8a22cc bellard
            } else {
316 bc8a22cc bellard
                /* division by zero */
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                info.si_signo = SIGFPE;
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                info.si_errno = 0;
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                info.si_code = TARGET_FPE_INTDIV;
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                info._sifields._sigfault._addr = env->eip;
321 bc8a22cc bellard
                queue_signal(info.si_signo, &info);
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            }
323 9de5e440 bellard
            break;
324 9de5e440 bellard
        case EXCP04_INTO:
325 9de5e440 bellard
        case EXCP05_BOUND:
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            if (env->eflags & VM_MASK) {
327 bc8a22cc bellard
                do_int(env, trapnr);
328 bc8a22cc bellard
            } else {
329 bc8a22cc bellard
                info.si_signo = SIGSEGV;
330 bc8a22cc bellard
                info.si_errno = 0;
331 bc8a22cc bellard
                info.si_code = 0;
332 bc8a22cc bellard
                info._sifields._sigfault._addr = 0;
333 bc8a22cc bellard
                queue_signal(info.si_signo, &info);
334 bc8a22cc bellard
            }
335 9de5e440 bellard
            break;
336 9de5e440 bellard
        case EXCP06_ILLOP:
337 9de5e440 bellard
            info.si_signo = SIGILL;
338 9de5e440 bellard
            info.si_errno = 0;
339 9de5e440 bellard
            info.si_code = TARGET_ILL_ILLOPN;
340 9de5e440 bellard
            info._sifields._sigfault._addr = env->eip;
341 9de5e440 bellard
            queue_signal(info.si_signo, &info);
342 9de5e440 bellard
            break;
343 9de5e440 bellard
        case EXCP_INTERRUPT:
344 9de5e440 bellard
            /* just indicate that signals should be handled asap */
345 9de5e440 bellard
            break;
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        default:
347 bc8a22cc bellard
            fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n", 
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                    (long)pc, trapnr);
349 1b6b029e bellard
            abort();
350 1b6b029e bellard
        }
351 66fb9763 bellard
        process_pending_signals(env);
352 1b6b029e bellard
    }
353 1b6b029e bellard
}
354 1b6b029e bellard
355 31e31b8a bellard
void usage(void)
356 31e31b8a bellard
{
357 3ef693a0 bellard
    printf("qemu version " QEMU_VERSION ", Copyright (c) 2003 Fabrice Bellard\n"
358 d691f669 bellard
           "usage: qemu [-h] [-d] [-L path] [-s size] program [arguments...]\n"
359 31e31b8a bellard
           "Linux x86 emulator\n"
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           "\n"
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           "-h        print this help\n"
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           "-d        activate log (logfile=%s)\n"
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           "-L path   set the x86 elf interpreter prefix (default=%s)\n"
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           "-s size   set the x86 stack size in bytes (default=%ld)\n",
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           DEBUG_LOGFILE,
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           interp_prefix, 
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           x86_stack_size);
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    _exit(1);
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}
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/* XXX: currently only used for async signals (see signal.c) */
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CPUX86State *global_env;
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/* used to free thread contexts */
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TaskState *first_task_state;
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int main(int argc, char **argv)
377 31e31b8a bellard
{
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    const char *filename;
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    struct target_pt_regs regs1, *regs = &regs1;
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    struct image_info info1, *info = &info1;
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    TaskState ts1, *ts = &ts1;
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    CPUX86State *env;
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    int optind;
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    const char *r;
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    if (argc <= 1)
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        usage();
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    loglevel = 0;
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    optind = 1;
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    for(;;) {
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        if (optind >= argc)
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            break;
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        r = argv[optind];
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        if (r[0] != '-')
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            break;
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        optind++;
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        r++;
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        if (!strcmp(r, "-")) {
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            break;
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        } else if (!strcmp(r, "d")) {
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            loglevel = 1;
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        } else if (!strcmp(r, "s")) {
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            r = argv[optind++];
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            x86_stack_size = strtol(r, (char **)&r, 0);
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            if (x86_stack_size <= 0)
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                usage();
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            if (*r == 'M')
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                x86_stack_size *= 1024 * 1024;
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            else if (*r == 'k' || *r == 'K')
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                x86_stack_size *= 1024;
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        } else if (!strcmp(r, "L")) {
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            interp_prefix = argv[optind++];
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        } else {
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            usage();
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        }
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    }
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    if (optind >= argc)
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        usage();
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    filename = argv[optind];
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    /* init debug */
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    if (loglevel) {
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        logfile = fopen(DEBUG_LOGFILE, "w");
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        if (!logfile) {
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            perror(DEBUG_LOGFILE);
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            _exit(1);
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        }
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        setvbuf(logfile, NULL, _IOLBF, 0);
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    }
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    /* Zero out regs */
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    memset(regs, 0, sizeof(struct target_pt_regs));
434 31e31b8a bellard
435 31e31b8a bellard
    /* Zero out image_info */
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    memset(info, 0, sizeof(struct image_info));
437 31e31b8a bellard
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    /* Scan interp_prefix dir for replacement files. */
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    init_paths(interp_prefix);
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    if (elf_exec(filename, argv+optind, environ, regs, info) != 0) {
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        printf("Error loading %s\n", filename);
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        _exit(1);
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    }
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    if (loglevel) {
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        fprintf(logfile, "start_brk   0x%08lx\n" , info->start_brk);
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        fprintf(logfile, "end_code    0x%08lx\n" , info->end_code);
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        fprintf(logfile, "start_code  0x%08lx\n" , info->start_code);
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        fprintf(logfile, "end_data    0x%08lx\n" , info->end_data);
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        fprintf(logfile, "start_stack 0x%08lx\n" , info->start_stack);
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        fprintf(logfile, "brk         0x%08lx\n" , info->brk);
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        fprintf(logfile, "esp         0x%08lx\n" , regs->esp);
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        fprintf(logfile, "eip         0x%08lx\n" , regs->eip);
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    }
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    target_set_brk((char *)info->brk);
458 31e31b8a bellard
    syscall_init();
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    signal_init();
460 31e31b8a bellard
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    env = cpu_x86_init();
462 9de5e440 bellard
    global_env = env;
463 0ecfa993 bellard
464 851e67a1 bellard
    /* build Task State */
465 851e67a1 bellard
    memset(ts, 0, sizeof(TaskState));
466 851e67a1 bellard
    env->opaque = ts;
467 851e67a1 bellard
    ts->used = 1;
468 851e67a1 bellard
    
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    /* linux register setup */
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    env->regs[R_EAX] = regs->eax;
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    env->regs[R_EBX] = regs->ebx;
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    env->regs[R_ECX] = regs->ecx;
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    env->regs[R_EDX] = regs->edx;
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    env->regs[R_ESI] = regs->esi;
475 0ecfa993 bellard
    env->regs[R_EDI] = regs->edi;
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    env->regs[R_EBP] = regs->ebp;
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    env->regs[R_ESP] = regs->esp;
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    env->eip = regs->eip;
479 31e31b8a bellard
480 6dbad63e bellard
    /* linux segment setup */
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    env->gdt.base = (void *)gdt_table;
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    env->gdt.limit = sizeof(gdt_table) - 1;
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    write_dt(&gdt_table[__USER_CS >> 3], 0, 0xffffffff, 1);
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    write_dt(&gdt_table[__USER_DS >> 3], 0, 0xffffffff, 1);
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    cpu_x86_load_seg(env, R_CS, __USER_CS);
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    cpu_x86_load_seg(env, R_DS, __USER_DS);
487 6dbad63e bellard
    cpu_x86_load_seg(env, R_ES, __USER_DS);
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    cpu_x86_load_seg(env, R_SS, __USER_DS);
489 6dbad63e bellard
    cpu_x86_load_seg(env, R_FS, __USER_DS);
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    cpu_x86_load_seg(env, R_GS, __USER_DS);
491 31e31b8a bellard
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    cpu_loop(env);
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    /* never exits */
494 31e31b8a bellard
    return 0;
495 31e31b8a bellard
}