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/*
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* PXA270-based Clamshell PDA platforms.
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*
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* Copyright (c) 2006 Openedhand Ltd.
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* Written by Andrzej Zaborowski <balrog@zabor.org>
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*
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* This code is licensed under the GNU GPL v2.
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*/
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#include "hw.h" |
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#include "pxa.h" |
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#include "arm-misc.h" |
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#include "sysemu.h" |
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#include "pcmcia.h" |
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#include "i2c.h" |
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#include "ssi.h" |
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#include "flash.h" |
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#include "qemu-timer.h" |
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#include "devices.h" |
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#include "sharpsl.h" |
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#include "console.h" |
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#include "block.h" |
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#include "audio/audio.h" |
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#include "boards.h" |
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#include "blockdev.h" |
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#include "sysbus.h" |
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#include "exec-memory.h" |
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|
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#undef REG_FMT
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#define REG_FMT "0x%02lx" |
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|
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/* Spitz Flash */
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#define FLASH_BASE 0x0c000000 |
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#define FLASH_ECCLPLB 0x00 /* Line parity 7 - 0 bit */ |
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#define FLASH_ECCLPUB 0x04 /* Line parity 15 - 8 bit */ |
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#define FLASH_ECCCP 0x08 /* Column parity 5 - 0 bit */ |
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#define FLASH_ECCCNTR 0x0c /* ECC byte counter */ |
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#define FLASH_ECCCLRR 0x10 /* Clear ECC */ |
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#define FLASH_FLASHIO 0x14 /* Flash I/O */ |
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#define FLASH_FLASHCTL 0x18 /* Flash Control */ |
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#define FLASHCTL_CE0 (1 << 0) |
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#define FLASHCTL_CLE (1 << 1) |
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#define FLASHCTL_ALE (1 << 2) |
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#define FLASHCTL_WP (1 << 3) |
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#define FLASHCTL_CE1 (1 << 4) |
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#define FLASHCTL_RYBY (1 << 5) |
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#define FLASHCTL_NCE (FLASHCTL_CE0 | FLASHCTL_CE1)
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|
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typedef struct { |
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SysBusDevice busdev; |
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DeviceState *nand; |
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uint8_t ctl; |
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uint8_t manf_id; |
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uint8_t chip_id; |
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ECCState ecc; |
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} SLNANDState; |
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static uint32_t sl_readb(void *opaque, target_phys_addr_t addr) |
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{ |
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SLNANDState *s = (SLNANDState *) opaque; |
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int ryby;
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switch (addr) {
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#define BSHR(byte, from, to) ((s->ecc.lp[byte] >> (from - to)) & (1 << to)) |
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case FLASH_ECCLPLB:
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return BSHR(0, 4, 0) | BSHR(0, 5, 2) | BSHR(0, 6, 4) | BSHR(0, 7, 6) | |
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BSHR(1, 4, 1) | BSHR(1, 5, 3) | BSHR(1, 6, 5) | BSHR(1, 7, 7); |
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#define BSHL(byte, from, to) ((s->ecc.lp[byte] << (to - from)) & (1 << to)) |
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case FLASH_ECCLPUB:
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return BSHL(0, 0, 0) | BSHL(0, 1, 2) | BSHL(0, 2, 4) | BSHL(0, 3, 6) | |
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BSHL(1, 0, 1) | BSHL(1, 1, 3) | BSHL(1, 2, 5) | BSHL(1, 3, 7); |
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case FLASH_ECCCP:
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return s->ecc.cp;
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case FLASH_ECCCNTR:
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return s->ecc.count & 0xff; |
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case FLASH_FLASHCTL:
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nand_getpins(s->nand, &ryby); |
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if (ryby)
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return s->ctl | FLASHCTL_RYBY;
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else
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return s->ctl;
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case FLASH_FLASHIO:
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return ecc_digest(&s->ecc, nand_getio(s->nand));
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default:
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zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
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} |
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return 0; |
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} |
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static uint32_t sl_readl(void *opaque, target_phys_addr_t addr) |
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{ |
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SLNANDState *s = (SLNANDState *) opaque; |
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if (addr == FLASH_FLASHIO)
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return ecc_digest(&s->ecc, nand_getio(s->nand)) |
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(ecc_digest(&s->ecc, nand_getio(s->nand)) << 16);
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return sl_readb(opaque, addr);
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} |
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static void sl_writeb(void *opaque, target_phys_addr_t addr, |
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uint32_t value) |
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{ |
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SLNANDState *s = (SLNANDState *) opaque; |
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switch (addr) {
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case FLASH_ECCCLRR:
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/* Value is ignored. */
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ecc_reset(&s->ecc); |
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break;
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case FLASH_FLASHCTL:
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s->ctl = value & 0xff & ~FLASHCTL_RYBY;
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nand_setpins(s->nand, |
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s->ctl & FLASHCTL_CLE, |
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s->ctl & FLASHCTL_ALE, |
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s->ctl & FLASHCTL_NCE, |
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s->ctl & FLASHCTL_WP, |
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0);
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break;
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case FLASH_FLASHIO:
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nand_setio(s->nand, ecc_digest(&s->ecc, value & 0xff));
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break;
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default:
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zaurus_printf("Bad register offset " REG_FMT "\n", (unsigned long)addr); |
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} |
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} |
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enum {
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FLASH_128M, |
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FLASH_1024M, |
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}; |
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static CPUReadMemoryFunc * const sl_readfn[] = { |
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sl_readb, |
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sl_readb, |
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sl_readl, |
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}; |
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static CPUWriteMemoryFunc * const sl_writefn[] = { |
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sl_writeb, |
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sl_writeb, |
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sl_writeb, |
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}; |
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static void sl_flash_register(PXA2xxState *cpu, int size) |
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{ |
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DeviceState *dev; |
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dev = qdev_create(NULL, "sl-nand"); |
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qdev_prop_set_uint8(dev, "manf_id", NAND_MFR_SAMSUNG);
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if (size == FLASH_128M)
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qdev_prop_set_uint8(dev, "chip_id", 0x73); |
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else if (size == FLASH_1024M) |
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qdev_prop_set_uint8(dev, "chip_id", 0xf1); |
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qdev_init_nofail(dev); |
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sysbus_mmio_map(sysbus_from_qdev(dev), 0, FLASH_BASE);
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} |
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static int sl_nand_init(SysBusDevice *dev) { |
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int iomemtype;
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SLNANDState *s; |
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DriveInfo *nand; |
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s = FROM_SYSBUS(SLNANDState, dev); |
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s->ctl = 0;
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nand = drive_get(IF_MTD, 0, 0); |
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s->nand = nand_init(nand ? nand->bdrv : NULL, s->manf_id, s->chip_id);
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iomemtype = cpu_register_io_memory(sl_readfn, |
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sl_writefn, s, DEVICE_NATIVE_ENDIAN); |
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sysbus_init_mmio(dev, 0x40, iomemtype);
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return 0; |
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} |
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/* Spitz Keyboard */
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#define SPITZ_KEY_STROBE_NUM 11 |
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#define SPITZ_KEY_SENSE_NUM 7 |
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static const int spitz_gpio_key_sense[SPITZ_KEY_SENSE_NUM] = { |
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12, 17, 91, 34, 36, 38, 39 |
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}; |
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static const int spitz_gpio_key_strobe[SPITZ_KEY_STROBE_NUM] = { |
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88, 23, 24, 25, 26, 27, 52, 103, 107, 108, 114 |
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}; |
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/* Eighth additional row maps the special keys */
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static int spitz_keymap[SPITZ_KEY_SENSE_NUM + 1][SPITZ_KEY_STROBE_NUM] = { |
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{ 0x1d, 0x02, 0x04, 0x06, 0x07, 0x08, 0x0a, 0x0b, 0x0e, 0x3f, 0x40 }, |
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{ -1 , 0x03, 0x05, 0x13, 0x15, 0x09, 0x17, 0x18, 0x19, 0x41, 0x42 }, |
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{ 0x0f, 0x10, 0x12, 0x14, 0x22, 0x16, 0x24, 0x25, -1 , -1 , -1 }, |
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{ 0x3c, 0x11, 0x1f, 0x21, 0x2f, 0x23, 0x32, 0x26, -1 , 0x36, -1 }, |
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{ 0x3b, 0x1e, 0x20, 0x2e, 0x30, 0x31, 0x34, -1 , 0x1c, 0x2a, -1 }, |
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{ 0x44, 0x2c, 0x2d, 0x0c, 0x39, 0x33, -1 , 0x48, -1 , -1 , 0x38 }, |
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{ 0x37, 0x3d, -1 , 0x45, 0x57, 0x58, 0x4b, 0x50, 0x4d, -1 , -1 }, |
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{ 0x52, 0x43, 0x01, 0x47, 0x49, -1 , -1 , -1 , -1 , -1 , -1 }, |
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}; |
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#define SPITZ_GPIO_AK_INT 13 /* Remote control */ |
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#define SPITZ_GPIO_SYNC 16 /* Sync button */ |
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#define SPITZ_GPIO_ON_KEY 95 /* Power button */ |
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#define SPITZ_GPIO_SWA 97 /* Lid */ |
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#define SPITZ_GPIO_SWB 96 /* Tablet mode */ |
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/* The special buttons are mapped to unused keys */
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static const int spitz_gpiomap[5] = { |
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SPITZ_GPIO_AK_INT, SPITZ_GPIO_SYNC, SPITZ_GPIO_ON_KEY, |
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SPITZ_GPIO_SWA, SPITZ_GPIO_SWB, |
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}; |
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typedef struct { |
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SysBusDevice busdev; |
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qemu_irq sense[SPITZ_KEY_SENSE_NUM]; |
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qemu_irq gpiomap[5];
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int keymap[0x80]; |
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uint16_t keyrow[SPITZ_KEY_SENSE_NUM]; |
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uint16_t strobe_state; |
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uint16_t sense_state; |
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uint16_t pre_map[0x100];
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uint16_t modifiers; |
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uint16_t imodifiers; |
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uint8_t fifo[16];
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int fifopos, fifolen;
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QEMUTimer *kbdtimer; |
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} SpitzKeyboardState; |
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static void spitz_keyboard_sense_update(SpitzKeyboardState *s) |
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{ |
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int i;
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uint16_t strobe, sense = 0;
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for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) { |
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strobe = s->keyrow[i] & s->strobe_state; |
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if (strobe) {
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sense |= 1 << i;
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if (!(s->sense_state & (1 << i))) |
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qemu_irq_raise(s->sense[i]); |
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} else if (s->sense_state & (1 << i)) |
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qemu_irq_lower(s->sense[i]); |
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} |
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s->sense_state = sense; |
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} |
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static void spitz_keyboard_strobe(void *opaque, int line, int level) |
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{ |
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SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
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if (level)
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s->strobe_state |= 1 << line;
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else
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s->strobe_state &= ~(1 << line);
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spitz_keyboard_sense_update(s); |
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} |
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static void spitz_keyboard_keydown(SpitzKeyboardState *s, int keycode) |
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{ |
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int spitz_keycode = s->keymap[keycode & 0x7f]; |
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if (spitz_keycode == -1) |
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return;
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/* Handle the additional keys */
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if ((spitz_keycode >> 4) == SPITZ_KEY_SENSE_NUM) { |
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qemu_set_irq(s->gpiomap[spitz_keycode & 0xf], (keycode < 0x80)); |
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return;
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} |
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if (keycode & 0x80) |
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s->keyrow[spitz_keycode >> 4] &= ~(1 << (spitz_keycode & 0xf)); |
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else
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s->keyrow[spitz_keycode >> 4] |= 1 << (spitz_keycode & 0xf); |
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spitz_keyboard_sense_update(s); |
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} |
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|
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#define SHIFT (1 << 7) |
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#define CTRL (1 << 8) |
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#define FN (1 << 9) |
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|
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#define QUEUE_KEY(c) s->fifo[(s->fifopos + s->fifolen ++) & 0xf] = c |
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|
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static void spitz_keyboard_handler(void *opaque, int keycode) |
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{ |
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SpitzKeyboardState *s = opaque; |
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uint16_t code; |
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int mapcode;
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switch (keycode) {
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case 0x2a: /* Left Shift */ |
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s->modifiers |= 1;
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break;
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case 0xaa: |
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s->modifiers &= ~1;
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break;
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case 0x36: /* Right Shift */ |
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s->modifiers |= 2;
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break;
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case 0xb6: |
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s->modifiers &= ~2;
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break;
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case 0x1d: /* Control */ |
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s->modifiers |= 4;
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break;
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case 0x9d: |
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s->modifiers &= ~4;
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break;
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case 0x38: /* Alt */ |
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s->modifiers |= 8;
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break;
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case 0xb8: |
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s->modifiers &= ~8;
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break;
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} |
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|
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code = s->pre_map[mapcode = ((s->modifiers & 3) ?
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(keycode | SHIFT) : |
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(keycode & ~SHIFT))]; |
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if (code != mapcode) {
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#if 0
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if ((code & SHIFT) && !(s->modifiers & 1))
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QUEUE_KEY(0x2a | (keycode & 0x80));
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if ((code & CTRL ) && !(s->modifiers & 4))
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QUEUE_KEY(0x1d | (keycode & 0x80));
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if ((code & FN ) && !(s->modifiers & 8))
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QUEUE_KEY(0x38 | (keycode & 0x80));
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if ((code & FN ) && (s->modifiers & 1))
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QUEUE_KEY(0x2a | (~keycode & 0x80));
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if ((code & FN ) && (s->modifiers & 2))
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QUEUE_KEY(0x36 | (~keycode & 0x80));
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#else
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if (keycode & 0x80) { |
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if ((s->imodifiers & 1 ) && !(s->modifiers & 1)) |
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QUEUE_KEY(0x2a | 0x80); |
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if ((s->imodifiers & 4 ) && !(s->modifiers & 4)) |
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QUEUE_KEY(0x1d | 0x80); |
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if ((s->imodifiers & 8 ) && !(s->modifiers & 8)) |
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QUEUE_KEY(0x38 | 0x80); |
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if ((s->imodifiers & 0x10) && (s->modifiers & 1)) |
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QUEUE_KEY(0x2a);
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if ((s->imodifiers & 0x20) && (s->modifiers & 2)) |
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QUEUE_KEY(0x36);
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s->imodifiers = 0;
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} else {
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if ((code & SHIFT) && !((s->modifiers | s->imodifiers) & 1)) { |
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QUEUE_KEY(0x2a);
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s->imodifiers |= 1;
|
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} |
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if ((code & CTRL ) && !((s->modifiers | s->imodifiers) & 4)) { |
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QUEUE_KEY(0x1d);
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s->imodifiers |= 4;
|
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} |
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if ((code & FN ) && !((s->modifiers | s->imodifiers) & 8)) { |
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QUEUE_KEY(0x38);
|
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s->imodifiers |= 8;
|
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} |
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if ((code & FN ) && (s->modifiers & 1) && |
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!(s->imodifiers & 0x10)) {
|
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QUEUE_KEY(0x2a | 0x80); |
374 |
s->imodifiers |= 0x10;
|
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} |
376 |
if ((code & FN ) && (s->modifiers & 2) && |
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!(s->imodifiers & 0x20)) {
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QUEUE_KEY(0x36 | 0x80); |
379 |
s->imodifiers |= 0x20;
|
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} |
381 |
} |
382 |
#endif
|
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} |
384 |
|
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QUEUE_KEY((code & 0x7f) | (keycode & 0x80)); |
386 |
} |
387 |
|
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static void spitz_keyboard_tick(void *opaque) |
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{ |
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SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
391 |
|
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if (s->fifolen) {
|
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spitz_keyboard_keydown(s, s->fifo[s->fifopos ++]); |
394 |
s->fifolen --; |
395 |
if (s->fifopos >= 16) |
396 |
s->fifopos = 0;
|
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} |
398 |
|
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qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock) + |
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get_ticks_per_sec() / 32);
|
401 |
} |
402 |
|
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static void spitz_keyboard_pre_map(SpitzKeyboardState *s) |
404 |
{ |
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int i;
|
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for (i = 0; i < 0x100; i ++) |
407 |
s->pre_map[i] = i; |
408 |
s->pre_map[0x02 | SHIFT ] = 0x02 | SHIFT; /* exclam */ |
409 |
s->pre_map[0x28 | SHIFT ] = 0x03 | SHIFT; /* quotedbl */ |
410 |
s->pre_map[0x04 | SHIFT ] = 0x04 | SHIFT; /* numbersign */ |
411 |
s->pre_map[0x05 | SHIFT ] = 0x05 | SHIFT; /* dollar */ |
412 |
s->pre_map[0x06 | SHIFT ] = 0x06 | SHIFT; /* percent */ |
413 |
s->pre_map[0x08 | SHIFT ] = 0x07 | SHIFT; /* ampersand */ |
414 |
s->pre_map[0x28 ] = 0x08 | SHIFT; /* apostrophe */ |
415 |
s->pre_map[0x0a | SHIFT ] = 0x09 | SHIFT; /* parenleft */ |
416 |
s->pre_map[0x0b | SHIFT ] = 0x0a | SHIFT; /* parenright */ |
417 |
s->pre_map[0x29 | SHIFT ] = 0x0b | SHIFT; /* asciitilde */ |
418 |
s->pre_map[0x03 | SHIFT ] = 0x0c | SHIFT; /* at */ |
419 |
s->pre_map[0xd3 ] = 0x0e | FN; /* Delete */ |
420 |
s->pre_map[0x3a ] = 0x0f | FN; /* Caps_Lock */ |
421 |
s->pre_map[0x07 | SHIFT ] = 0x11 | FN; /* asciicircum */ |
422 |
s->pre_map[0x0d ] = 0x12 | FN; /* equal */ |
423 |
s->pre_map[0x0d | SHIFT ] = 0x13 | FN; /* plus */ |
424 |
s->pre_map[0x1a ] = 0x14 | FN; /* bracketleft */ |
425 |
s->pre_map[0x1b ] = 0x15 | FN; /* bracketright */ |
426 |
s->pre_map[0x1a | SHIFT ] = 0x16 | FN; /* braceleft */ |
427 |
s->pre_map[0x1b | SHIFT ] = 0x17 | FN; /* braceright */ |
428 |
s->pre_map[0x27 ] = 0x22 | FN; /* semicolon */ |
429 |
s->pre_map[0x27 | SHIFT ] = 0x23 | FN; /* colon */ |
430 |
s->pre_map[0x09 | SHIFT ] = 0x24 | FN; /* asterisk */ |
431 |
s->pre_map[0x2b ] = 0x25 | FN; /* backslash */ |
432 |
s->pre_map[0x2b | SHIFT ] = 0x26 | FN; /* bar */ |
433 |
s->pre_map[0x0c | SHIFT ] = 0x30 | FN; /* underscore */ |
434 |
s->pre_map[0x33 | SHIFT ] = 0x33 | FN; /* less */ |
435 |
s->pre_map[0x35 ] = 0x33 | SHIFT; /* slash */ |
436 |
s->pre_map[0x34 | SHIFT ] = 0x34 | FN; /* greater */ |
437 |
s->pre_map[0x35 | SHIFT ] = 0x34 | SHIFT; /* question */ |
438 |
s->pre_map[0x49 ] = 0x48 | FN; /* Page_Up */ |
439 |
s->pre_map[0x51 ] = 0x50 | FN; /* Page_Down */ |
440 |
|
441 |
s->modifiers = 0;
|
442 |
s->imodifiers = 0;
|
443 |
s->fifopos = 0;
|
444 |
s->fifolen = 0;
|
445 |
} |
446 |
|
447 |
#undef SHIFT
|
448 |
#undef CTRL
|
449 |
#undef FN
|
450 |
|
451 |
static int spitz_keyboard_post_load(void *opaque, int version_id) |
452 |
{ |
453 |
SpitzKeyboardState *s = (SpitzKeyboardState *) opaque; |
454 |
|
455 |
/* Release all pressed keys */
|
456 |
memset(s->keyrow, 0, sizeof(s->keyrow)); |
457 |
spitz_keyboard_sense_update(s); |
458 |
s->modifiers = 0;
|
459 |
s->imodifiers = 0;
|
460 |
s->fifopos = 0;
|
461 |
s->fifolen = 0;
|
462 |
|
463 |
return 0; |
464 |
} |
465 |
|
466 |
static void spitz_keyboard_register(PXA2xxState *cpu) |
467 |
{ |
468 |
int i;
|
469 |
DeviceState *dev; |
470 |
SpitzKeyboardState *s; |
471 |
|
472 |
dev = sysbus_create_simple("spitz-keyboard", -1, NULL); |
473 |
s = FROM_SYSBUS(SpitzKeyboardState, sysbus_from_qdev(dev)); |
474 |
|
475 |
for (i = 0; i < SPITZ_KEY_SENSE_NUM; i ++) |
476 |
qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(cpu->gpio, spitz_gpio_key_sense[i])); |
477 |
|
478 |
for (i = 0; i < 5; i ++) |
479 |
s->gpiomap[i] = qdev_get_gpio_in(cpu->gpio, spitz_gpiomap[i]); |
480 |
|
481 |
if (!graphic_rotate)
|
482 |
s->gpiomap[4] = qemu_irq_invert(s->gpiomap[4]); |
483 |
|
484 |
for (i = 0; i < 5; i++) |
485 |
qemu_set_irq(s->gpiomap[i], 0);
|
486 |
|
487 |
for (i = 0; i < SPITZ_KEY_STROBE_NUM; i ++) |
488 |
qdev_connect_gpio_out(cpu->gpio, spitz_gpio_key_strobe[i], |
489 |
qdev_get_gpio_in(dev, i)); |
490 |
|
491 |
qemu_mod_timer(s->kbdtimer, qemu_get_clock_ns(vm_clock)); |
492 |
|
493 |
qemu_add_kbd_event_handler(spitz_keyboard_handler, s); |
494 |
} |
495 |
|
496 |
static int spitz_keyboard_init(SysBusDevice *dev) |
497 |
{ |
498 |
SpitzKeyboardState *s; |
499 |
int i, j;
|
500 |
|
501 |
s = FROM_SYSBUS(SpitzKeyboardState, dev); |
502 |
|
503 |
for (i = 0; i < 0x80; i ++) |
504 |
s->keymap[i] = -1;
|
505 |
for (i = 0; i < SPITZ_KEY_SENSE_NUM + 1; i ++) |
506 |
for (j = 0; j < SPITZ_KEY_STROBE_NUM; j ++) |
507 |
if (spitz_keymap[i][j] != -1) |
508 |
s->keymap[spitz_keymap[i][j]] = (i << 4) | j;
|
509 |
|
510 |
spitz_keyboard_pre_map(s); |
511 |
|
512 |
s->kbdtimer = qemu_new_timer_ns(vm_clock, spitz_keyboard_tick, s); |
513 |
qdev_init_gpio_in(&dev->qdev, spitz_keyboard_strobe, SPITZ_KEY_STROBE_NUM); |
514 |
qdev_init_gpio_out(&dev->qdev, s->sense, SPITZ_KEY_SENSE_NUM); |
515 |
|
516 |
return 0; |
517 |
} |
518 |
|
519 |
/* LCD backlight controller */
|
520 |
|
521 |
#define LCDTG_RESCTL 0x00 |
522 |
#define LCDTG_PHACTRL 0x01 |
523 |
#define LCDTG_DUTYCTRL 0x02 |
524 |
#define LCDTG_POWERREG0 0x03 |
525 |
#define LCDTG_POWERREG1 0x04 |
526 |
#define LCDTG_GPOR3 0x05 |
527 |
#define LCDTG_PICTRL 0x06 |
528 |
#define LCDTG_POLCTRL 0x07 |
529 |
|
530 |
typedef struct { |
531 |
SSISlave ssidev; |
532 |
uint32_t bl_intensity; |
533 |
uint32_t bl_power; |
534 |
} SpitzLCDTG; |
535 |
|
536 |
static void spitz_bl_update(SpitzLCDTG *s) |
537 |
{ |
538 |
if (s->bl_power && s->bl_intensity)
|
539 |
zaurus_printf("LCD Backlight now at %i/63\n", s->bl_intensity);
|
540 |
else
|
541 |
zaurus_printf("LCD Backlight now off\n");
|
542 |
} |
543 |
|
544 |
/* FIXME: Implement GPIO properly and remove this hack. */
|
545 |
static SpitzLCDTG *spitz_lcdtg;
|
546 |
|
547 |
static inline void spitz_bl_bit5(void *opaque, int line, int level) |
548 |
{ |
549 |
SpitzLCDTG *s = spitz_lcdtg; |
550 |
int prev = s->bl_intensity;
|
551 |
|
552 |
if (level)
|
553 |
s->bl_intensity &= ~0x20;
|
554 |
else
|
555 |
s->bl_intensity |= 0x20;
|
556 |
|
557 |
if (s->bl_power && prev != s->bl_intensity)
|
558 |
spitz_bl_update(s); |
559 |
} |
560 |
|
561 |
static inline void spitz_bl_power(void *opaque, int line, int level) |
562 |
{ |
563 |
SpitzLCDTG *s = spitz_lcdtg; |
564 |
s->bl_power = !!level; |
565 |
spitz_bl_update(s); |
566 |
} |
567 |
|
568 |
static uint32_t spitz_lcdtg_transfer(SSISlave *dev, uint32_t value)
|
569 |
{ |
570 |
SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
571 |
int addr;
|
572 |
addr = value >> 5;
|
573 |
value &= 0x1f;
|
574 |
|
575 |
switch (addr) {
|
576 |
case LCDTG_RESCTL:
|
577 |
if (value)
|
578 |
zaurus_printf("LCD in QVGA mode\n");
|
579 |
else
|
580 |
zaurus_printf("LCD in VGA mode\n");
|
581 |
break;
|
582 |
|
583 |
case LCDTG_DUTYCTRL:
|
584 |
s->bl_intensity &= ~0x1f;
|
585 |
s->bl_intensity |= value; |
586 |
if (s->bl_power)
|
587 |
spitz_bl_update(s); |
588 |
break;
|
589 |
|
590 |
case LCDTG_POWERREG0:
|
591 |
/* Set common voltage to M62332FP */
|
592 |
break;
|
593 |
} |
594 |
return 0; |
595 |
} |
596 |
|
597 |
static int spitz_lcdtg_init(SSISlave *dev) |
598 |
{ |
599 |
SpitzLCDTG *s = FROM_SSI_SLAVE(SpitzLCDTG, dev); |
600 |
|
601 |
spitz_lcdtg = s; |
602 |
s->bl_power = 0;
|
603 |
s->bl_intensity = 0x20;
|
604 |
|
605 |
return 0; |
606 |
} |
607 |
|
608 |
/* SSP devices */
|
609 |
|
610 |
#define CORGI_SSP_PORT 2 |
611 |
|
612 |
#define SPITZ_GPIO_LCDCON_CS 53 |
613 |
#define SPITZ_GPIO_ADS7846_CS 14 |
614 |
#define SPITZ_GPIO_MAX1111_CS 20 |
615 |
#define SPITZ_GPIO_TP_INT 11 |
616 |
|
617 |
static DeviceState *max1111;
|
618 |
|
619 |
/* "Demux" the signal based on current chipselect */
|
620 |
typedef struct { |
621 |
SSISlave ssidev; |
622 |
SSIBus *bus[3];
|
623 |
uint32_t enable[3];
|
624 |
} CorgiSSPState; |
625 |
|
626 |
static uint32_t corgi_ssp_transfer(SSISlave *dev, uint32_t value)
|
627 |
{ |
628 |
CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
629 |
int i;
|
630 |
|
631 |
for (i = 0; i < 3; i++) { |
632 |
if (s->enable[i]) {
|
633 |
return ssi_transfer(s->bus[i], value);
|
634 |
} |
635 |
} |
636 |
return 0; |
637 |
} |
638 |
|
639 |
static void corgi_ssp_gpio_cs(void *opaque, int line, int level) |
640 |
{ |
641 |
CorgiSSPState *s = (CorgiSSPState *)opaque; |
642 |
assert(line >= 0 && line < 3); |
643 |
s->enable[line] = !level; |
644 |
} |
645 |
|
646 |
#define MAX1111_BATT_VOLT 1 |
647 |
#define MAX1111_BATT_TEMP 2 |
648 |
#define MAX1111_ACIN_VOLT 3 |
649 |
|
650 |
#define SPITZ_BATTERY_TEMP 0xe0 /* About 2.9V */ |
651 |
#define SPITZ_BATTERY_VOLT 0xd0 /* About 4.0V */ |
652 |
#define SPITZ_CHARGEON_ACIN 0x80 /* About 5.0V */ |
653 |
|
654 |
static void spitz_adc_temp_on(void *opaque, int line, int level) |
655 |
{ |
656 |
if (!max1111)
|
657 |
return;
|
658 |
|
659 |
if (level)
|
660 |
max111x_set_input(max1111, MAX1111_BATT_TEMP, SPITZ_BATTERY_TEMP); |
661 |
else
|
662 |
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
663 |
} |
664 |
|
665 |
static int corgi_ssp_init(SSISlave *dev) |
666 |
{ |
667 |
CorgiSSPState *s = FROM_SSI_SLAVE(CorgiSSPState, dev); |
668 |
|
669 |
qdev_init_gpio_in(&dev->qdev, corgi_ssp_gpio_cs, 3);
|
670 |
s->bus[0] = ssi_create_bus(&dev->qdev, "ssi0"); |
671 |
s->bus[1] = ssi_create_bus(&dev->qdev, "ssi1"); |
672 |
s->bus[2] = ssi_create_bus(&dev->qdev, "ssi2"); |
673 |
|
674 |
return 0; |
675 |
} |
676 |
|
677 |
static void spitz_ssp_attach(PXA2xxState *cpu) |
678 |
{ |
679 |
DeviceState *mux; |
680 |
DeviceState *dev; |
681 |
void *bus;
|
682 |
|
683 |
mux = ssi_create_slave(cpu->ssp[CORGI_SSP_PORT - 1], "corgi-ssp"); |
684 |
|
685 |
bus = qdev_get_child_bus(mux, "ssi0");
|
686 |
ssi_create_slave(bus, "spitz-lcdtg");
|
687 |
|
688 |
bus = qdev_get_child_bus(mux, "ssi1");
|
689 |
dev = ssi_create_slave(bus, "ads7846");
|
690 |
qdev_connect_gpio_out(dev, 0,
|
691 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_TP_INT)); |
692 |
|
693 |
bus = qdev_get_child_bus(mux, "ssi2");
|
694 |
max1111 = ssi_create_slave(bus, "max1111");
|
695 |
max111x_set_input(max1111, MAX1111_BATT_VOLT, SPITZ_BATTERY_VOLT); |
696 |
max111x_set_input(max1111, MAX1111_BATT_TEMP, 0);
|
697 |
max111x_set_input(max1111, MAX1111_ACIN_VOLT, SPITZ_CHARGEON_ACIN); |
698 |
|
699 |
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_LCDCON_CS, |
700 |
qdev_get_gpio_in(mux, 0));
|
701 |
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ADS7846_CS, |
702 |
qdev_get_gpio_in(mux, 1));
|
703 |
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_MAX1111_CS, |
704 |
qdev_get_gpio_in(mux, 2));
|
705 |
} |
706 |
|
707 |
/* CF Microdrive */
|
708 |
|
709 |
static void spitz_microdrive_attach(PXA2xxState *cpu, int slot) |
710 |
{ |
711 |
PCMCIACardState *md; |
712 |
DriveInfo *dinfo; |
713 |
|
714 |
dinfo = drive_get(IF_IDE, 0, 0); |
715 |
if (!dinfo || dinfo->media_cd)
|
716 |
return;
|
717 |
md = dscm1xxxx_init(dinfo); |
718 |
pxa2xx_pcmcia_attach(cpu->pcmcia[slot], md); |
719 |
} |
720 |
|
721 |
/* Wm8750 and Max7310 on I2C */
|
722 |
|
723 |
#define AKITA_MAX_ADDR 0x18 |
724 |
#define SPITZ_WM_ADDRL 0x1b |
725 |
#define SPITZ_WM_ADDRH 0x1a |
726 |
|
727 |
#define SPITZ_GPIO_WM 5 |
728 |
|
729 |
static void spitz_wm8750_addr(void *opaque, int line, int level) |
730 |
{ |
731 |
i2c_slave *wm = (i2c_slave *) opaque; |
732 |
if (level)
|
733 |
i2c_set_slave_address(wm, SPITZ_WM_ADDRH); |
734 |
else
|
735 |
i2c_set_slave_address(wm, SPITZ_WM_ADDRL); |
736 |
} |
737 |
|
738 |
static void spitz_i2c_setup(PXA2xxState *cpu) |
739 |
{ |
740 |
/* Attach the CPU on one end of our I2C bus. */
|
741 |
i2c_bus *bus = pxa2xx_i2c_bus(cpu->i2c[0]);
|
742 |
|
743 |
DeviceState *wm; |
744 |
|
745 |
/* Attach a WM8750 to the bus */
|
746 |
wm = i2c_create_slave(bus, "wm8750", 0); |
747 |
|
748 |
spitz_wm8750_addr(wm, 0, 0); |
749 |
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_WM, |
750 |
qemu_allocate_irqs(spitz_wm8750_addr, wm, 1)[0]); |
751 |
/* .. and to the sound interface. */
|
752 |
cpu->i2s->opaque = wm; |
753 |
cpu->i2s->codec_out = wm8750_dac_dat; |
754 |
cpu->i2s->codec_in = wm8750_adc_dat; |
755 |
wm8750_data_req_set(wm, cpu->i2s->data_req, cpu->i2s); |
756 |
} |
757 |
|
758 |
static void spitz_akita_i2c_setup(PXA2xxState *cpu) |
759 |
{ |
760 |
/* Attach a Max7310 to Akita I2C bus. */
|
761 |
i2c_create_slave(pxa2xx_i2c_bus(cpu->i2c[0]), "max7310", |
762 |
AKITA_MAX_ADDR); |
763 |
} |
764 |
|
765 |
/* Other peripherals */
|
766 |
|
767 |
static void spitz_out_switch(void *opaque, int line, int level) |
768 |
{ |
769 |
switch (line) {
|
770 |
case 0: |
771 |
zaurus_printf("Charging %s.\n", level ? "off" : "on"); |
772 |
break;
|
773 |
case 1: |
774 |
zaurus_printf("Discharging %s.\n", level ? "on" : "off"); |
775 |
break;
|
776 |
case 2: |
777 |
zaurus_printf("Green LED %s.\n", level ? "on" : "off"); |
778 |
break;
|
779 |
case 3: |
780 |
zaurus_printf("Orange LED %s.\n", level ? "on" : "off"); |
781 |
break;
|
782 |
case 4: |
783 |
spitz_bl_bit5(opaque, line, level); |
784 |
break;
|
785 |
case 5: |
786 |
spitz_bl_power(opaque, line, level); |
787 |
break;
|
788 |
case 6: |
789 |
spitz_adc_temp_on(opaque, line, level); |
790 |
break;
|
791 |
} |
792 |
} |
793 |
|
794 |
#define SPITZ_SCP_LED_GREEN 1 |
795 |
#define SPITZ_SCP_JK_B 2 |
796 |
#define SPITZ_SCP_CHRG_ON 3 |
797 |
#define SPITZ_SCP_MUTE_L 4 |
798 |
#define SPITZ_SCP_MUTE_R 5 |
799 |
#define SPITZ_SCP_CF_POWER 6 |
800 |
#define SPITZ_SCP_LED_ORANGE 7 |
801 |
#define SPITZ_SCP_JK_A 8 |
802 |
#define SPITZ_SCP_ADC_TEMP_ON 9 |
803 |
#define SPITZ_SCP2_IR_ON 1 |
804 |
#define SPITZ_SCP2_AKIN_PULLUP 2 |
805 |
#define SPITZ_SCP2_BACKLIGHT_CONT 7 |
806 |
#define SPITZ_SCP2_BACKLIGHT_ON 8 |
807 |
#define SPITZ_SCP2_MIC_BIAS 9 |
808 |
|
809 |
static void spitz_scoop_gpio_setup(PXA2xxState *cpu, |
810 |
DeviceState *scp0, DeviceState *scp1) |
811 |
{ |
812 |
qemu_irq *outsignals = qemu_allocate_irqs(spitz_out_switch, cpu, 8);
|
813 |
|
814 |
qdev_connect_gpio_out(scp0, SPITZ_SCP_CHRG_ON, outsignals[0]);
|
815 |
qdev_connect_gpio_out(scp0, SPITZ_SCP_JK_B, outsignals[1]);
|
816 |
qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_GREEN, outsignals[2]);
|
817 |
qdev_connect_gpio_out(scp0, SPITZ_SCP_LED_ORANGE, outsignals[3]);
|
818 |
|
819 |
if (scp1) {
|
820 |
qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_CONT, outsignals[4]);
|
821 |
qdev_connect_gpio_out(scp1, SPITZ_SCP2_BACKLIGHT_ON, outsignals[5]);
|
822 |
} |
823 |
|
824 |
qdev_connect_gpio_out(scp0, SPITZ_SCP_ADC_TEMP_ON, outsignals[6]);
|
825 |
} |
826 |
|
827 |
#define SPITZ_GPIO_HSYNC 22 |
828 |
#define SPITZ_GPIO_SD_DETECT 9 |
829 |
#define SPITZ_GPIO_SD_WP 81 |
830 |
#define SPITZ_GPIO_ON_RESET 89 |
831 |
#define SPITZ_GPIO_BAT_COVER 90 |
832 |
#define SPITZ_GPIO_CF1_IRQ 105 |
833 |
#define SPITZ_GPIO_CF1_CD 94 |
834 |
#define SPITZ_GPIO_CF2_IRQ 106 |
835 |
#define SPITZ_GPIO_CF2_CD 93 |
836 |
|
837 |
static int spitz_hsync; |
838 |
|
839 |
static void spitz_lcd_hsync_handler(void *opaque, int line, int level) |
840 |
{ |
841 |
PXA2xxState *cpu = (PXA2xxState *) opaque; |
842 |
qemu_set_irq(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_HSYNC), spitz_hsync); |
843 |
spitz_hsync ^= 1;
|
844 |
} |
845 |
|
846 |
static void spitz_gpio_setup(PXA2xxState *cpu, int slots) |
847 |
{ |
848 |
qemu_irq lcd_hsync; |
849 |
/*
|
850 |
* Bad hack: We toggle the LCD hsync GPIO on every GPIO status
|
851 |
* read to satisfy broken guests that poll-wait for hsync.
|
852 |
* Simulating a real hsync event would be less practical and
|
853 |
* wouldn't guarantee that a guest ever exits the loop.
|
854 |
*/
|
855 |
spitz_hsync = 0;
|
856 |
lcd_hsync = qemu_allocate_irqs(spitz_lcd_hsync_handler, cpu, 1)[0]; |
857 |
pxa2xx_gpio_read_notifier(cpu->gpio, lcd_hsync); |
858 |
pxa2xx_lcd_vsync_notifier(cpu->lcd, lcd_hsync); |
859 |
|
860 |
/* MMC/SD host */
|
861 |
pxa2xx_mmci_handlers(cpu->mmc, |
862 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_WP), |
863 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_SD_DETECT)); |
864 |
|
865 |
/* Battery lock always closed */
|
866 |
qemu_irq_raise(qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_BAT_COVER)); |
867 |
|
868 |
/* Handle reset */
|
869 |
qdev_connect_gpio_out(cpu->gpio, SPITZ_GPIO_ON_RESET, cpu->reset); |
870 |
|
871 |
/* PCMCIA signals: card's IRQ and Card-Detect */
|
872 |
if (slots >= 1) |
873 |
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[0],
|
874 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_IRQ), |
875 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF1_CD)); |
876 |
if (slots >= 2) |
877 |
pxa2xx_pcmcia_set_irq_cb(cpu->pcmcia[1],
|
878 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_IRQ), |
879 |
qdev_get_gpio_in(cpu->gpio, SPITZ_GPIO_CF2_CD)); |
880 |
} |
881 |
|
882 |
/* Board init. */
|
883 |
enum spitz_model_e { spitz, akita, borzoi, terrier };
|
884 |
|
885 |
#define SPITZ_RAM 0x04000000 |
886 |
#define SPITZ_ROM 0x00800000 |
887 |
|
888 |
static struct arm_boot_info spitz_binfo = { |
889 |
.loader_start = PXA2XX_SDRAM_BASE, |
890 |
.ram_size = 0x04000000,
|
891 |
}; |
892 |
|
893 |
static void spitz_common_init(ram_addr_t ram_size, |
894 |
const char *kernel_filename, |
895 |
const char *kernel_cmdline, const char *initrd_filename, |
896 |
const char *cpu_model, enum spitz_model_e model, int arm_id) |
897 |
{ |
898 |
PXA2xxState *cpu; |
899 |
DeviceState *scp0, *scp1 = NULL;
|
900 |
MemoryRegion *address_space_mem = get_system_memory(); |
901 |
|
902 |
if (!cpu_model)
|
903 |
cpu_model = (model == terrier) ? "pxa270-c5" : "pxa270-c0"; |
904 |
|
905 |
/* Setup CPU & memory */
|
906 |
cpu = pxa270_init(address_space_mem, spitz_binfo.ram_size, cpu_model); |
907 |
|
908 |
sl_flash_register(cpu, (model == spitz) ? FLASH_128M : FLASH_1024M); |
909 |
|
910 |
cpu_register_physical_memory(0, SPITZ_ROM,
|
911 |
qemu_ram_alloc(NULL, "spitz.rom", SPITZ_ROM) | IO_MEM_ROM); |
912 |
|
913 |
/* Setup peripherals */
|
914 |
spitz_keyboard_register(cpu); |
915 |
|
916 |
spitz_ssp_attach(cpu); |
917 |
|
918 |
scp0 = sysbus_create_simple("scoop", 0x10800000, NULL); |
919 |
if (model != akita) {
|
920 |
scp1 = sysbus_create_simple("scoop", 0x08800040, NULL); |
921 |
} |
922 |
|
923 |
spitz_scoop_gpio_setup(cpu, scp0, scp1); |
924 |
|
925 |
spitz_gpio_setup(cpu, (model == akita) ? 1 : 2); |
926 |
|
927 |
spitz_i2c_setup(cpu); |
928 |
|
929 |
if (model == akita)
|
930 |
spitz_akita_i2c_setup(cpu); |
931 |
|
932 |
if (model == terrier)
|
933 |
/* A 6.0 GB microdrive is permanently sitting in CF slot 1. */
|
934 |
spitz_microdrive_attach(cpu, 1);
|
935 |
else if (model != akita) |
936 |
/* A 4.0 GB microdrive is permanently sitting in CF slot 0. */
|
937 |
spitz_microdrive_attach(cpu, 0);
|
938 |
|
939 |
spitz_binfo.kernel_filename = kernel_filename; |
940 |
spitz_binfo.kernel_cmdline = kernel_cmdline; |
941 |
spitz_binfo.initrd_filename = initrd_filename; |
942 |
spitz_binfo.board_id = arm_id; |
943 |
arm_load_kernel(cpu->env, &spitz_binfo); |
944 |
sl_bootparam_write(SL_PXA_PARAM_BASE); |
945 |
} |
946 |
|
947 |
static void spitz_init(ram_addr_t ram_size, |
948 |
const char *boot_device, |
949 |
const char *kernel_filename, const char *kernel_cmdline, |
950 |
const char *initrd_filename, const char *cpu_model) |
951 |
{ |
952 |
spitz_common_init(ram_size, kernel_filename, |
953 |
kernel_cmdline, initrd_filename, cpu_model, spitz, 0x2c9);
|
954 |
} |
955 |
|
956 |
static void borzoi_init(ram_addr_t ram_size, |
957 |
const char *boot_device, |
958 |
const char *kernel_filename, const char *kernel_cmdline, |
959 |
const char *initrd_filename, const char *cpu_model) |
960 |
{ |
961 |
spitz_common_init(ram_size, kernel_filename, |
962 |
kernel_cmdline, initrd_filename, cpu_model, borzoi, 0x33f);
|
963 |
} |
964 |
|
965 |
static void akita_init(ram_addr_t ram_size, |
966 |
const char *boot_device, |
967 |
const char *kernel_filename, const char *kernel_cmdline, |
968 |
const char *initrd_filename, const char *cpu_model) |
969 |
{ |
970 |
spitz_common_init(ram_size, kernel_filename, |
971 |
kernel_cmdline, initrd_filename, cpu_model, akita, 0x2e8);
|
972 |
} |
973 |
|
974 |
static void terrier_init(ram_addr_t ram_size, |
975 |
const char *boot_device, |
976 |
const char *kernel_filename, const char *kernel_cmdline, |
977 |
const char *initrd_filename, const char *cpu_model) |
978 |
{ |
979 |
spitz_common_init(ram_size, kernel_filename, |
980 |
kernel_cmdline, initrd_filename, cpu_model, terrier, 0x33f);
|
981 |
} |
982 |
|
983 |
static QEMUMachine akitapda_machine = {
|
984 |
.name = "akita",
|
985 |
.desc = "Akita PDA (PXA270)",
|
986 |
.init = akita_init, |
987 |
}; |
988 |
|
989 |
static QEMUMachine spitzpda_machine = {
|
990 |
.name = "spitz",
|
991 |
.desc = "Spitz PDA (PXA270)",
|
992 |
.init = spitz_init, |
993 |
}; |
994 |
|
995 |
static QEMUMachine borzoipda_machine = {
|
996 |
.name = "borzoi",
|
997 |
.desc = "Borzoi PDA (PXA270)",
|
998 |
.init = borzoi_init, |
999 |
}; |
1000 |
|
1001 |
static QEMUMachine terrierpda_machine = {
|
1002 |
.name = "terrier",
|
1003 |
.desc = "Terrier PDA (PXA270)",
|
1004 |
.init = terrier_init, |
1005 |
}; |
1006 |
|
1007 |
static void spitz_machine_init(void) |
1008 |
{ |
1009 |
qemu_register_machine(&akitapda_machine); |
1010 |
qemu_register_machine(&spitzpda_machine); |
1011 |
qemu_register_machine(&borzoipda_machine); |
1012 |
qemu_register_machine(&terrierpda_machine); |
1013 |
} |
1014 |
|
1015 |
machine_init(spitz_machine_init); |
1016 |
|
1017 |
static bool is_version_0(void *opaque, int version_id) |
1018 |
{ |
1019 |
return version_id == 0; |
1020 |
} |
1021 |
|
1022 |
static VMStateDescription vmstate_sl_nand_info = {
|
1023 |
.name = "sl-nand",
|
1024 |
.version_id = 0,
|
1025 |
.minimum_version_id = 0,
|
1026 |
.minimum_version_id_old = 0,
|
1027 |
.fields = (VMStateField []) { |
1028 |
VMSTATE_UINT8(ctl, SLNANDState), |
1029 |
VMSTATE_STRUCT(ecc, SLNANDState, 0, vmstate_ecc_state, ECCState),
|
1030 |
VMSTATE_END_OF_LIST(), |
1031 |
}, |
1032 |
}; |
1033 |
|
1034 |
static SysBusDeviceInfo sl_nand_info = {
|
1035 |
.init = sl_nand_init, |
1036 |
.qdev.name = "sl-nand",
|
1037 |
.qdev.size = sizeof(SLNANDState),
|
1038 |
.qdev.vmsd = &vmstate_sl_nand_info, |
1039 |
.qdev.props = (Property []) { |
1040 |
DEFINE_PROP_UINT8("manf_id", SLNANDState, manf_id, NAND_MFR_SAMSUNG),
|
1041 |
DEFINE_PROP_UINT8("chip_id", SLNANDState, chip_id, 0xf1), |
1042 |
DEFINE_PROP_END_OF_LIST(), |
1043 |
}, |
1044 |
}; |
1045 |
|
1046 |
static VMStateDescription vmstate_spitz_kbd = {
|
1047 |
.name = "spitz-keyboard",
|
1048 |
.version_id = 1,
|
1049 |
.minimum_version_id = 0,
|
1050 |
.minimum_version_id_old = 0,
|
1051 |
.post_load = spitz_keyboard_post_load, |
1052 |
.fields = (VMStateField []) { |
1053 |
VMSTATE_UINT16(sense_state, SpitzKeyboardState), |
1054 |
VMSTATE_UINT16(strobe_state, SpitzKeyboardState), |
1055 |
VMSTATE_UNUSED_TEST(is_version_0, 5),
|
1056 |
VMSTATE_END_OF_LIST(), |
1057 |
}, |
1058 |
}; |
1059 |
|
1060 |
static SysBusDeviceInfo spitz_keyboard_info = {
|
1061 |
.init = spitz_keyboard_init, |
1062 |
.qdev.name = "spitz-keyboard",
|
1063 |
.qdev.size = sizeof(SpitzKeyboardState),
|
1064 |
.qdev.vmsd = &vmstate_spitz_kbd, |
1065 |
.qdev.props = (Property []) { |
1066 |
DEFINE_PROP_END_OF_LIST(), |
1067 |
}, |
1068 |
}; |
1069 |
|
1070 |
static const VMStateDescription vmstate_corgi_ssp_regs = { |
1071 |
.name = "corgi-ssp",
|
1072 |
.version_id = 1,
|
1073 |
.minimum_version_id = 1,
|
1074 |
.minimum_version_id_old = 1,
|
1075 |
.fields = (VMStateField []) { |
1076 |
VMSTATE_UINT32_ARRAY(enable, CorgiSSPState, 3),
|
1077 |
VMSTATE_END_OF_LIST(), |
1078 |
} |
1079 |
}; |
1080 |
|
1081 |
static SSISlaveInfo corgi_ssp_info = {
|
1082 |
.qdev.name = "corgi-ssp",
|
1083 |
.qdev.size = sizeof(CorgiSSPState),
|
1084 |
.qdev.vmsd = &vmstate_corgi_ssp_regs, |
1085 |
.init = corgi_ssp_init, |
1086 |
.transfer = corgi_ssp_transfer |
1087 |
}; |
1088 |
|
1089 |
static const VMStateDescription vmstate_spitz_lcdtg_regs = { |
1090 |
.name = "spitz-lcdtg",
|
1091 |
.version_id = 1,
|
1092 |
.minimum_version_id = 1,
|
1093 |
.minimum_version_id_old = 1,
|
1094 |
.fields = (VMStateField []) { |
1095 |
VMSTATE_UINT32(bl_intensity, SpitzLCDTG), |
1096 |
VMSTATE_UINT32(bl_power, SpitzLCDTG), |
1097 |
VMSTATE_END_OF_LIST(), |
1098 |
} |
1099 |
}; |
1100 |
|
1101 |
static SSISlaveInfo spitz_lcdtg_info = {
|
1102 |
.qdev.name = "spitz-lcdtg",
|
1103 |
.qdev.size = sizeof(SpitzLCDTG),
|
1104 |
.qdev.vmsd = &vmstate_spitz_lcdtg_regs, |
1105 |
.init = spitz_lcdtg_init, |
1106 |
.transfer = spitz_lcdtg_transfer |
1107 |
}; |
1108 |
|
1109 |
static void spitz_register_devices(void) |
1110 |
{ |
1111 |
ssi_register_slave(&corgi_ssp_info); |
1112 |
ssi_register_slave(&spitz_lcdtg_info); |
1113 |
sysbus_register_withprop(&spitz_keyboard_info); |
1114 |
sysbus_register_withprop(&sl_nand_info); |
1115 |
} |
1116 |
|
1117 |
device_init(spitz_register_devices) |