Revision a7086888
b/hw/integratorcp.c | ||
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16 | 16 |
#include "net.h" |
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|
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typedef struct { |
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SysBusDevice busdev; |
|
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uint32_t flash_offset; |
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uint32_t cm_osc; |
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uint32_t cm_ctrl; |
... | ... | |
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integratorcm_write |
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}; |
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|
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static void integratorcm_init(int memsz)
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static void integratorcm_init(SysBusDevice *dev)
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|
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{ |
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int iomemtype; |
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integratorcm_state *s; |
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integratorcm_state *s = FROM_SYSBUS(integratorcm_state, dev); |
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int memsz; |
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s = (integratorcm_state *)qemu_mallocz(sizeof(integratorcm_state));
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memsz = qdev_get_prop_int(&dev->qdev, "memsz", 0);
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|
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s->cm_osc = 0x01000048; |
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/* ??? What should the high bits of this value be? */ |
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s->cm_auxosc = 0x0007feff; |
... | ... | |
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|
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iomemtype = cpu_register_io_memory(0, integratorcm_readfn, |
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integratorcm_writefn, s); |
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cpu_register_physical_memory(0x10000000, 0x00800000, iomemtype);
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|
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sysbus_init_mmio(dev, 0x00800000, iomemtype);
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|
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integratorcm_do_remap(s, 1); |
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/* ??? Save/restore. */ |
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} |
... | ... | |
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|
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typedef struct icp_pic_state |
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{ |
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SysBusDevice busdev; |
|
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uint32_t level; |
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uint32_t irq_enabled; |
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uint32_t fiq_enabled; |
... | ... | |
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icp_pic_write |
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}; |
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|
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static qemu_irq *icp_pic_init(uint32_t base, |
|
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qemu_irq parent_irq, qemu_irq parent_fiq) |
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static void icp_pic_init(SysBusDevice *dev) |
|
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{ |
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icp_pic_state *s; |
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icp_pic_state *s = FROM_SYSBUS(icp_pic_state, dev);
|
|
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int iomemtype; |
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qemu_irq *qi; |
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s = (icp_pic_state *)qemu_mallocz(sizeof(icp_pic_state)); |
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qi = qemu_allocate_irqs(icp_pic_set_irq, s, 32); |
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s->parent_irq = parent_irq; |
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s->parent_fiq = parent_fiq; |
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qdev_init_irq_sink(&dev->qdev, icp_pic_set_irq, 32); |
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sysbus_init_irq(dev, &s->parent_irq); |
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sysbus_init_irq(dev, &s->parent_fiq); |
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iomemtype = cpu_register_io_memory(0, icp_pic_readfn, |
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icp_pic_writefn, s); |
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cpu_register_physical_memory(base, 0x00800000, iomemtype); |
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/* ??? Save/restore. */ |
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return qi; |
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sysbus_init_mmio(dev, 0x00800000, iomemtype); |
|
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} |
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|
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/* CP control registers. */ |
... | ... | |
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{ |
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CPUState *env; |
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ram_addr_t ram_offset; |
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qemu_irq *pic;
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|
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qemu_irq pic[32];
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qemu_irq *cpu_pic; |
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DeviceState *dev; |
|
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int i; |
|
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|
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if (!cpu_model) |
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cpu_model = "arm926"; |
... | ... | |
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/* And again at address 0x80000000 */ |
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cpu_register_physical_memory(0x80000000, ram_size, ram_offset | IO_MEM_RAM); |
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integratorcm_init(ram_size >> 20); |
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dev = qdev_create(NULL, "integrator_core"); |
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qdev_set_prop_int(dev, "memsz", ram_size >> 20); |
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qdev_init(dev); |
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sysbus_mmio_map((SysBusDevice *)dev, 0, 0x10000000); |
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|
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cpu_pic = arm_pic_init_cpu(env); |
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pic = icp_pic_init(0x14000000, cpu_pic[ARM_PIC_CPU_IRQ], |
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cpu_pic[ARM_PIC_CPU_FIQ]); |
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icp_pic_init(0xca000000, pic[26], NULL); |
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dev = sysbus_create_varargs("integrator_pic", 0x14000000, |
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cpu_pic[ARM_PIC_CPU_IRQ], |
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cpu_pic[ARM_PIC_CPU_FIQ], NULL); |
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for (i = 0; i < 32; i++) { |
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pic[i] = qdev_get_irq_sink(dev, i); |
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} |
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dev = sysbus_create_simple("integrator_pic", 0xca000000, pic[26]); |
|
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icp_pit_init(0x13000000, pic, 5); |
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sysbus_create_simple("pl031", 0x15000000, pic[8]); |
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sysbus_create_simple("pl011", 0x16000000, pic[1]); |
... | ... | |
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.desc = "ARM Integrator/CP (ARM926EJ-S)", |
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.init = integratorcp_init, |
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}; |
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|
|
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static void integratorcp_register_devices(void) |
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{ |
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sysbus_register_dev("integrator_pic", sizeof(icp_pic_state), icp_pic_init); |
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sysbus_register_dev("integrator_core", sizeof(integratorcm_state), |
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integratorcm_init); |
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} |
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|
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device_init(integratorcp_register_devices) |
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