Archipelago » qemu

/*

 * QEMU PC System Emulator

 * 

 * Copyright (c) 2003 Fabrice Bellard

 * 

 * Permission is hereby granted, free of charge, to any person obtaining a copy

 * of this software and associated documentation files (the "Software"), to deal

 * in the Software without restriction, including without limitation the rights

 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell

 * copies of the Software, and to permit persons to whom the Software is

 * furnished to do so, subject to the following conditions:

 *

 * The above copyright notice and this permission notice shall be included in

 * all copies or substantial portions of the Software.

 *

 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR

 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,

 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL

 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER

 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,

 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN

 * THE SOFTWARE.

 */

#include <stdlib.h>

#include <stdio.h>

#include <stdarg.h>

#include <string.h>

#include <ctype.h>

#include <getopt.h>

#include <inttypes.h>

#include <unistd.h>

#include <sys/mman.h>

#include <fcntl.h>

#include <signal.h>

#include <time.h>

#include <sys/time.h>

#include <malloc.h>

#include <termios.h>

#include <sys/poll.h>

#include <errno.h>

#include <sys/wait.h>

#include <sys/ioctl.h>

#include <sys/socket.h>

#include <linux/if.h>

#include <linux/if_tun.h>

#include "disas.h"

#include "thunk.h"

#include "vl.h"

#define DEFAULT_NETWORK_SCRIPT "/etc/qemu-ifup"

#define BIOS_FILENAME "bios.bin"

#define VGABIOS_FILENAME "vgabios.bin"

#define LINUX_BOOT_FILENAME "linux_boot.bin"

//#define DEBUG_UNUSED_IOPORT

//#define DEBUG_IRQ_LATENCY

/* output Bochs bios info messages */

//#define DEBUG_BIOS

//#define DEBUG_CMOS

/* debug PIC */

//#define DEBUG_PIC

/* debug NE2000 card */

//#define DEBUG_NE2000

/* debug PC keyboard */

//#define DEBUG_KBD

/* debug PC keyboard : only mouse */

//#define DEBUG_MOUSE

//#define DEBUG_SERIAL

#if !defined(CONFIG_SOFTMMU)

#define PHYS_RAM_MAX_SIZE (256 * 1024 * 1024)

#else

#define PHYS_RAM_MAX_SIZE (2047 * 1024 * 1024)

#endif

#if defined (TARGET_I386)

#define KERNEL_LOAD_ADDR   0x00100000

#elif defined (TARGET_PPC)

//#define USE_OPEN_FIRMWARE

#if !defined (USE_OPEN_FIRMWARE)

#define KERNEL_LOAD_ADDR    0x01000000

#define KERNEL_STACK_ADDR   0x01200000

#else

#define KERNEL_LOAD_ADDR    0x00000000

#define KERNEL_STACK_ADDR   0x00400000

#endif

#endif

#define INITRD_LOAD_ADDR     0x00400000

#define KERNEL_PARAMS_ADDR   0x00090000

#define KERNEL_CMDLINE_ADDR  0x00099000

#define GUI_REFRESH_INTERVAL 30 

/* XXX: use a two level table to limit memory usage */

#define MAX_IOPORTS 65536

static const char *bios_dir = CONFIG_QEMU_SHAREDIR;

char phys_ram_file[1024];

CPUState *global_env;

CPUState *cpu_single_env;

IOPortReadFunc *ioport_read_table[3][MAX_IOPORTS];

IOPortWriteFunc *ioport_write_table[3][MAX_IOPORTS];

BlockDriverState *bs_table[MAX_DISKS], *fd_table[MAX_FD];

int vga_ram_size;

static DisplayState display_state;

int nographic;

int term_inited;

int64_t ticks_per_sec;

int boot_device = 'c';

static int ram_size;

/***********************************************************/

/* x86 io ports */

uint32_t default_ioport_readb(CPUState *env, uint32_t address)

{

#ifdef DEBUG_UNUSED_IOPORT

    fprintf(stderr, "inb: port=0x%04x\n", address);

#endif

    return 0xff;

}

void default_ioport_writeb(CPUState *env, uint32_t address, uint32_t data)

{

#ifdef DEBUG_UNUSED_IOPORT

    fprintf(stderr, "outb: port=0x%04x data=0x%02x\n", address, data);

#endif

}

/* default is to make two byte accesses */

uint32_t default_ioport_readw(CPUState *env, uint32_t address)

{

    uint32_t data;

    data = ioport_read_table[0][address & (MAX_IOPORTS - 1)](env, address);

    data |= ioport_read_table[0][(address + 1) & (MAX_IOPORTS - 1)](env, address + 1) << 8;

    return data;

}

void default_ioport_writew(CPUState *env, uint32_t address, uint32_t data)

{

    ioport_write_table[0][address & (MAX_IOPORTS - 1)](env, address, data & 0xff);

    ioport_write_table[0][(address + 1) & (MAX_IOPORTS - 1)](env, address + 1, (data >> 8) & 0xff);

}

uint32_t default_ioport_readl(CPUState *env, uint32_t address)

{

#ifdef DEBUG_UNUSED_IOPORT

    fprintf(stderr, "inl: port=0x%04x\n", address);

#endif

    return 0xffffffff;

}

void default_ioport_writel(CPUState *env, uint32_t address, uint32_t data)

{

#ifdef DEBUG_UNUSED_IOPORT

    fprintf(stderr, "outl: port=0x%04x data=0x%02x\n", address, data);

#endif

}

void init_ioports(void)

{

    int i;

    for(i = 0; i < MAX_IOPORTS; i++) {

        ioport_read_table[0][i] = default_ioport_readb;

        ioport_write_table[0][i] = default_ioport_writeb;

        ioport_read_table[1][i] = default_ioport_readw;

        ioport_write_table[1][i] = default_ioport_writew;

        ioport_read_table[2][i] = default_ioport_readl;

        ioport_write_table[2][i] = default_ioport_writel;

    }

}

/* size is the word size in byte */

int register_ioport_read(int start, int length, IOPortReadFunc *func, int size)

{

    int i, bsize;

    if (size == 1)

        bsize = 0;

    else if (size == 2)

        bsize = 1;

    else if (size == 4)

        bsize = 2;

    else

        return -1;

    for(i = start; i < start + length; i += size)

        ioport_read_table[bsize][i] = func;

    return 0;

}

/* size is the word size in byte */

int register_ioport_write(int start, int length, IOPortWriteFunc *func, int size)

{

    int i, bsize;

    if (size == 1)

        bsize = 0;

    else if (size == 2)

        bsize = 1;

    else if (size == 4)

        bsize = 2;

    else

        return -1;

    for(i = start; i < start + length; i += size)

        ioport_write_table[bsize][i] = func;

    return 0;

}

void pstrcpy(char *buf, int buf_size, const char *str)

{

    int c;

    char *q = buf;

    if (buf_size <= 0)

        return;

    for(;;) {

        c = *str++;

        if (c == 0 || q >= buf + buf_size - 1)

            break;

        *q++ = c;

    }

    *q = '\0';

}

/* strcat and truncate. */

char *pstrcat(char *buf, int buf_size, const char *s)

{

    int len;

    len = strlen(buf);

    if (len < buf_size) 

        pstrcpy(buf + len, buf_size - len, s);

    return buf;

}

#if defined (TARGET_I386)

int load_kernel(const char *filename, uint8_t *addr, 

                uint8_t *real_addr)

{

    int fd, size;

    int setup_sects;

    fd = open(filename, O_RDONLY);

    if (fd < 0)

        return -1;

    /* load 16 bit code */

    if (read(fd, real_addr, 512) != 512)

        goto fail;

    setup_sects = real_addr[0x1F1];

    if (!setup_sects)

        setup_sects = 4;

    if (read(fd, real_addr + 512, setup_sects * 512) != 

        setup_sects * 512)

        goto fail;

    /* load 32 bit code */

    size = read(fd, addr, 16 * 1024 * 1024);

    if (size < 0)

        goto fail;

    close(fd);

    return size;

 fail:

    close(fd);

    return -1;

}

#endif

/* return the size or -1 if error */

int load_image(const char *filename, uint8_t *addr)

{

    int fd, size;

    fd = open(filename, O_RDONLY);

    if (fd < 0)

        return -1;

    size = lseek(fd, 0, SEEK_END);

    lseek(fd, 0, SEEK_SET);

    if (read(fd, addr, size) != size) {

        close(fd);

        return -1;

    }

    close(fd);

    return size;

}

void cpu_outb(CPUState *env, int addr, int val)

{

    ioport_write_table[0][addr & (MAX_IOPORTS - 1)](env, addr, val);

}

void cpu_outw(CPUState *env, int addr, int val)

{

    ioport_write_table[1][addr & (MAX_IOPORTS - 1)](env, addr, val);

}

void cpu_outl(CPUState *env, int addr, int val)

{

    ioport_write_table[2][addr & (MAX_IOPORTS - 1)](env, addr, val);

}

int cpu_inb(CPUState *env, int addr)

{

    return ioport_read_table[0][addr & (MAX_IOPORTS - 1)](env, addr);

}

int cpu_inw(CPUState *env, int addr)

{

    return ioport_read_table[1][addr & (MAX_IOPORTS - 1)](env, addr);

}

int cpu_inl(CPUState *env, int addr)

{

    return ioport_read_table[2][addr & (MAX_IOPORTS - 1)](env, addr);

}

/***********************************************************/

void ioport80_write(CPUState *env, uint32_t addr, uint32_t data)

{

}

void hw_error(const char *fmt, ...)

{

    va_list ap;

    va_start(ap, fmt);

    fprintf(stderr, "qemu: hardware error: ");

    vfprintf(stderr, fmt, ap);

    fprintf(stderr, "\n");

#ifdef TARGET_I386

    cpu_x86_dump_state(global_env, stderr, X86_DUMP_FPU | X86_DUMP_CCOP);

#else

    cpu_dump_state(global_env, stderr, 0);

#endif

    va_end(ap);

    abort();

}

/***********************************************************/

/* cmos emulation */

#if defined (TARGET_I386)

#define RTC_SECONDS             0

#define RTC_SECONDS_ALARM       1

#define RTC_MINUTES             2

#define RTC_MINUTES_ALARM       3

#define RTC_HOURS               4

#define RTC_HOURS_ALARM         5

#define RTC_ALARM_DONT_CARE    0xC0

#define RTC_DAY_OF_WEEK         6

#define RTC_DAY_OF_MONTH        7

#define RTC_MONTH               8

#define RTC_YEAR                9

#define RTC_REG_A               10

#define RTC_REG_B               11

#define RTC_REG_C               12

#define RTC_REG_D               13

/* PC cmos mappings */

#define REG_EQUIPMENT_BYTE          0x14

#define REG_IBM_CENTURY_BYTE        0x32

#define REG_IBM_PS2_CENTURY_BYTE    0x37

uint8_t cmos_data[128];

uint8_t cmos_index;

void cmos_ioport_write(CPUState *env, uint32_t addr, uint32_t data)

{

    if (addr == 0x70) {

        cmos_index = data & 0x7f;

    } else {

#ifdef DEBUG_CMOS

        printf("cmos: write index=0x%02x val=0x%02x\n",

               cmos_index, data);

#endif        

        switch(addr) {

        case RTC_SECONDS_ALARM:

        case RTC_MINUTES_ALARM:

        case RTC_HOURS_ALARM:

            /* XXX: not supported */

            cmos_data[cmos_index] = data;

            break;

        case RTC_SECONDS:

        case RTC_MINUTES:

        case RTC_HOURS:

        case RTC_DAY_OF_WEEK:

        case RTC_DAY_OF_MONTH:

        case RTC_MONTH:

        case RTC_YEAR:

            cmos_data[cmos_index] = data;

            break;

        case RTC_REG_A:

        case RTC_REG_B:

            cmos_data[cmos_index] = data;

            break;

        case RTC_REG_C:

        case RTC_REG_D:

            /* cannot write to them */

            break;

        default:

            cmos_data[cmos_index] = data;

            break;

        }

    }

}

static inline int to_bcd(int a)

{

    return ((a / 10) << 4) | (a % 10);

}

static void cmos_update_time(void)

{

    struct tm *tm;

    time_t ti;

    ti = time(NULL);

    tm = gmtime(&ti);

    cmos_data[RTC_SECONDS] = to_bcd(tm->tm_sec);

    cmos_data[RTC_MINUTES] = to_bcd(tm->tm_min);

    cmos_data[RTC_HOURS] = to_bcd(tm->tm_hour);

    cmos_data[RTC_DAY_OF_WEEK] = to_bcd(tm->tm_wday);

    cmos_data[RTC_DAY_OF_MONTH] = to_bcd(tm->tm_mday);

    cmos_data[RTC_MONTH] = to_bcd(tm->tm_mon + 1);

    cmos_data[RTC_YEAR] = to_bcd(tm->tm_year % 100);

    cmos_data[REG_IBM_CENTURY_BYTE] = to_bcd((tm->tm_year / 100) + 19);

    cmos_data[REG_IBM_PS2_CENTURY_BYTE] = cmos_data[REG_IBM_CENTURY_BYTE];

}

uint32_t cmos_ioport_read(CPUState *env, uint32_t addr)

{

    int ret;

    if (addr == 0x70) {

        return 0xff;

    } else {

        switch(cmos_index) {

        case RTC_SECONDS:

        case RTC_MINUTES:

        case RTC_HOURS:

        case RTC_DAY_OF_WEEK:

        case RTC_DAY_OF_MONTH:

        case RTC_MONTH:

        case RTC_YEAR:

        case REG_IBM_CENTURY_BYTE:

        case REG_IBM_PS2_CENTURY_BYTE:

            cmos_update_time();

            ret = cmos_data[cmos_index];

            break;

        case RTC_REG_A:

            ret = cmos_data[cmos_index];

            /* toggle update-in-progress bit for Linux (same hack as

               plex86) */

            cmos_data[RTC_REG_A] ^= 0x80; 

            break;

        case RTC_REG_C:

            ret = cmos_data[cmos_index];

            pic_set_irq(8, 0);

            cmos_data[RTC_REG_C] = 0x00; 

            break;

        default:

            ret = cmos_data[cmos_index];

            break;

        }

#ifdef DEBUG_CMOS

        printf("cmos: read index=0x%02x val=0x%02x\n",

               cmos_index, ret);

#endif

        return ret;

    }

}

void cmos_init(void)

{

    int val;

    cmos_update_time();

    cmos_data[RTC_REG_A] = 0x26;

    cmos_data[RTC_REG_B] = 0x02;

    cmos_data[RTC_REG_C] = 0x00;

    cmos_data[RTC_REG_D] = 0x80;

    /* various important CMOS locations needed by PC/Bochs bios */

    cmos_data[REG_EQUIPMENT_BYTE] = 0x02; /* FPU is there */

    cmos_data[REG_EQUIPMENT_BYTE] |= 0x04; /* PS/2 mouse installed */

    /* memory size */

    val = (ram_size / 1024) - 1024;

    if (val > 65535)

        val = 65535;

    cmos_data[0x17] = val;

    cmos_data[0x18] = val >> 8;

    cmos_data[0x30] = val;

    cmos_data[0x31] = val >> 8;

    val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);

    if (val > 65535)

        val = 65535;

    cmos_data[0x34] = val;

    cmos_data[0x35] = val >> 8;

    switch(boot_device) {

    case 'a':

    case 'b':

        cmos_data[0x3d] = 0x01; /* floppy boot */

        break;

    default:

    case 'c':

        cmos_data[0x3d] = 0x02; /* hard drive boot */

        break;

    case 'd':

        cmos_data[0x3d] = 0x03; /* CD-ROM boot */

        break;

    }

    register_ioport_write(0x70, 2, cmos_ioport_write, 1);

    register_ioport_read(0x70, 2, cmos_ioport_read, 1);

}

void cmos_register_fd (uint8_t fd0, uint8_t fd1)

{

    int nb = 0;

    cmos_data[0x10] = 0;

    switch (fd0) {

    case 0:

        /* 1.44 Mb 3"5 drive */

        cmos_data[0x10] |= 0x40;

        break;

    case 1:

        /* 2.88 Mb 3"5 drive */

        cmos_data[0x10] |= 0x60;

        break;

    case 2:

        /* 1.2 Mb 5"5 drive */

        cmos_data[0x10] |= 0x20;

        break;

    }

    switch (fd1) {

    case 0:

        /* 1.44 Mb 3"5 drive */

        cmos_data[0x10] |= 0x04;

        break;

    case 1:

        /* 2.88 Mb 3"5 drive */

        cmos_data[0x10] |= 0x06;

        break;

    case 2:

        /* 1.2 Mb 5"5 drive */

        cmos_data[0x10] |= 0x02;

        break;

    }

    if (fd0 < 3)

        nb++;

    if (fd1 < 3)

        nb++;

    switch (nb) {

    case 0:

        break;

    case 1:

        cmos_data[REG_EQUIPMENT_BYTE] |= 0x01; /* 1 drive, ready for boot */

        break;

    case 2:

        cmos_data[REG_EQUIPMENT_BYTE] |= 0x41; /* 2 drives, ready for boot */

        break;

    }

}

#endif /* TARGET_I386 */

/***********************************************************/

/* 8259 pic emulation */

typedef struct PicState {

    uint8_t last_irr; /* edge detection */

    uint8_t irr; /* interrupt request register */

    uint8_t imr; /* interrupt mask register */

    uint8_t isr; /* interrupt service register */

    uint8_t priority_add; /* highest irq priority */

    uint8_t irq_base;

    uint8_t read_reg_select;

    uint8_t poll;

    uint8_t special_mask;

    uint8_t init_state;

    uint8_t auto_eoi;

    uint8_t rotate_on_auto_eoi;

    uint8_t special_fully_nested_mode;

    uint8_t init4; /* true if 4 byte init */

} PicState;

/* 0 is master pic, 1 is slave pic */

PicState pics[2];

int pic_irq_requested;

/* set irq level. If an edge is detected, then the IRR is set to 1 */

static inline void pic_set_irq1(PicState *s, int irq, int level)

{

    int mask;

    mask = 1 << irq;

    if (level) {

        if ((s->last_irr & mask) == 0)

            s->irr |= mask;

        s->last_irr |= mask;

    } else {

        s->last_irr &= ~mask;

    }

}

/* return the highest priority found in mask (highest = smallest

   number). Return 8 if no irq */

static inline int get_priority(PicState *s, int mask)

{

    int priority;

    if (mask == 0)

        return 8;

    priority = 0;

    while ((mask & (1 << ((priority + s->priority_add) & 7))) == 0)

        priority++;

    return priority;

}

/* return the pic wanted interrupt. return -1 if none */

static int pic_get_irq(PicState *s)

{

    int mask, cur_priority, priority;

    mask = s->irr & ~s->imr;

    priority = get_priority(s, mask);

    if (priority == 8)

        return -1;

    /* compute current priority. If special fully nested mode on the

       master, the IRQ coming from the slave is not taken into account

       for the priority computation. */

    mask = s->isr;

    if (s->special_fully_nested_mode && s == &pics[0])

        mask &= ~(1 << 2);

    cur_priority = get_priority(s, mask);

    if (priority < cur_priority) {

        /* higher priority found: an irq should be generated */

        return (priority + s->priority_add) & 7;

    } else {

        return -1;

    }

}

/* raise irq to CPU if necessary. must be called every time the active

   irq may change */

void pic_update_irq(void)

{

    int irq2, irq;

    /* first look at slave pic */

    irq2 = pic_get_irq(&pics[1]);

    if (irq2 >= 0) {

        /* if irq request by slave pic, signal master PIC */

        pic_set_irq1(&pics[0], 2, 1);

        pic_set_irq1(&pics[0], 2, 0);

    }

    /* look at requested irq */

    irq = pic_get_irq(&pics[0]);

    if (irq >= 0) {

        if (irq == 2) {

            /* from slave pic */

            pic_irq_requested = 8 + irq2;

        } else {

            /* from master pic */

            pic_irq_requested = irq;

        }

#if defined(DEBUG_PIC)

        {

            int i;

            for(i = 0; i < 2; i++) {

                printf("pic%d: imr=%x irr=%x padd=%d\n", 

                       i, pics[i].imr, pics[i].irr, pics[i].priority_add);

            }

        }

        printf("pic: cpu_interrupt req=%d\n", pic_irq_requested);

#endif

        cpu_interrupt(global_env, CPU_INTERRUPT_HARD);

    }

}

#ifdef DEBUG_IRQ_LATENCY

int64_t irq_time[16];

int64_t cpu_get_ticks(void);

#endif

#if defined(DEBUG_PIC)

int irq_level[16];

#endif

void pic_set_irq(int irq, int level)

{

#if defined(DEBUG_PIC)

    if (level != irq_level[irq]) {

        printf("pic_set_irq: irq=%d level=%d\n", irq, level);

        irq_level[irq] = level;

    }

#endif

#ifdef DEBUG_IRQ_LATENCY

    if (level) {

        irq_time[irq] = cpu_get_ticks();

    }

#endif

    pic_set_irq1(&pics[irq >> 3], irq & 7, level);

    pic_update_irq();

}

/* acknowledge interrupt 'irq' */

static inline void pic_intack(PicState *s, int irq)

{

    if (s->auto_eoi) {

        if (s->rotate_on_auto_eoi)

            s->priority_add = (irq + 1) & 7;

    } else {

        s->isr |= (1 << irq);

    }

    s->irr &= ~(1 << irq);

}

int cpu_x86_get_pic_interrupt(CPUState *env)

{

    int irq, irq2, intno;

    /* signal the pic that the irq was acked by the CPU */

    irq = pic_irq_requested;

#ifdef DEBUG_IRQ_LATENCY

    printf("IRQ%d latency=%0.3fus\n", 

           irq, 

           (double)(cpu_get_ticks() - irq_time[irq]) * 1000000.0 / ticks_per_sec);

#endif

#if defined(DEBUG_PIC)

    printf("pic_interrupt: irq=%d\n", irq);

#endif

    if (irq >= 8) {

        irq2 = irq & 7;

        pic_intack(&pics[1], irq2);

        irq = 2;

        intno = pics[1].irq_base + irq2;

    } else {

        intno = pics[0].irq_base + irq;

    }

    pic_intack(&pics[0], irq);

    return intno;

}

void pic_ioport_write(CPUState *env, uint32_t addr, uint32_t val)

{

    PicState *s;

    int priority, cmd, irq;

#ifdef DEBUG_PIC

    printf("pic_write: addr=0x%02x val=0x%02x\n", addr, val);

#endif

    s = &pics[addr >> 7];

    addr &= 1;

    if (addr == 0) {

        if (val & 0x10) {

            /* init */

            memset(s, 0, sizeof(PicState));

            s->init_state = 1;

            s->init4 = val & 1;

            if (val & 0x02)

                hw_error("single mode not supported");

            if (val & 0x08)

                hw_error("level sensitive irq not supported");

        } else if (val & 0x08) {

            if (val & 0x04)

                s->poll = 1;

            if (val & 0x02)

                s->read_reg_select = val & 1;

            if (val & 0x40)

                s->special_mask = (val >> 5) & 1;

        } else {

            cmd = val >> 5;

            switch(cmd) {

            case 0:

            case 4:

                s->rotate_on_auto_eoi = cmd >> 2;

                break;

            case 1: /* end of interrupt */

            case 5:

                priority = get_priority(s, s->isr);

                if (priority != 8) {

                    irq = (priority + s->priority_add) & 7;

                    s->isr &= ~(1 << irq);

                    if (cmd == 5)

                        s->priority_add = (irq + 1) & 7;

                    pic_update_irq();

                }

                break;

            case 3:

                irq = val & 7;

                s->isr &= ~(1 << irq);

                pic_update_irq();

                break;

            case 6:

                s->priority_add = (val + 1) & 7;

                pic_update_irq();

                break;

            case 7:

                irq = val & 7;

                s->isr &= ~(1 << irq);

                s->priority_add = (irq + 1) & 7;

                pic_update_irq();

                break;

            default:

                /* no operation */

                break;

            }

        }

    } else {

        switch(s->init_state) {

        case 0:

            /* normal mode */

            s->imr = val;

            pic_update_irq();

            break;

        case 1:

            s->irq_base = val & 0xf8;

            s->init_state = 2;

            break;

        case 2:

            if (s->init4) {

                s->init_state = 3;

            } else {

                s->init_state = 0;

            }

            break;

        case 3:

            s->special_fully_nested_mode = (val >> 4) & 1;

            s->auto_eoi = (val >> 1) & 1;

            s->init_state = 0;

            break;

        }

    }

}

static uint32_t pic_poll_read (PicState *s, uint32_t addr1)

{

    int ret;

    ret = pic_get_irq(s);

    if (ret >= 0) {

        if (addr1 >> 7) {

            pics[0].isr &= ~(1 << 2);

            pics[0].irr &= ~(1 << 2);

        }

        s->irr &= ~(1 << ret);

        s->isr &= ~(1 << ret);

        if (addr1 >> 7 || ret != 2)

            pic_update_irq();

    } else {

        ret = 0x07;

        pic_update_irq();

    }