root / hw / unin_pci.c @ a74cdab4
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1 | 502a5395 | pbrook | /*
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2 | 502a5395 | pbrook | * QEMU Uninorth PCI host (for all Mac99 and newer machines)
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3 | 502a5395 | pbrook | *
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4 | 502a5395 | pbrook | * Copyright (c) 2006 Fabrice Bellard
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5 | 5fafdf24 | ths | *
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6 | 502a5395 | pbrook | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 502a5395 | pbrook | * of this software and associated documentation files (the "Software"), to deal
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8 | 502a5395 | pbrook | * in the Software without restriction, including without limitation the rights
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9 | 502a5395 | pbrook | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 502a5395 | pbrook | * copies of the Software, and to permit persons to whom the Software is
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11 | 502a5395 | pbrook | * furnished to do so, subject to the following conditions:
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12 | 502a5395 | pbrook | *
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13 | 502a5395 | pbrook | * The above copyright notice and this permission notice shall be included in
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14 | 502a5395 | pbrook | * all copies or substantial portions of the Software.
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15 | 502a5395 | pbrook | *
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16 | 502a5395 | pbrook | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 502a5395 | pbrook | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 502a5395 | pbrook | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 502a5395 | pbrook | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 502a5395 | pbrook | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 502a5395 | pbrook | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 502a5395 | pbrook | * THE SOFTWARE.
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23 | 502a5395 | pbrook | */
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24 | 87ecb68b | pbrook | #include "hw.h" |
25 | 87ecb68b | pbrook | #include "ppc_mac.h" |
26 | 87ecb68b | pbrook | #include "pci.h" |
27 | 4f5e19e6 | Isaku Yamahata | #include "pci_host.h" |
28 | 87ecb68b | pbrook | |
29 | f3902383 | blueswir1 | /* debug UniNorth */
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30 | f3902383 | blueswir1 | //#define DEBUG_UNIN
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31 | f3902383 | blueswir1 | |
32 | f3902383 | blueswir1 | #ifdef DEBUG_UNIN
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33 | 001faf32 | Blue Swirl | #define UNIN_DPRINTF(fmt, ...) \
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34 | 001faf32 | Blue Swirl | do { printf("UNIN: " fmt , ## __VA_ARGS__); } while (0) |
35 | f3902383 | blueswir1 | #else
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36 | 001faf32 | Blue Swirl | #define UNIN_DPRINTF(fmt, ...)
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37 | f3902383 | blueswir1 | #endif
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38 | f3902383 | blueswir1 | |
39 | fa0be69a | Alexander Graf | static const int unin_irq_line[] = { 0x1b, 0x1c, 0x1d, 0x1e }; |
40 | fa0be69a | Alexander Graf | |
41 | 2e29bd04 | Blue Swirl | typedef struct UNINState { |
42 | 2e29bd04 | Blue Swirl | SysBusDevice busdev; |
43 | 2e29bd04 | Blue Swirl | PCIHostState host_state; |
44 | d86f0e32 | Alexander Graf | ReadWriteHandler data_handler; |
45 | 2e29bd04 | Blue Swirl | } UNINState; |
46 | 502a5395 | pbrook | |
47 | d2b59317 | pbrook | static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num) |
48 | 502a5395 | pbrook | { |
49 | fa0be69a | Alexander Graf | int retval;
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50 | fa0be69a | Alexander Graf | int devfn = pci_dev->devfn & 0x00FFFFFF; |
51 | fa0be69a | Alexander Graf | |
52 | fa0be69a | Alexander Graf | retval = (((devfn >> 11) & 0x1F) + irq_num) & 3; |
53 | fa0be69a | Alexander Graf | |
54 | fa0be69a | Alexander Graf | return retval;
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55 | d2b59317 | pbrook | } |
56 | d2b59317 | pbrook | |
57 | 5d4e84c8 | Juan Quintela | static void pci_unin_set_irq(void *opaque, int irq_num, int level) |
58 | d2b59317 | pbrook | { |
59 | 5d4e84c8 | Juan Quintela | qemu_irq *pic = opaque; |
60 | 5d4e84c8 | Juan Quintela | |
61 | fa0be69a | Alexander Graf | UNIN_DPRINTF("%s: setting INT %d = %d\n", __func__,
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62 | fa0be69a | Alexander Graf | unin_irq_line[irq_num], level); |
63 | fa0be69a | Alexander Graf | qemu_set_irq(pic[unin_irq_line[irq_num]], level); |
64 | 502a5395 | pbrook | } |
65 | 502a5395 | pbrook | |
66 | f3902383 | blueswir1 | static void pci_unin_reset(void *opaque) |
67 | f3902383 | blueswir1 | { |
68 | f3902383 | blueswir1 | } |
69 | f3902383 | blueswir1 | |
70 | d86f0e32 | Alexander Graf | static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
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71 | d86f0e32 | Alexander Graf | { |
72 | d86f0e32 | Alexander Graf | uint32_t retval; |
73 | d86f0e32 | Alexander Graf | |
74 | d86f0e32 | Alexander Graf | if (reg & (1u << 31)) { |
75 | d86f0e32 | Alexander Graf | /* XXX OpenBIOS compatibility hack */
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76 | d86f0e32 | Alexander Graf | retval = reg | (addr & 3);
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77 | d86f0e32 | Alexander Graf | } else if (reg & 1) { |
78 | d86f0e32 | Alexander Graf | /* CFA1 style */
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79 | d86f0e32 | Alexander Graf | retval = (reg & ~7u) | (addr & 7); |
80 | d86f0e32 | Alexander Graf | } else {
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81 | d86f0e32 | Alexander Graf | uint32_t slot, func; |
82 | d86f0e32 | Alexander Graf | |
83 | d86f0e32 | Alexander Graf | /* Grab CFA0 style values */
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84 | d86f0e32 | Alexander Graf | slot = ffs(reg & 0xfffff800) - 1; |
85 | d86f0e32 | Alexander Graf | func = (reg >> 8) & 7; |
86 | d86f0e32 | Alexander Graf | |
87 | d86f0e32 | Alexander Graf | /* ... and then convert them to x86 format */
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88 | d86f0e32 | Alexander Graf | /* config pointer */
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89 | d86f0e32 | Alexander Graf | retval = (reg & (0xff - 7)) | (addr & 7); |
90 | d86f0e32 | Alexander Graf | /* slot */
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91 | d86f0e32 | Alexander Graf | retval |= slot << 11;
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92 | d86f0e32 | Alexander Graf | /* fn */
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93 | d86f0e32 | Alexander Graf | retval |= func << 8;
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94 | d86f0e32 | Alexander Graf | } |
95 | d86f0e32 | Alexander Graf | |
96 | d86f0e32 | Alexander Graf | |
97 | d86f0e32 | Alexander Graf | UNIN_DPRINTF("Converted config space accessor %08x/%08x -> %08x\n",
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98 | d86f0e32 | Alexander Graf | reg, addr, retval); |
99 | d86f0e32 | Alexander Graf | |
100 | d86f0e32 | Alexander Graf | return retval;
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101 | d86f0e32 | Alexander Graf | } |
102 | d86f0e32 | Alexander Graf | |
103 | d86f0e32 | Alexander Graf | static void unin_data_write(ReadWriteHandler *handler, |
104 | d86f0e32 | Alexander Graf | pcibus_t addr, uint32_t val, int len)
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105 | d86f0e32 | Alexander Graf | { |
106 | d86f0e32 | Alexander Graf | UNINState *s = container_of(handler, UNINState, data_handler); |
107 | d86f0e32 | Alexander Graf | UNIN_DPRINTF("write addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val); |
108 | d86f0e32 | Alexander Graf | pci_data_write(s->host_state.bus, |
109 | d86f0e32 | Alexander Graf | unin_get_config_reg(s->host_state.config_reg, addr), |
110 | d86f0e32 | Alexander Graf | val, len); |
111 | d86f0e32 | Alexander Graf | } |
112 | d86f0e32 | Alexander Graf | |
113 | d86f0e32 | Alexander Graf | static uint32_t unin_data_read(ReadWriteHandler *handler,
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114 | d86f0e32 | Alexander Graf | pcibus_t addr, int len)
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115 | d86f0e32 | Alexander Graf | { |
116 | d86f0e32 | Alexander Graf | UNINState *s = container_of(handler, UNINState, data_handler); |
117 | d86f0e32 | Alexander Graf | uint32_t val; |
118 | d86f0e32 | Alexander Graf | |
119 | d86f0e32 | Alexander Graf | val = pci_data_read(s->host_state.bus, |
120 | d86f0e32 | Alexander Graf | unin_get_config_reg(s->host_state.config_reg, addr), |
121 | d86f0e32 | Alexander Graf | len); |
122 | d86f0e32 | Alexander Graf | UNIN_DPRINTF("read addr %" FMT_PCIBUS " len %d val %x\n", addr, len, val); |
123 | d86f0e32 | Alexander Graf | return val;
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124 | d86f0e32 | Alexander Graf | } |
125 | d86f0e32 | Alexander Graf | |
126 | 81a322d4 | Gerd Hoffmann | static int pci_unin_main_init_device(SysBusDevice *dev) |
127 | 502a5395 | pbrook | { |
128 | 502a5395 | pbrook | UNINState *s; |
129 | 502a5395 | pbrook | int pci_mem_config, pci_mem_data;
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130 | 502a5395 | pbrook | |
131 | 502a5395 | pbrook | /* Use values found on a real PowerMac */
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132 | 502a5395 | pbrook | /* Uninorth main bus */
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133 | 2e29bd04 | Blue Swirl | s = FROM_SYSBUS(UNINState, dev); |
134 | 502a5395 | pbrook | |
135 | 6ebf5905 | Alexander Graf | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, |
136 | 6ebf5905 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
137 | d86f0e32 | Alexander Graf | s->data_handler.read = unin_data_read; |
138 | d86f0e32 | Alexander Graf | s->data_handler.write = unin_data_write; |
139 | 6bef0436 | Alexander Graf | pci_mem_data = cpu_register_io_memory_simple(&s->data_handler, |
140 | f23cea4d | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
141 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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142 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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143 | 2e29bd04 | Blue Swirl | |
144 | 2e29bd04 | Blue Swirl | qemu_register_reset(pci_unin_reset, &s->host_state); |
145 | 81a322d4 | Gerd Hoffmann | return 0; |
146 | 2e29bd04 | Blue Swirl | } |
147 | 2e29bd04 | Blue Swirl | |
148 | 0f921197 | Alexander Graf | static int pci_u3_agp_init_device(SysBusDevice *dev) |
149 | 0f921197 | Alexander Graf | { |
150 | 0f921197 | Alexander Graf | UNINState *s; |
151 | 0f921197 | Alexander Graf | int pci_mem_config, pci_mem_data;
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152 | 0f921197 | Alexander Graf | |
153 | 0f921197 | Alexander Graf | /* Uninorth U3 AGP bus */
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154 | 0f921197 | Alexander Graf | s = FROM_SYSBUS(UNINState, dev); |
155 | 0f921197 | Alexander Graf | |
156 | 6ebf5905 | Alexander Graf | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, |
157 | 6ebf5905 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
158 | 0f921197 | Alexander Graf | s->data_handler.read = unin_data_read; |
159 | 0f921197 | Alexander Graf | s->data_handler.write = unin_data_write; |
160 | 6bef0436 | Alexander Graf | pci_mem_data = cpu_register_io_memory_simple(&s->data_handler, |
161 | f23cea4d | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
162 | 0f921197 | Alexander Graf | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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163 | 0f921197 | Alexander Graf | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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164 | 0f921197 | Alexander Graf | |
165 | 0f921197 | Alexander Graf | qemu_register_reset(pci_unin_reset, &s->host_state); |
166 | 0f921197 | Alexander Graf | |
167 | 0f921197 | Alexander Graf | return 0; |
168 | 0f921197 | Alexander Graf | } |
169 | 0f921197 | Alexander Graf | |
170 | 81a322d4 | Gerd Hoffmann | static int pci_unin_agp_init_device(SysBusDevice *dev) |
171 | 2e29bd04 | Blue Swirl | { |
172 | 2e29bd04 | Blue Swirl | UNINState *s; |
173 | 2e29bd04 | Blue Swirl | int pci_mem_config, pci_mem_data;
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174 | 2e29bd04 | Blue Swirl | |
175 | 2e29bd04 | Blue Swirl | /* Uninorth AGP bus */
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176 | 2e29bd04 | Blue Swirl | s = FROM_SYSBUS(UNINState, dev); |
177 | 2e29bd04 | Blue Swirl | |
178 | 6ebf5905 | Alexander Graf | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, |
179 | 6ebf5905 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
180 | 6ebf5905 | Alexander Graf | pci_mem_data = pci_host_data_register_mmio(&s->host_state, |
181 | 6ebf5905 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
182 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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183 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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184 | 81a322d4 | Gerd Hoffmann | return 0; |
185 | 2e29bd04 | Blue Swirl | } |
186 | 2e29bd04 | Blue Swirl | |
187 | 81a322d4 | Gerd Hoffmann | static int pci_unin_internal_init_device(SysBusDevice *dev) |
188 | 2e29bd04 | Blue Swirl | { |
189 | 2e29bd04 | Blue Swirl | UNINState *s; |
190 | 2e29bd04 | Blue Swirl | int pci_mem_config, pci_mem_data;
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191 | 2e29bd04 | Blue Swirl | |
192 | 2e29bd04 | Blue Swirl | /* Uninorth internal bus */
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193 | 2e29bd04 | Blue Swirl | s = FROM_SYSBUS(UNINState, dev); |
194 | 2e29bd04 | Blue Swirl | |
195 | 6ebf5905 | Alexander Graf | pci_mem_config = pci_host_conf_register_mmio(&s->host_state, |
196 | 6ebf5905 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
197 | 6ebf5905 | Alexander Graf | pci_mem_data = pci_host_data_register_mmio(&s->host_state, |
198 | 6ebf5905 | Alexander Graf | DEVICE_LITTLE_ENDIAN); |
199 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_config);
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200 | 2e29bd04 | Blue Swirl | sysbus_init_mmio(dev, 0x1000, pci_mem_data);
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201 | 81a322d4 | Gerd Hoffmann | return 0; |
202 | 2e29bd04 | Blue Swirl | } |
203 | 2e29bd04 | Blue Swirl | |
204 | 2e29bd04 | Blue Swirl | PCIBus *pci_pmac_init(qemu_irq *pic) |
205 | 2e29bd04 | Blue Swirl | { |
206 | 2e29bd04 | Blue Swirl | DeviceState *dev; |
207 | 2e29bd04 | Blue Swirl | SysBusDevice *s; |
208 | 2e29bd04 | Blue Swirl | UNINState *d; |
209 | 2e29bd04 | Blue Swirl | |
210 | 2e29bd04 | Blue Swirl | /* Use values found on a real PowerMac */
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211 | 2e29bd04 | Blue Swirl | /* Uninorth main bus */
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212 | 18dd19a7 | Markus Armbruster | dev = qdev_create(NULL, "uni-north"); |
213 | e23a1b33 | Markus Armbruster | qdev_init_nofail(dev); |
214 | 2e29bd04 | Blue Swirl | s = sysbus_from_qdev(dev); |
215 | 2e29bd04 | Blue Swirl | d = FROM_SYSBUS(UNINState, s); |
216 | cdd0935c | Blue Swirl | d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
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217 | 2e29bd04 | Blue Swirl | pci_unin_set_irq, pci_unin_map_irq, |
218 | 520128bd | Isaku Yamahata | pic, PCI_DEVFN(11, 0), 4); |
219 | 2e29bd04 | Blue Swirl | |
220 | 60398748 | Blue Swirl | #if 0
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221 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(11, 0), "uni-north");
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222 | 60398748 | Blue Swirl | #endif
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223 | 2e29bd04 | Blue Swirl | |
224 | 2e29bd04 | Blue Swirl | sysbus_mmio_map(s, 0, 0xf2800000); |
225 | 2e29bd04 | Blue Swirl | sysbus_mmio_map(s, 1, 0xf2c00000); |
226 | 2e29bd04 | Blue Swirl | |
227 | 2e29bd04 | Blue Swirl | /* DEC 21154 bridge */
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228 | 2e29bd04 | Blue Swirl | #if 0
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229 | 2e29bd04 | Blue Swirl | /* XXX: not activated as PPC BIOS doesn't handle multiple buses properly */
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230 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(12, 0), "dec-21154");
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231 | 2e29bd04 | Blue Swirl | #endif
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232 | 2e29bd04 | Blue Swirl | |
233 | 2e29bd04 | Blue Swirl | /* Uninorth AGP bus */
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234 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(11, 0), "uni-north-agp"); |
235 | 18dd19a7 | Markus Armbruster | dev = qdev_create(NULL, "uni-north-agp"); |
236 | d27d06f2 | Blue Swirl | qdev_init_nofail(dev); |
237 | d27d06f2 | Blue Swirl | s = sysbus_from_qdev(dev); |
238 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 0, 0xf0800000); |
239 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 1, 0xf0c00000); |
240 | 2e29bd04 | Blue Swirl | |
241 | 2e29bd04 | Blue Swirl | /* Uninorth internal bus */
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242 | 2e29bd04 | Blue Swirl | #if 0
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243 | 2e29bd04 | Blue Swirl | /* XXX: not needed for now */
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244 | 520128bd | Isaku Yamahata | pci_create_simple(d->host_state.bus, PCI_DEVFN(14, 0), "uni-north-pci");
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245 | 18dd19a7 | Markus Armbruster | dev = qdev_create(NULL, "uni-north-pci");
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246 | d27d06f2 | Blue Swirl | qdev_init_nofail(dev);
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247 | d27d06f2 | Blue Swirl | s = sysbus_from_qdev(dev);
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248 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 0, 0xf4800000);
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249 | d27d06f2 | Blue Swirl | sysbus_mmio_map(s, 1, 0xf4c00000);
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250 | 2e29bd04 | Blue Swirl | #endif
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251 | 2e29bd04 | Blue Swirl | |
252 | 2e29bd04 | Blue Swirl | return d->host_state.bus;
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253 | 2e29bd04 | Blue Swirl | } |
254 | 2e29bd04 | Blue Swirl | |
255 | 0f921197 | Alexander Graf | PCIBus *pci_pmac_u3_init(qemu_irq *pic) |
256 | 0f921197 | Alexander Graf | { |
257 | 0f921197 | Alexander Graf | DeviceState *dev; |
258 | 0f921197 | Alexander Graf | SysBusDevice *s; |
259 | 0f921197 | Alexander Graf | UNINState *d; |
260 | 0f921197 | Alexander Graf | |
261 | 0f921197 | Alexander Graf | /* Uninorth AGP bus */
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262 | 0f921197 | Alexander Graf | |
263 | 0f921197 | Alexander Graf | dev = qdev_create(NULL, "u3-agp"); |
264 | 0f921197 | Alexander Graf | qdev_init_nofail(dev); |
265 | 0f921197 | Alexander Graf | s = sysbus_from_qdev(dev); |
266 | 0f921197 | Alexander Graf | d = FROM_SYSBUS(UNINState, s); |
267 | 0f921197 | Alexander Graf | |
268 | 0f921197 | Alexander Graf | d->host_state.bus = pci_register_bus(&d->busdev.qdev, "pci",
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269 | 0f921197 | Alexander Graf | pci_unin_set_irq, pci_unin_map_irq, |
270 | 520128bd | Isaku Yamahata | pic, PCI_DEVFN(11, 0), 4); |
271 | 0f921197 | Alexander Graf | |
272 | 0f921197 | Alexander Graf | sysbus_mmio_map(s, 0, 0xf0800000); |
273 | 0f921197 | Alexander Graf | sysbus_mmio_map(s, 1, 0xf0c00000); |
274 | 0f921197 | Alexander Graf | |
275 | 0f921197 | Alexander Graf | pci_create_simple(d->host_state.bus, 11 << 3, "u3-agp"); |
276 | 0f921197 | Alexander Graf | |
277 | 0f921197 | Alexander Graf | return d->host_state.bus;
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278 | 0f921197 | Alexander Graf | } |
279 | 0f921197 | Alexander Graf | |
280 | 81a322d4 | Gerd Hoffmann | static int unin_main_pci_host_init(PCIDevice *d) |
281 | 2e29bd04 | Blue Swirl | { |
282 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
283 | 4ebcf884 | blueswir1 | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_PCI); |
284 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
285 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
286 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
287 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
288 | 502a5395 | pbrook | d->config[0x34] = 0x00; // capabilities_pointer |
289 | 81a322d4 | Gerd Hoffmann | return 0; |
290 | 2e29bd04 | Blue Swirl | } |
291 | 502a5395 | pbrook | |
292 | 81a322d4 | Gerd Hoffmann | static int unin_agp_pci_host_init(PCIDevice *d) |
293 | 2e29bd04 | Blue Swirl | { |
294 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
295 | deb54399 | aliguori | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_AGP); |
296 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
297 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
298 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
299 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
300 | 502a5395 | pbrook | // d->config[0x34] = 0x80; // capabilities_pointer
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301 | 81a322d4 | Gerd Hoffmann | return 0; |
302 | 2e29bd04 | Blue Swirl | } |
303 | 502a5395 | pbrook | |
304 | 0f921197 | Alexander Graf | static int u3_agp_pci_host_init(PCIDevice *d) |
305 | 0f921197 | Alexander Graf | { |
306 | 0f921197 | Alexander Graf | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
307 | 0f921197 | Alexander Graf | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_U3_AGP); |
308 | 0f921197 | Alexander Graf | /* revision */
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309 | 0f921197 | Alexander Graf | d->config[0x08] = 0x00; |
310 | 0f921197 | Alexander Graf | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
311 | 0f921197 | Alexander Graf | /* cache line size */
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312 | 0f921197 | Alexander Graf | d->config[0x0C] = 0x08; |
313 | 0f921197 | Alexander Graf | /* latency timer */
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314 | 0f921197 | Alexander Graf | d->config[0x0D] = 0x10; |
315 | 0f921197 | Alexander Graf | return 0; |
316 | 0f921197 | Alexander Graf | } |
317 | 0f921197 | Alexander Graf | |
318 | 81a322d4 | Gerd Hoffmann | static int unin_internal_pci_host_init(PCIDevice *d) |
319 | 2e29bd04 | Blue Swirl | { |
320 | deb54399 | aliguori | pci_config_set_vendor_id(d->config, PCI_VENDOR_ID_APPLE); |
321 | 4ebcf884 | blueswir1 | pci_config_set_device_id(d->config, PCI_DEVICE_ID_APPLE_UNI_N_I_PCI); |
322 | 502a5395 | pbrook | d->config[0x08] = 0x00; // revision |
323 | 173a543b | blueswir1 | pci_config_set_class(d->config, PCI_CLASS_BRIDGE_HOST); |
324 | 502a5395 | pbrook | d->config[0x0C] = 0x08; // cache_line_size |
325 | 502a5395 | pbrook | d->config[0x0D] = 0x10; // latency_timer |
326 | 502a5395 | pbrook | d->config[0x34] = 0x00; // capabilities_pointer |
327 | 81a322d4 | Gerd Hoffmann | return 0; |
328 | 2e29bd04 | Blue Swirl | } |
329 | 2e29bd04 | Blue Swirl | |
330 | 2e29bd04 | Blue Swirl | static PCIDeviceInfo unin_main_pci_host_info = {
|
331 | 18dd19a7 | Markus Armbruster | .qdev.name = "uni-north",
|
332 | 2e29bd04 | Blue Swirl | .qdev.size = sizeof(PCIDevice),
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333 | 2e29bd04 | Blue Swirl | .init = unin_main_pci_host_init, |
334 | 2e29bd04 | Blue Swirl | }; |
335 | 2e29bd04 | Blue Swirl | |
336 | 0f921197 | Alexander Graf | static PCIDeviceInfo u3_agp_pci_host_info = {
|
337 | 0f921197 | Alexander Graf | .qdev.name = "u3-agp",
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338 | 0f921197 | Alexander Graf | .qdev.size = sizeof(PCIDevice),
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339 | 0f921197 | Alexander Graf | .init = u3_agp_pci_host_init, |
340 | 0f921197 | Alexander Graf | }; |
341 | 0f921197 | Alexander Graf | |
342 | 2e29bd04 | Blue Swirl | static PCIDeviceInfo unin_agp_pci_host_info = {
|
343 | 18dd19a7 | Markus Armbruster | .qdev.name = "uni-north-agp",
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344 | 2e29bd04 | Blue Swirl | .qdev.size = sizeof(PCIDevice),
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345 | 2e29bd04 | Blue Swirl | .init = unin_agp_pci_host_init, |
346 | 2e29bd04 | Blue Swirl | }; |
347 | 2e29bd04 | Blue Swirl | |
348 | 2e29bd04 | Blue Swirl | static PCIDeviceInfo unin_internal_pci_host_info = {
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349 | 18dd19a7 | Markus Armbruster | .qdev.name = "uni-north-pci",
|
350 | 2e29bd04 | Blue Swirl | .qdev.size = sizeof(PCIDevice),
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351 | 2e29bd04 | Blue Swirl | .init = unin_internal_pci_host_init, |
352 | 2e29bd04 | Blue Swirl | }; |
353 | 2e29bd04 | Blue Swirl | |
354 | 2e29bd04 | Blue Swirl | static void unin_register_devices(void) |
355 | 2e29bd04 | Blue Swirl | { |
356 | 18dd19a7 | Markus Armbruster | sysbus_register_dev("uni-north", sizeof(UNINState), |
357 | 2e29bd04 | Blue Swirl | pci_unin_main_init_device); |
358 | 2e29bd04 | Blue Swirl | pci_qdev_register(&unin_main_pci_host_info); |
359 | 0f921197 | Alexander Graf | sysbus_register_dev("u3-agp", sizeof(UNINState), |
360 | 0f921197 | Alexander Graf | pci_u3_agp_init_device); |
361 | 0f921197 | Alexander Graf | pci_qdev_register(&u3_agp_pci_host_info); |
362 | 18dd19a7 | Markus Armbruster | sysbus_register_dev("uni-north-agp", sizeof(UNINState), |
363 | 2e29bd04 | Blue Swirl | pci_unin_agp_init_device); |
364 | 2e29bd04 | Blue Swirl | pci_qdev_register(&unin_agp_pci_host_info); |
365 | 18dd19a7 | Markus Armbruster | sysbus_register_dev("uni-north-pci", sizeof(UNINState), |
366 | 2e29bd04 | Blue Swirl | pci_unin_internal_init_device); |
367 | 2e29bd04 | Blue Swirl | pci_qdev_register(&unin_internal_pci_host_info); |
368 | 502a5395 | pbrook | } |
369 | 2e29bd04 | Blue Swirl | |
370 | 2e29bd04 | Blue Swirl | device_init(unin_register_devices) |