Revision a8170e5e hw/apic.c
| b/hw/apic.c | ||
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| 630 | 630 |
apic_timer_update(s, s->next_time); |
| 631 | 631 |
} |
| 632 | 632 |
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| 633 |
static uint32_t apic_mem_readb(void *opaque, target_phys_addr_t addr)
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| 633 |
static uint32_t apic_mem_readb(void *opaque, hwaddr addr)
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| 634 | 634 |
{
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| 635 | 635 |
return 0; |
| 636 | 636 |
} |
| 637 | 637 |
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| 638 |
static uint32_t apic_mem_readw(void *opaque, target_phys_addr_t addr)
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| 638 |
static uint32_t apic_mem_readw(void *opaque, hwaddr addr)
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| 639 | 639 |
{
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| 640 | 640 |
return 0; |
| 641 | 641 |
} |
| 642 | 642 |
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| 643 |
static void apic_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
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static void apic_mem_writeb(void *opaque, hwaddr addr, uint32_t val)
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{
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| 645 | 645 |
} |
| 646 | 646 |
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| 647 |
static void apic_mem_writew(void *opaque, target_phys_addr_t addr, uint32_t val)
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| 647 |
static void apic_mem_writew(void *opaque, hwaddr addr, uint32_t val)
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{
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} |
| 650 | 650 |
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| 651 |
static uint32_t apic_mem_readl(void *opaque, target_phys_addr_t addr)
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static uint32_t apic_mem_readl(void *opaque, hwaddr addr)
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| 652 | 652 |
{
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| 653 | 653 |
DeviceState *d; |
| 654 | 654 |
APICCommonState *s; |
| ... | ... | |
| 732 | 732 |
return val; |
| 733 | 733 |
} |
| 734 | 734 |
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| 735 |
static void apic_send_msi(target_phys_addr_t addr, uint32_t data)
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static void apic_send_msi(hwaddr addr, uint32_t data)
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| 736 | 736 |
{
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| 737 | 737 |
uint8_t dest = (addr & MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT; |
| 738 | 738 |
uint8_t vector = (data & MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT; |
| ... | ... | |
| 743 | 743 |
apic_deliver_irq(dest, dest_mode, delivery, vector, trigger_mode); |
| 744 | 744 |
} |
| 745 | 745 |
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| 746 |
static void apic_mem_writel(void *opaque, target_phys_addr_t addr, uint32_t val)
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| 746 |
static void apic_mem_writel(void *opaque, hwaddr addr, uint32_t val)
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| 747 | 747 |
{
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| 748 | 748 |
DeviceState *d; |
| 749 | 749 |
APICCommonState *s; |
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