root / hw / etraxfs_ser.c @ a85d6887
History | View | Annotate | Download (5 kB)
1 | 83fa1010 | ths | /*
|
---|---|---|---|
2 | 83fa1010 | ths | * QEMU ETRAX System Emulator
|
3 | 83fa1010 | ths | *
|
4 | 83fa1010 | ths | * Copyright (c) 2007 Edgar E. Iglesias, Axis Communications AB.
|
5 | 83fa1010 | ths | *
|
6 | 83fa1010 | ths | * Permission is hereby granted, free of charge, to any person obtaining a copy
|
7 | 83fa1010 | ths | * of this software and associated documentation files (the "Software"), to deal
|
8 | 83fa1010 | ths | * in the Software without restriction, including without limitation the rights
|
9 | 83fa1010 | ths | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
10 | 83fa1010 | ths | * copies of the Software, and to permit persons to whom the Software is
|
11 | 83fa1010 | ths | * furnished to do so, subject to the following conditions:
|
12 | 83fa1010 | ths | *
|
13 | 83fa1010 | ths | * The above copyright notice and this permission notice shall be included in
|
14 | 83fa1010 | ths | * all copies or substantial portions of the Software.
|
15 | 83fa1010 | ths | *
|
16 | 83fa1010 | ths | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
17 | 83fa1010 | ths | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
18 | 83fa1010 | ths | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
|
19 | 83fa1010 | ths | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
20 | 83fa1010 | ths | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
21 | 83fa1010 | ths | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
22 | 83fa1010 | ths | * THE SOFTWARE.
|
23 | 83fa1010 | ths | */
|
24 | 83fa1010 | ths | |
25 | 4b816985 | Edgar E. Iglesias | #include "sysbus.h" |
26 | f062058f | edgar_igl | #include "qemu-char.h" |
27 | 83fa1010 | ths | |
28 | bbaf29c7 | edgar_igl | #define D(x)
|
29 | bbaf29c7 | edgar_igl | |
30 | 72af9170 | Edgar E. Iglesias | #define RW_TR_CTRL (0x00 / 4) |
31 | 72af9170 | Edgar E. Iglesias | #define RW_TR_DMA_EN (0x04 / 4) |
32 | 72af9170 | Edgar E. Iglesias | #define RW_REC_CTRL (0x08 / 4) |
33 | 72af9170 | Edgar E. Iglesias | #define RW_DOUT (0x1c / 4) |
34 | 72af9170 | Edgar E. Iglesias | #define RS_STAT_DIN (0x20 / 4) |
35 | 72af9170 | Edgar E. Iglesias | #define R_STAT_DIN (0x24 / 4) |
36 | 72af9170 | Edgar E. Iglesias | #define RW_INTR_MASK (0x2c / 4) |
37 | 72af9170 | Edgar E. Iglesias | #define RW_ACK_INTR (0x30 / 4) |
38 | 72af9170 | Edgar E. Iglesias | #define R_INTR (0x34 / 4) |
39 | 72af9170 | Edgar E. Iglesias | #define R_MASKED_INTR (0x38 / 4) |
40 | 72af9170 | Edgar E. Iglesias | #define R_MAX (0x3c / 4) |
41 | 83fa1010 | ths | |
42 | f062058f | edgar_igl | #define STAT_DAV 16 |
43 | f062058f | edgar_igl | #define STAT_TR_IDLE 22 |
44 | f062058f | edgar_igl | #define STAT_TR_RDY 24 |
45 | f062058f | edgar_igl | |
46 | f2964260 | Edgar E. Iglesias | struct etrax_serial
|
47 | 83fa1010 | ths | { |
48 | 2a9859e7 | Edgar E. Iglesias | SysBusDevice busdev; |
49 | 2a9859e7 | Edgar E. Iglesias | CharDriverState *chr; |
50 | 2a9859e7 | Edgar E. Iglesias | qemu_irq irq; |
51 | f062058f | edgar_igl | |
52 | 2a9859e7 | Edgar E. Iglesias | /* This pending thing is a hack. */
|
53 | 2a9859e7 | Edgar E. Iglesias | int pending_tx;
|
54 | f062058f | edgar_igl | |
55 | 2a9859e7 | Edgar E. Iglesias | /* Control registers. */
|
56 | 2a9859e7 | Edgar E. Iglesias | uint32_t regs[R_MAX]; |
57 | f062058f | edgar_igl | }; |
58 | f062058f | edgar_igl | |
59 | f2964260 | Edgar E. Iglesias | static void ser_update_irq(struct etrax_serial *s) |
60 | f062058f | edgar_igl | { |
61 | 2a9859e7 | Edgar E. Iglesias | s->regs[R_INTR] &= ~(s->regs[RW_ACK_INTR]); |
62 | 2a9859e7 | Edgar E. Iglesias | s->regs[R_MASKED_INTR] = s->regs[R_INTR] & s->regs[RW_INTR_MASK]; |
63 | 72af9170 | Edgar E. Iglesias | |
64 | 2a9859e7 | Edgar E. Iglesias | qemu_set_irq(s->irq, !!s->regs[R_MASKED_INTR]); |
65 | 2a9859e7 | Edgar E. Iglesias | s->regs[RW_ACK_INTR] = 0;
|
66 | 83fa1010 | ths | } |
67 | f062058f | edgar_igl | |
68 | 83fa1010 | ths | static uint32_t ser_readl (void *opaque, target_phys_addr_t addr) |
69 | 83fa1010 | ths | { |
70 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
|
71 | 2a9859e7 | Edgar E. Iglesias | D(CPUState *env = s->env); |
72 | 2a9859e7 | Edgar E. Iglesias | uint32_t r = 0;
|
73 | 2a9859e7 | Edgar E. Iglesias | |
74 | 2a9859e7 | Edgar E. Iglesias | addr >>= 2;
|
75 | 2a9859e7 | Edgar E. Iglesias | switch (addr)
|
76 | 2a9859e7 | Edgar E. Iglesias | { |
77 | 2a9859e7 | Edgar E. Iglesias | case R_STAT_DIN:
|
78 | 2a9859e7 | Edgar E. Iglesias | r = s->regs[RS_STAT_DIN]; |
79 | 2a9859e7 | Edgar E. Iglesias | break;
|
80 | 2a9859e7 | Edgar E. Iglesias | case RS_STAT_DIN:
|
81 | 2a9859e7 | Edgar E. Iglesias | r = s->regs[addr]; |
82 | 2a9859e7 | Edgar E. Iglesias | /* Read side-effect: clear dav. */
|
83 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] &= ~(1 << STAT_DAV);
|
84 | 2a9859e7 | Edgar E. Iglesias | break;
|
85 | 2a9859e7 | Edgar E. Iglesias | default:
|
86 | 2a9859e7 | Edgar E. Iglesias | r = s->regs[addr]; |
87 | 2a9859e7 | Edgar E. Iglesias | D(printf ("%s %x=%x\n", __func__, addr, r));
|
88 | 2a9859e7 | Edgar E. Iglesias | break;
|
89 | 2a9859e7 | Edgar E. Iglesias | } |
90 | 2a9859e7 | Edgar E. Iglesias | return r;
|
91 | 83fa1010 | ths | } |
92 | 83fa1010 | ths | |
93 | 83fa1010 | ths | static void |
94 | 83fa1010 | ths | ser_writel (void *opaque, target_phys_addr_t addr, uint32_t value)
|
95 | 83fa1010 | ths | { |
96 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
|
97 | 2a9859e7 | Edgar E. Iglesias | unsigned char ch = value; |
98 | 2a9859e7 | Edgar E. Iglesias | D(CPUState *env = s->env); |
99 | 2a9859e7 | Edgar E. Iglesias | |
100 | 2a9859e7 | Edgar E. Iglesias | D(printf ("%s %x %x\n", __func__, addr, value));
|
101 | 2a9859e7 | Edgar E. Iglesias | addr >>= 2;
|
102 | 2a9859e7 | Edgar E. Iglesias | switch (addr)
|
103 | 2a9859e7 | Edgar E. Iglesias | { |
104 | 2a9859e7 | Edgar E. Iglesias | case RW_DOUT:
|
105 | 2a9859e7 | Edgar E. Iglesias | qemu_chr_write(s->chr, &ch, 1);
|
106 | 2a9859e7 | Edgar E. Iglesias | s->regs[R_INTR] |= 1;
|
107 | 2a9859e7 | Edgar E. Iglesias | s->pending_tx = 1;
|
108 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] = value; |
109 | 2a9859e7 | Edgar E. Iglesias | break;
|
110 | 2a9859e7 | Edgar E. Iglesias | case RW_ACK_INTR:
|
111 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] = value; |
112 | 2a9859e7 | Edgar E. Iglesias | if (s->pending_tx && (s->regs[addr] & 1)) { |
113 | 2a9859e7 | Edgar E. Iglesias | s->regs[R_INTR] |= 1;
|
114 | 2a9859e7 | Edgar E. Iglesias | s->pending_tx = 0;
|
115 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] &= ~1;
|
116 | 2a9859e7 | Edgar E. Iglesias | } |
117 | 2a9859e7 | Edgar E. Iglesias | break;
|
118 | 2a9859e7 | Edgar E. Iglesias | default:
|
119 | 2a9859e7 | Edgar E. Iglesias | s->regs[addr] = value; |
120 | 2a9859e7 | Edgar E. Iglesias | break;
|
121 | 2a9859e7 | Edgar E. Iglesias | } |
122 | 2a9859e7 | Edgar E. Iglesias | ser_update_irq(s); |
123 | 83fa1010 | ths | } |
124 | 83fa1010 | ths | |
125 | 83fa1010 | ths | static CPUReadMemoryFunc *ser_read[] = {
|
126 | 2a9859e7 | Edgar E. Iglesias | NULL, NULL, |
127 | 2a9859e7 | Edgar E. Iglesias | &ser_readl, |
128 | 83fa1010 | ths | }; |
129 | 83fa1010 | ths | |
130 | 83fa1010 | ths | static CPUWriteMemoryFunc *ser_write[] = {
|
131 | 2a9859e7 | Edgar E. Iglesias | NULL, NULL, |
132 | 2a9859e7 | Edgar E. Iglesias | &ser_writel, |
133 | 83fa1010 | ths | }; |
134 | 83fa1010 | ths | |
135 | f062058f | edgar_igl | static void serial_receive(void *opaque, const uint8_t *buf, int size) |
136 | 83fa1010 | ths | { |
137 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
|
138 | f062058f | edgar_igl | |
139 | 2a9859e7 | Edgar E. Iglesias | s->regs[R_INTR] |= 8;
|
140 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] &= ~0xff;
|
141 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] |= (buf[0] & 0xff); |
142 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] |= (1 << STAT_DAV); /* dav. */ |
143 | 2a9859e7 | Edgar E. Iglesias | ser_update_irq(s); |
144 | f062058f | edgar_igl | } |
145 | f062058f | edgar_igl | |
146 | f062058f | edgar_igl | static int serial_can_receive(void *opaque) |
147 | f062058f | edgar_igl | { |
148 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = opaque;
|
149 | 2a9859e7 | Edgar E. Iglesias | int r;
|
150 | f062058f | edgar_igl | |
151 | 2a9859e7 | Edgar E. Iglesias | /* Is the receiver enabled? */
|
152 | 2a9859e7 | Edgar E. Iglesias | r = s->regs[RW_REC_CTRL] & 1;
|
153 | f062058f | edgar_igl | |
154 | 2a9859e7 | Edgar E. Iglesias | /* Pending rx data? */
|
155 | 2a9859e7 | Edgar E. Iglesias | r |= !(s->regs[R_INTR] & 8);
|
156 | 2a9859e7 | Edgar E. Iglesias | return r;
|
157 | f062058f | edgar_igl | } |
158 | f062058f | edgar_igl | |
159 | f062058f | edgar_igl | static void serial_event(void *opaque, int event) |
160 | f062058f | edgar_igl | { |
161 | f062058f | edgar_igl | |
162 | f062058f | edgar_igl | } |
163 | f062058f | edgar_igl | |
164 | 4b816985 | Edgar E. Iglesias | static void etraxfs_ser_init(SysBusDevice *dev) |
165 | f062058f | edgar_igl | { |
166 | 2a9859e7 | Edgar E. Iglesias | struct etrax_serial *s = FROM_SYSBUS(typeof (*s), dev);
|
167 | 2a9859e7 | Edgar E. Iglesias | int ser_regs;
|
168 | 2a9859e7 | Edgar E. Iglesias | |
169 | 2a9859e7 | Edgar E. Iglesias | /* transmitter begins ready and idle. */
|
170 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] |= (1 << STAT_TR_RDY);
|
171 | 2a9859e7 | Edgar E. Iglesias | s->regs[RS_STAT_DIN] |= (1 << STAT_TR_IDLE);
|
172 | 2a9859e7 | Edgar E. Iglesias | |
173 | 2a9859e7 | Edgar E. Iglesias | sysbus_init_irq(dev, &s->irq); |
174 | 2a9859e7 | Edgar E. Iglesias | ser_regs = cpu_register_io_memory(0, ser_read, ser_write, s);
|
175 | 2a9859e7 | Edgar E. Iglesias | sysbus_init_mmio(dev, R_MAX * 4, ser_regs);
|
176 | 2a9859e7 | Edgar E. Iglesias | s->chr = qdev_init_chardev(&dev->qdev); |
177 | 2a9859e7 | Edgar E. Iglesias | if (s->chr)
|
178 | 2a9859e7 | Edgar E. Iglesias | qemu_chr_add_handlers(s->chr, |
179 | 2a9859e7 | Edgar E. Iglesias | serial_can_receive, serial_receive, |
180 | 2a9859e7 | Edgar E. Iglesias | serial_event, s); |
181 | 83fa1010 | ths | } |
182 | 4b816985 | Edgar E. Iglesias | |
183 | 4b816985 | Edgar E. Iglesias | static void etraxfs_serial_register(void) |
184 | 4b816985 | Edgar E. Iglesias | { |
185 | 2a9859e7 | Edgar E. Iglesias | sysbus_register_dev("etraxfs,serial", sizeof (struct etrax_serial), |
186 | 2a9859e7 | Edgar E. Iglesias | etraxfs_ser_init); |
187 | 4b816985 | Edgar E. Iglesias | } |
188 | 4b816985 | Edgar E. Iglesias | |
189 | 4b816985 | Edgar E. Iglesias | device_init(etraxfs_serial_register) |