tcg-sparc: Fix set-but-not used warnings.
In both cases, val is computed, but then not used in thesubsequent line, which then re-computes the quantity ina different type (int32_t vs unsigned long).
Keep the computation type that's been working so far....
Merge branch 's390-1.0' of git://repo.or.cz/qemu/agraf
tcg: Use TCGReg for standard tcg-target entry points.
Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi.
Signed-off-by: Richard Henderson <rth@twiddle.net>Reviewed-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Stefan Weil <sw@weilnetz.de>...
tcg: Standardize on TCGReg as the enum for hard registers
Most targets did not name the enum; tci used TCGRegister.
tcg-ppc64: Fix compile errors for userspace only builds with gcc 4.6
tcg/ppc64/tcg-target.c has a couple of places where variables are setunconditionally, but otherwise used only for softmmu builds, notuserspace only builds. This causes compiler warnings (which are fatal...
Merge branch 'tci' of git://qemu.weilnetz.de/qemu
tcg: Fix whitespace in tcg-op.h.
Removing the only tabs in the file.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: malc <av1474@comtv.ru>
tcg: Fix regression in tcg_gen_deposit_i64.
The error being caused by the failure to copy the other half ofthe input to the output after having narrowed the deposit operation.
tcg: TCG targets may define tcg_qemu_tb_exec
Targets may use a non standard definition of tcg_tb_execby defining this macro in their tcg_target.h.
This is used here by ppc. It will be used by the TCG interpreter, too.
Cc: malc <av1474@comtv.ru>Signed-off-by: Stefan Weil <sw@weilnetz.de>
tcg: Make ARRAY_SIZE(tcg_op_defs) globally available
tcg_op_defs was already a global array.
The tci disassembler also needs ARRAY_SIZE(tcg_op_defs),so add a new global constant with this value.
Signed-off-by: Stefan Weil <sw@weilnetz.de>
tcg: Add bytecode generator for tcg interpreter
Unlike other tcg target code generators, this one does not generatemachine code for some cpu. It generates machine independent bytecodewhich is interpreted later.
This allows running QEMU on any host.
Interpreted bytecode is slower than direct execution of generated...
tcg: Optimize some forms of deposit.
If the deposit replaces the entire word, optimize to a move.
If we're inserting to the top of the word, avoid the mask of arg2as we'll be shifting out all of the garbage and shifting in zeros.
If the host is 32-bit, reduce a 64-bit deposit to a 32-bit deposit...
tcg: Fix spelling in comment (varables -> variables)
Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
tcg/s390: Remove unused tcg_out_addi()
Remove the unused function tcg_out_addi() from the s390 TCG backend;this brings it into line with other backends.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Acked-by: Richard Henderson <rth@twiddle.net>...
tcg/ia64: Remove unused tcg_out_addi()
Remove the unused function tcg_out_addi() from the ia64 TCG backend;this brings it into line with other backends.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg-i386: Introduce limited deposit support
x86 cannot provide an optimized generic deposit implementation. But atleast for a few special cases, namely for writing bits 0..7, 8..15, and0..15, versions using only a single instruction are feasible.Introducing such limited support improves emulating 16-bit x86 code on...
tcg/arm: Remove unused tcg_out_addi()
Remove the unused function tcg_out_addi() from the ARM TCG backend;this fixes a compilation failure on ARM hosts with newer gcc.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Reviewed-by: Richard Henderson <rth@twiddle.net>...
tcg: Add some assertions
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Add forward declarations for local functions
These functions are defined in the tcg target specific filetcg-target.c.
The forward declarations assert that every tcg target usesthe same function prototype.
Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
tcg: Don't declare TCG_TARGET_REG_BITS in tcg-target.h
It is now declared for all tcg targets in tcg.h,so the tcg target specific declarations are redundant.
tcg: Declare TCG_TARGET_REG_BITS in tcg.h
TCG_TARGET_REG_BITS can be determined by the compiler,so there is no need to declare it for each individual tcg target.
This is especially important for new tcg targetswhich will be supported by the tcg interpreter....
tcg/ppc64: Only one call output register needed for 64 bit hosts
The second register is only needed for 32 bit hosts.
Cc: Vassili Karpov <av1474@comtv.ru>Fine-with-me'd-by: Vassili Karpov <av1474@comtv.ru>Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
tcg/sparc: Only one call output register needed for 64 bit hosts
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/s390: Only one call output register needed for 64 bit hosts
Cc: Alexander Graf <agraf@suse.de>Acked-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/ia64: Only one call output register needed for 64 bit hosts
The second register is never used for ia64 hosts.
Cc: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/i386: Only one call output register needed for 64 bit hosts
tcg/ppc64: Fix zero extension code generation bug for ppc64 host
The ppc64 code generation backend uses an rldicr (Rotate Left DoubleImmediate and Clear Right) instruction to implement zero extension ofa 32 bit quantity to a 64 bit quantity (INDEX_op_ext32u_i64). However...
tcg/ppc/tcg-target.c: Avoid 'set but not used' gcc warnings
Move the declaration and initialisation of some variables intcg_out_qemu_ld and tcg_out_qemu_st inside CONFIG_SOFTMMU, toavoid the "variable set but not used" warning of gcc 4.6.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
TCG: improve optimizer debugging
Use enum TCGOpcode instead of plain old int so that the name ofcurrent op can be seen in GDB. Add a default case to switchso that GCC does not complain about unhandled enum cases.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Update --enable-debug for TCG_OPF_NOT_PRESENT.
Signed-off-by: Richard Henderson <rth@twiddle.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg/ppc64: fix 16/32 mixup
Signed-off-by: malc <av1474@comtv.ru>
tcg/ppc64: implement not_i32/64 and ext32u_i64
tcg/ppc32: implement deposit_i32
tcg-ia64: Fix typos in AREG0 setup in prologue.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg: Constant fold neg, andc, orc, eqv, nand, nor.
tcg-hppa: Fix CPU_TEMP_BUF_NLONGS oversight.
tcg: Always define all of the TCGOpcode enum members.
By always defining these symbols, we can eliminate a lot of ifdefs.
To allow this to be checked reliably, the semantics of theTCG_TARGET_HAS_* macros must be changed from def/undef to true/false.This allows even more ifdefs to be removed, converting them into...
tcg: Add and use TCG_OPF_64BIT.
This allows the simplification of the op_bits function fromtcg/optimize.c.
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
TCG: fix copy propagation
Copy propagation introduced in 22613af4a6d9602001e6d0e7b6d98aa40aa018dcconsidered only global registers. However, register temps and stackallocated locals must be handled differently because register tempsdon't survive across brcond....
TCG: fix breakage by previous patch
Fix incorrect logic and typos in previous commit1bfd07bdfe56cea43dbe258dcb161e46b0ee29b7.
TCG: fix breakage on some RISC hosts
Fix breakage by a640f03178c22355a158fa9378e4f8bfa4f517a6and 55c0975c5b358e948b9ae7bd7b07eff92508e756.
Some TCG targets don't implement all TCG ops, so makeoptimizing those conditional.
Do constant folding for unary operations.
Perform constant folding for NOT and EXT{8,16,32}{S,U} operations.
Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Do constant folding for boolean operations.
Perform constant folding for AND, OR, XOR operations.
Do constant folding for shift operations.
Perform constant forlding for SHR, SHL, SAR, ROTR, ROTL operations.
Do constant folding for basic arithmetic operations.
Perform actual constant folding for ADD, SUB and MUL operations.
Add copy and constant propagation.
Make tcg_constant_folding do copy and constant propagation. It is apreparational work before actual constant folding.
Add TCG optimizations stub
Added file tcg/optimize.c to hold TCG optimizations. Function tcg_optimizeis called from tcg_gen_code_common. It calls other functions performingspecific optimizations. Stub for constant folding was added.
Signed-off-by: Kirill Batuzov <batuzovk@ispras.ru>...
tcg/mips: Fix regression caused by typo (copy + paste bug)
cppcheck reports an error:qemu/tcg/mips/tcg-target.c:1487: error: Invalid number of character (()
The unpatched code won't compile on mips hosts starting with commitcea5f9a28faa528b6b1b117c9ab2d8828f473fef....
tcg/README: Expand advice on number of TCG ops per target insn
Expand the note on the number of TCG ops generated per target insn,to be clearer about the range of applicability of the 20 op ruleof thumb. Also add a note about the hard MAX_OP_PER_INSTR limit....
TCG/PPC: use stack for TCG temps
Use stack instead of temp_buf array in CPUState for TCG temps.
tcg-hppa: Support deposit opcode.
TCG/HPPA: use stack for TCG temps
TCG/HPPA: use TCG_REG_CALL_STACK instead of TCG_REG_SP
Use TCG_REG_CALL_STACK instead of TCG_REG_SP for consistency.
Acked-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/ppc64: Remove tcg_out_addi
The only user (within tcg.c) was removed
tcg/ppc: Remove tcg_out_addi
TCG/Sparc64: use stack for TCG temps
On Sparc64, stack pointer is not aligned but there is a fixed bias of 2047,so don't try to enforce alignment.
TCG/x86: use stack for TCG temps
Use stack instead of temp_buf array in CPUState for TCGtemps.
TCG/x86: use TCG_REG_CALL_STACK instead of TCG_REG_ESP
Except for specific cases where the use of %esp changes the encoding ofthe instruction, it's cleaner to use TCG_REG_CALL_STACK instead ofTCG_REG_ESP.
TCG: remove broken stack allocation for call arguments
The code for stack allocation for call arguments is way too simplisticto actually work on targets with non-trivial stack allocation policies,e.g. ppc64. We've also already allocated TCG_STATIC_CALL_ARGS_SIZE worth...
TCG: fix negative frame offset calculations
size_t is unsigned, so the frame offset calculations can be incorrect fornegative offsets.
Delegate setup of TCG temporaries to targets
Delegate TCG temp_buf setup to targets, so that they can use a stackframe later instead.
cpu-exec.c: avoid AREG0 use
Make functions take a parameter for CPUState instead of relyingon global env. Pass CPUState pointer to TCG prologue, which movesit to AREG0.
Thanks to Peter Maydell and Laurent Desnogues for the ARM prologuechange.
Revert the hacks to avoid AREG0 use on Sparc hosts....
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
tcg: Fix unused-but-set-variable warning
Based on a patch from Hans de Goede <hdegoede@redhat.com>
This warning is new in gcc 4.6.
Acked-by: Amit Shah <amit.shah@redhat.com>Signed-off-by: Christophe Fergeau <cfergeau@redhat.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: If DEBUG_TCGV, distinguish TCGv_ptr from TCGv_i32/TCGv_i64
When compiling with DEBUG_TCGV enabled, make the TCGv_ptr type distinctfrom TCGv_i32/TCGv_i64. This means that using an i32 or i64 TCG op tomanipulate a TCGv_ptr will always be detected at compile time, rather...
tcg/tcg-op.h: Fix prototypes for ld/st functions on 64 bit hosts
The prototypes for the ld/st functions on a 64 bit host declaredthe address parameter as a TCGv_i64 rather than a TCGv_ptr. Thisworked OK (since the two are aliases), but needs to be fixed to...
Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSD.
Use the correct header in the TCG MIPS code to find cacheflush() on OpenBSDto fix compilation of the MIPS host support for OpenBSD/mips64 based architecures.
Signed-off-by: Brad Smith <brad@comstyle.com>...
Fix spelling in comment (additon -> addition)
Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
tcg: don't keep dead outputs in registers
If an op with dead outputs is not removed, because it has side effectsor has multiple output and only one dead, mark the registers as deadinstead of saving them. This avoid a few register spills on TCG targetswith low register count, especially with div2 and mul2 ops, or when a...
tcg: mark dead output argument in op_dead_args
If an op is not removed and has dead output arguments, mark itin op_dead_args similarly to what is done for input arguments.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg: replace op_dead_iargs by op_dead_args
Allow all args to be dead by replacing the input specific op_dead_iargsvariable by op_dead_args. Note this is a purely mechanical change.
Fix typos in comments (accross -> across)
tcg/arm: Support host code being compiled for Thumb
Although the TCG generated code is always in ARM mode, it is possiblethat the host code was compiled by gcc in Thumb mode (this is often thedefault for Linux distributions targeting ARM v7 only). Handle this...
tcg: Add support for debugging leakage of temporaries
Add support (if CONFIG_DEBUG_TCG is defined) for debugging leakageof temporary variables. Generally any temporaries created bya target while it is translating an instruction should be freedby the end of that instruction; otherwise carefully crafted...
tcg: README, name deposit second argument len/LEN
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg: Define "deposit" as an optional operation.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
tcg arm/mips/ia64: add a comment about retranslation and caches
Add a comment about cache coherency and retranslation, so that peopledevelopping new targets based on existing ones are warned of the issue.
Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>...
tcg/arm: improve constant loading
Improve constant loading in two ways:- On all ARM versions, it's possible to load 0xffffff00 = 0x100 using the mvn rd, #0. Fix the conditions. On <= ARMv6 versions, where movw and movt are not available, load the constants using mov and orr with rotations depending on the constant...
tcg/ia64: remove an unnecessary stop bit
Spotted by Richard Henderson.
tcg: fix typo in readme
Signed-off-by: Mike Frysinger <vapier@gentoo.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
tcg/README: Spelling fixes
tcg/mips: fix branch target change during code retranslation
TCG on MIPS was trying to avoid changing the branch offset, but didn'tdue to a stupid typo. Fix it.
tcg/arm: fix qemu_st64 for big endian targets
Due to a typo, qemu_st64 doesn't properly byteswap the 32-bit low word ofa 64 bit word before saving it. This patch fixes that.
Acked-by: Andrzej Zaborowski <balrogg@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg/arm: fix branch target change during code retranslation
QEMU uses code retranslation to restore the CPU state when an exceptionhappens. For it to work the retranslation must not modify the generatedcode. This is what is currently implemented in ARM TCG....
tcg-ia64: Provide default GUEST_BASE.
Fix compilation error when GUEST_BASE is not defined.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Edgar E. Iglesias <edgar@axis.com>
tcg-ia64: Implement qemu_ld32.
The port was not properly merged following86feb1c860dc38e9c89e787c5210e8191800385e
tcg-ia64: Fix tlb read error for 32-bit targets.
Use ld4 not ld8 for reading the tlb of 32-bit targets.
tcg-ia64: Fix address compilation in qemu_st.
A typo in the usermode address calculation path; R3 used where R2 needed.
tcg-ia64: Fix warning in qemu_ld.
The usermode version of qemu_ld doesn't used mem_index,leading to set-but-not-used warnings.
tcg: Fix default definition of divu_i32 and remu_i32.
The arguments to tcg_gen_helper32 for these functions were notupdated correctly in rev 2bece2c88331f024a46527634e3dd91c71d22141.
tcg: Use fprintf_function (format checking)
fprintf_function uses format checking with GCC_FMT_ATTR.
tcg: Fix compiler error (comparison of unsigned expression)
When qemu is configured with --enable-debug-tcg,gcc throws this warning (or error with -Werror):
tcg/tcg.c:1030: error: comparison of unsigned expression >= 0 is always true
Fix it by removing the >= 0 part....
TCG: Revert ppc64 tcg_out_movi32 change
3b6dac34161bc0a342336072643c2f6d17e0ec45 apparently broke the ppc64 TCG targetcompilation in the code path without guest base.
Reverting this line fixes the build.
Signed-off-by: Andreas F?rber <andreas.faerber@web.de>...
TCG: Fix Darwin/ppc calling convention recognition
5da79c86a3744e3a901c7986c109dd06951befd2 broke compilation on Mac OS X v10.5 ppc.Apple's GCC 4.0.1 does not define _CALL_DARWIN. Recognize APPLE again as well.
tcg-s390: new TCG Target
Original patch from Ulrich Hecht, further work from Alexander Grafand Richard Henderson.
Cc: Ulrich Hecht <uli@suse.de>Cc: Alexander Graf <agraf@suse.de>Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
tcg-ppc: Conditionally reserve TCG_GUEST_BASE_REG.
We need not reserve the register unless we're going to use it.
tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.
Some hosts (amd64, ia64) have an ABI that ignores the high bitsof the 64-bit register when passing 32-bit arguments. Othersrequire the value to be properly sign-extended for the type.I.e. "int32_t" must be sign-extended and "uint32_t" must be...
tcg: fix DEF macro after commit c61aaf7a388c4ad95d8b546fdb9267dc01183317
tcg-s390: Icache flush is a no-op.
Before gcc 4.2, builtin_clear_cache doesn't exist, andafterward the gcc s390 backend implements it as nothing.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>