root / hw / fw_cfg.c @ a8a358bf
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1 | 3cce6243 | blueswir1 | /*
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2 | 3cce6243 | blueswir1 | * QEMU Firmware configuration device emulation
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3 | 3cce6243 | blueswir1 | *
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4 | 3cce6243 | blueswir1 | * Copyright (c) 2008 Gleb Natapov
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5 | 3cce6243 | blueswir1 | *
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6 | 3cce6243 | blueswir1 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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7 | 3cce6243 | blueswir1 | * of this software and associated documentation files (the "Software"), to deal
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8 | 3cce6243 | blueswir1 | * in the Software without restriction, including without limitation the rights
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9 | 3cce6243 | blueswir1 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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10 | 3cce6243 | blueswir1 | * copies of the Software, and to permit persons to whom the Software is
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11 | 3cce6243 | blueswir1 | * furnished to do so, subject to the following conditions:
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12 | 3cce6243 | blueswir1 | *
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13 | 3cce6243 | blueswir1 | * The above copyright notice and this permission notice shall be included in
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14 | 3cce6243 | blueswir1 | * all copies or substantial portions of the Software.
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15 | 3cce6243 | blueswir1 | *
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16 | 3cce6243 | blueswir1 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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17 | 3cce6243 | blueswir1 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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18 | 3cce6243 | blueswir1 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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19 | 3cce6243 | blueswir1 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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20 | 3cce6243 | blueswir1 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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21 | 3cce6243 | blueswir1 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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22 | 3cce6243 | blueswir1 | * THE SOFTWARE.
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23 | 3cce6243 | blueswir1 | */
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24 | 3cce6243 | blueswir1 | #include "hw.h" |
25 | 084a197a | blueswir1 | #include "sysemu.h" |
26 | 3cce6243 | blueswir1 | #include "isa.h" |
27 | 3cce6243 | blueswir1 | #include "fw_cfg.h" |
28 | 3cce6243 | blueswir1 | |
29 | 3cce6243 | blueswir1 | /* debug firmware config */
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30 | 3cce6243 | blueswir1 | //#define DEBUG_FW_CFG
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31 | 3cce6243 | blueswir1 | |
32 | 3cce6243 | blueswir1 | #ifdef DEBUG_FW_CFG
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33 | 001faf32 | Blue Swirl | #define FW_CFG_DPRINTF(fmt, ...) \
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34 | 001faf32 | Blue Swirl | do { printf("FW_CFG: " fmt , ## __VA_ARGS__); } while (0) |
35 | 3cce6243 | blueswir1 | #else
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36 | 001faf32 | Blue Swirl | #define FW_CFG_DPRINTF(fmt, ...)
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37 | 3cce6243 | blueswir1 | #endif
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38 | 3cce6243 | blueswir1 | |
39 | 3cce6243 | blueswir1 | #define FW_CFG_SIZE 2 |
40 | 3cce6243 | blueswir1 | |
41 | 3cce6243 | blueswir1 | typedef struct _FWCfgEntry { |
42 | 3cce6243 | blueswir1 | uint16_t len; |
43 | 3cce6243 | blueswir1 | uint8_t *data; |
44 | 3cce6243 | blueswir1 | void *callback_opaque;
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45 | 3cce6243 | blueswir1 | FWCfgCallback callback; |
46 | 3cce6243 | blueswir1 | } FWCfgEntry; |
47 | 3cce6243 | blueswir1 | |
48 | 3cce6243 | blueswir1 | typedef struct _FWCfgState { |
49 | 3cce6243 | blueswir1 | FWCfgEntry entries[2][FW_CFG_MAX_ENTRY];
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50 | 3cce6243 | blueswir1 | uint16_t cur_entry; |
51 | 3cce6243 | blueswir1 | uint16_t cur_offset; |
52 | 3cce6243 | blueswir1 | } FWCfgState; |
53 | 3cce6243 | blueswir1 | |
54 | 3cce6243 | blueswir1 | static void fw_cfg_write(FWCfgState *s, uint8_t value) |
55 | 3cce6243 | blueswir1 | { |
56 | 3cce6243 | blueswir1 | int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
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57 | 3cce6243 | blueswir1 | FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK]; |
58 | 3cce6243 | blueswir1 | |
59 | 3cce6243 | blueswir1 | FW_CFG_DPRINTF("write %d\n", value);
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60 | 3cce6243 | blueswir1 | |
61 | 3cce6243 | blueswir1 | if (s->cur_entry & FW_CFG_WRITE_CHANNEL && s->cur_offset < e->len) {
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62 | 3cce6243 | blueswir1 | e->data[s->cur_offset++] = value; |
63 | 3cce6243 | blueswir1 | if (s->cur_offset == e->len) {
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64 | 3cce6243 | blueswir1 | e->callback(e->callback_opaque, e->data); |
65 | 3cce6243 | blueswir1 | s->cur_offset = 0;
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66 | 3cce6243 | blueswir1 | } |
67 | 3cce6243 | blueswir1 | } |
68 | 3cce6243 | blueswir1 | } |
69 | 3cce6243 | blueswir1 | |
70 | 3cce6243 | blueswir1 | static int fw_cfg_select(FWCfgState *s, uint16_t key) |
71 | 3cce6243 | blueswir1 | { |
72 | 3cce6243 | blueswir1 | int ret;
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73 | 3cce6243 | blueswir1 | |
74 | 3cce6243 | blueswir1 | s->cur_offset = 0;
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75 | 3cce6243 | blueswir1 | if ((key & FW_CFG_ENTRY_MASK) >= FW_CFG_MAX_ENTRY) {
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76 | 3cce6243 | blueswir1 | s->cur_entry = FW_CFG_INVALID; |
77 | 3cce6243 | blueswir1 | ret = 0;
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78 | 3cce6243 | blueswir1 | } else {
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79 | 3cce6243 | blueswir1 | s->cur_entry = key; |
80 | 3cce6243 | blueswir1 | ret = 1;
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81 | 3cce6243 | blueswir1 | } |
82 | 3cce6243 | blueswir1 | |
83 | 3cce6243 | blueswir1 | FW_CFG_DPRINTF("select key %d (%sfound)\n", key, ret ? "" : "not "); |
84 | 3cce6243 | blueswir1 | |
85 | 3cce6243 | blueswir1 | return ret;
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86 | 3cce6243 | blueswir1 | } |
87 | 3cce6243 | blueswir1 | |
88 | 3cce6243 | blueswir1 | static uint8_t fw_cfg_read(FWCfgState *s)
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89 | 3cce6243 | blueswir1 | { |
90 | 3cce6243 | blueswir1 | int arch = !!(s->cur_entry & FW_CFG_ARCH_LOCAL);
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91 | 3cce6243 | blueswir1 | FWCfgEntry *e = &s->entries[arch][s->cur_entry & FW_CFG_ENTRY_MASK]; |
92 | 3cce6243 | blueswir1 | uint8_t ret; |
93 | 3cce6243 | blueswir1 | |
94 | 3cce6243 | blueswir1 | if (s->cur_entry == FW_CFG_INVALID || !e->data || s->cur_offset >= e->len)
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95 | 3cce6243 | blueswir1 | ret = 0;
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96 | 3cce6243 | blueswir1 | else
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97 | 3cce6243 | blueswir1 | ret = e->data[s->cur_offset++]; |
98 | 3cce6243 | blueswir1 | |
99 | 3cce6243 | blueswir1 | FW_CFG_DPRINTF("read %d\n", ret);
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100 | 3cce6243 | blueswir1 | |
101 | 3cce6243 | blueswir1 | return ret;
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102 | 3cce6243 | blueswir1 | } |
103 | 3cce6243 | blueswir1 | |
104 | 3cce6243 | blueswir1 | static uint32_t fw_cfg_io_readb(void *opaque, uint32_t addr) |
105 | 3cce6243 | blueswir1 | { |
106 | 3cce6243 | blueswir1 | return fw_cfg_read(opaque);
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107 | 3cce6243 | blueswir1 | } |
108 | 3cce6243 | blueswir1 | |
109 | 3cce6243 | blueswir1 | static void fw_cfg_io_writeb(void *opaque, uint32_t addr, uint32_t value) |
110 | 3cce6243 | blueswir1 | { |
111 | 7442511c | blueswir1 | fw_cfg_write(opaque, (uint8_t)value); |
112 | 3cce6243 | blueswir1 | } |
113 | 3cce6243 | blueswir1 | |
114 | 3cce6243 | blueswir1 | static void fw_cfg_io_writew(void *opaque, uint32_t addr, uint32_t value) |
115 | 3cce6243 | blueswir1 | { |
116 | 3cce6243 | blueswir1 | fw_cfg_select(opaque, (uint16_t)value); |
117 | 3cce6243 | blueswir1 | } |
118 | 3cce6243 | blueswir1 | |
119 | 3cce6243 | blueswir1 | static uint32_t fw_cfg_mem_readb(void *opaque, target_phys_addr_t addr) |
120 | 3cce6243 | blueswir1 | { |
121 | 3cce6243 | blueswir1 | return fw_cfg_read(opaque);
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122 | 3cce6243 | blueswir1 | } |
123 | 3cce6243 | blueswir1 | |
124 | 3cce6243 | blueswir1 | static void fw_cfg_mem_writeb(void *opaque, target_phys_addr_t addr, |
125 | 3cce6243 | blueswir1 | uint32_t value) |
126 | 3cce6243 | blueswir1 | { |
127 | 7442511c | blueswir1 | fw_cfg_write(opaque, (uint8_t)value); |
128 | 3cce6243 | blueswir1 | } |
129 | 3cce6243 | blueswir1 | |
130 | 3cce6243 | blueswir1 | static void fw_cfg_mem_writew(void *opaque, target_phys_addr_t addr, |
131 | 3cce6243 | blueswir1 | uint32_t value) |
132 | 3cce6243 | blueswir1 | { |
133 | 3cce6243 | blueswir1 | fw_cfg_select(opaque, (uint16_t)value); |
134 | 3cce6243 | blueswir1 | } |
135 | 3cce6243 | blueswir1 | |
136 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const fw_cfg_ctl_mem_read[3] = { |
137 | 3cce6243 | blueswir1 | NULL,
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138 | 3cce6243 | blueswir1 | NULL,
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139 | 3cce6243 | blueswir1 | NULL,
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140 | 3cce6243 | blueswir1 | }; |
141 | 3cce6243 | blueswir1 | |
142 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const fw_cfg_ctl_mem_write[3] = { |
143 | 3cce6243 | blueswir1 | NULL,
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144 | 3cce6243 | blueswir1 | fw_cfg_mem_writew, |
145 | 3cce6243 | blueswir1 | NULL,
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146 | 3cce6243 | blueswir1 | }; |
147 | 3cce6243 | blueswir1 | |
148 | d60efc6b | Blue Swirl | static CPUReadMemoryFunc * const fw_cfg_data_mem_read[3] = { |
149 | 3cce6243 | blueswir1 | fw_cfg_mem_readb, |
150 | 3cce6243 | blueswir1 | NULL,
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151 | 3cce6243 | blueswir1 | NULL,
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152 | 3cce6243 | blueswir1 | }; |
153 | 3cce6243 | blueswir1 | |
154 | d60efc6b | Blue Swirl | static CPUWriteMemoryFunc * const fw_cfg_data_mem_write[3] = { |
155 | 3cce6243 | blueswir1 | fw_cfg_mem_writeb, |
156 | 3cce6243 | blueswir1 | NULL,
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157 | 3cce6243 | blueswir1 | NULL,
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158 | 3cce6243 | blueswir1 | }; |
159 | 3cce6243 | blueswir1 | |
160 | 3cce6243 | blueswir1 | static void fw_cfg_reset(void *opaque) |
161 | 3cce6243 | blueswir1 | { |
162 | 3cce6243 | blueswir1 | FWCfgState *s = opaque; |
163 | 3cce6243 | blueswir1 | |
164 | 3cce6243 | blueswir1 | fw_cfg_select(s, 0);
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165 | 3cce6243 | blueswir1 | } |
166 | 3cce6243 | blueswir1 | |
167 | 3cce6243 | blueswir1 | static void fw_cfg_save(QEMUFile *f, void *opaque) |
168 | 3cce6243 | blueswir1 | { |
169 | 3cce6243 | blueswir1 | FWCfgState *s = opaque; |
170 | 3cce6243 | blueswir1 | |
171 | 3cce6243 | blueswir1 | qemu_put_be16s(f, &s->cur_entry); |
172 | 3cce6243 | blueswir1 | qemu_put_be16s(f, &s->cur_offset); |
173 | 3cce6243 | blueswir1 | } |
174 | 3cce6243 | blueswir1 | |
175 | 3cce6243 | blueswir1 | static int fw_cfg_load(QEMUFile *f, void *opaque, int version_id) |
176 | 3cce6243 | blueswir1 | { |
177 | 3cce6243 | blueswir1 | FWCfgState *s = opaque; |
178 | 3cce6243 | blueswir1 | |
179 | 3cce6243 | blueswir1 | if (version_id > 1) |
180 | 3cce6243 | blueswir1 | return -EINVAL;
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181 | 3cce6243 | blueswir1 | |
182 | 3cce6243 | blueswir1 | qemu_get_be16s(f, &s->cur_entry); |
183 | 3cce6243 | blueswir1 | qemu_get_be16s(f, &s->cur_offset); |
184 | 3cce6243 | blueswir1 | |
185 | 3cce6243 | blueswir1 | return 0; |
186 | 3cce6243 | blueswir1 | } |
187 | 3cce6243 | blueswir1 | |
188 | 3cce6243 | blueswir1 | int fw_cfg_add_bytes(void *opaque, uint16_t key, uint8_t *data, uint16_t len) |
189 | 3cce6243 | blueswir1 | { |
190 | 3cce6243 | blueswir1 | FWCfgState *s = opaque; |
191 | 3cce6243 | blueswir1 | int arch = !!(key & FW_CFG_ARCH_LOCAL);
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192 | 3cce6243 | blueswir1 | |
193 | 3cce6243 | blueswir1 | key &= FW_CFG_ENTRY_MASK; |
194 | 3cce6243 | blueswir1 | |
195 | 3cce6243 | blueswir1 | if (key >= FW_CFG_MAX_ENTRY)
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196 | 3cce6243 | blueswir1 | return 0; |
197 | 3cce6243 | blueswir1 | |
198 | 3cce6243 | blueswir1 | s->entries[arch][key].data = data; |
199 | 3cce6243 | blueswir1 | s->entries[arch][key].len = len; |
200 | 3cce6243 | blueswir1 | |
201 | 3cce6243 | blueswir1 | return 1; |
202 | 3cce6243 | blueswir1 | } |
203 | 3cce6243 | blueswir1 | |
204 | 3cce6243 | blueswir1 | int fw_cfg_add_i16(void *opaque, uint16_t key, uint16_t value) |
205 | 3cce6243 | blueswir1 | { |
206 | 3cce6243 | blueswir1 | uint16_t *copy; |
207 | 3cce6243 | blueswir1 | |
208 | 3cce6243 | blueswir1 | copy = qemu_malloc(sizeof(value));
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209 | 3cce6243 | blueswir1 | *copy = cpu_to_le16(value); |
210 | 3cce6243 | blueswir1 | return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value)); |
211 | 3cce6243 | blueswir1 | } |
212 | 3cce6243 | blueswir1 | |
213 | 3cce6243 | blueswir1 | int fw_cfg_add_i32(void *opaque, uint16_t key, uint32_t value) |
214 | 3cce6243 | blueswir1 | { |
215 | 3cce6243 | blueswir1 | uint32_t *copy; |
216 | 3cce6243 | blueswir1 | |
217 | 3cce6243 | blueswir1 | copy = qemu_malloc(sizeof(value));
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218 | 3cce6243 | blueswir1 | *copy = cpu_to_le32(value); |
219 | 3cce6243 | blueswir1 | return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value)); |
220 | 3cce6243 | blueswir1 | } |
221 | 3cce6243 | blueswir1 | |
222 | 3cce6243 | blueswir1 | int fw_cfg_add_i64(void *opaque, uint16_t key, uint64_t value) |
223 | 3cce6243 | blueswir1 | { |
224 | 3cce6243 | blueswir1 | uint64_t *copy; |
225 | 3cce6243 | blueswir1 | |
226 | 3cce6243 | blueswir1 | copy = qemu_malloc(sizeof(value));
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227 | 3cce6243 | blueswir1 | *copy = cpu_to_le64(value); |
228 | 3cce6243 | blueswir1 | return fw_cfg_add_bytes(opaque, key, (uint8_t *)copy, sizeof(value)); |
229 | 3cce6243 | blueswir1 | } |
230 | 3cce6243 | blueswir1 | |
231 | 3cce6243 | blueswir1 | int fw_cfg_add_callback(void *opaque, uint16_t key, FWCfgCallback callback, |
232 | 3cce6243 | blueswir1 | void *callback_opaque, uint8_t *data, size_t len)
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233 | 3cce6243 | blueswir1 | { |
234 | 3cce6243 | blueswir1 | FWCfgState *s = opaque; |
235 | 3cce6243 | blueswir1 | int arch = !!(key & FW_CFG_ARCH_LOCAL);
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236 | 3cce6243 | blueswir1 | |
237 | 85df0de4 | blueswir1 | if (!(key & FW_CFG_WRITE_CHANNEL))
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238 | 85df0de4 | blueswir1 | return 0; |
239 | 85df0de4 | blueswir1 | |
240 | 3cce6243 | blueswir1 | key &= FW_CFG_ENTRY_MASK; |
241 | 3cce6243 | blueswir1 | |
242 | 85df0de4 | blueswir1 | if (key >= FW_CFG_MAX_ENTRY || len > 65535) |
243 | 3cce6243 | blueswir1 | return 0; |
244 | 3cce6243 | blueswir1 | |
245 | 3cce6243 | blueswir1 | s->entries[arch][key].data = data; |
246 | 3cce6243 | blueswir1 | s->entries[arch][key].len = len; |
247 | 3cce6243 | blueswir1 | s->entries[arch][key].callback_opaque = callback_opaque; |
248 | 3cce6243 | blueswir1 | s->entries[arch][key].callback = callback; |
249 | 3cce6243 | blueswir1 | |
250 | 3cce6243 | blueswir1 | return 1; |
251 | 3cce6243 | blueswir1 | } |
252 | 3cce6243 | blueswir1 | |
253 | 3cce6243 | blueswir1 | void *fw_cfg_init(uint32_t ctl_port, uint32_t data_port,
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254 | 3cce6243 | blueswir1 | target_phys_addr_t ctl_addr, target_phys_addr_t data_addr) |
255 | 3cce6243 | blueswir1 | { |
256 | 3cce6243 | blueswir1 | FWCfgState *s; |
257 | 3cce6243 | blueswir1 | int io_ctl_memory, io_data_memory;
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258 | 3cce6243 | blueswir1 | |
259 | 3cce6243 | blueswir1 | s = qemu_mallocz(sizeof(FWCfgState));
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260 | 3cce6243 | blueswir1 | |
261 | 3cce6243 | blueswir1 | if (ctl_port) {
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262 | 3cce6243 | blueswir1 | register_ioport_write(ctl_port, 2, 2, fw_cfg_io_writew, s); |
263 | 3cce6243 | blueswir1 | } |
264 | 3cce6243 | blueswir1 | if (data_port) {
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265 | 3cce6243 | blueswir1 | register_ioport_read(data_port, 1, 1, fw_cfg_io_readb, s); |
266 | 3cce6243 | blueswir1 | register_ioport_write(data_port, 1, 1, fw_cfg_io_writeb, s); |
267 | 3cce6243 | blueswir1 | } |
268 | 3cce6243 | blueswir1 | if (ctl_addr) {
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269 | 1eed09cb | Avi Kivity | io_ctl_memory = cpu_register_io_memory(fw_cfg_ctl_mem_read, |
270 | 3cce6243 | blueswir1 | fw_cfg_ctl_mem_write, s); |
271 | 3cce6243 | blueswir1 | cpu_register_physical_memory(ctl_addr, FW_CFG_SIZE, io_ctl_memory); |
272 | 3cce6243 | blueswir1 | } |
273 | 3cce6243 | blueswir1 | if (data_addr) {
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274 | 1eed09cb | Avi Kivity | io_data_memory = cpu_register_io_memory(fw_cfg_data_mem_read, |
275 | 3cce6243 | blueswir1 | fw_cfg_data_mem_write, s); |
276 | 3cce6243 | blueswir1 | cpu_register_physical_memory(data_addr, FW_CFG_SIZE, io_data_memory); |
277 | 3cce6243 | blueswir1 | } |
278 | 3cce6243 | blueswir1 | fw_cfg_add_bytes(s, FW_CFG_SIGNATURE, (uint8_t *)"QEMU", 4); |
279 | 084a197a | blueswir1 | fw_cfg_add_bytes(s, FW_CFG_UUID, qemu_uuid, 16);
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280 | 993fbfdb | Anthony Liguori | fw_cfg_add_i16(s, FW_CFG_NOGRAPHIC, (uint16_t)(display_type == DT_NOGRAPHIC)); |
281 | 905fdcb5 | blueswir1 | fw_cfg_add_i16(s, FW_CFG_NB_CPUS, (uint16_t)smp_cpus); |
282 | 6be68d7e | Jes Sorensen | fw_cfg_add_i16(s, FW_CFG_MAX_CPUS, (uint16_t)max_cpus); |
283 | 95387491 | Jan Kiszka | fw_cfg_add_i16(s, FW_CFG_BOOT_MENU, (uint16_t)boot_menu); |
284 | 905fdcb5 | blueswir1 | |
285 | 3cce6243 | blueswir1 | register_savevm("fw_cfg", -1, 1, fw_cfg_save, fw_cfg_load, s); |
286 | a08d4367 | Jan Kiszka | qemu_register_reset(fw_cfg_reset, s); |
287 | 3cce6243 | blueswir1 | fw_cfg_reset(s); |
288 | 3cce6243 | blueswir1 | |
289 | 3cce6243 | blueswir1 | return s;
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290 | 3cce6243 | blueswir1 | } |