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1 80cabfad bellard
/*
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 * QEMU PC System Emulator
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 *
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 * Copyright (c) 2003-2004 Fabrice Bellard
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 80cabfad bellard
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
24 87ecb68b pbrook
#include "hw.h"
25 87ecb68b pbrook
#include "pc.h"
26 87ecb68b pbrook
#include "fdc.h"
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#include "pci.h"
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#include "block.h"
29 87ecb68b pbrook
#include "sysemu.h"
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#include "audio/audio.h"
31 87ecb68b pbrook
#include "net.h"
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#include "smbus.h"
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#include "boards.h"
34 376253ec aliguori
#include "monitor.h"
35 3cce6243 blueswir1
#include "fw_cfg.h"
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#include "hpet_emul.h"
37 9dd986cc Richard W.M. Jones
#include "watchdog.h"
38 b6f6e3d3 aliguori
#include "smbios.h"
39 80cabfad bellard
40 b41a2cd1 bellard
/* output Bochs bios info messages */
41 b41a2cd1 bellard
//#define DEBUG_BIOS
42 b41a2cd1 bellard
43 f16408df Alexander Graf
/* Show multiboot debug output */
44 f16408df Alexander Graf
//#define DEBUG_MULTIBOOT
45 f16408df Alexander Graf
46 80cabfad bellard
#define BIOS_FILENAME "bios.bin"
47 80cabfad bellard
#define VGABIOS_FILENAME "vgabios.bin"
48 de9258a8 bellard
#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
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50 7fb4fdcf balrog
#define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
51 7fb4fdcf balrog
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
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#define ACPI_DATA_SIZE       0x10000
54 3cce6243 blueswir1
#define BIOS_CFG_IOPORT 0x510
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#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
56 b6f6e3d3 aliguori
#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
57 6b35e7bf Jes Sorensen
#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
58 80cabfad bellard
59 e4bcb14c ths
#define MAX_IDE_BUS 2
60 e4bcb14c ths
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static PCIDevice *i440fx_state;
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typedef struct rom_reset_data {
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    uint8_t *data;
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    target_phys_addr_t addr;
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    unsigned size;
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} RomResetData;
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static void option_rom_reset(void *_rrd)
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{
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    RomResetData *rrd = _rrd;
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    cpu_physical_memory_write_rom(rrd->addr, rrd->data, rrd->size);
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}
78 e28f9884 Glauber Costa
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static void option_rom_setup_reset(target_phys_addr_t addr, unsigned size)
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{
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    RomResetData *rrd = qemu_malloc(sizeof *rrd);
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    rrd->data = qemu_malloc(size);
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    cpu_physical_memory_read(addr, rrd->data, size);
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    rrd->addr = addr;
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    rrd->size = size;
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    qemu_register_reset(option_rom_reset, rrd);
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}
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typedef struct isa_irq_state {
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    qemu_irq *i8259;
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    qemu_irq *ioapic;
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} IsaIrqState;
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static void isa_irq_handler(void *opaque, int n, int level)
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{
97 1452411b Avi Kivity
    IsaIrqState *isa = (IsaIrqState *)opaque;
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    if (n < 16) {
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        qemu_set_irq(isa->i8259[n], level);
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    }
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    qemu_set_irq(isa->ioapic[n], level);
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};
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
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{
107 80cabfad bellard
}
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/* MSDOS compatibility mode FPU exception support */
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static qemu_irq ferr_irq;
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{
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    qemu_irq_raise(ferr_irq);
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}
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
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{
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    qemu_irq_lower(ferr_irq);
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}
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env)
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{
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    return cpu_get_ticks();
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}
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/* SMM support */
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void cpu_smm_update(CPUState *env)
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{
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    if (i440fx_state && env == first_cpu)
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        i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
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}
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{
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    int intno;
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    intno = apic_get_interrupt(env);
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    if (intno >= 0) {
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        /* set irq request if a PIC irq is still pending */
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        /* XXX: improve that */
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        pic_update_irq(isa_pic);
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        return intno;
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    }
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    /* read the irq from the PIC */
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    if (!apic_accept_pic_intr(env))
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        return -1;
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    intno = pic_read_irq(isa_pic);
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    return intno;
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}
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static void pic_irq_request(void *opaque, int irq, int level)
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{
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    CPUState *env = first_cpu;
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    if (env->apic_state) {
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        while (env) {
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            if (apic_accept_pic_intr(env))
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                apic_deliver_pic_intr(env, level);
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            env = env->next_cpu;
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        }
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    } else {
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        if (level)
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            cpu_interrupt(env, CPU_INTERRUPT_HARD);
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        else
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            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
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    }
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}
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/* PC cmos mappings */
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#define REG_EQUIPMENT_BYTE          0x14
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static int cmos_get_fd_drive_type(int fd0)
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{
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    int val;
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    switch (fd0) {
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    case 0:
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        /* 1.44 Mb 3"5 drive */
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        val = 4;
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        break;
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    case 1:
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        /* 2.88 Mb 3"5 drive */
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        val = 5;
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        break;
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    case 2:
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        /* 1.2 Mb 5"5 drive */
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        val = 2;
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        break;
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    default:
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        val = 0;
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        break;
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    }
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    return val;
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}
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
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{
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    RTCState *s = rtc_state;
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    int cylinders, heads, sectors;
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    bdrv_get_geometry_hint(hd, &cylinders, &heads, &sectors);
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    rtc_set_memory(s, type_ofs, 47);
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    rtc_set_memory(s, info_ofs, cylinders);
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    rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 2, heads);
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    rtc_set_memory(s, info_ofs + 3, 0xff);
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    rtc_set_memory(s, info_ofs + 4, 0xff);
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    rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
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    rtc_set_memory(s, info_ofs + 6, cylinders);
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    rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
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    rtc_set_memory(s, info_ofs + 8, sectors);
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}
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/* convert boot_device letter to something recognizable by the bios */
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static int boot_device2nibble(char boot_device)
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{
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    switch(boot_device) {
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    case 'a':
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    case 'b':
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        return 0x01; /* floppy boot */
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    case 'c':
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        return 0x02; /* hard drive boot */
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    case 'd':
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        return 0x03; /* CD-ROM boot */
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    case 'n':
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        return 0x04; /* Network boot */
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    }
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    return 0;
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}
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/* copy/pasted from cmos_init, should be made a general function
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 and used there as well */
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static int pc_boot_set(void *opaque, const char *boot_device)
239 0ecdffbb aurel32
{
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    Monitor *mon = cur_mon;
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#define PC_MAX_BOOT_DEVICES 3
242 3b4366de blueswir1
    RTCState *s = (RTCState *)opaque;
243 0ecdffbb aurel32
    int nbds, bds[3] = { 0, };
244 0ecdffbb aurel32
    int i;
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246 0ecdffbb aurel32
    nbds = strlen(boot_device);
247 0ecdffbb aurel32
    if (nbds > PC_MAX_BOOT_DEVICES) {
248 376253ec aliguori
        monitor_printf(mon, "Too many boot devices for PC\n");
249 0ecdffbb aurel32
        return(1);
250 0ecdffbb aurel32
    }
251 0ecdffbb aurel32
    for (i = 0; i < nbds; i++) {
252 0ecdffbb aurel32
        bds[i] = boot_device2nibble(boot_device[i]);
253 0ecdffbb aurel32
        if (bds[i] == 0) {
254 376253ec aliguori
            monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
255 376253ec aliguori
                           boot_device[i]);
256 0ecdffbb aurel32
            return(1);
257 0ecdffbb aurel32
        }
258 0ecdffbb aurel32
    }
259 0ecdffbb aurel32
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
260 0ecdffbb aurel32
    rtc_set_memory(s, 0x38, (bds[2] << 4));
261 0ecdffbb aurel32
    return(0);
262 0ecdffbb aurel32
}
263 0ecdffbb aurel32
264 ba6c2377 bellard
/* hd_table must contain 4 block drivers */
265 00f82b8a aurel32
static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
266 00f82b8a aurel32
                      const char *boot_device, BlockDriverState **hd_table)
267 80cabfad bellard
{
268 b0a21b53 bellard
    RTCState *s = rtc_state;
269 28c5af54 j_mayer
    int nbds, bds[3] = { 0, };
270 80cabfad bellard
    int val;
271 b41a2cd1 bellard
    int fd0, fd1, nb;
272 ba6c2377 bellard
    int i;
273 b0a21b53 bellard
274 b0a21b53 bellard
    /* various important CMOS locations needed by PC/Bochs bios */
275 80cabfad bellard
276 80cabfad bellard
    /* memory size */
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    val = 640; /* base memory in K */
278 333190eb bellard
    rtc_set_memory(s, 0x15, val);
279 333190eb bellard
    rtc_set_memory(s, 0x16, val >> 8);
280 333190eb bellard
281 80cabfad bellard
    val = (ram_size / 1024) - 1024;
282 80cabfad bellard
    if (val > 65535)
283 80cabfad bellard
        val = 65535;
284 b0a21b53 bellard
    rtc_set_memory(s, 0x17, val);
285 b0a21b53 bellard
    rtc_set_memory(s, 0x18, val >> 8);
286 b0a21b53 bellard
    rtc_set_memory(s, 0x30, val);
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    rtc_set_memory(s, 0x31, val >> 8);
288 80cabfad bellard
289 00f82b8a aurel32
    if (above_4g_mem_size) {
290 00f82b8a aurel32
        rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
291 00f82b8a aurel32
        rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
292 00f82b8a aurel32
        rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
293 00f82b8a aurel32
    }
294 00f82b8a aurel32
295 9da98861 bellard
    if (ram_size > (16 * 1024 * 1024))
296 9da98861 bellard
        val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
297 9da98861 bellard
    else
298 9da98861 bellard
        val = 0;
299 80cabfad bellard
    if (val > 65535)
300 80cabfad bellard
        val = 65535;
301 b0a21b53 bellard
    rtc_set_memory(s, 0x34, val);
302 b0a21b53 bellard
    rtc_set_memory(s, 0x35, val >> 8);
303 3b46e624 ths
304 298e01b6 aurel32
    /* set the number of CPU */
305 298e01b6 aurel32
    rtc_set_memory(s, 0x5f, smp_cpus - 1);
306 298e01b6 aurel32
307 6ac0e82d balrog
    /* set boot devices, and disable floppy signature check if requested */
308 28c5af54 j_mayer
#define PC_MAX_BOOT_DEVICES 3
309 28c5af54 j_mayer
    nbds = strlen(boot_device);
310 28c5af54 j_mayer
    if (nbds > PC_MAX_BOOT_DEVICES) {
311 28c5af54 j_mayer
        fprintf(stderr, "Too many boot devices for PC\n");
312 28c5af54 j_mayer
        exit(1);
313 28c5af54 j_mayer
    }
314 28c5af54 j_mayer
    for (i = 0; i < nbds; i++) {
315 28c5af54 j_mayer
        bds[i] = boot_device2nibble(boot_device[i]);
316 28c5af54 j_mayer
        if (bds[i] == 0) {
317 28c5af54 j_mayer
            fprintf(stderr, "Invalid boot device for PC: '%c'\n",
318 28c5af54 j_mayer
                    boot_device[i]);
319 28c5af54 j_mayer
            exit(1);
320 28c5af54 j_mayer
        }
321 28c5af54 j_mayer
    }
322 28c5af54 j_mayer
    rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
323 28c5af54 j_mayer
    rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ?  0x0 : 0x1));
324 80cabfad bellard
325 b41a2cd1 bellard
    /* floppy type */
326 b41a2cd1 bellard
327 baca51fa bellard
    fd0 = fdctrl_get_drive_type(floppy_controller, 0);
328 baca51fa bellard
    fd1 = fdctrl_get_drive_type(floppy_controller, 1);
329 80cabfad bellard
330 777428f2 bellard
    val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
331 b0a21b53 bellard
    rtc_set_memory(s, 0x10, val);
332 3b46e624 ths
333 b0a21b53 bellard
    val = 0;
334 b41a2cd1 bellard
    nb = 0;
335 80cabfad bellard
    if (fd0 < 3)
336 80cabfad bellard
        nb++;
337 80cabfad bellard
    if (fd1 < 3)
338 80cabfad bellard
        nb++;
339 80cabfad bellard
    switch (nb) {
340 80cabfad bellard
    case 0:
341 80cabfad bellard
        break;
342 80cabfad bellard
    case 1:
343 b0a21b53 bellard
        val |= 0x01; /* 1 drive, ready for boot */
344 80cabfad bellard
        break;
345 80cabfad bellard
    case 2:
346 b0a21b53 bellard
        val |= 0x41; /* 2 drives, ready for boot */
347 80cabfad bellard
        break;
348 80cabfad bellard
    }
349 b0a21b53 bellard
    val |= 0x02; /* FPU is there */
350 b0a21b53 bellard
    val |= 0x04; /* PS/2 mouse installed */
351 b0a21b53 bellard
    rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
352 b0a21b53 bellard
353 ba6c2377 bellard
    /* hard drives */
354 ba6c2377 bellard
355 ba6c2377 bellard
    rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
356 ba6c2377 bellard
    if (hd_table[0])
357 ba6c2377 bellard
        cmos_init_hd(0x19, 0x1b, hd_table[0]);
358 5fafdf24 ths
    if (hd_table[1])
359 ba6c2377 bellard
        cmos_init_hd(0x1a, 0x24, hd_table[1]);
360 ba6c2377 bellard
361 ba6c2377 bellard
    val = 0;
362 40b6ecc6 bellard
    for (i = 0; i < 4; i++) {
363 ba6c2377 bellard
        if (hd_table[i]) {
364 46d4767d bellard
            int cylinders, heads, sectors, translation;
365 46d4767d bellard
            /* NOTE: bdrv_get_geometry_hint() returns the physical
366 46d4767d bellard
                geometry.  It is always such that: 1 <= sects <= 63, 1
367 46d4767d bellard
                <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
368 46d4767d bellard
                geometry can be different if a translation is done. */
369 46d4767d bellard
            translation = bdrv_get_translation_hint(hd_table[i]);
370 46d4767d bellard
            if (translation == BIOS_ATA_TRANSLATION_AUTO) {
371 46d4767d bellard
                bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, &sectors);
372 46d4767d bellard
                if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
373 46d4767d bellard
                    /* No translation. */
374 46d4767d bellard
                    translation = 0;
375 46d4767d bellard
                } else {
376 46d4767d bellard
                    /* LBA translation. */
377 46d4767d bellard
                    translation = 1;
378 46d4767d bellard
                }
379 40b6ecc6 bellard
            } else {
380 46d4767d bellard
                translation--;
381 ba6c2377 bellard
            }
382 ba6c2377 bellard
            val |= translation << (i * 2);
383 ba6c2377 bellard
        }
384 40b6ecc6 bellard
    }
385 ba6c2377 bellard
    rtc_set_memory(s, 0x39, val);
386 80cabfad bellard
}
387 80cabfad bellard
388 59b8ad81 bellard
void ioport_set_a20(int enable)
389 59b8ad81 bellard
{
390 59b8ad81 bellard
    /* XXX: send to all CPUs ? */
391 59b8ad81 bellard
    cpu_x86_set_a20(first_cpu, enable);
392 59b8ad81 bellard
}
393 59b8ad81 bellard
394 59b8ad81 bellard
int ioport_get_a20(void)
395 59b8ad81 bellard
{
396 59b8ad81 bellard
    return ((first_cpu->a20_mask >> 20) & 1);
397 59b8ad81 bellard
}
398 59b8ad81 bellard
399 e1a23744 bellard
static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
400 e1a23744 bellard
{
401 59b8ad81 bellard
    ioport_set_a20((val >> 1) & 1);
402 e1a23744 bellard
    /* XXX: bit 0 is fast reset */
403 e1a23744 bellard
}
404 e1a23744 bellard
405 e1a23744 bellard
static uint32_t ioport92_read(void *opaque, uint32_t addr)
406 e1a23744 bellard
{
407 59b8ad81 bellard
    return ioport_get_a20() << 1;
408 e1a23744 bellard
}
409 e1a23744 bellard
410 80cabfad bellard
/***********************************************************/
411 80cabfad bellard
/* Bochs BIOS debug ports */
412 80cabfad bellard
413 9596ebb7 pbrook
static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
414 80cabfad bellard
{
415 a2f659ee bellard
    static const char shutdown_str[8] = "Shutdown";
416 a2f659ee bellard
    static int shutdown_index = 0;
417 3b46e624 ths
418 80cabfad bellard
    switch(addr) {
419 80cabfad bellard
        /* Bochs BIOS messages */
420 80cabfad bellard
    case 0x400:
421 80cabfad bellard
    case 0x401:
422 80cabfad bellard
        fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
423 80cabfad bellard
        exit(1);
424 80cabfad bellard
    case 0x402:
425 80cabfad bellard
    case 0x403:
426 80cabfad bellard
#ifdef DEBUG_BIOS
427 80cabfad bellard
        fprintf(stderr, "%c", val);
428 80cabfad bellard
#endif
429 80cabfad bellard
        break;
430 a2f659ee bellard
    case 0x8900:
431 a2f659ee bellard
        /* same as Bochs power off */
432 a2f659ee bellard
        if (val == shutdown_str[shutdown_index]) {
433 a2f659ee bellard
            shutdown_index++;
434 a2f659ee bellard
            if (shutdown_index == 8) {
435 a2f659ee bellard
                shutdown_index = 0;
436 a2f659ee bellard
                qemu_system_shutdown_request();
437 a2f659ee bellard
            }
438 a2f659ee bellard
        } else {
439 a2f659ee bellard
            shutdown_index = 0;
440 a2f659ee bellard
        }
441 a2f659ee bellard
        break;
442 80cabfad bellard
443 80cabfad bellard
        /* LGPL'ed VGA BIOS messages */
444 80cabfad bellard
    case 0x501:
445 80cabfad bellard
    case 0x502:
446 80cabfad bellard
        fprintf(stderr, "VGA BIOS panic, line %d\n", val);
447 80cabfad bellard
        exit(1);
448 80cabfad bellard
    case 0x500:
449 80cabfad bellard
    case 0x503:
450 80cabfad bellard
#ifdef DEBUG_BIOS
451 80cabfad bellard
        fprintf(stderr, "%c", val);
452 80cabfad bellard
#endif
453 80cabfad bellard
        break;
454 80cabfad bellard
    }
455 80cabfad bellard
}
456 80cabfad bellard
457 11c2fd3e aliguori
extern uint64_t node_cpumask[MAX_NODES];
458 11c2fd3e aliguori
459 bf483392 Alexander Graf
static void *bochs_bios_init(void)
460 80cabfad bellard
{
461 3cce6243 blueswir1
    void *fw_cfg;
462 b6f6e3d3 aliguori
    uint8_t *smbios_table;
463 b6f6e3d3 aliguori
    size_t smbios_len;
464 11c2fd3e aliguori
    uint64_t *numa_fw_cfg;
465 11c2fd3e aliguori
    int i, j;
466 3cce6243 blueswir1
467 b41a2cd1 bellard
    register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
468 b41a2cd1 bellard
    register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
469 b41a2cd1 bellard
    register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
470 b41a2cd1 bellard
    register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
471 a2f659ee bellard
    register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
472 b41a2cd1 bellard
473 b41a2cd1 bellard
    register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
474 b41a2cd1 bellard
    register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
475 b41a2cd1 bellard
    register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
476 b41a2cd1 bellard
    register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
477 3cce6243 blueswir1
478 3cce6243 blueswir1
    fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
479 bf483392 Alexander Graf
480 3cce6243 blueswir1
    fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
481 905fdcb5 blueswir1
    fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
482 80deece2 blueswir1
    fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
483 80deece2 blueswir1
                     acpi_tables_len);
484 6b35e7bf Jes Sorensen
    fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
485 b6f6e3d3 aliguori
486 b6f6e3d3 aliguori
    smbios_table = smbios_get_table(&smbios_len);
487 b6f6e3d3 aliguori
    if (smbios_table)
488 b6f6e3d3 aliguori
        fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
489 b6f6e3d3 aliguori
                         smbios_table, smbios_len);
490 11c2fd3e aliguori
491 11c2fd3e aliguori
    /* allocate memory for the NUMA channel: one (64bit) word for the number
492 11c2fd3e aliguori
     * of nodes, one word for each VCPU->node and one word for each node to
493 11c2fd3e aliguori
     * hold the amount of memory.
494 11c2fd3e aliguori
     */
495 11c2fd3e aliguori
    numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
496 11c2fd3e aliguori
    numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
497 11c2fd3e aliguori
    for (i = 0; i < smp_cpus; i++) {
498 11c2fd3e aliguori
        for (j = 0; j < nb_numa_nodes; j++) {
499 11c2fd3e aliguori
            if (node_cpumask[j] & (1 << i)) {
500 11c2fd3e aliguori
                numa_fw_cfg[i + 1] = cpu_to_le64(j);
501 11c2fd3e aliguori
                break;
502 11c2fd3e aliguori
            }
503 11c2fd3e aliguori
        }
504 11c2fd3e aliguori
    }
505 11c2fd3e aliguori
    for (i = 0; i < nb_numa_nodes; i++) {
506 11c2fd3e aliguori
        numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
507 11c2fd3e aliguori
    }
508 11c2fd3e aliguori
    fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
509 11c2fd3e aliguori
                     (1 + smp_cpus + nb_numa_nodes) * 8);
510 bf483392 Alexander Graf
511 bf483392 Alexander Graf
    return fw_cfg;
512 80cabfad bellard
}
513 80cabfad bellard
514 642a4f96 ths
/* Generate an initial boot sector which sets state and jump to
515 642a4f96 ths
   a specified vector */
516 7ffa4767 pbrook
static void generate_bootsect(target_phys_addr_t option_rom,
517 4fc9af53 aliguori
                              uint32_t gpr[8], uint16_t segs[6], uint16_t ip)
518 642a4f96 ths
{
519 4fc9af53 aliguori
    uint8_t rom[512], *p, *reloc;
520 4fc9af53 aliguori
    uint8_t sum;
521 642a4f96 ths
    int i;
522 642a4f96 ths
523 4fc9af53 aliguori
    memset(rom, 0, sizeof(rom));
524 4fc9af53 aliguori
525 4fc9af53 aliguori
    p = rom;
526 4fc9af53 aliguori
    /* Make sure we have an option rom signature */
527 4fc9af53 aliguori
    *p++ = 0x55;
528 4fc9af53 aliguori
    *p++ = 0xaa;
529 642a4f96 ths
530 4fc9af53 aliguori
    /* ROM size in sectors*/
531 4fc9af53 aliguori
    *p++ = 1;
532 642a4f96 ths
533 4fc9af53 aliguori
    /* Hook int19 */
534 642a4f96 ths
535 4fc9af53 aliguori
    *p++ = 0x50;                /* push ax */
536 4fc9af53 aliguori
    *p++ = 0x1e;                /* push ds */
537 4fc9af53 aliguori
    *p++ = 0x31; *p++ = 0xc0;        /* xor ax, ax */
538 4fc9af53 aliguori
    *p++ = 0x8e; *p++ = 0xd8;        /* mov ax, ds */
539 642a4f96 ths
540 4fc9af53 aliguori
    *p++ = 0xc7; *p++ = 0x06;   /* movvw _start,0x64 */
541 4fc9af53 aliguori
    *p++ = 0x64; *p++ = 0x00;
542 4fc9af53 aliguori
    reloc = p;
543 4fc9af53 aliguori
    *p++ = 0x00; *p++ = 0x00;
544 4fc9af53 aliguori
545 4fc9af53 aliguori
    *p++ = 0x8c; *p++ = 0x0e;   /* mov cs,0x66 */
546 4fc9af53 aliguori
    *p++ = 0x66; *p++ = 0x00;
547 4fc9af53 aliguori
548 4fc9af53 aliguori
    *p++ = 0x1f;                /* pop ds */
549 4fc9af53 aliguori
    *p++ = 0x58;                /* pop ax */
550 4fc9af53 aliguori
    *p++ = 0xcb;                /* lret */
551 4fc9af53 aliguori
    
552 642a4f96 ths
    /* Actual code */
553 4fc9af53 aliguori
    *reloc = (p - rom);
554 4fc9af53 aliguori
555 642a4f96 ths
    *p++ = 0xfa;                /* CLI */
556 642a4f96 ths
    *p++ = 0xfc;                /* CLD */
557 642a4f96 ths
558 642a4f96 ths
    for (i = 0; i < 6; i++) {
559 642a4f96 ths
        if (i == 1)                /* Skip CS */
560 642a4f96 ths
            continue;
561 642a4f96 ths
562 642a4f96 ths
        *p++ = 0xb8;                /* MOV AX,imm16 */
563 642a4f96 ths
        *p++ = segs[i];
564 642a4f96 ths
        *p++ = segs[i] >> 8;
565 642a4f96 ths
        *p++ = 0x8e;                /* MOV <seg>,AX */
566 642a4f96 ths
        *p++ = 0xc0 + (i << 3);
567 642a4f96 ths
    }
568 642a4f96 ths
569 642a4f96 ths
    for (i = 0; i < 8; i++) {
570 642a4f96 ths
        *p++ = 0x66;                /* 32-bit operand size */
571 642a4f96 ths
        *p++ = 0xb8 + i;        /* MOV <reg>,imm32 */
572 642a4f96 ths
        *p++ = gpr[i];
573 642a4f96 ths
        *p++ = gpr[i] >> 8;
574 642a4f96 ths
        *p++ = gpr[i] >> 16;
575 642a4f96 ths
        *p++ = gpr[i] >> 24;
576 642a4f96 ths
    }
577 642a4f96 ths
578 642a4f96 ths
    *p++ = 0xea;                /* JMP FAR */
579 642a4f96 ths
    *p++ = ip;                        /* IP */
580 642a4f96 ths
    *p++ = ip >> 8;
581 642a4f96 ths
    *p++ = segs[1];                /* CS */
582 642a4f96 ths
    *p++ = segs[1] >> 8;
583 642a4f96 ths
584 4fc9af53 aliguori
    /* sign rom */
585 4fc9af53 aliguori
    sum = 0;
586 4fc9af53 aliguori
    for (i = 0; i < (sizeof(rom) - 1); i++)
587 4fc9af53 aliguori
        sum += rom[i];
588 4fc9af53 aliguori
    rom[sizeof(rom) - 1] = -sum;
589 4fc9af53 aliguori
590 7ffa4767 pbrook
    cpu_physical_memory_write_rom(option_rom, rom, sizeof(rom));
591 d6ecb036 Glauber Costa
    option_rom_setup_reset(option_rom, sizeof (rom));
592 642a4f96 ths
}
593 80cabfad bellard
594 642a4f96 ths
static long get_file_size(FILE *f)
595 642a4f96 ths
{
596 642a4f96 ths
    long where, size;
597 642a4f96 ths
598 642a4f96 ths
    /* XXX: on Unix systems, using fstat() probably makes more sense */
599 642a4f96 ths
600 642a4f96 ths
    where = ftell(f);
601 642a4f96 ths
    fseek(f, 0, SEEK_END);
602 642a4f96 ths
    size = ftell(f);
603 642a4f96 ths
    fseek(f, where, SEEK_SET);
604 642a4f96 ths
605 642a4f96 ths
    return size;
606 642a4f96 ths
}
607 642a4f96 ths
608 f16408df Alexander Graf
#define MULTIBOOT_STRUCT_ADDR 0x9000
609 f16408df Alexander Graf
610 f16408df Alexander Graf
#if MULTIBOOT_STRUCT_ADDR > 0xf0000
611 f16408df Alexander Graf
#error multiboot struct needs to fit in 16 bit real mode
612 f16408df Alexander Graf
#endif
613 f16408df Alexander Graf
614 f16408df Alexander Graf
static int load_multiboot(void *fw_cfg,
615 f16408df Alexander Graf
                          FILE *f,
616 f16408df Alexander Graf
                          const char *kernel_filename,
617 f16408df Alexander Graf
                          const char *initrd_filename,
618 f16408df Alexander Graf
                          const char *kernel_cmdline,
619 f16408df Alexander Graf
                          uint8_t *header)
620 f16408df Alexander Graf
{
621 f16408df Alexander Graf
    int i, t, is_multiboot = 0;
622 f16408df Alexander Graf
    uint32_t flags = 0;
623 f16408df Alexander Graf
    uint32_t mh_entry_addr;
624 f16408df Alexander Graf
    uint32_t mh_load_addr;
625 f16408df Alexander Graf
    uint32_t mb_kernel_size;
626 f16408df Alexander Graf
    uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
627 f16408df Alexander Graf
    uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
628 f16408df Alexander Graf
    uint32_t mb_cmdline = mb_bootinfo + 0x200;
629 f16408df Alexander Graf
    uint32_t mb_mod_end;
630 f16408df Alexander Graf
631 f16408df Alexander Graf
    /* Ok, let's see if it is a multiboot image.
632 f16408df Alexander Graf
       The header is 12x32bit long, so the latest entry may be 8192 - 48. */
633 f16408df Alexander Graf
    for (i = 0; i < (8192 - 48); i += 4) {
634 f16408df Alexander Graf
        if (ldl_p(header+i) == 0x1BADB002) {
635 f16408df Alexander Graf
            uint32_t checksum = ldl_p(header+i+8);
636 f16408df Alexander Graf
            flags = ldl_p(header+i+4);
637 f16408df Alexander Graf
            checksum += flags;
638 f16408df Alexander Graf
            checksum += (uint32_t)0x1BADB002;
639 f16408df Alexander Graf
            if (!checksum) {
640 f16408df Alexander Graf
                is_multiboot = 1;
641 f16408df Alexander Graf
                break;
642 f16408df Alexander Graf
            }
643 f16408df Alexander Graf
        }
644 f16408df Alexander Graf
    }
645 f16408df Alexander Graf
646 f16408df Alexander Graf
    if (!is_multiboot)
647 f16408df Alexander Graf
        return 0; /* no multiboot */
648 f16408df Alexander Graf
649 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
650 f16408df Alexander Graf
    fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
651 f16408df Alexander Graf
#endif
652 f16408df Alexander Graf
653 f16408df Alexander Graf
    if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
654 f16408df Alexander Graf
        fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
655 f16408df Alexander Graf
    }
656 f16408df Alexander Graf
    if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
657 f16408df Alexander Graf
        uint64_t elf_entry;
658 f16408df Alexander Graf
        int kernel_size;
659 f16408df Alexander Graf
        fclose(f);
660 f16408df Alexander Graf
        kernel_size = load_elf(kernel_filename, 0, &elf_entry, NULL, NULL);
661 f16408df Alexander Graf
        if (kernel_size < 0) {
662 f16408df Alexander Graf
            fprintf(stderr, "Error while loading elf kernel\n");
663 f16408df Alexander Graf
            exit(1);
664 f16408df Alexander Graf
        }
665 f16408df Alexander Graf
        mh_load_addr = mh_entry_addr = elf_entry;
666 f16408df Alexander Graf
        mb_kernel_size = kernel_size;
667 f16408df Alexander Graf
668 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
669 f16408df Alexander Graf
        fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
670 f16408df Alexander Graf
                mb_kernel_size, (size_t)mh_entry_addr);
671 f16408df Alexander Graf
#endif
672 f16408df Alexander Graf
    } else {
673 f16408df Alexander Graf
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
674 f16408df Alexander Graf
        uint32_t mh_header_addr = ldl_p(header+i+12);
675 f16408df Alexander Graf
        mh_load_addr = ldl_p(header+i+16);
676 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
677 f16408df Alexander Graf
        uint32_t mh_load_end_addr = ldl_p(header+i+20);
678 f16408df Alexander Graf
        uint32_t mh_bss_end_addr = ldl_p(header+i+24);
679 f16408df Alexander Graf
#endif
680 f16408df Alexander Graf
        uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
681 f16408df Alexander Graf
682 f16408df Alexander Graf
        mh_entry_addr = ldl_p(header+i+28);
683 f16408df Alexander Graf
        mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
684 f16408df Alexander Graf
685 f16408df Alexander Graf
        /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
686 f16408df Alexander Graf
        uint32_t mh_mode_type = ldl_p(header+i+32);
687 f16408df Alexander Graf
        uint32_t mh_width = ldl_p(header+i+36);
688 f16408df Alexander Graf
        uint32_t mh_height = ldl_p(header+i+40);
689 f16408df Alexander Graf
        uint32_t mh_depth = ldl_p(header+i+44); */
690 f16408df Alexander Graf
691 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
692 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
693 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
694 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
695 f16408df Alexander Graf
        fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
696 f16408df Alexander Graf
#endif
697 f16408df Alexander Graf
698 f16408df Alexander Graf
        fseek(f, mb_kernel_text_offset, SEEK_SET);
699 f16408df Alexander Graf
700 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
701 f16408df Alexander Graf
        fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
702 f16408df Alexander Graf
                mb_kernel_size, mh_load_addr);
703 f16408df Alexander Graf
#endif
704 f16408df Alexander Graf
705 f16408df Alexander Graf
        if (!fread_targphys_ok(mh_load_addr, mb_kernel_size, f)) {
706 f16408df Alexander Graf
            fprintf(stderr, "qemu: read error on multiboot kernel '%s' (%#x)\n",
707 f16408df Alexander Graf
                    kernel_filename, mb_kernel_size);
708 f16408df Alexander Graf
            exit(1);
709 f16408df Alexander Graf
        }
710 f16408df Alexander Graf
        fclose(f);
711 f16408df Alexander Graf
    }
712 f16408df Alexander Graf
713 f16408df Alexander Graf
    /* blob size is only the kernel for now */
714 f16408df Alexander Graf
    mb_mod_end = mh_load_addr + mb_kernel_size;
715 f16408df Alexander Graf
716 f16408df Alexander Graf
    /* load modules */
717 f16408df Alexander Graf
    stl_phys(mb_bootinfo + 20, 0x0); /* mods_count */
718 f16408df Alexander Graf
    if (initrd_filename) {
719 f16408df Alexander Graf
        uint32_t mb_mod_info = mb_bootinfo + 0x100;
720 f16408df Alexander Graf
        uint32_t mb_mod_cmdline = mb_bootinfo + 0x300;
721 f16408df Alexander Graf
        uint32_t mb_mod_start = mh_load_addr;
722 f16408df Alexander Graf
        uint32_t mb_mod_length = mb_kernel_size;
723 f16408df Alexander Graf
        char *next_initrd;
724 f16408df Alexander Graf
        char *next_space;
725 f16408df Alexander Graf
        int mb_mod_count = 0;
726 f16408df Alexander Graf
727 f16408df Alexander Graf
        do {
728 f16408df Alexander Graf
            next_initrd = strchr(initrd_filename, ',');
729 f16408df Alexander Graf
            if (next_initrd)
730 f16408df Alexander Graf
                *next_initrd = '\0';
731 f16408df Alexander Graf
            /* if a space comes after the module filename, treat everything
732 f16408df Alexander Graf
               after that as parameters */
733 f16408df Alexander Graf
            cpu_physical_memory_write(mb_mod_cmdline, (uint8_t*)initrd_filename,
734 f16408df Alexander Graf
                                      strlen(initrd_filename) + 1);
735 f16408df Alexander Graf
            stl_phys(mb_mod_info + 8, mb_mod_cmdline); /* string */
736 f16408df Alexander Graf
            mb_mod_cmdline += strlen(initrd_filename) + 1;
737 f16408df Alexander Graf
            if ((next_space = strchr(initrd_filename, ' ')))
738 f16408df Alexander Graf
                *next_space = '\0';
739 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
740 f16408df Alexander Graf
             printf("multiboot loading module: %s\n", initrd_filename);
741 f16408df Alexander Graf
#endif
742 f16408df Alexander Graf
            f = fopen(initrd_filename, "rb");
743 f16408df Alexander Graf
            if (f) {
744 f16408df Alexander Graf
                mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
745 f16408df Alexander Graf
                             & (TARGET_PAGE_MASK);
746 f16408df Alexander Graf
                mb_mod_length = get_file_size(f);
747 f16408df Alexander Graf
                mb_mod_end = mb_mod_start + mb_mod_length;
748 f16408df Alexander Graf
749 f16408df Alexander Graf
                if (!fread_targphys_ok(mb_mod_start, mb_mod_length, f)) {
750 f16408df Alexander Graf
                    fprintf(stderr, "qemu: read error on multiboot module '%s' (%#x)\n",
751 f16408df Alexander Graf
                            initrd_filename, mb_mod_length);
752 f16408df Alexander Graf
                    exit(1);
753 f16408df Alexander Graf
                }
754 f16408df Alexander Graf
755 f16408df Alexander Graf
                mb_mod_count++;
756 f16408df Alexander Graf
                stl_phys(mb_mod_info + 0, mb_mod_start);
757 f16408df Alexander Graf
                stl_phys(mb_mod_info + 4, mb_mod_start + mb_mod_length);
758 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
759 f16408df Alexander Graf
                printf("mod_start: %#x\nmod_end:   %#x\n", mb_mod_start,
760 f16408df Alexander Graf
                       mb_mod_start + mb_mod_length);
761 f16408df Alexander Graf
#endif
762 f16408df Alexander Graf
                stl_phys(mb_mod_info + 12, 0x0); /* reserved */
763 f16408df Alexander Graf
            }
764 f16408df Alexander Graf
            initrd_filename = next_initrd+1;
765 f16408df Alexander Graf
            mb_mod_info += 16;
766 f16408df Alexander Graf
        } while (next_initrd);
767 f16408df Alexander Graf
        stl_phys(mb_bootinfo + 20, mb_mod_count); /* mods_count */
768 f16408df Alexander Graf
        stl_phys(mb_bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
769 f16408df Alexander Graf
    }
770 f16408df Alexander Graf
771 f16408df Alexander Graf
    /* Make sure we're getting kernel + modules back after reset */
772 f16408df Alexander Graf
    option_rom_setup_reset(mh_load_addr, mb_mod_end - mh_load_addr);
773 f16408df Alexander Graf
774 f16408df Alexander Graf
    /* Commandline support */
775 f16408df Alexander Graf
    stl_phys(mb_bootinfo + 16, mb_cmdline);
776 f16408df Alexander Graf
    t = strlen(kernel_filename);
777 f16408df Alexander Graf
    cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_filename, t);
778 f16408df Alexander Graf
    mb_cmdline += t;
779 f16408df Alexander Graf
    stb_phys(mb_cmdline++, ' ');
780 f16408df Alexander Graf
    t = strlen(kernel_cmdline) + 1;
781 f16408df Alexander Graf
    cpu_physical_memory_write(mb_cmdline, (uint8_t*)kernel_cmdline, t);
782 f16408df Alexander Graf
783 f16408df Alexander Graf
    /* the kernel is where we want it to be now */
784 f16408df Alexander Graf
785 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MEMORY (1 << 0)
786 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
787 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
788 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MODULES (1 << 3)
789 f16408df Alexander Graf
#define MULTIBOOT_FLAGS_MMAP (1 << 6)
790 f16408df Alexander Graf
    stl_phys(mb_bootinfo, MULTIBOOT_FLAGS_MEMORY
791 f16408df Alexander Graf
                        | MULTIBOOT_FLAGS_BOOT_DEVICE
792 f16408df Alexander Graf
                        | MULTIBOOT_FLAGS_CMDLINE
793 f16408df Alexander Graf
                        | MULTIBOOT_FLAGS_MODULES
794 f16408df Alexander Graf
                        | MULTIBOOT_FLAGS_MMAP);
795 f16408df Alexander Graf
    stl_phys(mb_bootinfo + 4, 640); /* mem_lower */
796 f16408df Alexander Graf
    stl_phys(mb_bootinfo + 8, ram_size / 1024); /* mem_upper */
797 f16408df Alexander Graf
    stl_phys(mb_bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
798 f16408df Alexander Graf
    stl_phys(mb_bootinfo + 48, mmap_addr); /* mmap_addr */
799 f16408df Alexander Graf
800 f16408df Alexander Graf
#ifdef DEBUG_MULTIBOOT
801 f16408df Alexander Graf
    fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
802 f16408df Alexander Graf
#endif
803 f16408df Alexander Graf
804 f16408df Alexander Graf
    /* Pass variables to option rom */
805 f16408df Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_entry_addr);
806 f16408df Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
807 f16408df Alexander Graf
    fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, mmap_addr);
808 f16408df Alexander Graf
809 f16408df Alexander Graf
    /* Make sure we're getting the config space back after reset */
810 f16408df Alexander Graf
    option_rom_setup_reset(mb_bootinfo, 0x500);
811 f16408df Alexander Graf
812 f16408df Alexander Graf
    option_rom[nb_option_roms] = "multiboot.bin";
813 f16408df Alexander Graf
    nb_option_roms++;
814 f16408df Alexander Graf
815 f16408df Alexander Graf
    return 1; /* yes, we are multiboot */
816 f16408df Alexander Graf
}
817 f16408df Alexander Graf
818 f16408df Alexander Graf
static void load_linux(void *fw_cfg,
819 f16408df Alexander Graf
                       target_phys_addr_t option_rom,
820 4fc9af53 aliguori
                       const char *kernel_filename,
821 642a4f96 ths
                       const char *initrd_filename,
822 e6ade764 Glauber Costa
                       const char *kernel_cmdline,
823 e6ade764 Glauber Costa
               target_phys_addr_t max_ram_size)
824 642a4f96 ths
{
825 642a4f96 ths
    uint16_t protocol;
826 642a4f96 ths
    uint32_t gpr[8];
827 642a4f96 ths
    uint16_t seg[6];
828 642a4f96 ths
    uint16_t real_seg;
829 5cea8590 Paul Brook
    int setup_size, kernel_size, initrd_size = 0, cmdline_size;
830 642a4f96 ths
    uint32_t initrd_max;
831 f16408df Alexander Graf
    uint8_t header[8192];
832 5cea8590 Paul Brook
    target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
833 642a4f96 ths
    FILE *f, *fi;
834 bf4e5d92 Pascal Terjan
    char *vmode;
835 642a4f96 ths
836 642a4f96 ths
    /* Align to 16 bytes as a paranoia measure */
837 642a4f96 ths
    cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
838 642a4f96 ths
839 642a4f96 ths
    /* load the kernel header */
840 642a4f96 ths
    f = fopen(kernel_filename, "rb");
841 642a4f96 ths
    if (!f || !(kernel_size = get_file_size(f)) ||
842 f16408df Alexander Graf
        fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
843 f16408df Alexander Graf
        MIN(ARRAY_SIZE(header), kernel_size)) {
844 642a4f96 ths
        fprintf(stderr, "qemu: could not load kernel '%s'\n",
845 642a4f96 ths
                kernel_filename);
846 642a4f96 ths
        exit(1);
847 642a4f96 ths
    }
848 642a4f96 ths
849 642a4f96 ths
    /* kernel protocol version */
850 bc4edd79 bellard
#if 0
851 642a4f96 ths
    fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
852 bc4edd79 bellard
#endif
853 642a4f96 ths
    if (ldl_p(header+0x202) == 0x53726448)
854 642a4f96 ths
        protocol = lduw_p(header+0x206);
855 f16408df Alexander Graf
    else {
856 f16408df Alexander Graf
        /* This looks like a multiboot kernel. If it is, let's stop
857 f16408df Alexander Graf
           treating it like a Linux kernel. */
858 f16408df Alexander Graf
        if (load_multiboot(fw_cfg, f, kernel_filename,
859 f16408df Alexander Graf
                           initrd_filename, kernel_cmdline, header))
860 f16408df Alexander Graf
           return;
861 642a4f96 ths
        protocol = 0;
862 f16408df Alexander Graf
    }
863 642a4f96 ths
864 642a4f96 ths
    if (protocol < 0x200 || !(header[0x211] & 0x01)) {
865 642a4f96 ths
        /* Low kernel */
866 a37af289 blueswir1
        real_addr    = 0x90000;
867 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
868 a37af289 blueswir1
        prot_addr    = 0x10000;
869 642a4f96 ths
    } else if (protocol < 0x202) {
870 642a4f96 ths
        /* High but ancient kernel */
871 a37af289 blueswir1
        real_addr    = 0x90000;
872 a37af289 blueswir1
        cmdline_addr = 0x9a000 - cmdline_size;
873 a37af289 blueswir1
        prot_addr    = 0x100000;
874 642a4f96 ths
    } else {
875 642a4f96 ths
        /* High and recent kernel */
876 a37af289 blueswir1
        real_addr    = 0x10000;
877 a37af289 blueswir1
        cmdline_addr = 0x20000;
878 a37af289 blueswir1
        prot_addr    = 0x100000;
879 642a4f96 ths
    }
880 642a4f96 ths
881 bc4edd79 bellard
#if 0
882 642a4f96 ths
    fprintf(stderr,
883 526ccb7a balrog
            "qemu: real_addr     = 0x" TARGET_FMT_plx "\n"
884 526ccb7a balrog
            "qemu: cmdline_addr  = 0x" TARGET_FMT_plx "\n"
885 526ccb7a balrog
            "qemu: prot_addr     = 0x" TARGET_FMT_plx "\n",
886 a37af289 blueswir1
            real_addr,
887 a37af289 blueswir1
            cmdline_addr,
888 a37af289 blueswir1
            prot_addr);
889 bc4edd79 bellard
#endif
890 642a4f96 ths
891 642a4f96 ths
    /* highest address for loading the initrd */
892 642a4f96 ths
    if (protocol >= 0x203)
893 642a4f96 ths
        initrd_max = ldl_p(header+0x22c);
894 642a4f96 ths
    else
895 642a4f96 ths
        initrd_max = 0x37ffffff;
896 642a4f96 ths
897 e6ade764 Glauber Costa
    if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
898 e6ade764 Glauber Costa
            initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
899 642a4f96 ths
900 642a4f96 ths
    /* kernel command line */
901 a37af289 blueswir1
    pstrcpy_targphys(cmdline_addr, 4096, kernel_cmdline);
902 642a4f96 ths
903 642a4f96 ths
    if (protocol >= 0x202) {
904 a37af289 blueswir1
        stl_p(header+0x228, cmdline_addr);
905 642a4f96 ths
    } else {
906 642a4f96 ths
        stw_p(header+0x20, 0xA33F);
907 642a4f96 ths
        stw_p(header+0x22, cmdline_addr-real_addr);
908 642a4f96 ths
    }
909 642a4f96 ths
910 bf4e5d92 Pascal Terjan
    /* handle vga= parameter */
911 bf4e5d92 Pascal Terjan
    vmode = strstr(kernel_cmdline, "vga=");
912 bf4e5d92 Pascal Terjan
    if (vmode) {
913 bf4e5d92 Pascal Terjan
        unsigned int video_mode;
914 bf4e5d92 Pascal Terjan
        /* skip "vga=" */
915 bf4e5d92 Pascal Terjan
        vmode += 4;
916 bf4e5d92 Pascal Terjan
        if (!strncmp(vmode, "normal", 6)) {
917 bf4e5d92 Pascal Terjan
            video_mode = 0xffff;
918 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ext", 3)) {
919 bf4e5d92 Pascal Terjan
            video_mode = 0xfffe;
920 bf4e5d92 Pascal Terjan
        } else if (!strncmp(vmode, "ask", 3)) {
921 bf4e5d92 Pascal Terjan
            video_mode = 0xfffd;
922 bf4e5d92 Pascal Terjan
        } else {
923 bf4e5d92 Pascal Terjan
            video_mode = strtol(vmode, NULL, 0);
924 bf4e5d92 Pascal Terjan
        }
925 bf4e5d92 Pascal Terjan
        stw_p(header+0x1fa, video_mode);
926 bf4e5d92 Pascal Terjan
    }
927 bf4e5d92 Pascal Terjan
928 642a4f96 ths
    /* loader type */
929 642a4f96 ths
    /* High nybble = B reserved for Qemu; low nybble is revision number.
930 642a4f96 ths
       If this code is substantially changed, you may want to consider
931 642a4f96 ths
       incrementing the revision. */
932 642a4f96 ths
    if (protocol >= 0x200)
933 642a4f96 ths
        header[0x210] = 0xB0;
934 642a4f96 ths
935 642a4f96 ths
    /* heap */
936 642a4f96 ths
    if (protocol >= 0x201) {
937 642a4f96 ths
        header[0x211] |= 0x80;        /* CAN_USE_HEAP */
938 642a4f96 ths
        stw_p(header+0x224, cmdline_addr-real_addr-0x200);
939 642a4f96 ths
    }
940 642a4f96 ths
941 642a4f96 ths
    /* load initrd */
942 642a4f96 ths
    if (initrd_filename) {
943 642a4f96 ths
        if (protocol < 0x200) {
944 642a4f96 ths
            fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
945 642a4f96 ths
            exit(1);
946 642a4f96 ths
        }
947 642a4f96 ths
948 642a4f96 ths
        fi = fopen(initrd_filename, "rb");
949 642a4f96 ths
        if (!fi) {
950 642a4f96 ths
            fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
951 642a4f96 ths
                    initrd_filename);
952 642a4f96 ths
            exit(1);
953 642a4f96 ths
        }
954 642a4f96 ths
955 642a4f96 ths
        initrd_size = get_file_size(fi);
956 a37af289 blueswir1
        initrd_addr = (initrd_max-initrd_size) & ~4095;
957 642a4f96 ths
958 a37af289 blueswir1
        if (!fread_targphys_ok(initrd_addr, initrd_size, fi)) {
959 642a4f96 ths
            fprintf(stderr, "qemu: read error on initial ram disk '%s'\n",
960 642a4f96 ths
                    initrd_filename);
961 642a4f96 ths
            exit(1);
962 642a4f96 ths
        }
963 642a4f96 ths
        fclose(fi);
964 642a4f96 ths
965 a37af289 blueswir1
        stl_p(header+0x218, initrd_addr);
966 642a4f96 ths
        stl_p(header+0x21c, initrd_size);
967 642a4f96 ths
    }
968 642a4f96 ths
969 642a4f96 ths
    /* store the finalized header and load the rest of the kernel */
970 f16408df Alexander Graf
    cpu_physical_memory_write(real_addr, header, ARRAY_SIZE(header));
971 642a4f96 ths
972 642a4f96 ths
    setup_size = header[0x1f1];
973 642a4f96 ths
    if (setup_size == 0)
974 642a4f96 ths
        setup_size = 4;
975 642a4f96 ths
976 642a4f96 ths
    setup_size = (setup_size+1)*512;
977 f16408df Alexander Graf
    /* Size of protected-mode code */
978 f16408df Alexander Graf
    kernel_size -= (setup_size > ARRAY_SIZE(header)) ? setup_size : ARRAY_SIZE(header);
979 f16408df Alexander Graf
980 f16408df Alexander Graf
    /* In case we have read too much already, copy that over */
981 f16408df Alexander Graf
    if (setup_size < ARRAY_SIZE(header)) {
982 f16408df Alexander Graf
        cpu_physical_memory_write(prot_addr, header + setup_size, ARRAY_SIZE(header) - setup_size);
983 f16408df Alexander Graf
        prot_addr += (ARRAY_SIZE(header) - setup_size);
984 f16408df Alexander Graf
        setup_size = ARRAY_SIZE(header);
985 f16408df Alexander Graf
    }
986 642a4f96 ths
987 f16408df Alexander Graf
    if (!fread_targphys_ok(real_addr + ARRAY_SIZE(header),
988 f16408df Alexander Graf
                           setup_size - ARRAY_SIZE(header), f) ||
989 a37af289 blueswir1
        !fread_targphys_ok(prot_addr, kernel_size, f)) {
990 642a4f96 ths
        fprintf(stderr, "qemu: read error on kernel '%s'\n",
991 642a4f96 ths
                kernel_filename);
992 642a4f96 ths
        exit(1);
993 642a4f96 ths
    }
994 642a4f96 ths
    fclose(f);
995 642a4f96 ths
996 642a4f96 ths
    /* generate bootsector to set up the initial register state */
997 a37af289 blueswir1
    real_seg = real_addr >> 4;
998 642a4f96 ths
    seg[0] = seg[2] = seg[3] = seg[4] = seg[4] = real_seg;
999 642a4f96 ths
    seg[1] = real_seg+0x20;        /* CS */
1000 642a4f96 ths
    memset(gpr, 0, sizeof gpr);
1001 642a4f96 ths
    gpr[4] = cmdline_addr-real_addr-16;        /* SP (-16 is paranoia) */
1002 642a4f96 ths
1003 d6ecb036 Glauber Costa
    option_rom_setup_reset(real_addr, setup_size);
1004 d6ecb036 Glauber Costa
    option_rom_setup_reset(prot_addr, kernel_size);
1005 d6ecb036 Glauber Costa
    option_rom_setup_reset(cmdline_addr, cmdline_size);
1006 d6ecb036 Glauber Costa
    if (initrd_filename)
1007 d6ecb036 Glauber Costa
        option_rom_setup_reset(initrd_addr, initrd_size);
1008 d6ecb036 Glauber Costa
1009 4fc9af53 aliguori
    generate_bootsect(option_rom, gpr, seg, 0);
1010 642a4f96 ths
}
1011 642a4f96 ths
1012 b41a2cd1 bellard
static const int ide_iobase[2] = { 0x1f0, 0x170 };
1013 b41a2cd1 bellard
static const int ide_iobase2[2] = { 0x3f6, 0x376 };
1014 b41a2cd1 bellard
static const int ide_irq[2] = { 14, 15 };
1015 b41a2cd1 bellard
1016 b41a2cd1 bellard
#define NE2000_NB_MAX 6
1017 b41a2cd1 bellard
1018 8d11df9e bellard
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
1019 b41a2cd1 bellard
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
1020 b41a2cd1 bellard
1021 8d11df9e bellard
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1022 8d11df9e bellard
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
1023 8d11df9e bellard
1024 6508fe59 bellard
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
1025 6508fe59 bellard
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
1026 6508fe59 bellard
1027 6a36d84e bellard
#ifdef HAS_AUDIO
1028 d537cf6c pbrook
static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
1029 6a36d84e bellard
{
1030 6a36d84e bellard
    struct soundhw *c;
1031 6a36d84e bellard
1032 3a8bae3e malc
    for (c = soundhw; c->name; ++c) {
1033 3a8bae3e malc
        if (c->enabled) {
1034 3a8bae3e malc
            if (c->isa) {
1035 3a8bae3e malc
                c->init.init_isa(pic);
1036 3a8bae3e malc
            } else {
1037 3a8bae3e malc
                if (pci_bus) {
1038 3a8bae3e malc
                    c->init.init_pci(pci_bus);
1039 6a36d84e bellard
                }
1040 6a36d84e bellard
            }
1041 6a36d84e bellard
        }
1042 6a36d84e bellard
    }
1043 6a36d84e bellard
}
1044 6a36d84e bellard
#endif
1045 6a36d84e bellard
1046 d537cf6c pbrook
static void pc_init_ne2k_isa(NICInfo *nd, qemu_irq *pic)
1047 a41b2ff2 pbrook
{
1048 a41b2ff2 pbrook
    static int nb_ne2k = 0;
1049 a41b2ff2 pbrook
1050 a41b2ff2 pbrook
    if (nb_ne2k == NE2000_NB_MAX)
1051 a41b2ff2 pbrook
        return;
1052 d537cf6c pbrook
    isa_ne2000_init(ne2000_io[nb_ne2k], pic[ne2000_irq[nb_ne2k]], nd);
1053 a41b2ff2 pbrook
    nb_ne2k++;
1054 a41b2ff2 pbrook
}
1055 a41b2ff2 pbrook
1056 f753ff16 pbrook
static int load_option_rom(const char *oprom, target_phys_addr_t start,
1057 f753ff16 pbrook
                           target_phys_addr_t end)
1058 f753ff16 pbrook
{
1059 f753ff16 pbrook
        int size;
1060 5cea8590 Paul Brook
        char *filename;
1061 5cea8590 Paul Brook
1062 5cea8590 Paul Brook
        filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, oprom);
1063 5cea8590 Paul Brook
        if (filename) {
1064 5cea8590 Paul Brook
            size = get_image_size(filename);
1065 5cea8590 Paul Brook
            if (size > 0 && start + size > end) {
1066 5cea8590 Paul Brook
                fprintf(stderr, "Not enough space to load option rom '%s'\n",
1067 5cea8590 Paul Brook
                        oprom);
1068 5cea8590 Paul Brook
                exit(1);
1069 5cea8590 Paul Brook
            }
1070 5cea8590 Paul Brook
            size = load_image_targphys(filename, start, end - start);
1071 5cea8590 Paul Brook
            qemu_free(filename);
1072 5cea8590 Paul Brook
        } else {
1073 5cea8590 Paul Brook
            size = -1;
1074 f753ff16 pbrook
        }
1075 f753ff16 pbrook
        if (size < 0) {
1076 f753ff16 pbrook
            fprintf(stderr, "Could not load option rom '%s'\n", oprom);
1077 f753ff16 pbrook
            exit(1);
1078 f753ff16 pbrook
        }
1079 f753ff16 pbrook
        /* Round up optiom rom size to the next 2k boundary */
1080 f753ff16 pbrook
        size = (size + 2047) & ~2047;
1081 e28f9884 Glauber Costa
        option_rom_setup_reset(start, size);
1082 f753ff16 pbrook
        return size;
1083 f753ff16 pbrook
}
1084 f753ff16 pbrook
1085 678e12cc Gleb Natapov
int cpu_is_bsp(CPUState *env)
1086 678e12cc Gleb Natapov
{
1087 678e12cc Gleb Natapov
        return env->cpuid_apic_id == 0;
1088 678e12cc Gleb Natapov
}
1089 678e12cc Gleb Natapov
1090 3a31f36a Jan Kiszka
static CPUState *pc_new_cpu(const char *cpu_model)
1091 3a31f36a Jan Kiszka
{
1092 3a31f36a Jan Kiszka
    CPUState *env;
1093 3a31f36a Jan Kiszka
1094 3a31f36a Jan Kiszka
    env = cpu_init(cpu_model);
1095 3a31f36a Jan Kiszka
    if (!env) {
1096 3a31f36a Jan Kiszka
        fprintf(stderr, "Unable to find x86 CPU definition\n");
1097 3a31f36a Jan Kiszka
        exit(1);
1098 3a31f36a Jan Kiszka
    }
1099 3a31f36a Jan Kiszka
    if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
1100 3a31f36a Jan Kiszka
        env->cpuid_apic_id = env->cpu_index;
1101 3a31f36a Jan Kiszka
        /* APIC reset callback resets cpu */
1102 3a31f36a Jan Kiszka
        apic_init(env);
1103 3a31f36a Jan Kiszka
    } else {
1104 3a31f36a Jan Kiszka
        qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
1105 3a31f36a Jan Kiszka
    }
1106 3a31f36a Jan Kiszka
    return env;
1107 3a31f36a Jan Kiszka
}
1108 3a31f36a Jan Kiszka
1109 80cabfad bellard
/* PC hardware initialisation */
1110 fbe1b595 Paul Brook
static void pc_init1(ram_addr_t ram_size,
1111 3023f332 aliguori
                     const char *boot_device,
1112 e8b2a1c6 Mark McLoughlin
                     const char *kernel_filename,
1113 e8b2a1c6 Mark McLoughlin
                     const char *kernel_cmdline,
1114 3dbbdc25 bellard
                     const char *initrd_filename,
1115 e8b2a1c6 Mark McLoughlin
                     const char *cpu_model,
1116 caea79a9 Mark McLoughlin
                     int pci_enabled)
1117 80cabfad bellard
{
1118 5cea8590 Paul Brook
    char *filename;
1119 642a4f96 ths
    int ret, linux_boot, i;
1120 b584726d pbrook
    ram_addr_t ram_addr, bios_offset, option_rom_offset;
1121 00f82b8a aurel32
    ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1122 f753ff16 pbrook
    int bios_size, isa_bios_size, oprom_area_size;
1123 46e50e9d bellard
    PCIBus *pci_bus;
1124 c2cc47a4 Markus Armbruster
    PCIDevice *pci_dev;
1125 b3999638 Gerd Hoffmann
    ISADevice *isa_dev;
1126 5c3ff3a7 pbrook
    int piix3_devfn = -1;
1127 59b8ad81 bellard
    CPUState *env;
1128 d537cf6c pbrook
    qemu_irq *cpu_irq;
1129 1452411b Avi Kivity
    qemu_irq *isa_irq;
1130 d537cf6c pbrook
    qemu_irq *i8259;
1131 1452411b Avi Kivity
    IsaIrqState *isa_irq_state;
1132 751c6a17 Gerd Hoffmann
    DriveInfo *dinfo;
1133 e4bcb14c ths
    BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
1134 e4bcb14c ths
    BlockDriverState *fd[MAX_FD];
1135 34b39c2b aliguori
    int using_vga = cirrus_vga_enabled || std_vga_enabled || vmsvga_enabled;
1136 bf483392 Alexander Graf
    void *fw_cfg;
1137 d592d303 bellard
1138 00f82b8a aurel32
    if (ram_size >= 0xe0000000 ) {
1139 00f82b8a aurel32
        above_4g_mem_size = ram_size - 0xe0000000;
1140 00f82b8a aurel32
        below_4g_mem_size = 0xe0000000;
1141 00f82b8a aurel32
    } else {
1142 00f82b8a aurel32
        below_4g_mem_size = ram_size;
1143 00f82b8a aurel32
    }
1144 00f82b8a aurel32
1145 80cabfad bellard
    linux_boot = (kernel_filename != NULL);
1146 80cabfad bellard
1147 59b8ad81 bellard
    /* init CPUs */
1148 a049de61 bellard
    if (cpu_model == NULL) {
1149 a049de61 bellard
#ifdef TARGET_X86_64
1150 a049de61 bellard
        cpu_model = "qemu64";
1151 a049de61 bellard
#else
1152 a049de61 bellard
        cpu_model = "qemu32";
1153 a049de61 bellard
#endif
1154 a049de61 bellard
    }
1155 3a31f36a Jan Kiszka
1156 3a31f36a Jan Kiszka
    for (i = 0; i < smp_cpus; i++) {
1157 3a31f36a Jan Kiszka
        env = pc_new_cpu(cpu_model);
1158 59b8ad81 bellard
    }
1159 59b8ad81 bellard
1160 26fb5e48 aurel32
    vmport_init();
1161 26fb5e48 aurel32
1162 80cabfad bellard
    /* allocate RAM */
1163 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0xa0000);
1164 82b36dc3 aliguori
    cpu_register_physical_memory(0, 0xa0000, ram_addr);
1165 82b36dc3 aliguori
1166 82b36dc3 aliguori
    /* Allocate, even though we won't register, so we don't break the
1167 82b36dc3 aliguori
     * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1168 82b36dc3 aliguori
     * and some bios areas, which will be registered later
1169 82b36dc3 aliguori
     */
1170 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1171 82b36dc3 aliguori
    ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1172 82b36dc3 aliguori
    cpu_register_physical_memory(0x100000,
1173 82b36dc3 aliguori
                 below_4g_mem_size - 0x100000,
1174 82b36dc3 aliguori
                 ram_addr);
1175 00f82b8a aurel32
1176 00f82b8a aurel32
    /* above 4giga memory allocation */
1177 00f82b8a aurel32
    if (above_4g_mem_size > 0) {
1178 8a637d44 Paul Brook
#if TARGET_PHYS_ADDR_BITS == 32
1179 8a637d44 Paul Brook
        hw_error("To much RAM for 32-bit physical address");
1180 8a637d44 Paul Brook
#else
1181 82b36dc3 aliguori
        ram_addr = qemu_ram_alloc(above_4g_mem_size);
1182 82b36dc3 aliguori
        cpu_register_physical_memory(0x100000000ULL,
1183 526ccb7a balrog
                                     above_4g_mem_size,
1184 82b36dc3 aliguori
                                     ram_addr);
1185 8a637d44 Paul Brook
#endif
1186 00f82b8a aurel32
    }
1187 80cabfad bellard
1188 82b36dc3 aliguori
1189 970ac5a3 bellard
    /* BIOS load */
1190 1192dad8 j_mayer
    if (bios_name == NULL)
1191 1192dad8 j_mayer
        bios_name = BIOS_FILENAME;
1192 5cea8590 Paul Brook
    filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1193 5cea8590 Paul Brook
    if (filename) {
1194 5cea8590 Paul Brook
        bios_size = get_image_size(filename);
1195 5cea8590 Paul Brook
    } else {
1196 5cea8590 Paul Brook
        bios_size = -1;
1197 5cea8590 Paul Brook
    }
1198 5fafdf24 ths
    if (bios_size <= 0 ||
1199 970ac5a3 bellard
        (bios_size % 65536) != 0) {
1200 7587cf44 bellard
        goto bios_error;
1201 7587cf44 bellard
    }
1202 970ac5a3 bellard
    bios_offset = qemu_ram_alloc(bios_size);
1203 5cea8590 Paul Brook
    ret = load_image(filename, qemu_get_ram_ptr(bios_offset));
1204 7587cf44 bellard
    if (ret != bios_size) {
1205 7587cf44 bellard
    bios_error:
1206 5cea8590 Paul Brook
        fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1207 80cabfad bellard
        exit(1);
1208 80cabfad bellard
    }
1209 5cea8590 Paul Brook
    if (filename) {
1210 5cea8590 Paul Brook
        qemu_free(filename);
1211 5cea8590 Paul Brook
    }
1212 7587cf44 bellard
    /* map the last 128KB of the BIOS in ISA space */
1213 7587cf44 bellard
    isa_bios_size = bios_size;
1214 7587cf44 bellard
    if (isa_bios_size > (128 * 1024))
1215 7587cf44 bellard
        isa_bios_size = 128 * 1024;
1216 5fafdf24 ths
    cpu_register_physical_memory(0x100000 - isa_bios_size,
1217 5fafdf24 ths
                                 isa_bios_size,
1218 7587cf44 bellard
                                 (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1219 9ae02555 ths
1220 4fc9af53 aliguori
1221 f753ff16 pbrook
1222 f753ff16 pbrook
    option_rom_offset = qemu_ram_alloc(0x20000);
1223 f753ff16 pbrook
    oprom_area_size = 0;
1224 49669fc5 Glauber Costa
    cpu_register_physical_memory(0xc0000, 0x20000, option_rom_offset);
1225 f753ff16 pbrook
1226 f753ff16 pbrook
    if (using_vga) {
1227 5cea8590 Paul Brook
        const char *vgabios_filename;
1228 f753ff16 pbrook
        /* VGA BIOS load */
1229 f753ff16 pbrook
        if (cirrus_vga_enabled) {
1230 5cea8590 Paul Brook
            vgabios_filename = VGABIOS_CIRRUS_FILENAME;
1231 f753ff16 pbrook
        } else {
1232 5cea8590 Paul Brook
            vgabios_filename = VGABIOS_FILENAME;
1233 970ac5a3 bellard
        }
1234 5cea8590 Paul Brook
        oprom_area_size = load_option_rom(vgabios_filename, 0xc0000, 0xe0000);
1235 f753ff16 pbrook
    }
1236 f753ff16 pbrook
    /* Although video roms can grow larger than 0x8000, the area between
1237 f753ff16 pbrook
     * 0xc0000 - 0xc8000 is reserved for them. It means we won't be looking
1238 f753ff16 pbrook
     * for any other kind of option rom inside this area */
1239 f753ff16 pbrook
    if (oprom_area_size < 0x8000)
1240 f753ff16 pbrook
        oprom_area_size = 0x8000;
1241 f753ff16 pbrook
1242 1d108d97 Alexander Graf
    /* map all the bios at the top of memory */
1243 1d108d97 Alexander Graf
    cpu_register_physical_memory((uint32_t)(-bios_size),
1244 1d108d97 Alexander Graf
                                 bios_size, bios_offset | IO_MEM_ROM);
1245 1d108d97 Alexander Graf
1246 bf483392 Alexander Graf
    fw_cfg = bochs_bios_init();
1247 1d108d97 Alexander Graf
1248 f753ff16 pbrook
    if (linux_boot) {
1249 f16408df Alexander Graf
        load_linux(fw_cfg, 0xc0000 + oprom_area_size,
1250 e6ade764 Glauber Costa
                   kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1251 f753ff16 pbrook
        oprom_area_size += 2048;
1252 f753ff16 pbrook
    }
1253 f753ff16 pbrook
1254 f753ff16 pbrook
    for (i = 0; i < nb_option_roms; i++) {
1255 406c8df3 Glauber Costa
        oprom_area_size += load_option_rom(option_rom[i], 0xc0000 + oprom_area_size,
1256 406c8df3 Glauber Costa
                                           0xe0000);
1257 406c8df3 Glauber Costa
    }
1258 406c8df3 Glauber Costa
1259 406c8df3 Glauber Costa
    for (i = 0; i < nb_nics; i++) {
1260 406c8df3 Glauber Costa
        char nic_oprom[1024];
1261 406c8df3 Glauber Costa
        const char *model = nd_table[i].model;
1262 406c8df3 Glauber Costa
1263 406c8df3 Glauber Costa
        if (!nd_table[i].bootable)
1264 406c8df3 Glauber Costa
            continue;
1265 406c8df3 Glauber Costa
1266 406c8df3 Glauber Costa
        if (model == NULL)
1267 0d6b0b1d Anthony Liguori
            model = "e1000";
1268 406c8df3 Glauber Costa
        snprintf(nic_oprom, sizeof(nic_oprom), "pxe-%s.bin", model);
1269 406c8df3 Glauber Costa
1270 406c8df3 Glauber Costa
        oprom_area_size += load_option_rom(nic_oprom, 0xc0000 + oprom_area_size,
1271 406c8df3 Glauber Costa
                                           0xe0000);
1272 9ae02555 ths
    }
1273 9ae02555 ths
1274 a5b38b51 aurel32
    cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1275 d537cf6c pbrook
    i8259 = i8259_init(cpu_irq[0]);
1276 1452411b Avi Kivity
    isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1277 1452411b Avi Kivity
    isa_irq_state->i8259 = i8259;
1278 1632dc6a Avi Kivity
    isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1279 1452411b Avi Kivity
    ferr_irq = isa_irq[13];
1280 d537cf6c pbrook
1281 69b91039 bellard
    if (pci_enabled) {
1282 1452411b Avi Kivity
        pci_bus = i440fx_init(&i440fx_state, isa_irq);
1283 8f1c91d8 ths
        piix3_devfn = piix3_init(pci_bus, -1);
1284 46e50e9d bellard
    } else {
1285 46e50e9d bellard
        pci_bus = NULL;
1286 69b91039 bellard
    }
1287 69b91039 bellard
1288 80cabfad bellard
    /* init basic PC hardware */
1289 b41a2cd1 bellard
    register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1290 80cabfad bellard
1291 f929aad6 bellard
    register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1292 f929aad6 bellard
1293 1f04275e bellard
    if (cirrus_vga_enabled) {
1294 1f04275e bellard
        if (pci_enabled) {
1295 fbe1b595 Paul Brook
            pci_cirrus_vga_init(pci_bus);
1296 1f04275e bellard
        } else {
1297 fbe1b595 Paul Brook
            isa_cirrus_vga_init();
1298 1f04275e bellard
        }
1299 d34cab9f ths
    } else if (vmsvga_enabled) {
1300 d34cab9f ths
        if (pci_enabled)
1301 fbe1b595 Paul Brook
            pci_vmsvga_init(pci_bus);
1302 d34cab9f ths
        else
1303 d34cab9f ths
            fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1304 c2b3b41a aliguori
    } else if (std_vga_enabled) {
1305 89b6b508 bellard
        if (pci_enabled) {
1306 fbe1b595 Paul Brook
            pci_vga_init(pci_bus, 0, 0);
1307 89b6b508 bellard
        } else {
1308 fbe1b595 Paul Brook
            isa_vga_init();
1309 89b6b508 bellard
        }
1310 1f04275e bellard
    }
1311 80cabfad bellard
1312 1452411b Avi Kivity
    rtc_state = rtc_init(0x70, isa_irq[8], 2000);
1313 80cabfad bellard
1314 3b4366de blueswir1
    qemu_register_boot_set(pc_boot_set, rtc_state);
1315 3b4366de blueswir1
1316 e1a23744 bellard
    register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1317 e1a23744 bellard
    register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1318 e1a23744 bellard
1319 d592d303 bellard
    if (pci_enabled) {
1320 1632dc6a Avi Kivity
        isa_irq_state->ioapic = ioapic_init();
1321 d592d303 bellard
    }
1322 1452411b Avi Kivity
    pit = pit_init(0x40, isa_irq[0]);
1323 fd06c375 bellard
    pcspk_init(pit);
1324 16b29ae1 aliguori
    if (!no_hpet) {
1325 1452411b Avi Kivity
        hpet_init(isa_irq);
1326 16b29ae1 aliguori
    }
1327 b41a2cd1 bellard
1328 8d11df9e bellard
    for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1329 8d11df9e bellard
        if (serial_hds[i]) {
1330 1452411b Avi Kivity
            serial_init(serial_io[i], isa_irq[serial_irq[i]], 115200,
1331 b6cd0ea1 aurel32
                        serial_hds[i]);
1332 8d11df9e bellard
        }
1333 8d11df9e bellard
    }
1334 b41a2cd1 bellard
1335 6508fe59 bellard
    for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1336 6508fe59 bellard
        if (parallel_hds[i]) {
1337 1452411b Avi Kivity
            parallel_init(parallel_io[i], isa_irq[parallel_irq[i]],
1338 d537cf6c pbrook
                          parallel_hds[i]);
1339 6508fe59 bellard
        }
1340 6508fe59 bellard
    }
1341 6508fe59 bellard
1342 9dd986cc Richard W.M. Jones
    watchdog_pc_init(pci_bus);
1343 9dd986cc Richard W.M. Jones
1344 a41b2ff2 pbrook
    for(i = 0; i < nb_nics; i++) {
1345 cb457d76 aliguori
        NICInfo *nd = &nd_table[i];
1346 cb457d76 aliguori
1347 cb457d76 aliguori
        if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1348 1452411b Avi Kivity
            pc_init_ne2k_isa(nd, isa_irq);
1349 cb457d76 aliguori
        else
1350 0d6b0b1d Anthony Liguori
            pci_nic_init(nd, "e1000", NULL);
1351 a41b2ff2 pbrook
    }
1352 b41a2cd1 bellard
1353 9d5e77a2 Isaku Yamahata
    piix4_acpi_system_hot_add_init();
1354 5e3cb534 aliguori
1355 e4bcb14c ths
    if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1356 e4bcb14c ths
        fprintf(stderr, "qemu: too many IDE bus\n");
1357 e4bcb14c ths
        exit(1);
1358 e4bcb14c ths
    }
1359 e4bcb14c ths
1360 e4bcb14c ths
    for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1361 751c6a17 Gerd Hoffmann
        dinfo = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1362 751c6a17 Gerd Hoffmann
        hd[i] = dinfo ? dinfo->bdrv : NULL;
1363 e4bcb14c ths
    }
1364 e4bcb14c ths
1365 a41b2ff2 pbrook
    if (pci_enabled) {
1366 1452411b Avi Kivity
        pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1, isa_irq);
1367 a41b2ff2 pbrook
    } else {
1368 e4bcb14c ths
        for(i = 0; i < MAX_IDE_BUS; i++) {
1369 1452411b Avi Kivity
            isa_ide_init(ide_iobase[i], ide_iobase2[i], isa_irq[ide_irq[i]],
1370 e4bcb14c ths
                         hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1371 69b91039 bellard
        }
1372 b41a2cd1 bellard
    }
1373 69b91039 bellard
1374 b3999638 Gerd Hoffmann
    isa_dev = isa_create_simple("i8042", 0x60, 0x64);
1375 1452411b Avi Kivity
    isa_connect_irq(isa_dev, 0, isa_irq[1]);
1376 1452411b Avi Kivity
    isa_connect_irq(isa_dev, 1, isa_irq[12]);
1377 7c29d0c0 bellard
    DMA_init(0);
1378 6a36d84e bellard
#ifdef HAS_AUDIO
1379 1452411b Avi Kivity
    audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1380 fb065187 bellard
#endif
1381 80cabfad bellard
1382 e4bcb14c ths
    for(i = 0; i < MAX_FD; i++) {
1383 751c6a17 Gerd Hoffmann
        dinfo = drive_get(IF_FLOPPY, 0, i);
1384 751c6a17 Gerd Hoffmann
        fd[i] = dinfo ? dinfo->bdrv : NULL;
1385 e4bcb14c ths
    }
1386 1452411b Avi Kivity
    floppy_controller = fdctrl_init(isa_irq[6], 2, 0, 0x3f0, fd);
1387 b41a2cd1 bellard
1388 00f82b8a aurel32
    cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1389 69b91039 bellard
1390 bb36d470 bellard
    if (pci_enabled && usb_enabled) {
1391 afcc3cdf ths
        usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1392 bb36d470 bellard
    }
1393 bb36d470 bellard
1394 6515b203 bellard
    if (pci_enabled && acpi_enabled) {
1395 3fffc223 ths
        uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1396 0ff596d0 pbrook
        i2c_bus *smbus;
1397 0ff596d0 pbrook
1398 0ff596d0 pbrook
        /* TODO: Populate SPD eeprom data.  */
1399 1452411b Avi Kivity
        smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100, isa_irq[9]);
1400 3fffc223 ths
        for (i = 0; i < 8; i++) {
1401 1ea96673 Paul Brook
            DeviceState *eeprom;
1402 02e2da45 Paul Brook
            eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1403 ee6847d1 Gerd Hoffmann
            qdev_prop_set_uint32(eeprom, "address", 0x50 + i);
1404 ee6847d1 Gerd Hoffmann
            qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1405 1ea96673 Paul Brook
            qdev_init(eeprom);
1406 3fffc223 ths
        }
1407 6515b203 bellard
    }
1408 3b46e624 ths
1409 a5954d5c bellard
    if (i440fx_state) {
1410 a5954d5c bellard
        i440fx_init_memory_mappings(i440fx_state);
1411 a5954d5c bellard
    }
1412 e4bcb14c ths
1413 7d8406be pbrook
    if (pci_enabled) {
1414 e4bcb14c ths
        int max_bus;
1415 9be5dafe Paul Brook
        int bus;
1416 96d30e48 ths
1417 e4bcb14c ths
        max_bus = drive_get_max_bus(IF_SCSI);
1418 e4bcb14c ths
        for (bus = 0; bus <= max_bus; bus++) {
1419 9be5dafe Paul Brook
            pci_create_simple(pci_bus, -1, "lsi53c895a");
1420 e4bcb14c ths
        }
1421 7d8406be pbrook
    }
1422 6e02c38d aliguori
1423 bd322087 aliguori
    /* Add virtio balloon device */
1424 7d4c3d53 Markus Armbruster
    if (pci_enabled && virtio_balloon) {
1425 7d4c3d53 Markus Armbruster
        pci_dev = pci_create("virtio-balloon-pci", virtio_balloon_devaddr);
1426 7d4c3d53 Markus Armbruster
        qdev_init(&pci_dev->qdev);
1427 2d72c572 Paul Brook
    }
1428 a2fa19f9 aliguori
1429 a2fa19f9 aliguori
    /* Add virtio console devices */
1430 a2fa19f9 aliguori
    if (pci_enabled) {
1431 a2fa19f9 aliguori
        for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1432 0e058a8a Paul Brook
            if (virtcon_hds[i]) {
1433 caea79a9 Mark McLoughlin
                pci_create_simple(pci_bus, -1, "virtio-console-pci");
1434 0e058a8a Paul Brook
            }
1435 a2fa19f9 aliguori
        }
1436 a2fa19f9 aliguori
    }
1437 80cabfad bellard
}
1438 b5ff2d6e bellard
1439 fbe1b595 Paul Brook
static void pc_init_pci(ram_addr_t ram_size,
1440 3023f332 aliguori
                        const char *boot_device,
1441 5fafdf24 ths
                        const char *kernel_filename,
1442 3dbbdc25 bellard
                        const char *kernel_cmdline,
1443 94fc95cd j_mayer
                        const char *initrd_filename,
1444 94fc95cd j_mayer
                        const char *cpu_model)
1445 3dbbdc25 bellard
{
1446 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1447 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1448 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 1);
1449 3dbbdc25 bellard
}
1450 3dbbdc25 bellard
1451 fbe1b595 Paul Brook
static void pc_init_isa(ram_addr_t ram_size,
1452 3023f332 aliguori
                        const char *boot_device,
1453 5fafdf24 ths
                        const char *kernel_filename,
1454 3dbbdc25 bellard
                        const char *kernel_cmdline,
1455 94fc95cd j_mayer
                        const char *initrd_filename,
1456 94fc95cd j_mayer
                        const char *cpu_model)
1457 3dbbdc25 bellard
{
1458 fbe1b595 Paul Brook
    pc_init1(ram_size, boot_device,
1459 3dbbdc25 bellard
             kernel_filename, kernel_cmdline,
1460 caea79a9 Mark McLoughlin
             initrd_filename, cpu_model, 0);
1461 3dbbdc25 bellard
}
1462 3dbbdc25 bellard
1463 0bacd130 aliguori
/* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1464 0bacd130 aliguori
   BIOS will read it and start S3 resume at POST Entry */
1465 0bacd130 aliguori
void cmos_set_s3_resume(void)
1466 0bacd130 aliguori
{
1467 0bacd130 aliguori
    if (rtc_state)
1468 0bacd130 aliguori
        rtc_set_memory(rtc_state, 0xF, 0xFE);
1469 0bacd130 aliguori
}
1470 0bacd130 aliguori
1471 f80f9ec9 Anthony Liguori
static QEMUMachine pc_machine = {
1472 95747581 Mark McLoughlin
    .name = "pc-0.11",
1473 95747581 Mark McLoughlin
    .alias = "pc",
1474 a245f2e7 aurel32
    .desc = "Standard PC",
1475 a245f2e7 aurel32
    .init = pc_init_pci,
1476 b2097003 aliguori
    .max_cpus = 255,
1477 0c257437 Anthony Liguori
    .is_default = 1,
1478 3dbbdc25 bellard
};
1479 3dbbdc25 bellard
1480 96cc1810 Gerd Hoffmann
static QEMUMachine pc_machine_v0_10 = {
1481 96cc1810 Gerd Hoffmann
    .name = "pc-0.10",
1482 96cc1810 Gerd Hoffmann
    .desc = "Standard PC, qemu 0.10",
1483 96cc1810 Gerd Hoffmann
    .init = pc_init_pci,
1484 96cc1810 Gerd Hoffmann
    .max_cpus = 255,
1485 96cc1810 Gerd Hoffmann
    .compat_props = (CompatProperty[]) {
1486 ab73ff29 Gerd Hoffmann
        {
1487 ab73ff29 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1488 ab73ff29 Gerd Hoffmann
            .property = "class",
1489 ab73ff29 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_STORAGE_OTHER),
1490 d6beee99 Gerd Hoffmann
        },{
1491 d6beee99 Gerd Hoffmann
            .driver   = "virtio-console-pci",
1492 d6beee99 Gerd Hoffmann
            .property = "class",
1493 d6beee99 Gerd Hoffmann
            .value    = stringify(PCI_CLASS_DISPLAY_OTHER),
1494 a1e0fea5 Gerd Hoffmann
        },{
1495 a1e0fea5 Gerd Hoffmann
            .driver   = "virtio-net-pci",
1496 a1e0fea5 Gerd Hoffmann
            .property = "vectors",
1497 a1e0fea5 Gerd Hoffmann
            .value    = stringify(0),
1498 177539e0 Gerd Hoffmann
        },{
1499 177539e0 Gerd Hoffmann
            .driver   = "virtio-blk-pci",
1500 177539e0 Gerd Hoffmann
            .property = "vectors",
1501 177539e0 Gerd Hoffmann
            .value    = stringify(0),
1502 ab73ff29 Gerd Hoffmann
        },
1503 96cc1810 Gerd Hoffmann
        { /* end of list */ }
1504 96cc1810 Gerd Hoffmann
    },
1505 96cc1810 Gerd Hoffmann
};
1506 96cc1810 Gerd Hoffmann
1507 f80f9ec9 Anthony Liguori
static QEMUMachine isapc_machine = {
1508 a245f2e7 aurel32
    .name = "isapc",
1509 a245f2e7 aurel32
    .desc = "ISA-only PC",
1510 a245f2e7 aurel32
    .init = pc_init_isa,
1511 b2097003 aliguori
    .max_cpus = 1,
1512 b5ff2d6e bellard
};
1513 f80f9ec9 Anthony Liguori
1514 f80f9ec9 Anthony Liguori
static void pc_machine_init(void)
1515 f80f9ec9 Anthony Liguori
{
1516 f80f9ec9 Anthony Liguori
    qemu_register_machine(&pc_machine);
1517 96cc1810 Gerd Hoffmann
    qemu_register_machine(&pc_machine_v0_10);
1518 f80f9ec9 Anthony Liguori
    qemu_register_machine(&isapc_machine);
1519 f80f9ec9 Anthony Liguori
}
1520 f80f9ec9 Anthony Liguori
1521 f80f9ec9 Anthony Liguori
machine_init(pc_machine_init);