root / hw / ide / ich.c @ a8aec295
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1 | 7fb6577b | Alexander Graf | /*
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2 | 7fb6577b | Alexander Graf | * QEMU ICH Emulation
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3 | 7fb6577b | Alexander Graf | *
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4 | 7fb6577b | Alexander Graf | * Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
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5 | 7fb6577b | Alexander Graf | * Copyright (c) 2010 Alexander Graf <agraf@suse.de>
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6 | 7fb6577b | Alexander Graf | *
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7 | 7fb6577b | Alexander Graf | * This library is free software; you can redistribute it and/or
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8 | 7fb6577b | Alexander Graf | * modify it under the terms of the GNU Lesser General Public
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9 | 7fb6577b | Alexander Graf | * License as published by the Free Software Foundation; either
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10 | 7fb6577b | Alexander Graf | * version 2 of the License, or (at your option) any later version.
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11 | 7fb6577b | Alexander Graf | *
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12 | 7fb6577b | Alexander Graf | * This library is distributed in the hope that it will be useful,
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13 | 7fb6577b | Alexander Graf | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 7fb6577b | Alexander Graf | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 7fb6577b | Alexander Graf | * Lesser General Public License for more details.
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16 | 7fb6577b | Alexander Graf | *
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17 | 7fb6577b | Alexander Graf | * You should have received a copy of the GNU Lesser General Public
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18 | 7fb6577b | Alexander Graf | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | 7fb6577b | Alexander Graf | *
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20 | 7fb6577b | Alexander Graf | *
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21 | 7fb6577b | Alexander Graf | * lspci dump of a ICH-9 real device
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22 | 7fb6577b | Alexander Graf | *
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23 | 7fb6577b | Alexander Graf | * 00:1f.2 SATA controller [0106]: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller [8086:2922] (rev 02) (prog-if 01 [AHCI 1.0])
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24 | 7fb6577b | Alexander Graf | * Subsystem: Intel Corporation 82801IR/IO/IH (ICH9R/DO/DH) 6 port SATA AHCI Controller [8086:2922]
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25 | 7fb6577b | Alexander Graf | * Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx+
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26 | 7fb6577b | Alexander Graf | * Status: Cap+ 66MHz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
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27 | 7fb6577b | Alexander Graf | * Latency: 0
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28 | 7fb6577b | Alexander Graf | * Interrupt: pin B routed to IRQ 222
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29 | 7fb6577b | Alexander Graf | * Region 0: I/O ports at d000 [size=8]
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30 | 7fb6577b | Alexander Graf | * Region 1: I/O ports at cc00 [size=4]
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31 | 7fb6577b | Alexander Graf | * Region 2: I/O ports at c880 [size=8]
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32 | 7fb6577b | Alexander Graf | * Region 3: I/O ports at c800 [size=4]
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33 | 7fb6577b | Alexander Graf | * Region 4: I/O ports at c480 [size=32]
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34 | 7fb6577b | Alexander Graf | * Region 5: Memory at febf9000 (32-bit, non-prefetchable) [size=2K]
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35 | 7fb6577b | Alexander Graf | * Capabilities: [80] Message Signalled Interrupts: Mask- 64bit- Count=1/16 Enable+
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36 | 7fb6577b | Alexander Graf | * Address: fee0f00c Data: 41d9
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37 | 7fb6577b | Alexander Graf | * Capabilities: [70] Power Management version 3
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38 | 7fb6577b | Alexander Graf | * Flags: PMEClk- DSI- D1- D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot+,D3cold-)
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39 | 7fb6577b | Alexander Graf | * Status: D0 PME-Enable- DSel=0 DScale=0 PME-
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40 | 7fb6577b | Alexander Graf | * Capabilities: [a8] SATA HBA <?>
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41 | 7fb6577b | Alexander Graf | * Capabilities: [b0] Vendor Specific Information <?>
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42 | 7fb6577b | Alexander Graf | * Kernel driver in use: ahci
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43 | 7fb6577b | Alexander Graf | * Kernel modules: ahci
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44 | 7fb6577b | Alexander Graf | * 00: 86 80 22 29 07 04 b0 02 02 01 06 01 00 00 00 00
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45 | 7fb6577b | Alexander Graf | * 10: 01 d0 00 00 01 cc 00 00 81 c8 00 00 01 c8 00 00
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46 | 7fb6577b | Alexander Graf | * 20: 81 c4 00 00 00 90 bf fe 00 00 00 00 86 80 22 29
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47 | 7fb6577b | Alexander Graf | * 30: 00 00 00 00 80 00 00 00 00 00 00 00 0f 02 00 00
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48 | 7fb6577b | Alexander Graf | * 40: 00 80 00 80 00 00 00 00 00 00 00 00 00 00 00 00
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49 | 7fb6577b | Alexander Graf | * 50: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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50 | 7fb6577b | Alexander Graf | * 60: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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51 | 7fb6577b | Alexander Graf | * 70: 01 a8 03 40 08 00 00 00 00 00 00 00 00 00 00 00
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52 | 7fb6577b | Alexander Graf | * 80: 05 70 09 00 0c f0 e0 fe d9 41 00 00 00 00 00 00
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53 | 7fb6577b | Alexander Graf | * 90: 40 00 0f 82 93 01 00 00 00 00 00 00 00 00 00 00
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54 | 7fb6577b | Alexander Graf | * a0: ac 00 00 00 0a 00 12 00 12 b0 10 00 48 00 00 00
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55 | 7fb6577b | Alexander Graf | * b0: 09 00 06 20 00 00 00 00 00 00 00 00 00 00 00 00
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56 | 7fb6577b | Alexander Graf | * c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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57 | 7fb6577b | Alexander Graf | * d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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58 | 7fb6577b | Alexander Graf | * e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
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59 | 7fb6577b | Alexander Graf | * f0: 00 00 00 00 00 00 00 00 86 0f 02 00 00 00 00 00
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60 | 7fb6577b | Alexander Graf | *
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61 | 7fb6577b | Alexander Graf | */
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62 | 7fb6577b | Alexander Graf | |
63 | 03c7a6a8 | Sebastian Herbszt | #include <hw/hw.h> |
64 | a2cb15b0 | Michael S. Tsirkin | #include <hw/pci/msi.h> |
65 | 0d09e41a | Paolo Bonzini | #include <hw/i386/pc.h> |
66 | a2cb15b0 | Michael S. Tsirkin | #include <hw/pci/pci.h> |
67 | 0d09e41a | Paolo Bonzini | #include <hw/isa/isa.h> |
68 | 737e150e | Paolo Bonzini | #include "block/block.h" |
69 | 9c17d615 | Paolo Bonzini | #include "sysemu/dma.h" |
70 | 03c7a6a8 | Sebastian Herbszt | |
71 | 03c7a6a8 | Sebastian Herbszt | #include <hw/ide/pci.h> |
72 | 03c7a6a8 | Sebastian Herbszt | #include <hw/ide/ahci.h> |
73 | 03c7a6a8 | Sebastian Herbszt | |
74 | 465f1ab1 | Daniel Verkamp | #define ICH9_SATA_CAP_OFFSET 0xA8 |
75 | 465f1ab1 | Daniel Verkamp | |
76 | 465f1ab1 | Daniel Verkamp | #define ICH9_IDP_BAR 4 |
77 | 465f1ab1 | Daniel Verkamp | #define ICH9_MEM_BAR 5 |
78 | 465f1ab1 | Daniel Verkamp | |
79 | 465f1ab1 | Daniel Verkamp | #define ICH9_IDP_INDEX 0x10 |
80 | 465f1ab1 | Daniel Verkamp | #define ICH9_IDP_INDEX_LOG2 0x04 |
81 | 465f1ab1 | Daniel Verkamp | |
82 | a2623021 | Jason Baron | static const VMStateDescription vmstate_ich9_ahci = { |
83 | a2623021 | Jason Baron | .name = "ich9_ahci",
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84 | a2623021 | Jason Baron | .unmigratable = 1, /* Still buggy under I/O load */ |
85 | a2623021 | Jason Baron | .version_id = 1,
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86 | a2623021 | Jason Baron | .fields = (VMStateField []) { |
87 | a2623021 | Jason Baron | VMSTATE_PCI_DEVICE(card, AHCIPCIState), |
88 | a2623021 | Jason Baron | VMSTATE_AHCI(ahci, AHCIPCIState), |
89 | a2623021 | Jason Baron | VMSTATE_END_OF_LIST() |
90 | a2623021 | Jason Baron | }, |
91 | b7ce1b27 | Gerd Hoffmann | }; |
92 | b7ce1b27 | Gerd Hoffmann | |
93 | 8ab60a07 | Jan Kiszka | static void pci_ich9_reset(DeviceState *dev) |
94 | 868a1a52 | Jan Kiszka | { |
95 | 8ab60a07 | Jan Kiszka | struct AHCIPCIState *d = DO_UPCAST(struct AHCIPCIState, card.qdev, dev); |
96 | 868a1a52 | Jan Kiszka | |
97 | 8ab60a07 | Jan Kiszka | ahci_reset(&d->ahci); |
98 | 868a1a52 | Jan Kiszka | } |
99 | 868a1a52 | Jan Kiszka | |
100 | 7fb6577b | Alexander Graf | static int pci_ich9_ahci_init(PCIDevice *dev) |
101 | 03c7a6a8 | Sebastian Herbszt | { |
102 | 03c7a6a8 | Sebastian Herbszt | struct AHCIPCIState *d;
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103 | 465f1ab1 | Daniel Verkamp | int sata_cap_offset;
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104 | 465f1ab1 | Daniel Verkamp | uint8_t *sata_cap; |
105 | 03c7a6a8 | Sebastian Herbszt | d = DO_UPCAST(struct AHCIPCIState, card, dev);
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106 | 03c7a6a8 | Sebastian Herbszt | |
107 | df32fd1c | Paolo Bonzini | ahci_init(&d->ahci, &dev->qdev, pci_get_address_space(dev), 6);
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108 | 69c8944f | Michael S. Tsirkin | |
109 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_prog_interface(d->card.config, AHCI_PROGMODE_MAJOR_REV_1); |
110 | 03c7a6a8 | Sebastian Herbszt | |
111 | 03c7a6a8 | Sebastian Herbszt | d->card.config[PCI_CACHE_LINE_SIZE] = 0x08; /* Cache line size */ |
112 | 03c7a6a8 | Sebastian Herbszt | d->card.config[PCI_LATENCY_TIMER] = 0x00; /* Latency timer */ |
113 | 03c7a6a8 | Sebastian Herbszt | pci_config_set_interrupt_pin(d->card.config, 1);
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114 | 03c7a6a8 | Sebastian Herbszt | |
115 | 03c7a6a8 | Sebastian Herbszt | /* XXX Software should program this register */
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116 | 03c7a6a8 | Sebastian Herbszt | d->card.config[0x90] = 1 << 6; /* Address Map Register - AHCI mode */ |
117 | 03c7a6a8 | Sebastian Herbszt | |
118 | 03c7a6a8 | Sebastian Herbszt | msi_init(dev, 0x50, 1, true, false); |
119 | 03c7a6a8 | Sebastian Herbszt | d->ahci.irq = d->card.irq[0];
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120 | 03c7a6a8 | Sebastian Herbszt | |
121 | 465f1ab1 | Daniel Verkamp | pci_register_bar(&d->card, ICH9_IDP_BAR, PCI_BASE_ADDRESS_SPACE_IO, |
122 | 465f1ab1 | Daniel Verkamp | &d->ahci.idp); |
123 | 465f1ab1 | Daniel Verkamp | pci_register_bar(&d->card, ICH9_MEM_BAR, PCI_BASE_ADDRESS_SPACE_MEMORY, |
124 | 465f1ab1 | Daniel Verkamp | &d->ahci.mem); |
125 | 465f1ab1 | Daniel Verkamp | |
126 | 465f1ab1 | Daniel Verkamp | sata_cap_offset = pci_add_capability(&d->card, PCI_CAP_ID_SATA, |
127 | 465f1ab1 | Daniel Verkamp | ICH9_SATA_CAP_OFFSET, SATA_CAP_SIZE); |
128 | 465f1ab1 | Daniel Verkamp | if (sata_cap_offset < 0) { |
129 | 465f1ab1 | Daniel Verkamp | return sata_cap_offset;
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130 | 465f1ab1 | Daniel Verkamp | } |
131 | 465f1ab1 | Daniel Verkamp | |
132 | 465f1ab1 | Daniel Verkamp | sata_cap = d->card.config + sata_cap_offset; |
133 | 465f1ab1 | Daniel Verkamp | pci_set_word(sata_cap + SATA_CAP_REV, 0x10);
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134 | 465f1ab1 | Daniel Verkamp | pci_set_long(sata_cap + SATA_CAP_BAR, |
135 | 465f1ab1 | Daniel Verkamp | (ICH9_IDP_BAR + 0x4) | (ICH9_IDP_INDEX_LOG2 << 4)); |
136 | 465f1ab1 | Daniel Verkamp | d->ahci.idp_offset = ICH9_IDP_INDEX; |
137 | 96d19bcb | Jan Kiszka | |
138 | 03c7a6a8 | Sebastian Herbszt | return 0; |
139 | 03c7a6a8 | Sebastian Herbszt | } |
140 | 03c7a6a8 | Sebastian Herbszt | |
141 | f90c2bcd | Alex Williamson | static void pci_ich9_uninit(PCIDevice *dev) |
142 | 7fb6577b | Alexander Graf | { |
143 | 7fb6577b | Alexander Graf | struct AHCIPCIState *d;
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144 | 7fb6577b | Alexander Graf | d = DO_UPCAST(struct AHCIPCIState, card, dev);
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145 | 7fb6577b | Alexander Graf | |
146 | 45fe15c2 | Jan Kiszka | msi_uninit(dev); |
147 | 2c4b9d0e | Alexander Graf | ahci_uninit(&d->ahci); |
148 | 7fb6577b | Alexander Graf | } |
149 | 7fb6577b | Alexander Graf | |
150 | 40021f08 | Anthony Liguori | static void ich_ahci_class_init(ObjectClass *klass, void *data) |
151 | 40021f08 | Anthony Liguori | { |
152 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
153 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
154 | 40021f08 | Anthony Liguori | |
155 | 40021f08 | Anthony Liguori | k->init = pci_ich9_ahci_init; |
156 | 40021f08 | Anthony Liguori | k->exit = pci_ich9_uninit; |
157 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_INTEL; |
158 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_INTEL_82801IR; |
159 | 40021f08 | Anthony Liguori | k->revision = 0x02;
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160 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_STORAGE_SATA; |
161 | a2623021 | Jason Baron | dc->vmsd = &vmstate_ich9_ahci; |
162 | 8ab60a07 | Jan Kiszka | dc->reset = pci_ich9_reset; |
163 | 40021f08 | Anthony Liguori | } |
164 | 40021f08 | Anthony Liguori | |
165 | 8c43a6f0 | Andreas Färber | static const TypeInfo ich_ahci_info = { |
166 | 39bffca2 | Anthony Liguori | .name = "ich9-ahci",
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167 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
168 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(AHCIPCIState),
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169 | 39bffca2 | Anthony Liguori | .class_init = ich_ahci_class_init, |
170 | 03c7a6a8 | Sebastian Herbszt | }; |
171 | 03c7a6a8 | Sebastian Herbszt | |
172 | 83f7d43a | Andreas Färber | static void ich_ahci_register_types(void) |
173 | 03c7a6a8 | Sebastian Herbszt | { |
174 | 39bffca2 | Anthony Liguori | type_register_static(&ich_ahci_info); |
175 | 03c7a6a8 | Sebastian Herbszt | } |
176 | 83f7d43a | Andreas Färber | |
177 | 83f7d43a | Andreas Färber | type_init(ich_ahci_register_types) |