root / target-ppc / op_mem.h @ a8d3431a
History | View | Annotate | Download (5.6 kB)
1 |
/* External helpers */
|
---|---|
2 |
void glue(do_lsw, MEMSUFFIX) (int dst); |
3 |
void glue(do_stsw, MEMSUFFIX) (int src); |
4 |
|
5 |
static inline uint16_t glue(ld16r, MEMSUFFIX) (target_ulong EA) |
6 |
{ |
7 |
uint16_t tmp = glue(lduw, MEMSUFFIX)(EA); |
8 |
return ((tmp & 0xFF00) >> 8) | ((tmp & 0x00FF) << 8); |
9 |
} |
10 |
|
11 |
static inline uint32_t glue(ld32r, MEMSUFFIX) (target_ulong EA) |
12 |
{ |
13 |
uint32_t tmp = glue(ldl, MEMSUFFIX)(EA); |
14 |
return ((tmp & 0xFF000000) >> 24) | ((tmp & 0x00FF0000) >> 8) | |
15 |
((tmp & 0x0000FF00) << 8) | ((tmp & 0x000000FF) << 24); |
16 |
} |
17 |
|
18 |
static inline void glue(st16r, MEMSUFFIX) (target_ulong EA, uint16_t data) |
19 |
{ |
20 |
uint16_t tmp = ((data & 0xFF00) >> 8) | ((data & 0x00FF) << 8); |
21 |
glue(stw, MEMSUFFIX)(EA, tmp); |
22 |
} |
23 |
|
24 |
static inline void glue(st32r, MEMSUFFIX) (target_ulong EA, uint32_t data) |
25 |
{ |
26 |
uint32_t tmp = ((data & 0xFF000000) >> 24) | ((data & 0x00FF0000) >> 8) | |
27 |
((data & 0x0000FF00) << 8) | ((data & 0x000000FF) << 24); |
28 |
glue(stl, MEMSUFFIX)(EA, tmp); |
29 |
} |
30 |
|
31 |
/*** Integer load ***/
|
32 |
#define PPC_LD_OP(name, op) \
|
33 |
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ |
34 |
{ \ |
35 |
T1 = glue(op, MEMSUFFIX)(T0); \ |
36 |
RETURN(); \ |
37 |
} |
38 |
|
39 |
#define PPC_ST_OP(name, op) \
|
40 |
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ |
41 |
{ \ |
42 |
glue(op, MEMSUFFIX)(T0, T1); \ |
43 |
RETURN(); \ |
44 |
} |
45 |
|
46 |
PPC_LD_OP(bz, ldub); |
47 |
PPC_LD_OP(ha, ldsw); |
48 |
PPC_LD_OP(hz, lduw); |
49 |
PPC_LD_OP(wz, ldl); |
50 |
|
51 |
/*** Integer store ***/
|
52 |
PPC_ST_OP(b, stb); |
53 |
PPC_ST_OP(h, stw); |
54 |
PPC_ST_OP(w, stl); |
55 |
|
56 |
/*** Integer load and store with byte reverse ***/
|
57 |
PPC_LD_OP(hbr, ld16r); |
58 |
PPC_LD_OP(wbr, ld32r); |
59 |
PPC_ST_OP(hbr, st16r); |
60 |
PPC_ST_OP(wbr, st32r); |
61 |
|
62 |
/*** Integer load and store multiple ***/
|
63 |
PPC_OP(glue(lmw, MEMSUFFIX)) |
64 |
{ |
65 |
int dst = PARAM(1); |
66 |
|
67 |
for (; dst < 32; dst++, T0 += 4) { |
68 |
ugpr(dst) = glue(ldl, MEMSUFFIX)(T0); |
69 |
} |
70 |
RETURN(); |
71 |
} |
72 |
|
73 |
PPC_OP(glue(stmw, MEMSUFFIX)) |
74 |
{ |
75 |
int src = PARAM(1); |
76 |
|
77 |
for (; src < 32; src++, T0 += 4) { |
78 |
glue(stl, MEMSUFFIX)(T0, ugpr(src)); |
79 |
} |
80 |
RETURN(); |
81 |
} |
82 |
|
83 |
/*** Integer load and store strings ***/
|
84 |
PPC_OP(glue(lswi, MEMSUFFIX)) |
85 |
{ |
86 |
glue(do_lsw, MEMSUFFIX)(PARAM(1));
|
87 |
RETURN(); |
88 |
} |
89 |
|
90 |
/* PPC32 specification says we must generate an exception if
|
91 |
* rA is in the range of registers to be loaded.
|
92 |
* In an other hand, IBM says this is valid, but rA won't be loaded.
|
93 |
* For now, I'll follow the spec...
|
94 |
*/
|
95 |
PPC_OP(glue(lswx, MEMSUFFIX)) |
96 |
{ |
97 |
if (T1 > 0) { |
98 |
if ((PARAM(1) < PARAM(2) && (PARAM(1) + T1) > PARAM(2)) || |
99 |
(PARAM(1) < PARAM(3) && (PARAM(1) + T1) > PARAM(3))) { |
100 |
do_raise_exception_err(EXCP_PROGRAM, EXCP_INVAL | EXCP_INVAL_LSWX); |
101 |
} else {
|
102 |
glue(do_lsw, MEMSUFFIX)(PARAM(1));
|
103 |
} |
104 |
} |
105 |
RETURN(); |
106 |
} |
107 |
|
108 |
PPC_OP(glue(stsw, MEMSUFFIX)) |
109 |
{ |
110 |
glue(do_stsw, MEMSUFFIX)(PARAM(1));
|
111 |
RETURN(); |
112 |
} |
113 |
|
114 |
/*** Floating-point store ***/
|
115 |
#define PPC_STF_OP(name, op) \
|
116 |
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \ |
117 |
{ \ |
118 |
glue(op, MEMSUFFIX)(T0, FT1); \ |
119 |
RETURN(); \ |
120 |
} |
121 |
|
122 |
PPC_STF_OP(fd, stfq); |
123 |
PPC_STF_OP(fs, stfl); |
124 |
|
125 |
/*** Floating-point load ***/
|
126 |
#define PPC_LDF_OP(name, op) \
|
127 |
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \ |
128 |
{ \ |
129 |
FT1 = glue(op, MEMSUFFIX)(T0); \ |
130 |
RETURN(); \ |
131 |
} |
132 |
|
133 |
PPC_LDF_OP(fd, ldfq); |
134 |
PPC_LDF_OP(fs, ldfl); |
135 |
|
136 |
/* Load and set reservation */
|
137 |
PPC_OP(glue(lwarx, MEMSUFFIX)) |
138 |
{ |
139 |
if (T0 & 0x03) { |
140 |
do_raise_exception(EXCP_ALIGN); |
141 |
} else {
|
142 |
T1 = glue(ldl, MEMSUFFIX)(T0); |
143 |
regs->reserve = T0; |
144 |
} |
145 |
RETURN(); |
146 |
} |
147 |
|
148 |
/* Store with reservation */
|
149 |
PPC_OP(glue(stwcx, MEMSUFFIX)) |
150 |
{ |
151 |
if (T0 & 0x03) { |
152 |
do_raise_exception(EXCP_ALIGN); |
153 |
} else {
|
154 |
if (regs->reserve != T0) {
|
155 |
env->crf[0] = xer_ov;
|
156 |
} else {
|
157 |
glue(stl, MEMSUFFIX)(T0, T1); |
158 |
env->crf[0] = xer_ov | 0x02; |
159 |
} |
160 |
} |
161 |
regs->reserve = 0;
|
162 |
RETURN(); |
163 |
} |
164 |
|
165 |
PPC_OP(glue(dcbz, MEMSUFFIX)) |
166 |
{ |
167 |
glue(stl, MEMSUFFIX)(T0 + 0x00, 0); |
168 |
glue(stl, MEMSUFFIX)(T0 + 0x04, 0); |
169 |
glue(stl, MEMSUFFIX)(T0 + 0x08, 0); |
170 |
glue(stl, MEMSUFFIX)(T0 + 0x0C, 0); |
171 |
glue(stl, MEMSUFFIX)(T0 + 0x10, 0); |
172 |
glue(stl, MEMSUFFIX)(T0 + 0x14, 0); |
173 |
glue(stl, MEMSUFFIX)(T0 + 0x18, 0); |
174 |
glue(stl, MEMSUFFIX)(T0 + 0x1C, 0); |
175 |
RETURN(); |
176 |
} |
177 |
|
178 |
/* External access */
|
179 |
PPC_OP(glue(eciwx, MEMSUFFIX)) |
180 |
{ |
181 |
T1 = glue(ldl, MEMSUFFIX)(T0); |
182 |
RETURN(); |
183 |
} |
184 |
|
185 |
PPC_OP(glue(ecowx, MEMSUFFIX)) |
186 |
{ |
187 |
glue(stl, MEMSUFFIX)(T0, T1); |
188 |
RETURN(); |
189 |
} |
190 |
|
191 |
#undef MEMSUFFIX
|