Revision aaed909a linux-user/main.c
| b/linux-user/main.c | ||
|---|---|---|
| 1970 | 1970 |
/* Scan interp_prefix dir for replacement files. */ |
| 1971 | 1971 |
init_paths(interp_prefix); |
| 1972 | 1972 |
|
| 1973 |
#if defined(TARGET_I386) |
|
| 1974 |
/* must be done before cpu_init() for x86 XXX: suppress this hack |
|
| 1975 |
by adding a new parameter to cpu_init and by suppressing |
|
| 1976 |
cpu_xxx_register() */ |
|
| 1977 | 1973 |
if (cpu_model == NULL) {
|
| 1974 |
#if defined(TARGET_I386) |
|
| 1978 | 1975 |
#ifdef TARGET_X86_64 |
| 1979 | 1976 |
cpu_model = "qemu64"; |
| 1980 | 1977 |
#else |
| 1981 | 1978 |
cpu_model = "qemu32"; |
| 1982 | 1979 |
#endif |
| 1983 |
} |
|
| 1984 |
if (x86_find_cpu_by_name(cpu_model)) {
|
|
| 1985 |
fprintf(stderr, "Unable to find x86 CPU definition\n"); |
|
| 1986 |
exit(1); |
|
| 1987 |
} |
|
| 1980 |
#elif defined(TARGET_ARM) |
|
| 1981 |
cpu_model = "arm926"; |
|
| 1982 |
#elif defined(TARGET_M68K) |
|
| 1983 |
cpu_model = "any"; |
|
| 1984 |
#elif defined(TARGET_SPARC) |
|
| 1985 |
#ifdef TARGET_SPARC64 |
|
| 1986 |
cpu_model = "TI UltraSparc II"; |
|
| 1987 |
#else |
|
| 1988 |
cpu_model = "Fujitsu MB86904"; |
|
| 1988 | 1989 |
#endif |
| 1989 |
|
|
| 1990 |
#elif defined(TARGET_MIPS) |
|
| 1991 |
#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) |
|
| 1992 |
cpu_model = "20Kc"; |
|
| 1993 |
#else |
|
| 1994 |
cpu_model = "24Kf"; |
|
| 1995 |
#endif |
|
| 1996 |
#elif defined(TARGET_PPC) |
|
| 1997 |
cpu_model = "750"; |
|
| 1998 |
#else |
|
| 1999 |
cpu_model = "any"; |
|
| 2000 |
#endif |
|
| 2001 |
} |
|
| 1990 | 2002 |
/* NOTE: we need to init the CPU at this stage to get |
| 1991 | 2003 |
qemu_host_page_size */ |
| 1992 |
env = cpu_init(); |
|
| 2004 |
env = cpu_init(cpu_model); |
|
| 2005 |
if (!env) {
|
|
| 2006 |
fprintf(stderr, "Unable to find CPU definition\n"); |
|
| 2007 |
exit(1); |
|
| 2008 |
} |
|
| 1993 | 2009 |
global_env = env; |
| 1994 | 2010 |
|
| 1995 | 2011 |
if(getenv("QEMU_STRACE") ){
|
| ... | ... | |
| 2130 | 2146 |
#elif defined(TARGET_ARM) |
| 2131 | 2147 |
{
|
| 2132 | 2148 |
int i; |
| 2133 |
if (cpu_model == NULL) |
|
| 2134 |
cpu_model = "arm926"; |
|
| 2135 |
cpu_arm_set_model(env, cpu_model); |
|
| 2136 | 2149 |
cpsr_write(env, regs->uregs[16], 0xffffffff); |
| 2137 | 2150 |
for(i = 0; i < 16; i++) {
|
| 2138 | 2151 |
env->regs[i] = regs->uregs[i]; |
| ... | ... | |
| 2141 | 2154 |
#elif defined(TARGET_SPARC) |
| 2142 | 2155 |
{
|
| 2143 | 2156 |
int i; |
| 2144 |
const sparc_def_t *def; |
|
| 2145 |
#ifdef TARGET_SPARC64 |
|
| 2146 |
if (cpu_model == NULL) |
|
| 2147 |
cpu_model = "TI UltraSparc II"; |
|
| 2148 |
#else |
|
| 2149 |
if (cpu_model == NULL) |
|
| 2150 |
cpu_model = "Fujitsu MB86904"; |
|
| 2151 |
#endif |
|
| 2152 |
sparc_find_by_name(cpu_model, &def); |
|
| 2153 |
if (def == NULL) {
|
|
| 2154 |
fprintf(stderr, "Unable to find Sparc CPU definition\n"); |
|
| 2155 |
exit(1); |
|
| 2156 |
} |
|
| 2157 |
cpu_sparc_register(env, def, 0); |
|
| 2158 | 2157 |
env->pc = regs->pc; |
| 2159 | 2158 |
env->npc = regs->npc; |
| 2160 | 2159 |
env->y = regs->y; |
| ... | ... | |
| 2165 | 2164 |
} |
| 2166 | 2165 |
#elif defined(TARGET_PPC) |
| 2167 | 2166 |
{
|
| 2168 |
ppc_def_t *def; |
|
| 2169 | 2167 |
int i; |
| 2170 | 2168 |
|
| 2171 |
/* Choose and initialise CPU */ |
|
| 2172 |
if (cpu_model == NULL) |
|
| 2173 |
cpu_model = "750"; |
|
| 2174 |
ppc_find_by_name(cpu_model, &def); |
|
| 2175 |
if (def == NULL) {
|
|
| 2176 |
cpu_abort(env, |
|
| 2177 |
"Unable to find PowerPC CPU definition\n"); |
|
| 2178 |
} |
|
| 2179 |
cpu_ppc_register(env, def); |
|
| 2180 |
cpu_ppc_reset(env); |
|
| 2181 | 2169 |
#if defined(TARGET_PPC64) |
| 2182 | 2170 |
#if defined(TARGET_ABI32) |
| 2183 | 2171 |
env->msr &= ~((target_ulong)1 << MSR_SF); |
| ... | ... | |
| 2192 | 2180 |
} |
| 2193 | 2181 |
#elif defined(TARGET_M68K) |
| 2194 | 2182 |
{
|
| 2195 |
if (cpu_model == NULL) |
|
| 2196 |
cpu_model = "any"; |
|
| 2197 |
if (cpu_m68k_set_model(env, cpu_model)) {
|
|
| 2198 |
cpu_abort(cpu_single_env, |
|
| 2199 |
"Unable to find m68k CPU definition\n"); |
|
| 2200 |
} |
|
| 2201 | 2183 |
env->pc = regs->pc; |
| 2202 | 2184 |
env->dregs[0] = regs->d0; |
| 2203 | 2185 |
env->dregs[1] = regs->d1; |
| ... | ... | |
| 2220 | 2202 |
} |
| 2221 | 2203 |
#elif defined(TARGET_MIPS) |
| 2222 | 2204 |
{
|
| 2223 |
mips_def_t *def; |
|
| 2224 | 2205 |
int i; |
| 2225 | 2206 |
|
| 2226 |
/* Choose and initialise CPU */ |
|
| 2227 |
if (cpu_model == NULL) |
|
| 2228 |
#if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64) |
|
| 2229 |
cpu_model = "20Kc"; |
|
| 2230 |
#else |
|
| 2231 |
cpu_model = "24Kf"; |
|
| 2232 |
#endif |
|
| 2233 |
mips_find_by_name(cpu_model, &def); |
|
| 2234 |
if (def == NULL) |
|
| 2235 |
cpu_abort(env, "Unable to find MIPS CPU definition\n"); |
|
| 2236 |
cpu_mips_register(env, def); |
|
| 2237 |
|
|
| 2238 | 2207 |
for(i = 0; i < 32; i++) {
|
| 2239 | 2208 |
env->gpr[i][env->current_tc] = regs->regs[i]; |
| 2240 | 2209 |
} |
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