Statistics
| Branch: | Revision:

root / hw / audio / sb16.c @ ab8131af

History | View | Annotate | Download (35.1 kB)

1 27503323 bellard
/*
2 27503323 bellard
 * QEMU Soundblaster 16 emulation
3 1d14ffa9 bellard
 *
4 1d14ffa9 bellard
 * Copyright (c) 2003-2005 Vassili Karpov (malc)
5 1d14ffa9 bellard
 *
6 27503323 bellard
 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 27503323 bellard
 * of this software and associated documentation files (the "Software"), to deal
8 27503323 bellard
 * in the Software without restriction, including without limitation the rights
9 27503323 bellard
 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 27503323 bellard
 * copies of the Software, and to permit persons to whom the Software is
11 27503323 bellard
 * furnished to do so, subject to the following conditions:
12 27503323 bellard
 *
13 27503323 bellard
 * The above copyright notice and this permission notice shall be included in
14 27503323 bellard
 * all copies or substantial portions of the Software.
15 27503323 bellard
 *
16 27503323 bellard
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 27503323 bellard
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 27503323 bellard
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 27503323 bellard
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 27503323 bellard
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 27503323 bellard
 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 27503323 bellard
 * THE SOFTWARE.
23 27503323 bellard
 */
24 83c9f4ca Paolo Bonzini
#include "hw/hw.h"
25 0d09e41a Paolo Bonzini
#include "hw/audio/audio.h"
26 87ecb68b pbrook
#include "audio/audio.h"
27 0d09e41a Paolo Bonzini
#include "hw/isa/isa.h"
28 83c9f4ca Paolo Bonzini
#include "hw/qdev.h"
29 1de7afc9 Paolo Bonzini
#include "qemu/timer.h"
30 1de7afc9 Paolo Bonzini
#include "qemu/host-utils.h"
31 27503323 bellard
32 fb065187 bellard
#define dolog(...) AUD_log ("sb16", __VA_ARGS__)
33 15b61470 bellard
34 15b61470 bellard
/* #define DEBUG */
35 15b61470 bellard
/* #define DEBUG_SB16_MOST */
36 15b61470 bellard
37 fb065187 bellard
#ifdef DEBUG
38 fb065187 bellard
#define ldebug(...) dolog (__VA_ARGS__)
39 fb065187 bellard
#else
40 fb065187 bellard
#define ldebug(...)
41 fb065187 bellard
#endif
42 fb065187 bellard
43 85571bc7 bellard
#define IO_READ_PROTO(name)                             \
44 7d977de7 bellard
    uint32_t name (void *opaque, uint32_t nport)
45 85571bc7 bellard
#define IO_WRITE_PROTO(name)                                    \
46 7d977de7 bellard
    void name (void *opaque, uint32_t nport, uint32_t val)
47 27503323 bellard
48 85571bc7 bellard
static const char e3[] = "COPYRIGHT (C) CREATIVE TECHNOLOGY LTD, 1992.";
49 d329a6fb bellard
50 399f05a6 Andreas Färber
#define TYPE_SB16 "sb16"
51 399f05a6 Andreas Färber
#define SB16(obj) OBJECT_CHECK (SB16State, (obj), TYPE_SB16)
52 399f05a6 Andreas Färber
53 5e2a6443 bellard
typedef struct SB16State {
54 399f05a6 Andreas Färber
    ISADevice parent_obj;
55 399f05a6 Andreas Färber
56 c0fe3827 bellard
    QEMUSoundCard card;
57 3a38d437 Jes Sorensen
    qemu_irq pic;
58 f7b4f61f Gerd Hoffmann
    uint32_t irq;
59 f7b4f61f Gerd Hoffmann
    uint32_t dma;
60 f7b4f61f Gerd Hoffmann
    uint32_t hdma;
61 f7b4f61f Gerd Hoffmann
    uint32_t port;
62 f7b4f61f Gerd Hoffmann
    uint32_t ver;
63 85571bc7 bellard
64 27503323 bellard
    int in_index;
65 27503323 bellard
    int out_data_len;
66 27503323 bellard
    int fmt_stereo;
67 27503323 bellard
    int fmt_signed;
68 27503323 bellard
    int fmt_bits;
69 85571bc7 bellard
    audfmt_e fmt;
70 27503323 bellard
    int dma_auto;
71 85571bc7 bellard
    int block_size;
72 27503323 bellard
    int fifo;
73 27503323 bellard
    int freq;
74 27503323 bellard
    int time_const;
75 27503323 bellard
    int speaker;
76 27503323 bellard
    int needed_bytes;
77 27503323 bellard
    int cmd;
78 27503323 bellard
    int use_hdma;
79 85571bc7 bellard
    int highspeed;
80 85571bc7 bellard
    int can_write;
81 27503323 bellard
82 27503323 bellard
    int v2x6;
83 27503323 bellard
84 85571bc7 bellard
    uint8_t csp_param;
85 85571bc7 bellard
    uint8_t csp_value;
86 85571bc7 bellard
    uint8_t csp_mode;
87 85571bc7 bellard
    uint8_t csp_regs[256];
88 85571bc7 bellard
    uint8_t csp_index;
89 85571bc7 bellard
    uint8_t csp_reg83[4];
90 85571bc7 bellard
    int csp_reg83r;
91 85571bc7 bellard
    int csp_reg83w;
92 85571bc7 bellard
93 d75d9f6b bellard
    uint8_t in2_data[10];
94 85571bc7 bellard
    uint8_t out_data[50];
95 85571bc7 bellard
    uint8_t test_reg;
96 85571bc7 bellard
    uint8_t last_read_byte;
97 85571bc7 bellard
    int nzero;
98 27503323 bellard
99 27503323 bellard
    int left_till_irq;
100 27503323 bellard
101 85571bc7 bellard
    int dma_running;
102 85571bc7 bellard
    int bytes_per_second;
103 85571bc7 bellard
    int align;
104 1d14ffa9 bellard
    int audio_free;
105 1d14ffa9 bellard
    SWVoiceOut *voice;
106 85571bc7 bellard
107 1d14ffa9 bellard
    QEMUTimer *aux_ts;
108 5e2a6443 bellard
    /* mixer state */
109 5e2a6443 bellard
    int mixer_nreg;
110 202a456a bellard
    uint8_t mixer_regs[256];
111 5e2a6443 bellard
} SB16State;
112 27503323 bellard
113 1d14ffa9 bellard
static void SB_audio_callback (void *opaque, int free);
114 1d14ffa9 bellard
115 85571bc7 bellard
static int magic_of_irq (int irq)
116 85571bc7 bellard
{
117 85571bc7 bellard
    switch (irq) {
118 85571bc7 bellard
    case 5:
119 85571bc7 bellard
        return 2;
120 85571bc7 bellard
    case 7:
121 85571bc7 bellard
        return 4;
122 85571bc7 bellard
    case 9:
123 85571bc7 bellard
        return 1;
124 85571bc7 bellard
    case 10:
125 85571bc7 bellard
        return 8;
126 85571bc7 bellard
    default:
127 85571bc7 bellard
        dolog ("bad irq %d\n", irq);
128 85571bc7 bellard
        return 2;
129 85571bc7 bellard
    }
130 85571bc7 bellard
}
131 85571bc7 bellard
132 85571bc7 bellard
static int irq_of_magic (int magic)
133 85571bc7 bellard
{
134 85571bc7 bellard
    switch (magic) {
135 85571bc7 bellard
    case 1:
136 85571bc7 bellard
        return 9;
137 85571bc7 bellard
    case 2:
138 85571bc7 bellard
        return 5;
139 85571bc7 bellard
    case 4:
140 85571bc7 bellard
        return 7;
141 85571bc7 bellard
    case 8:
142 85571bc7 bellard
        return 10;
143 85571bc7 bellard
    default:
144 85571bc7 bellard
        dolog ("bad irq magic %d\n", magic);
145 85571bc7 bellard
        return -1;
146 85571bc7 bellard
    }
147 85571bc7 bellard
}
148 85571bc7 bellard
149 85571bc7 bellard
#if 0
150 5e2a6443 bellard
static void log_dsp (SB16State *dsp)
151 5e2a6443 bellard
{
152 85571bc7 bellard
    ldebug ("%s:%s:%d:%s:dmasize=%d:freq=%d:const=%d:speaker=%d\n",
153 85571bc7 bellard
            dsp->fmt_stereo ? "Stereo" : "Mono",
154 85571bc7 bellard
            dsp->fmt_signed ? "Signed" : "Unsigned",
155 85571bc7 bellard
            dsp->fmt_bits,
156 85571bc7 bellard
            dsp->dma_auto ? "Auto" : "Single",
157 85571bc7 bellard
            dsp->block_size,
158 85571bc7 bellard
            dsp->freq,
159 85571bc7 bellard
            dsp->time_const,
160 85571bc7 bellard
            dsp->speaker);
161 85571bc7 bellard
}
162 85571bc7 bellard
#endif
163 85571bc7 bellard
164 85571bc7 bellard
static void speaker (SB16State *s, int on)
165 85571bc7 bellard
{
166 85571bc7 bellard
    s->speaker = on;
167 85571bc7 bellard
    /* AUD_enable (s->voice, on); */
168 27503323 bellard
}
169 27503323 bellard
170 85571bc7 bellard
static void control (SB16State *s, int hold)
171 27503323 bellard
{
172 85571bc7 bellard
    int dma = s->use_hdma ? s->hdma : s->dma;
173 85571bc7 bellard
    s->dma_running = hold;
174 85571bc7 bellard
175 85571bc7 bellard
    ldebug ("hold %d high %d dma %d\n", hold, s->use_hdma, dma);
176 85571bc7 bellard
177 27503323 bellard
    if (hold) {
178 85571bc7 bellard
        DMA_hold_DREQ (dma);
179 1d14ffa9 bellard
        AUD_set_active_out (s->voice, 1);
180 27503323 bellard
    }
181 27503323 bellard
    else {
182 85571bc7 bellard
        DMA_release_DREQ (dma);
183 1d14ffa9 bellard
        AUD_set_active_out (s->voice, 0);
184 27503323 bellard
    }
185 27503323 bellard
}
186 27503323 bellard
187 85571bc7 bellard
static void aux_timer (void *opaque)
188 27503323 bellard
{
189 85571bc7 bellard
    SB16State *s = opaque;
190 85571bc7 bellard
    s->can_write = 1;
191 3a38d437 Jes Sorensen
    qemu_irq_raise (s->pic);
192 85571bc7 bellard
}
193 85571bc7 bellard
194 85571bc7 bellard
#define DMA8_AUTO 1
195 85571bc7 bellard
#define DMA8_HIGH 2
196 85571bc7 bellard
197 feea13e1 bellard
static void continue_dma8 (SB16State *s)
198 feea13e1 bellard
{
199 feea13e1 bellard
    if (s->freq > 0) {
200 1ea879e5 malc
        struct audsettings as;
201 feea13e1 bellard
202 feea13e1 bellard
        s->audio_free = 0;
203 feea13e1 bellard
204 feea13e1 bellard
        as.freq = s->freq;
205 feea13e1 bellard
        as.nchannels = 1 << s->fmt_stereo;
206 feea13e1 bellard
        as.fmt = s->fmt;
207 d929eba5 bellard
        as.endianness = 0;
208 feea13e1 bellard
209 feea13e1 bellard
        s->voice = AUD_open_out (
210 feea13e1 bellard
            &s->card,
211 feea13e1 bellard
            s->voice,
212 feea13e1 bellard
            "sb16",
213 feea13e1 bellard
            s,
214 feea13e1 bellard
            SB_audio_callback,
215 d929eba5 bellard
            &as
216 feea13e1 bellard
            );
217 feea13e1 bellard
    }
218 feea13e1 bellard
219 feea13e1 bellard
    control (s, 1);
220 feea13e1 bellard
}
221 feea13e1 bellard
222 85571bc7 bellard
static void dma_cmd8 (SB16State *s, int mask, int dma_len)
223 85571bc7 bellard
{
224 85571bc7 bellard
    s->fmt = AUD_FMT_U8;
225 85571bc7 bellard
    s->use_hdma = 0;
226 85571bc7 bellard
    s->fmt_bits = 8;
227 85571bc7 bellard
    s->fmt_signed = 0;
228 85571bc7 bellard
    s->fmt_stereo = (s->mixer_regs[0x0e] & 2) != 0;
229 85571bc7 bellard
    if (-1 == s->time_const) {
230 feea13e1 bellard
        if (s->freq <= 0)
231 feea13e1 bellard
            s->freq = 11025;
232 85571bc7 bellard
    }
233 85571bc7 bellard
    else {
234 85571bc7 bellard
        int tmp = (256 - s->time_const);
235 85571bc7 bellard
        s->freq = (1000000 + (tmp / 2)) / tmp;
236 85571bc7 bellard
    }
237 85571bc7 bellard
238 1d14ffa9 bellard
    if (dma_len != -1) {
239 15b61470 bellard
        s->block_size = dma_len << s->fmt_stereo;
240 1d14ffa9 bellard
    }
241 15b61470 bellard
    else {
242 15b61470 bellard
        /* This is apparently the only way to make both Act1/PL
243 15b61470 bellard
           and SecondReality/FC work
244 15b61470 bellard

245 15b61470 bellard
           Act1 sets block size via command 0x48 and it's an odd number
246 15b61470 bellard
           SR does the same with even number
247 15b61470 bellard
           Both use stereo, and Creatives own documentation states that
248 15b61470 bellard
           0x48 sets block size in bytes less one.. go figure */
249 15b61470 bellard
        s->block_size &= ~s->fmt_stereo;
250 15b61470 bellard
    }
251 85571bc7 bellard
252 85571bc7 bellard
    s->freq >>= s->fmt_stereo;
253 85571bc7 bellard
    s->left_till_irq = s->block_size;
254 85571bc7 bellard
    s->bytes_per_second = (s->freq << s->fmt_stereo);
255 85571bc7 bellard
    /* s->highspeed = (mask & DMA8_HIGH) != 0; */
256 85571bc7 bellard
    s->dma_auto = (mask & DMA8_AUTO) != 0;
257 85571bc7 bellard
    s->align = (1 << s->fmt_stereo) - 1;
258 85571bc7 bellard
259 1d14ffa9 bellard
    if (s->block_size & s->align) {
260 1d14ffa9 bellard
        dolog ("warning: misaligned block size %d, alignment %d\n",
261 1d14ffa9 bellard
               s->block_size, s->align + 1);
262 1d14ffa9 bellard
    }
263 15b61470 bellard
264 85571bc7 bellard
    ldebug ("freq %d, stereo %d, sign %d, bits %d, "
265 85571bc7 bellard
            "dma %d, auto %d, fifo %d, high %d\n",
266 85571bc7 bellard
            s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
267 85571bc7 bellard
            s->block_size, s->dma_auto, s->fifo, s->highspeed);
268 85571bc7 bellard
269 feea13e1 bellard
    continue_dma8 (s);
270 85571bc7 bellard
    speaker (s, 1);
271 85571bc7 bellard
}
272 27503323 bellard
273 85571bc7 bellard
static void dma_cmd (SB16State *s, uint8_t cmd, uint8_t d0, int dma_len)
274 85571bc7 bellard
{
275 85571bc7 bellard
    s->use_hdma = cmd < 0xc0;
276 85571bc7 bellard
    s->fifo = (cmd >> 1) & 1;
277 85571bc7 bellard
    s->dma_auto = (cmd >> 2) & 1;
278 85571bc7 bellard
    s->fmt_signed = (d0 >> 4) & 1;
279 85571bc7 bellard
    s->fmt_stereo = (d0 >> 5) & 1;
280 27503323 bellard
281 27503323 bellard
    switch (cmd >> 4) {
282 27503323 bellard
    case 11:
283 85571bc7 bellard
        s->fmt_bits = 16;
284 27503323 bellard
        break;
285 27503323 bellard
286 27503323 bellard
    case 12:
287 85571bc7 bellard
        s->fmt_bits = 8;
288 27503323 bellard
        break;
289 27503323 bellard
    }
290 27503323 bellard
291 85571bc7 bellard
    if (-1 != s->time_const) {
292 85571bc7 bellard
#if 1
293 85571bc7 bellard
        int tmp = 256 - s->time_const;
294 85571bc7 bellard
        s->freq = (1000000 + (tmp / 2)) / tmp;
295 85571bc7 bellard
#else
296 85571bc7 bellard
        /* s->freq = 1000000 / ((255 - s->time_const) << s->fmt_stereo); */
297 85571bc7 bellard
        s->freq = 1000000 / ((255 - s->time_const));
298 85571bc7 bellard
#endif
299 85571bc7 bellard
        s->time_const = -1;
300 27503323 bellard
    }
301 27503323 bellard
302 85571bc7 bellard
    s->block_size = dma_len + 1;
303 85571bc7 bellard
    s->block_size <<= (s->fmt_bits == 16);
304 15b61470 bellard
    if (!s->dma_auto) {
305 15b61470 bellard
        /* It is clear that for DOOM and auto-init this value
306 15b61470 bellard
           shouldn't take stereo into account, while Miles Sound Systems
307 15b61470 bellard
           setsound.exe with single transfer mode wouldn't work without it
308 15b61470 bellard
           wonders of SB16 yet again */
309 85571bc7 bellard
        s->block_size <<= s->fmt_stereo;
310 15b61470 bellard
    }
311 27503323 bellard
312 85571bc7 bellard
    ldebug ("freq %d, stereo %d, sign %d, bits %d, "
313 85571bc7 bellard
            "dma %d, auto %d, fifo %d, high %d\n",
314 85571bc7 bellard
            s->freq, s->fmt_stereo, s->fmt_signed, s->fmt_bits,
315 85571bc7 bellard
            s->block_size, s->dma_auto, s->fifo, s->highspeed);
316 27503323 bellard
317 85571bc7 bellard
    if (16 == s->fmt_bits) {
318 85571bc7 bellard
        if (s->fmt_signed) {
319 85571bc7 bellard
            s->fmt = AUD_FMT_S16;
320 27503323 bellard
        }
321 27503323 bellard
        else {
322 85571bc7 bellard
            s->fmt = AUD_FMT_U16;
323 27503323 bellard
        }
324 27503323 bellard
    }
325 27503323 bellard
    else {
326 85571bc7 bellard
        if (s->fmt_signed) {
327 85571bc7 bellard
            s->fmt = AUD_FMT_S8;
328 27503323 bellard
        }
329 27503323 bellard
        else {
330 85571bc7 bellard
            s->fmt = AUD_FMT_U8;
331 27503323 bellard
        }
332 27503323 bellard
    }
333 27503323 bellard
334 85571bc7 bellard
    s->left_till_irq = s->block_size;
335 27503323 bellard
336 85571bc7 bellard
    s->bytes_per_second = (s->freq << s->fmt_stereo) << (s->fmt_bits == 16);
337 85571bc7 bellard
    s->highspeed = 0;
338 85571bc7 bellard
    s->align = (1 << (s->fmt_stereo + (s->fmt_bits == 16))) - 1;
339 1d14ffa9 bellard
    if (s->block_size & s->align) {
340 1d14ffa9 bellard
        dolog ("warning: misaligned block size %d, alignment %d\n",
341 1d14ffa9 bellard
               s->block_size, s->align + 1);
342 1d14ffa9 bellard
    }
343 27503323 bellard
344 1d14ffa9 bellard
    if (s->freq) {
345 1ea879e5 malc
        struct audsettings as;
346 c0fe3827 bellard
347 1d14ffa9 bellard
        s->audio_free = 0;
348 c0fe3827 bellard
349 c0fe3827 bellard
        as.freq = s->freq;
350 c0fe3827 bellard
        as.nchannels = 1 << s->fmt_stereo;
351 c0fe3827 bellard
        as.fmt = s->fmt;
352 d929eba5 bellard
        as.endianness = 0;
353 c0fe3827 bellard
354 1d14ffa9 bellard
        s->voice = AUD_open_out (
355 c0fe3827 bellard
            &s->card,
356 1d14ffa9 bellard
            s->voice,
357 1d14ffa9 bellard
            "sb16",
358 1d14ffa9 bellard
            s,
359 1d14ffa9 bellard
            SB_audio_callback,
360 d929eba5 bellard
            &as
361 1d14ffa9 bellard
            );
362 1d14ffa9 bellard
    }
363 27503323 bellard
364 85571bc7 bellard
    control (s, 1);
365 85571bc7 bellard
    speaker (s, 1);
366 27503323 bellard
}
367 27503323 bellard
368 85571bc7 bellard
static inline void dsp_out_data (SB16State *s, uint8_t val)
369 202a456a bellard
{
370 85571bc7 bellard
    ldebug ("outdata %#x\n", val);
371 c0fe3827 bellard
    if ((size_t) s->out_data_len < sizeof (s->out_data)) {
372 85571bc7 bellard
        s->out_data[s->out_data_len++] = val;
373 1d14ffa9 bellard
    }
374 202a456a bellard
}
375 202a456a bellard
376 85571bc7 bellard
static inline uint8_t dsp_get_data (SB16State *s)
377 d75d9f6b bellard
{
378 1d14ffa9 bellard
    if (s->in_index) {
379 85571bc7 bellard
        return s->in2_data[--s->in_index];
380 1d14ffa9 bellard
    }
381 85571bc7 bellard
    else {
382 85571bc7 bellard
        dolog ("buffer underflow\n");
383 d75d9f6b bellard
        return 0;
384 85571bc7 bellard
    }
385 d75d9f6b bellard
}
386 d75d9f6b bellard
387 85571bc7 bellard
static void command (SB16State *s, uint8_t cmd)
388 27503323 bellard
{
389 85571bc7 bellard
    ldebug ("command %#x\n", cmd);
390 27503323 bellard
391 27503323 bellard
    if (cmd > 0xaf && cmd < 0xd0) {
392 85571bc7 bellard
        if (cmd & 8) {
393 85571bc7 bellard
            dolog ("ADC not yet supported (command %#x)\n", cmd);
394 85571bc7 bellard
        }
395 27503323 bellard
396 27503323 bellard
        switch (cmd >> 4) {
397 27503323 bellard
        case 11:
398 27503323 bellard
        case 12:
399 27503323 bellard
            break;
400 27503323 bellard
        default:
401 85571bc7 bellard
            dolog ("%#x wrong bits\n", cmd);
402 27503323 bellard
        }
403 85571bc7 bellard
        s->needed_bytes = 3;
404 27503323 bellard
    }
405 27503323 bellard
    else {
406 1d14ffa9 bellard
        s->needed_bytes = 0;
407 1d14ffa9 bellard
408 27503323 bellard
        switch (cmd) {
409 d75d9f6b bellard
        case 0x03:
410 85571bc7 bellard
            dsp_out_data (s, 0x10); /* s->csp_param); */
411 85571bc7 bellard
            goto warn;
412 85571bc7 bellard
413 d329a6fb bellard
        case 0x04:
414 85571bc7 bellard
            s->needed_bytes = 1;
415 85571bc7 bellard
            goto warn;
416 d329a6fb bellard
417 d329a6fb bellard
        case 0x05:
418 85571bc7 bellard
            s->needed_bytes = 2;
419 85571bc7 bellard
            goto warn;
420 85571bc7 bellard
421 85571bc7 bellard
        case 0x08:
422 85571bc7 bellard
            /* __asm__ ("int3"); */
423 85571bc7 bellard
            goto warn;
424 d75d9f6b bellard
425 d329a6fb bellard
        case 0x0e:
426 85571bc7 bellard
            s->needed_bytes = 2;
427 85571bc7 bellard
            goto warn;
428 85571bc7 bellard
429 85571bc7 bellard
        case 0x09:
430 85571bc7 bellard
            dsp_out_data (s, 0xf8);
431 85571bc7 bellard
            goto warn;
432 d329a6fb bellard
433 d329a6fb bellard
        case 0x0f:
434 85571bc7 bellard
            s->needed_bytes = 1;
435 85571bc7 bellard
            goto warn;
436 d329a6fb bellard
437 27503323 bellard
        case 0x10:
438 85571bc7 bellard
            s->needed_bytes = 1;
439 85571bc7 bellard
            goto warn;
440 27503323 bellard
441 27503323 bellard
        case 0x14:
442 85571bc7 bellard
            s->needed_bytes = 2;
443 85571bc7 bellard
            s->block_size = 0;
444 27503323 bellard
            break;
445 27503323 bellard
446 15b61470 bellard
        case 0x1c:              /* Auto-Initialize DMA DAC, 8-bit */
447 feea13e1 bellard
            dma_cmd8 (s, DMA8_AUTO, -1);
448 15b61470 bellard
            break;
449 15b61470 bellard
450 85571bc7 bellard
        case 0x20:              /* Direct ADC, Juice/PL */
451 85571bc7 bellard
            dsp_out_data (s, 0xff);
452 85571bc7 bellard
            goto warn;
453 27503323 bellard
454 27503323 bellard
        case 0x35:
455 1d14ffa9 bellard
            dolog ("0x35 - MIDI command not implemented\n");
456 27503323 bellard
            break;
457 27503323 bellard
458 27503323 bellard
        case 0x40:
459 85571bc7 bellard
            s->freq = -1;
460 85571bc7 bellard
            s->time_const = -1;
461 85571bc7 bellard
            s->needed_bytes = 1;
462 27503323 bellard
            break;
463 27503323 bellard
464 27503323 bellard
        case 0x41:
465 85571bc7 bellard
            s->freq = -1;
466 85571bc7 bellard
            s->time_const = -1;
467 85571bc7 bellard
            s->needed_bytes = 2;
468 27503323 bellard
            break;
469 27503323 bellard
470 85571bc7 bellard
        case 0x42:
471 85571bc7 bellard
            s->freq = -1;
472 85571bc7 bellard
            s->time_const = -1;
473 85571bc7 bellard
            s->needed_bytes = 2;
474 85571bc7 bellard
            goto warn;
475 85571bc7 bellard
476 d75d9f6b bellard
        case 0x45:
477 85571bc7 bellard
            dsp_out_data (s, 0xaa);
478 85571bc7 bellard
            goto warn;
479 85571bc7 bellard
480 27503323 bellard
        case 0x47:                /* Continue Auto-Initialize DMA 16bit */
481 27503323 bellard
            break;
482 27503323 bellard
483 27503323 bellard
        case 0x48:
484 85571bc7 bellard
            s->needed_bytes = 2;
485 27503323 bellard
            break;
486 27503323 bellard
487 1d14ffa9 bellard
        case 0x74:
488 1d14ffa9 bellard
            s->needed_bytes = 2; /* DMA DAC, 4-bit ADPCM */
489 1d14ffa9 bellard
            dolog ("0x75 - DMA DAC, 4-bit ADPCM not implemented\n");
490 1d14ffa9 bellard
            break;
491 1d14ffa9 bellard
492 1d14ffa9 bellard
        case 0x75:              /* DMA DAC, 4-bit ADPCM Reference */
493 1d14ffa9 bellard
            s->needed_bytes = 2;
494 1d14ffa9 bellard
            dolog ("0x74 - DMA DAC, 4-bit ADPCM Reference not implemented\n");
495 1d14ffa9 bellard
            break;
496 1d14ffa9 bellard
497 1d14ffa9 bellard
        case 0x76:              /* DMA DAC, 2.6-bit ADPCM */
498 1d14ffa9 bellard
            s->needed_bytes = 2;
499 1d14ffa9 bellard
            dolog ("0x74 - DMA DAC, 2.6-bit ADPCM not implemented\n");
500 1d14ffa9 bellard
            break;
501 1d14ffa9 bellard
502 1d14ffa9 bellard
        case 0x77:              /* DMA DAC, 2.6-bit ADPCM Reference */
503 1d14ffa9 bellard
            s->needed_bytes = 2;
504 1d14ffa9 bellard
            dolog ("0x74 - DMA DAC, 2.6-bit ADPCM Reference not implemented\n");
505 1d14ffa9 bellard
            break;
506 1d14ffa9 bellard
507 1d14ffa9 bellard
        case 0x7d:
508 1d14ffa9 bellard
            dolog ("0x7d - Autio-Initialize DMA DAC, 4-bit ADPCM Reference\n");
509 1d14ffa9 bellard
            dolog ("not implemented\n");
510 1d14ffa9 bellard
            break;
511 1d14ffa9 bellard
512 1d14ffa9 bellard
        case 0x7f:
513 1d14ffa9 bellard
            dolog (
514 1d14ffa9 bellard
                "0x7d - Autio-Initialize DMA DAC, 2.6-bit ADPCM Reference\n"
515 1d14ffa9 bellard
                );
516 1d14ffa9 bellard
            dolog ("not implemented\n");
517 1d14ffa9 bellard
            break;
518 1d14ffa9 bellard
519 27503323 bellard
        case 0x80:
520 85571bc7 bellard
            s->needed_bytes = 2;
521 27503323 bellard
            break;
522 27503323 bellard
523 27503323 bellard
        case 0x90:
524 27503323 bellard
        case 0x91:
525 85571bc7 bellard
            dma_cmd8 (s, ((cmd & 1) == 0) | DMA8_HIGH, -1);
526 85571bc7 bellard
            break;
527 27503323 bellard
528 85571bc7 bellard
        case 0xd0:              /* halt DMA operation. 8bit */
529 85571bc7 bellard
            control (s, 0);
530 85571bc7 bellard
            break;
531 27503323 bellard
532 85571bc7 bellard
        case 0xd1:              /* speaker on */
533 85571bc7 bellard
            speaker (s, 1);
534 27503323 bellard
            break;
535 27503323 bellard
536 85571bc7 bellard
        case 0xd3:              /* speaker off */
537 85571bc7 bellard
            speaker (s, 0);
538 85571bc7 bellard
            break;
539 27503323 bellard
540 85571bc7 bellard
        case 0xd4:              /* continue DMA operation. 8bit */
541 feea13e1 bellard
            /* KQ6 (or maybe Sierras audblst.drv in general) resets
542 feea13e1 bellard
               the frequency between halt/continue */
543 feea13e1 bellard
            continue_dma8 (s);
544 27503323 bellard
            break;
545 27503323 bellard
546 85571bc7 bellard
        case 0xd5:              /* halt DMA operation. 16bit */
547 85571bc7 bellard
            control (s, 0);
548 27503323 bellard
            break;
549 27503323 bellard
550 85571bc7 bellard
        case 0xd6:              /* continue DMA operation. 16bit */
551 85571bc7 bellard
            control (s, 1);
552 27503323 bellard
            break;
553 27503323 bellard
554 85571bc7 bellard
        case 0xd9:              /* exit auto-init DMA after this block. 16bit */
555 85571bc7 bellard
            s->dma_auto = 0;
556 85571bc7 bellard
            break;
557 27503323 bellard
558 85571bc7 bellard
        case 0xda:              /* exit auto-init DMA after this block. 8bit */
559 85571bc7 bellard
            s->dma_auto = 0;
560 27503323 bellard
            break;
561 27503323 bellard
562 1d14ffa9 bellard
        case 0xe0:              /* DSP identification */
563 85571bc7 bellard
            s->needed_bytes = 1;
564 1d14ffa9 bellard
            break;
565 27503323 bellard
566 27503323 bellard
        case 0xe1:
567 85571bc7 bellard
            dsp_out_data (s, s->ver & 0xff);
568 85571bc7 bellard
            dsp_out_data (s, s->ver >> 8);
569 85571bc7 bellard
            break;
570 85571bc7 bellard
571 85571bc7 bellard
        case 0xe2:
572 85571bc7 bellard
            s->needed_bytes = 1;
573 85571bc7 bellard
            goto warn;
574 27503323 bellard
575 d329a6fb bellard
        case 0xe3:
576 d329a6fb bellard
            {
577 d329a6fb bellard
                int i;
578 85571bc7 bellard
                for (i = sizeof (e3) - 1; i >= 0; --i)
579 85571bc7 bellard
                    dsp_out_data (s, e3[i]);
580 d329a6fb bellard
            }
581 85571bc7 bellard
            break;
582 d329a6fb bellard
583 d75d9f6b bellard
        case 0xe4:              /* write test reg */
584 85571bc7 bellard
            s->needed_bytes = 1;
585 d75d9f6b bellard
            break;
586 d75d9f6b bellard
587 85571bc7 bellard
        case 0xe7:
588 85571bc7 bellard
            dolog ("Attempt to probe for ESS (0xe7)?\n");
589 1d14ffa9 bellard
            break;
590 85571bc7 bellard
591 d75d9f6b bellard
        case 0xe8:              /* read test reg */
592 85571bc7 bellard
            dsp_out_data (s, s->test_reg);
593 d75d9f6b bellard
            break;
594 d75d9f6b bellard
595 27503323 bellard
        case 0xf2:
596 85571bc7 bellard
        case 0xf3:
597 85571bc7 bellard
            dsp_out_data (s, 0xaa);
598 85571bc7 bellard
            s->mixer_regs[0x82] |= (cmd == 0xf2) ? 1 : 2;
599 3a38d437 Jes Sorensen
            qemu_irq_raise (s->pic);
600 85571bc7 bellard
            break;
601 27503323 bellard
602 d75d9f6b bellard
        case 0xf9:
603 85571bc7 bellard
            s->needed_bytes = 1;
604 85571bc7 bellard
            goto warn;
605 d75d9f6b bellard
606 d75d9f6b bellard
        case 0xfa:
607 85571bc7 bellard
            dsp_out_data (s, 0);
608 85571bc7 bellard
            goto warn;
609 d75d9f6b bellard
610 d75d9f6b bellard
        case 0xfc:              /* FIXME */
611 85571bc7 bellard
            dsp_out_data (s, 0);
612 85571bc7 bellard
            goto warn;
613 d75d9f6b bellard
614 27503323 bellard
        default:
615 1d14ffa9 bellard
            dolog ("Unrecognized command %#x\n", cmd);
616 1d14ffa9 bellard
            break;
617 27503323 bellard
        }
618 27503323 bellard
    }
619 85571bc7 bellard
620 1d14ffa9 bellard
    if (!s->needed_bytes) {
621 85571bc7 bellard
        ldebug ("\n");
622 1d14ffa9 bellard
    }
623 1d14ffa9 bellard
624 1d14ffa9 bellard
 exit:
625 1d14ffa9 bellard
    if (!s->needed_bytes) {
626 1d14ffa9 bellard
        s->cmd = -1;
627 1d14ffa9 bellard
    }
628 1d14ffa9 bellard
    else {
629 1d14ffa9 bellard
        s->cmd = cmd;
630 1d14ffa9 bellard
    }
631 27503323 bellard
    return;
632 27503323 bellard
633 85571bc7 bellard
 warn:
634 81eea5eb bellard
    dolog ("warning: command %#x,%d is not truly understood yet\n",
635 85571bc7 bellard
           cmd, s->needed_bytes);
636 1d14ffa9 bellard
    goto exit;
637 1d14ffa9 bellard
638 27503323 bellard
}
639 27503323 bellard
640 85571bc7 bellard
static uint16_t dsp_get_lohi (SB16State *s)
641 85571bc7 bellard
{
642 85571bc7 bellard
    uint8_t hi = dsp_get_data (s);
643 85571bc7 bellard
    uint8_t lo = dsp_get_data (s);
644 85571bc7 bellard
    return (hi << 8) | lo;
645 85571bc7 bellard
}
646 85571bc7 bellard
647 85571bc7 bellard
static uint16_t dsp_get_hilo (SB16State *s)
648 85571bc7 bellard
{
649 85571bc7 bellard
    uint8_t lo = dsp_get_data (s);
650 85571bc7 bellard
    uint8_t hi = dsp_get_data (s);
651 85571bc7 bellard
    return (hi << 8) | lo;
652 85571bc7 bellard
}
653 85571bc7 bellard
654 85571bc7 bellard
static void complete (SB16State *s)
655 27503323 bellard
{
656 d75d9f6b bellard
    int d0, d1, d2;
657 85571bc7 bellard
    ldebug ("complete command %#x, in_index %d, needed_bytes %d\n",
658 85571bc7 bellard
            s->cmd, s->in_index, s->needed_bytes);
659 27503323 bellard
660 85571bc7 bellard
    if (s->cmd > 0xaf && s->cmd < 0xd0) {
661 85571bc7 bellard
        d2 = dsp_get_data (s);
662 85571bc7 bellard
        d1 = dsp_get_data (s);
663 85571bc7 bellard
        d0 = dsp_get_data (s);
664 27503323 bellard
665 85571bc7 bellard
        if (s->cmd & 8) {
666 85571bc7 bellard
            dolog ("ADC params cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
667 85571bc7 bellard
                   s->cmd, d0, d1, d2);
668 85571bc7 bellard
        }
669 85571bc7 bellard
        else {
670 85571bc7 bellard
            ldebug ("cmd = %#x d0 = %d, d1 = %d, d2 = %d\n",
671 85571bc7 bellard
                    s->cmd, d0, d1, d2);
672 85571bc7 bellard
            dma_cmd (s, s->cmd, d0, d1 + (d2 << 8));
673 85571bc7 bellard
        }
674 27503323 bellard
    }
675 27503323 bellard
    else {
676 85571bc7 bellard
        switch (s->cmd) {
677 d329a6fb bellard
        case 0x04:
678 85571bc7 bellard
            s->csp_mode = dsp_get_data (s);
679 85571bc7 bellard
            s->csp_reg83r = 0;
680 85571bc7 bellard
            s->csp_reg83w = 0;
681 85571bc7 bellard
            ldebug ("CSP command 0x04: mode=%#x\n", s->csp_mode);
682 d75d9f6b bellard
            break;
683 d75d9f6b bellard
684 85571bc7 bellard
        case 0x05:
685 85571bc7 bellard
            s->csp_param = dsp_get_data (s);
686 85571bc7 bellard
            s->csp_value = dsp_get_data (s);
687 85571bc7 bellard
            ldebug ("CSP command 0x05: param=%#x value=%#x\n",
688 85571bc7 bellard
                    s->csp_param,
689 85571bc7 bellard
                    s->csp_value);
690 d329a6fb bellard
            break;
691 27503323 bellard
692 d75d9f6b bellard
        case 0x0e:
693 85571bc7 bellard
            d0 = dsp_get_data (s);
694 85571bc7 bellard
            d1 = dsp_get_data (s);
695 85571bc7 bellard
            ldebug ("write CSP register %d <- %#x\n", d1, d0);
696 85571bc7 bellard
            if (d1 == 0x83) {
697 85571bc7 bellard
                ldebug ("0x83[%d] <- %#x\n", s->csp_reg83r, d0);
698 85571bc7 bellard
                s->csp_reg83[s->csp_reg83r % 4] = d0;
699 85571bc7 bellard
                s->csp_reg83r += 1;
700 85571bc7 bellard
            }
701 1d14ffa9 bellard
            else {
702 85571bc7 bellard
                s->csp_regs[d1] = d0;
703 1d14ffa9 bellard
            }
704 27503323 bellard
            break;
705 27503323 bellard
706 85571bc7 bellard
        case 0x0f:
707 85571bc7 bellard
            d0 = dsp_get_data (s);
708 85571bc7 bellard
            ldebug ("read CSP register %#x -> %#x, mode=%#x\n",
709 85571bc7 bellard
                    d0, s->csp_regs[d0], s->csp_mode);
710 85571bc7 bellard
            if (d0 == 0x83) {
711 85571bc7 bellard
                ldebug ("0x83[%d] -> %#x\n",
712 85571bc7 bellard
                        s->csp_reg83w,
713 85571bc7 bellard
                        s->csp_reg83[s->csp_reg83w % 4]);
714 85571bc7 bellard
                dsp_out_data (s, s->csp_reg83[s->csp_reg83w % 4]);
715 85571bc7 bellard
                s->csp_reg83w += 1;
716 85571bc7 bellard
            }
717 1d14ffa9 bellard
            else {
718 85571bc7 bellard
                dsp_out_data (s, s->csp_regs[d0]);
719 1d14ffa9 bellard
            }
720 85571bc7 bellard
            break;
721 27503323 bellard
722 85571bc7 bellard
        case 0x10:
723 85571bc7 bellard
            d0 = dsp_get_data (s);
724 85571bc7 bellard
            dolog ("cmd 0x10 d0=%#x\n", d0);
725 85571bc7 bellard
            break;
726 27503323 bellard
727 85571bc7 bellard
        case 0x14:
728 15b61470 bellard
            dma_cmd8 (s, 0, dsp_get_lohi (s) + 1);
729 85571bc7 bellard
            break;
730 27503323 bellard
731 27503323 bellard
        case 0x40:
732 85571bc7 bellard
            s->time_const = dsp_get_data (s);
733 85571bc7 bellard
            ldebug ("set time const %d\n", s->time_const);
734 27503323 bellard
            break;
735 27503323 bellard
736 85571bc7 bellard
        case 0x42:              /* FT2 sets output freq with this, go figure */
737 1d14ffa9 bellard
#if 0
738 85571bc7 bellard
            dolog ("cmd 0x42 might not do what it think it should\n");
739 1d14ffa9 bellard
#endif
740 85571bc7 bellard
        case 0x41:
741 85571bc7 bellard
            s->freq = dsp_get_hilo (s);
742 85571bc7 bellard
            ldebug ("set freq %d\n", s->freq);
743 27503323 bellard
            break;
744 27503323 bellard
745 27503323 bellard
        case 0x48:
746 15b61470 bellard
            s->block_size = dsp_get_lohi (s) + 1;
747 85571bc7 bellard
            ldebug ("set dma block len %d\n", s->block_size);
748 85571bc7 bellard
            break;
749 85571bc7 bellard
750 1d14ffa9 bellard
        case 0x74:
751 1d14ffa9 bellard
        case 0x75:
752 1d14ffa9 bellard
        case 0x76:
753 1d14ffa9 bellard
        case 0x77:
754 1d14ffa9 bellard
            /* ADPCM stuff, ignore */
755 1d14ffa9 bellard
            break;
756 1d14ffa9 bellard
757 85571bc7 bellard
        case 0x80:
758 85571bc7 bellard
            {
759 15b61470 bellard
                int freq, samples, bytes;
760 85571bc7 bellard
                int64_t ticks;
761 85571bc7 bellard
762 15b61470 bellard
                freq = s->freq > 0 ? s->freq : 11025;
763 15b61470 bellard
                samples = dsp_get_lohi (s) + 1;
764 85571bc7 bellard
                bytes = samples << s->fmt_stereo << (s->fmt_bits == 16);
765 4f4cc0ef malc
                ticks = muldiv64 (bytes, get_ticks_per_sec (), freq);
766 4f4cc0ef malc
                if (ticks < get_ticks_per_sec () / 1024) {
767 3a38d437 Jes Sorensen
                    qemu_irq_raise (s->pic);
768 1d14ffa9 bellard
                }
769 1d14ffa9 bellard
                else {
770 1d14ffa9 bellard
                    if (s->aux_ts) {
771 1d14ffa9 bellard
                        qemu_mod_timer (
772 1d14ffa9 bellard
                            s->aux_ts,
773 74475455 Paolo Bonzini
                            qemu_get_clock_ns (vm_clock) + ticks
774 1d14ffa9 bellard
                            );
775 1d14ffa9 bellard
                    }
776 1d14ffa9 bellard
                }
777 26a76461 bellard
                ldebug ("mix silence %d %d %" PRId64 "\n", samples, bytes, ticks);
778 85571bc7 bellard
            }
779 27503323 bellard
            break;
780 27503323 bellard
781 27503323 bellard
        case 0xe0:
782 85571bc7 bellard
            d0 = dsp_get_data (s);
783 85571bc7 bellard
            s->out_data_len = 0;
784 85571bc7 bellard
            ldebug ("E0 data = %#x\n", d0);
785 1d14ffa9 bellard
            dsp_out_data (s, ~d0);
786 d75d9f6b bellard
            break;
787 d75d9f6b bellard
788 85571bc7 bellard
        case 0xe2:
789 514d97de malc
#ifdef DEBUG
790 85571bc7 bellard
            d0 = dsp_get_data (s);
791 514d97de malc
            dolog ("E2 = %#x\n", d0);
792 514d97de malc
#endif
793 d75d9f6b bellard
            break;
794 d75d9f6b bellard
795 85571bc7 bellard
        case 0xe4:
796 85571bc7 bellard
            s->test_reg = dsp_get_data (s);
797 85571bc7 bellard
            break;
798 d75d9f6b bellard
799 d75d9f6b bellard
        case 0xf9:
800 85571bc7 bellard
            d0 = dsp_get_data (s);
801 85571bc7 bellard
            ldebug ("command 0xf9 with %#x\n", d0);
802 d75d9f6b bellard
            switch (d0) {
803 85571bc7 bellard
            case 0x0e:
804 85571bc7 bellard
                dsp_out_data (s, 0xff);
805 85571bc7 bellard
                break;
806 85571bc7 bellard
807 85571bc7 bellard
            case 0x0f:
808 85571bc7 bellard
                dsp_out_data (s, 0x07);
809 85571bc7 bellard
                break;
810 85571bc7 bellard
811 d75d9f6b bellard
            case 0x37:
812 85571bc7 bellard
                dsp_out_data (s, 0x38);
813 85571bc7 bellard
                break;
814 85571bc7 bellard
815 d75d9f6b bellard
            default:
816 85571bc7 bellard
                dsp_out_data (s, 0x00);
817 85571bc7 bellard
                break;
818 d75d9f6b bellard
            }
819 27503323 bellard
            break;
820 27503323 bellard
821 27503323 bellard
        default:
822 85571bc7 bellard
            dolog ("complete: unrecognized command %#x\n", s->cmd);
823 5e2a6443 bellard
            return;
824 27503323 bellard
        }
825 27503323 bellard
    }
826 27503323 bellard
827 85571bc7 bellard
    ldebug ("\n");
828 85571bc7 bellard
    s->cmd = -1;
829 27503323 bellard
}
830 27503323 bellard
831 feea13e1 bellard
static void legacy_reset (SB16State *s)
832 feea13e1 bellard
{
833 1ea879e5 malc
    struct audsettings as;
834 feea13e1 bellard
835 feea13e1 bellard
    s->freq = 11025;
836 feea13e1 bellard
    s->fmt_signed = 0;
837 feea13e1 bellard
    s->fmt_bits = 8;
838 feea13e1 bellard
    s->fmt_stereo = 0;
839 feea13e1 bellard
840 feea13e1 bellard
    as.freq = s->freq;
841 feea13e1 bellard
    as.nchannels = 1;
842 feea13e1 bellard
    as.fmt = AUD_FMT_U8;
843 d929eba5 bellard
    as.endianness = 0;
844 feea13e1 bellard
845 feea13e1 bellard
    s->voice = AUD_open_out (
846 feea13e1 bellard
        &s->card,
847 feea13e1 bellard
        s->voice,
848 feea13e1 bellard
        "sb16",
849 feea13e1 bellard
        s,
850 feea13e1 bellard
        SB_audio_callback,
851 d929eba5 bellard
        &as
852 feea13e1 bellard
        );
853 feea13e1 bellard
854 feea13e1 bellard
    /* Not sure about that... */
855 feea13e1 bellard
    /* AUD_set_active_out (s->voice, 1); */
856 feea13e1 bellard
}
857 feea13e1 bellard
858 85571bc7 bellard
static void reset (SB16State *s)
859 85571bc7 bellard
{
860 3a38d437 Jes Sorensen
    qemu_irq_lower (s->pic);
861 85571bc7 bellard
    if (s->dma_auto) {
862 3a38d437 Jes Sorensen
        qemu_irq_raise (s->pic);
863 3a38d437 Jes Sorensen
        qemu_irq_lower (s->pic);
864 85571bc7 bellard
    }
865 85571bc7 bellard
866 85571bc7 bellard
    s->mixer_regs[0x82] = 0;
867 85571bc7 bellard
    s->dma_auto = 0;
868 85571bc7 bellard
    s->in_index = 0;
869 85571bc7 bellard
    s->out_data_len = 0;
870 85571bc7 bellard
    s->left_till_irq = 0;
871 85571bc7 bellard
    s->needed_bytes = 0;
872 85571bc7 bellard
    s->block_size = -1;
873 85571bc7 bellard
    s->nzero = 0;
874 85571bc7 bellard
    s->highspeed = 0;
875 85571bc7 bellard
    s->v2x6 = 0;
876 1d14ffa9 bellard
    s->cmd = -1;
877 85571bc7 bellard
878 31226166 malc
    dsp_out_data (s, 0xaa);
879 85571bc7 bellard
    speaker (s, 0);
880 85571bc7 bellard
    control (s, 0);
881 feea13e1 bellard
    legacy_reset (s);
882 85571bc7 bellard
}
883 85571bc7 bellard
884 27503323 bellard
static IO_WRITE_PROTO (dsp_write)
885 27503323 bellard
{
886 85571bc7 bellard
    SB16State *s = opaque;
887 27503323 bellard
    int iport;
888 27503323 bellard
889 85571bc7 bellard
    iport = nport - s->port;
890 27503323 bellard
891 85571bc7 bellard
    ldebug ("write %#x <- %#x\n", nport, val);
892 27503323 bellard
    switch (iport) {
893 85571bc7 bellard
    case 0x06:
894 85571bc7 bellard
        switch (val) {
895 85571bc7 bellard
        case 0x00:
896 85571bc7 bellard
            if (s->v2x6 == 1) {
897 cd7aafcb malc
                reset (s);
898 85571bc7 bellard
            }
899 85571bc7 bellard
            s->v2x6 = 0;
900 85571bc7 bellard
            break;
901 85571bc7 bellard
902 85571bc7 bellard
        case 0x01:
903 85571bc7 bellard
        case 0x03:              /* FreeBSD kludge */
904 85571bc7 bellard
            s->v2x6 = 1;
905 85571bc7 bellard
            break;
906 85571bc7 bellard
907 85571bc7 bellard
        case 0xc6:
908 85571bc7 bellard
            s->v2x6 = 0;        /* Prince of Persia, csp.sys, diagnose.exe */
909 85571bc7 bellard
            break;
910 85571bc7 bellard
911 85571bc7 bellard
        case 0xb8:              /* Panic */
912 85571bc7 bellard
            reset (s);
913 85571bc7 bellard
            break;
914 85571bc7 bellard
915 85571bc7 bellard
        case 0x39:
916 85571bc7 bellard
            dsp_out_data (s, 0x38);
917 85571bc7 bellard
            reset (s);
918 85571bc7 bellard
            s->v2x6 = 0x39;
919 85571bc7 bellard
            break;
920 85571bc7 bellard
921 85571bc7 bellard
        default:
922 85571bc7 bellard
            s->v2x6 = val;
923 85571bc7 bellard
            break;
924 27503323 bellard
        }
925 27503323 bellard
        break;
926 27503323 bellard
927 85571bc7 bellard
    case 0x0c:                  /* write data or command | write status */
928 85571bc7 bellard
/*         if (s->highspeed) */
929 85571bc7 bellard
/*             break; */
930 85571bc7 bellard
931 85571bc7 bellard
        if (0 == s->needed_bytes) {
932 85571bc7 bellard
            command (s, val);
933 85571bc7 bellard
#if 0
934 85571bc7 bellard
            if (0 == s->needed_bytes) {
935 85571bc7 bellard
                log_dsp (s);
936 27503323 bellard
            }
937 85571bc7 bellard
#endif
938 27503323 bellard
        }
939 27503323 bellard
        else {
940 85571bc7 bellard
            if (s->in_index == sizeof (s->in2_data)) {
941 d75d9f6b bellard
                dolog ("in data overrun\n");
942 d75d9f6b bellard
            }
943 d75d9f6b bellard
            else {
944 85571bc7 bellard
                s->in2_data[s->in_index++] = val;
945 85571bc7 bellard
                if (s->in_index == s->needed_bytes) {
946 85571bc7 bellard
                    s->needed_bytes = 0;
947 85571bc7 bellard
                    complete (s);
948 85571bc7 bellard
#if 0
949 85571bc7 bellard
                    log_dsp (s);
950 85571bc7 bellard
#endif
951 85571bc7 bellard
                }
952 27503323 bellard
            }
953 27503323 bellard
        }
954 27503323 bellard
        break;
955 27503323 bellard
956 27503323 bellard
    default:
957 85571bc7 bellard
        ldebug ("(nport=%#x, val=%#x)\n", nport, val);
958 5e2a6443 bellard
        break;
959 27503323 bellard
    }
960 27503323 bellard
}
961 27503323 bellard
962 27503323 bellard
static IO_READ_PROTO (dsp_read)
963 27503323 bellard
{
964 85571bc7 bellard
    SB16State *s = opaque;
965 85571bc7 bellard
    int iport, retval, ack = 0;
966 27503323 bellard
967 85571bc7 bellard
    iport = nport - s->port;
968 27503323 bellard
969 27503323 bellard
    switch (iport) {
970 85571bc7 bellard
    case 0x06:                  /* reset */
971 85571bc7 bellard
        retval = 0xff;
972 d75d9f6b bellard
        break;
973 27503323 bellard
974 85571bc7 bellard
    case 0x0a:                  /* read data */
975 85571bc7 bellard
        if (s->out_data_len) {
976 85571bc7 bellard
            retval = s->out_data[--s->out_data_len];
977 85571bc7 bellard
            s->last_read_byte = retval;
978 85571bc7 bellard
        }
979 85571bc7 bellard
        else {
980 1d14ffa9 bellard
            if (s->cmd != -1) {
981 1d14ffa9 bellard
                dolog ("empty output buffer for command %#x\n",
982 1d14ffa9 bellard
                       s->cmd);
983 1d14ffa9 bellard
            }
984 85571bc7 bellard
            retval = s->last_read_byte;
985 d75d9f6b bellard
            /* goto error; */
986 27503323 bellard
        }
987 27503323 bellard
        break;
988 27503323 bellard
989 85571bc7 bellard
    case 0x0c:                  /* 0 can write */
990 85571bc7 bellard
        retval = s->can_write ? 0 : 0x80;
991 27503323 bellard
        break;
992 27503323 bellard
993 85571bc7 bellard
    case 0x0d:                  /* timer interrupt clear */
994 85571bc7 bellard
        /* dolog ("timer interrupt clear\n"); */
995 85571bc7 bellard
        retval = 0;
996 85571bc7 bellard
        break;
997 27503323 bellard
998 85571bc7 bellard
    case 0x0e:                  /* data available status | irq 8 ack */
999 85571bc7 bellard
        retval = (!s->out_data_len || s->highspeed) ? 0 : 0x80;
1000 85571bc7 bellard
        if (s->mixer_regs[0x82] & 1) {
1001 85571bc7 bellard
            ack = 1;
1002 85571bc7 bellard
            s->mixer_regs[0x82] &= 1;
1003 3a38d437 Jes Sorensen
            qemu_irq_lower (s->pic);
1004 85571bc7 bellard
        }
1005 27503323 bellard
        break;
1006 27503323 bellard
1007 85571bc7 bellard
    case 0x0f:                  /* irq 16 ack */
1008 bc0b1dc1 bellard
        retval = 0xff;
1009 85571bc7 bellard
        if (s->mixer_regs[0x82] & 2) {
1010 85571bc7 bellard
            ack = 1;
1011 85571bc7 bellard
            s->mixer_regs[0x82] &= 2;
1012 3a38d437 Jes Sorensen
            qemu_irq_lower (s->pic);
1013 85571bc7 bellard
        }
1014 27503323 bellard
        break;
1015 27503323 bellard
1016 27503323 bellard
    default:
1017 27503323 bellard
        goto error;
1018 27503323 bellard
    }
1019 27503323 bellard
1020 1d14ffa9 bellard
    if (!ack) {
1021 85571bc7 bellard
        ldebug ("read %#x -> %#x\n", nport, retval);
1022 1d14ffa9 bellard
    }
1023 27503323 bellard
1024 27503323 bellard
    return retval;
1025 27503323 bellard
1026 27503323 bellard
 error:
1027 1d14ffa9 bellard
    dolog ("warning: dsp_read %#x error\n", nport);
1028 d75d9f6b bellard
    return 0xff;
1029 27503323 bellard
}
1030 27503323 bellard
1031 85571bc7 bellard
static void reset_mixer (SB16State *s)
1032 85571bc7 bellard
{
1033 85571bc7 bellard
    int i;
1034 85571bc7 bellard
1035 85571bc7 bellard
    memset (s->mixer_regs, 0xff, 0x7f);
1036 85571bc7 bellard
    memset (s->mixer_regs + 0x83, 0xff, sizeof (s->mixer_regs) - 0x83);
1037 85571bc7 bellard
1038 85571bc7 bellard
    s->mixer_regs[0x02] = 4;    /* master volume 3bits */
1039 85571bc7 bellard
    s->mixer_regs[0x06] = 4;    /* MIDI volume 3bits */
1040 85571bc7 bellard
    s->mixer_regs[0x08] = 0;    /* CD volume 3bits */
1041 85571bc7 bellard
    s->mixer_regs[0x0a] = 0;    /* voice volume 2bits */
1042 85571bc7 bellard
1043 85571bc7 bellard
    /* d5=input filt, d3=lowpass filt, d1,d2=input source */
1044 85571bc7 bellard
    s->mixer_regs[0x0c] = 0;
1045 85571bc7 bellard
1046 85571bc7 bellard
    /* d5=output filt, d1=stereo switch */
1047 85571bc7 bellard
    s->mixer_regs[0x0e] = 0;
1048 85571bc7 bellard
1049 85571bc7 bellard
    /* voice volume L d5,d7, R d1,d3 */
1050 85571bc7 bellard
    s->mixer_regs[0x04] = (4 << 5) | (4 << 1);
1051 85571bc7 bellard
    /* master ... */
1052 85571bc7 bellard
    s->mixer_regs[0x22] = (4 << 5) | (4 << 1);
1053 85571bc7 bellard
    /* MIDI ... */
1054 85571bc7 bellard
    s->mixer_regs[0x26] = (4 << 5) | (4 << 1);
1055 85571bc7 bellard
1056 85571bc7 bellard
    for (i = 0x30; i < 0x48; i++) {
1057 85571bc7 bellard
        s->mixer_regs[i] = 0x20;
1058 85571bc7 bellard
    }
1059 85571bc7 bellard
}
1060 85571bc7 bellard
1061 d999f7e0 malc
static IO_WRITE_PROTO (mixer_write_indexb)
1062 27503323 bellard
{
1063 85571bc7 bellard
    SB16State *s = opaque;
1064 c0fe3827 bellard
    (void) nport;
1065 85571bc7 bellard
    s->mixer_nreg = val;
1066 27503323 bellard
}
1067 27503323 bellard
1068 d999f7e0 malc
static IO_WRITE_PROTO (mixer_write_datab)
1069 27503323 bellard
{
1070 85571bc7 bellard
    SB16State *s = opaque;
1071 85571bc7 bellard
1072 c0fe3827 bellard
    (void) nport;
1073 85571bc7 bellard
    ldebug ("mixer_write [%#x] <- %#x\n", s->mixer_nreg, val);
1074 202a456a bellard
1075 85571bc7 bellard
    switch (s->mixer_nreg) {
1076 d75d9f6b bellard
    case 0x00:
1077 85571bc7 bellard
        reset_mixer (s);
1078 d75d9f6b bellard
        break;
1079 d75d9f6b bellard
1080 d75d9f6b bellard
    case 0x80:
1081 85571bc7 bellard
        {
1082 85571bc7 bellard
            int irq = irq_of_magic (val);
1083 85571bc7 bellard
            ldebug ("setting irq to %d (val=%#x)\n", irq, val);
1084 1d14ffa9 bellard
            if (irq > 0) {
1085 85571bc7 bellard
                s->irq = irq;
1086 1d14ffa9 bellard
            }
1087 85571bc7 bellard
        }
1088 d75d9f6b bellard
        break;
1089 27503323 bellard
1090 85571bc7 bellard
    case 0x81:
1091 85571bc7 bellard
        {
1092 85571bc7 bellard
            int dma, hdma;
1093 d75d9f6b bellard
1094 057fa65c malc
            dma = ctz32 (val & 0xf);
1095 057fa65c malc
            hdma = ctz32 (val & 0xf0);
1096 1d14ffa9 bellard
            if (dma != s->dma || hdma != s->hdma) {
1097 1d14ffa9 bellard
                dolog (
1098 1d14ffa9 bellard
                    "attempt to change DMA "
1099 1d14ffa9 bellard
                    "8bit %d(%d), 16bit %d(%d) (val=%#x)\n",
1100 1d14ffa9 bellard
                    dma, s->dma, hdma, s->hdma, val);
1101 1d14ffa9 bellard
            }
1102 85571bc7 bellard
#if 0
1103 85571bc7 bellard
            s->dma = dma;
1104 85571bc7 bellard
            s->hdma = hdma;
1105 85571bc7 bellard
#endif
1106 85571bc7 bellard
        }
1107 85571bc7 bellard
        break;
1108 d75d9f6b bellard
1109 85571bc7 bellard
    case 0x82:
1110 85571bc7 bellard
        dolog ("attempt to write into IRQ status register (val=%#x)\n",
1111 85571bc7 bellard
               val);
1112 85571bc7 bellard
        return;
1113 d75d9f6b bellard
1114 85571bc7 bellard
    default:
1115 1d14ffa9 bellard
        if (s->mixer_nreg >= 0x80) {
1116 1d14ffa9 bellard
            ldebug ("attempt to write mixer[%#x] <- %#x\n", s->mixer_nreg, val);
1117 1d14ffa9 bellard
        }
1118 85571bc7 bellard
        break;
1119 85571bc7 bellard
    }
1120 85571bc7 bellard
1121 85571bc7 bellard
    s->mixer_regs[s->mixer_nreg] = val;
1122 d75d9f6b bellard
}
1123 d75d9f6b bellard
1124 d999f7e0 malc
static IO_WRITE_PROTO (mixer_write_indexw)
1125 27503323 bellard
{
1126 7d977de7 bellard
    mixer_write_indexb (opaque, nport, val & 0xff);
1127 7d977de7 bellard
    mixer_write_datab (opaque, nport, (val >> 8) & 0xff);
1128 27503323 bellard
}
1129 27503323 bellard
1130 d999f7e0 malc
static IO_READ_PROTO (mixer_read)
1131 27503323 bellard
{
1132 85571bc7 bellard
    SB16State *s = opaque;
1133 c0fe3827 bellard
1134 c0fe3827 bellard
    (void) nport;
1135 15b61470 bellard
#ifndef DEBUG_SB16_MOST
1136 1d14ffa9 bellard
    if (s->mixer_nreg != 0x82) {
1137 1d14ffa9 bellard
        ldebug ("mixer_read[%#x] -> %#x\n",
1138 1d14ffa9 bellard
                s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
1139 1d14ffa9 bellard
    }
1140 1d14ffa9 bellard
#else
1141 85571bc7 bellard
    ldebug ("mixer_read[%#x] -> %#x\n",
1142 85571bc7 bellard
            s->mixer_nreg, s->mixer_regs[s->mixer_nreg]);
1143 1d14ffa9 bellard
#endif
1144 85571bc7 bellard
    return s->mixer_regs[s->mixer_nreg];
1145 27503323 bellard
}
1146 27503323 bellard
1147 85571bc7 bellard
static int write_audio (SB16State *s, int nchan, int dma_pos,
1148 85571bc7 bellard
                        int dma_len, int len)
1149 27503323 bellard
{
1150 27503323 bellard
    int temp, net;
1151 f9e92e97 bellard
    uint8_t tmpbuf[4096];
1152 27503323 bellard
1153 85571bc7 bellard
    temp = len;
1154 27503323 bellard
    net = 0;
1155 27503323 bellard
1156 27503323 bellard
    while (temp) {
1157 85571bc7 bellard
        int left = dma_len - dma_pos;
1158 c0fe3827 bellard
        int copied;
1159 c0fe3827 bellard
        size_t to_copy;
1160 27503323 bellard
1161 85571bc7 bellard
        to_copy = audio_MIN (temp, left);
1162 c0fe3827 bellard
        if (to_copy > sizeof (tmpbuf)) {
1163 c0fe3827 bellard
            to_copy = sizeof (tmpbuf);
1164 1d14ffa9 bellard
        }
1165 27503323 bellard
1166 85571bc7 bellard
        copied = DMA_read_memory (nchan, tmpbuf, dma_pos, to_copy);
1167 85571bc7 bellard
        copied = AUD_write (s->voice, tmpbuf, copied);
1168 27503323 bellard
1169 85571bc7 bellard
        temp -= copied;
1170 85571bc7 bellard
        dma_pos = (dma_pos + copied) % dma_len;
1171 27503323 bellard
        net += copied;
1172 27503323 bellard
1173 1d14ffa9 bellard
        if (!copied) {
1174 85571bc7 bellard
            break;
1175 1d14ffa9 bellard
        }
1176 27503323 bellard
    }
1177 27503323 bellard
1178 27503323 bellard
    return net;
1179 27503323 bellard
}
1180 27503323 bellard
1181 85571bc7 bellard
static int SB_read_DMA (void *opaque, int nchan, int dma_pos, int dma_len)
1182 27503323 bellard
{
1183 85571bc7 bellard
    SB16State *s = opaque;
1184 1d14ffa9 bellard
    int till, copy, written, free;
1185 27503323 bellard
1186 ca9cc28c balrog
    if (s->block_size <= 0) {
1187 ca9cc28c balrog
        dolog ("invalid block size=%d nchan=%d dma_pos=%d dma_len=%d\n",
1188 ca9cc28c balrog
               s->block_size, nchan, dma_pos, dma_len);
1189 ca9cc28c balrog
        return dma_pos;
1190 ca9cc28c balrog
    }
1191 ca9cc28c balrog
1192 85571bc7 bellard
    if (s->left_till_irq < 0) {
1193 85571bc7 bellard
        s->left_till_irq = s->block_size;
1194 27503323 bellard
    }
1195 27503323 bellard
1196 1d14ffa9 bellard
    if (s->voice) {
1197 1d14ffa9 bellard
        free = s->audio_free & ~s->align;
1198 1d14ffa9 bellard
        if ((free <= 0) || !dma_len) {
1199 1d14ffa9 bellard
            return dma_pos;
1200 1d14ffa9 bellard
        }
1201 1d14ffa9 bellard
    }
1202 1d14ffa9 bellard
    else {
1203 1d14ffa9 bellard
        free = dma_len;
1204 27503323 bellard
    }
1205 27503323 bellard
1206 85571bc7 bellard
    copy = free;
1207 85571bc7 bellard
    till = s->left_till_irq;
1208 27503323 bellard
1209 d75d9f6b bellard
#ifdef DEBUG_SB16_MOST
1210 1d14ffa9 bellard
    dolog ("pos:%06d %d till:%d len:%d\n",
1211 1d14ffa9 bellard
           dma_pos, free, till, dma_len);
1212 d75d9f6b bellard
#endif
1213 d75d9f6b bellard
1214 27503323 bellard
    if (till <= copy) {
1215 85571bc7 bellard
        if (0 == s->dma_auto) {
1216 27503323 bellard
            copy = till;
1217 27503323 bellard
        }
1218 27503323 bellard
    }
1219 27503323 bellard
1220 85571bc7 bellard
    written = write_audio (s, nchan, dma_pos, dma_len, copy);
1221 85571bc7 bellard
    dma_pos = (dma_pos + written) % dma_len;
1222 85571bc7 bellard
    s->left_till_irq -= written;
1223 27503323 bellard
1224 85571bc7 bellard
    if (s->left_till_irq <= 0) {
1225 85571bc7 bellard
        s->mixer_regs[0x82] |= (nchan & 4) ? 2 : 1;
1226 3a38d437 Jes Sorensen
        qemu_irq_raise (s->pic);
1227 85571bc7 bellard
        if (0 == s->dma_auto) {
1228 85571bc7 bellard
            control (s, 0);
1229 85571bc7 bellard
            speaker (s, 0);
1230 27503323 bellard
        }
1231 27503323 bellard
    }
1232 27503323 bellard
1233 d75d9f6b bellard
#ifdef DEBUG_SB16_MOST
1234 15b61470 bellard
    ldebug ("pos %5d free %5d size %5d till % 5d copy %5d written %5d size %5d\n",
1235 15b61470 bellard
            dma_pos, free, dma_len, s->left_till_irq, copy, written,
1236 15b61470 bellard
            s->block_size);
1237 d75d9f6b bellard
#endif
1238 27503323 bellard
1239 85571bc7 bellard
    while (s->left_till_irq <= 0) {
1240 85571bc7 bellard
        s->left_till_irq = s->block_size + s->left_till_irq;
1241 27503323 bellard
    }
1242 27503323 bellard
1243 85571bc7 bellard
    return dma_pos;
1244 27503323 bellard
}
1245 27503323 bellard
1246 1d14ffa9 bellard
static void SB_audio_callback (void *opaque, int free)
1247 27503323 bellard
{
1248 85571bc7 bellard
    SB16State *s = opaque;
1249 1d14ffa9 bellard
    s->audio_free = free;
1250 27503323 bellard
}
1251 27503323 bellard
1252 ebfd6f4d Juan Quintela
static int sb16_post_load (void *opaque, int version_id)
1253 d75d9f6b bellard
{
1254 85571bc7 bellard
    SB16State *s = opaque;
1255 85571bc7 bellard
1256 fb065187 bellard
    if (s->voice) {
1257 c0fe3827 bellard
        AUD_close_out (&s->card, s->voice);
1258 fb065187 bellard
        s->voice = NULL;
1259 fb065187 bellard
    }
1260 85571bc7 bellard
1261 85571bc7 bellard
    if (s->dma_running) {
1262 1d14ffa9 bellard
        if (s->freq) {
1263 1ea879e5 malc
            struct audsettings as;
1264 c0fe3827 bellard
1265 1d14ffa9 bellard
            s->audio_free = 0;
1266 c0fe3827 bellard
1267 c0fe3827 bellard
            as.freq = s->freq;
1268 c0fe3827 bellard
            as.nchannels = 1 << s->fmt_stereo;
1269 c0fe3827 bellard
            as.fmt = s->fmt;
1270 d929eba5 bellard
            as.endianness = 0;
1271 c0fe3827 bellard
1272 1d14ffa9 bellard
            s->voice = AUD_open_out (
1273 c0fe3827 bellard
                &s->card,
1274 1d14ffa9 bellard
                s->voice,
1275 1d14ffa9 bellard
                "sb16",
1276 1d14ffa9 bellard
                s,
1277 1d14ffa9 bellard
                SB_audio_callback,
1278 d929eba5 bellard
                &as
1279 1d14ffa9 bellard
                );
1280 1d14ffa9 bellard
        }
1281 85571bc7 bellard
1282 85571bc7 bellard
        control (s, 1);
1283 85571bc7 bellard
        speaker (s, s->speaker);
1284 d75d9f6b bellard
    }
1285 85571bc7 bellard
    return 0;
1286 d75d9f6b bellard
}
1287 d75d9f6b bellard
1288 ebfd6f4d Juan Quintela
static const VMStateDescription vmstate_sb16 = {
1289 ebfd6f4d Juan Quintela
    .name = "sb16",
1290 ebfd6f4d Juan Quintela
    .version_id = 1,
1291 ebfd6f4d Juan Quintela
    .minimum_version_id = 1,
1292 ebfd6f4d Juan Quintela
    .minimum_version_id_old = 1,
1293 ebfd6f4d Juan Quintela
    .post_load = sb16_post_load,
1294 ebfd6f4d Juan Quintela
    .fields      = (VMStateField []) {
1295 cf4dc461 malc
        VMSTATE_UINT32 (irq, SB16State),
1296 cf4dc461 malc
        VMSTATE_UINT32 (dma, SB16State),
1297 cf4dc461 malc
        VMSTATE_UINT32 (hdma, SB16State),
1298 cf4dc461 malc
        VMSTATE_UINT32 (port, SB16State),
1299 cf4dc461 malc
        VMSTATE_UINT32 (ver, SB16State),
1300 cf4dc461 malc
        VMSTATE_INT32 (in_index, SB16State),
1301 cf4dc461 malc
        VMSTATE_INT32 (out_data_len, SB16State),
1302 cf4dc461 malc
        VMSTATE_INT32 (fmt_stereo, SB16State),
1303 cf4dc461 malc
        VMSTATE_INT32 (fmt_signed, SB16State),
1304 cf4dc461 malc
        VMSTATE_INT32 (fmt_bits, SB16State),
1305 cf4dc461 malc
        VMSTATE_UINT32 (fmt, SB16State),
1306 cf4dc461 malc
        VMSTATE_INT32 (dma_auto, SB16State),
1307 cf4dc461 malc
        VMSTATE_INT32 (block_size, SB16State),
1308 cf4dc461 malc
        VMSTATE_INT32 (fifo, SB16State),
1309 cf4dc461 malc
        VMSTATE_INT32 (freq, SB16State),
1310 cf4dc461 malc
        VMSTATE_INT32 (time_const, SB16State),
1311 cf4dc461 malc
        VMSTATE_INT32 (speaker, SB16State),
1312 cf4dc461 malc
        VMSTATE_INT32 (needed_bytes, SB16State),
1313 cf4dc461 malc
        VMSTATE_INT32 (cmd, SB16State),
1314 cf4dc461 malc
        VMSTATE_INT32 (use_hdma, SB16State),
1315 cf4dc461 malc
        VMSTATE_INT32 (highspeed, SB16State),
1316 cf4dc461 malc
        VMSTATE_INT32 (can_write, SB16State),
1317 cf4dc461 malc
        VMSTATE_INT32 (v2x6, SB16State),
1318 cf4dc461 malc
1319 cf4dc461 malc
        VMSTATE_UINT8 (csp_param, SB16State),
1320 cf4dc461 malc
        VMSTATE_UINT8 (csp_value, SB16State),
1321 cf4dc461 malc
        VMSTATE_UINT8 (csp_mode, SB16State),
1322 cf4dc461 malc
        VMSTATE_UINT8 (csp_param, SB16State),
1323 cf4dc461 malc
        VMSTATE_BUFFER (csp_regs, SB16State),
1324 cf4dc461 malc
        VMSTATE_UINT8 (csp_index, SB16State),
1325 cf4dc461 malc
        VMSTATE_BUFFER (csp_reg83, SB16State),
1326 cf4dc461 malc
        VMSTATE_INT32 (csp_reg83r, SB16State),
1327 cf4dc461 malc
        VMSTATE_INT32 (csp_reg83w, SB16State),
1328 cf4dc461 malc
1329 cf4dc461 malc
        VMSTATE_BUFFER (in2_data, SB16State),
1330 cf4dc461 malc
        VMSTATE_BUFFER (out_data, SB16State),
1331 cf4dc461 malc
        VMSTATE_UINT8 (test_reg, SB16State),
1332 cf4dc461 malc
        VMSTATE_UINT8 (last_read_byte, SB16State),
1333 cf4dc461 malc
1334 cf4dc461 malc
        VMSTATE_INT32 (nzero, SB16State),
1335 cf4dc461 malc
        VMSTATE_INT32 (left_till_irq, SB16State),
1336 cf4dc461 malc
        VMSTATE_INT32 (dma_running, SB16State),
1337 cf4dc461 malc
        VMSTATE_INT32 (bytes_per_second, SB16State),
1338 cf4dc461 malc
        VMSTATE_INT32 (align, SB16State),
1339 cf4dc461 malc
1340 cf4dc461 malc
        VMSTATE_INT32 (mixer_nreg, SB16State),
1341 cf4dc461 malc
        VMSTATE_BUFFER (mixer_regs, SB16State),
1342 cf4dc461 malc
1343 cf4dc461 malc
        VMSTATE_END_OF_LIST ()
1344 ebfd6f4d Juan Quintela
    }
1345 ebfd6f4d Juan Quintela
};
1346 ebfd6f4d Juan Quintela
1347 42c1a22d Richard Henderson
static const MemoryRegionPortio sb16_ioport_list[] = {
1348 42c1a22d Richard Henderson
    {  4, 1, 1, .write = mixer_write_indexb },
1349 42c1a22d Richard Henderson
    {  4, 1, 2, .write = mixer_write_indexw },
1350 42c1a22d Richard Henderson
    {  5, 1, 1, .read = mixer_read, .write = mixer_write_datab },
1351 42c1a22d Richard Henderson
    {  6, 1, 1, .read = dsp_read, .write = dsp_write },
1352 42c1a22d Richard Henderson
    { 10, 1, 1, .read = dsp_read },
1353 42c1a22d Richard Henderson
    { 12, 1, 1, .write = dsp_write },
1354 42c1a22d Richard Henderson
    { 12, 4, 1, .read = dsp_read },
1355 cf4dc461 malc
    PORTIO_END_OF_LIST (),
1356 42c1a22d Richard Henderson
};
1357 42c1a22d Richard Henderson
1358 42c1a22d Richard Henderson
1359 db895a1e Andreas Färber
static void sb16_initfn (Object *obj)
1360 27503323 bellard
{
1361 db895a1e Andreas Färber
    SB16State *s = SB16 (obj);
1362 c0fe3827 bellard
1363 1d14ffa9 bellard
    s->cmd = -1;
1364 db895a1e Andreas Färber
}
1365 db895a1e Andreas Färber
1366 db895a1e Andreas Färber
static void sb16_realizefn (DeviceState *dev, Error **errp)
1367 db895a1e Andreas Färber
{
1368 db895a1e Andreas Färber
    ISADevice *isadev = ISA_DEVICE (dev);
1369 db895a1e Andreas Färber
    SB16State *s = SB16 (dev);
1370 db895a1e Andreas Färber
1371 db895a1e Andreas Färber
    isa_init_irq (isadev, &s->pic, s->irq);
1372 202a456a bellard
1373 85571bc7 bellard
    s->mixer_regs[0x80] = magic_of_irq (s->irq);
1374 85571bc7 bellard
    s->mixer_regs[0x81] = (1 << s->dma) | (1 << s->hdma);
1375 85571bc7 bellard
    s->mixer_regs[0x82] = 2 << 5;
1376 85571bc7 bellard
1377 85571bc7 bellard
    s->csp_regs[5] = 1;
1378 85571bc7 bellard
    s->csp_regs[9] = 0xf8;
1379 85571bc7 bellard
1380 85571bc7 bellard
    reset_mixer (s);
1381 74475455 Paolo Bonzini
    s->aux_ts = qemu_new_timer_ns (vm_clock, aux_timer, s);
1382 1d14ffa9 bellard
    if (!s->aux_ts) {
1383 c0fe3827 bellard
        dolog ("warning: Could not create auxiliary timer\n");
1384 1d14ffa9 bellard
    }
1385 27503323 bellard
1386 db895a1e Andreas Färber
    isa_register_portio_list (isadev, s->port, sb16_ioport_list, s, "sb16");
1387 27503323 bellard
1388 85571bc7 bellard
    DMA_register_channel (s->hdma, SB_read_DMA, s);
1389 85571bc7 bellard
    DMA_register_channel (s->dma, SB_read_DMA, s);
1390 85571bc7 bellard
    s->can_write = 1;
1391 d75d9f6b bellard
1392 1a7dafce malc
    AUD_register_card ("sb16", &s->card);
1393 27503323 bellard
}
1394 f7b4f61f Gerd Hoffmann
1395 36cd6f6f Paolo Bonzini
static int SB16_init (ISABus *bus)
1396 f7b4f61f Gerd Hoffmann
{
1397 399f05a6 Andreas Färber
    isa_create_simple (bus, TYPE_SB16);
1398 f7b4f61f Gerd Hoffmann
    return 0;
1399 f7b4f61f Gerd Hoffmann
}
1400 f7b4f61f Gerd Hoffmann
1401 39bffca2 Anthony Liguori
static Property sb16_properties[] = {
1402 39bffca2 Anthony Liguori
    DEFINE_PROP_HEX32  ("version", SB16State, ver,  0x0405), /* 4.5 */
1403 39bffca2 Anthony Liguori
    DEFINE_PROP_HEX32  ("iobase",  SB16State, port, 0x220),
1404 39bffca2 Anthony Liguori
    DEFINE_PROP_UINT32 ("irq",     SB16State, irq,  5),
1405 39bffca2 Anthony Liguori
    DEFINE_PROP_UINT32 ("dma",     SB16State, dma,  1),
1406 39bffca2 Anthony Liguori
    DEFINE_PROP_UINT32 ("dma16",   SB16State, hdma, 5),
1407 39bffca2 Anthony Liguori
    DEFINE_PROP_END_OF_LIST (),
1408 39bffca2 Anthony Liguori
};
1409 39bffca2 Anthony Liguori
1410 cf4dc461 malc
static void sb16_class_initfn (ObjectClass *klass, void *data)
1411 8f04ee08 Anthony Liguori
{
1412 cf4dc461 malc
    DeviceClass *dc = DEVICE_CLASS (klass);
1413 db895a1e Andreas Färber
1414 db895a1e Andreas Färber
    dc->realize = sb16_realizefn;
1415 39bffca2 Anthony Liguori
    dc->desc = "Creative Sound Blaster 16";
1416 39bffca2 Anthony Liguori
    dc->vmsd = &vmstate_sb16;
1417 39bffca2 Anthony Liguori
    dc->props = sb16_properties;
1418 8f04ee08 Anthony Liguori
}
1419 8f04ee08 Anthony Liguori
1420 8c43a6f0 Andreas Färber
static const TypeInfo sb16_info = {
1421 399f05a6 Andreas Färber
    .name          = TYPE_SB16,
1422 39bffca2 Anthony Liguori
    .parent        = TYPE_ISA_DEVICE,
1423 39bffca2 Anthony Liguori
    .instance_size = sizeof (SB16State),
1424 db895a1e Andreas Färber
    .instance_init = sb16_initfn,
1425 39bffca2 Anthony Liguori
    .class_init    = sb16_class_initfn,
1426 f7b4f61f Gerd Hoffmann
};
1427 f7b4f61f Gerd Hoffmann
1428 83f7d43a Andreas Färber
static void sb16_register_types (void)
1429 f7b4f61f Gerd Hoffmann
{
1430 cf4dc461 malc
    type_register_static (&sb16_info);
1431 36cd6f6f Paolo Bonzini
    isa_register_soundhw("sb16", "Creative Sound Blaster 16", SB16_init);
1432 f7b4f61f Gerd Hoffmann
}
1433 83f7d43a Andreas Färber
1434 83f7d43a Andreas Färber
type_init (sb16_register_types)