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/*
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* QEMU System Emulator header
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*
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* Copyright (c) 2003 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef VL_H
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#define VL_H
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/* we put basic includes here to avoid repeating them in device drivers */
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#include <stdlib.h> |
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#include <stdio.h> |
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#include <stdarg.h> |
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#include <string.h> |
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#include <inttypes.h> |
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#include <limits.h> |
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#include <time.h> |
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#include <ctype.h> |
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#include <errno.h> |
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#include <unistd.h> |
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#include <fcntl.h> |
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#include <sys/stat.h> |
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#ifndef O_LARGEFILE
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#define O_LARGEFILE 0 |
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#endif
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#ifndef O_BINARY
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#define O_BINARY 0 |
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#endif
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#ifdef __sun__
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#define ENOMEDIUM 4097 |
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#endif
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#ifdef _WIN32
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#include <windows.h> |
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#define fsync _commit
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#define lseek _lseeki64
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#define ENOTSUP 4096 |
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#define ENOMEDIUM 4097 |
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extern int qemu_ftruncate64(int, int64_t); |
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#define ftruncate qemu_ftruncate64
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static inline char *realpath(const char *path, char *resolved_path) |
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{ |
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_fullpath(resolved_path, path, _MAX_PATH); |
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return resolved_path;
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} |
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#define PRId64 "I64d" |
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#define PRIx64 "I64x" |
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#define PRIu64 "I64u" |
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#define PRIo64 "I64o" |
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#endif
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#ifdef QEMU_TOOL
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/* we use QEMU_TOOL in the command line tools which do not depend on
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the target CPU type */
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#include "config-host.h" |
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#include <setjmp.h> |
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#include "osdep.h" |
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#include "bswap.h" |
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#else
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#include "audio/audio.h" |
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#include "cpu.h" |
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#include "gdbstub.h" |
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#endif /* !defined(QEMU_TOOL) */ |
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#ifndef glue
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#define xglue(x, y) x ## y |
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#define glue(x, y) xglue(x, y)
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#define stringify(s) tostring(s)
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#define tostring(s) #s |
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#endif
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#ifndef MIN
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#define MIN(a, b) (((a) < (b)) ? (a) : (b))
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#endif
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#ifndef MAX
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#define MAX(a, b) (((a) > (b)) ? (a) : (b))
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#endif
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/* cutils.c */
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void pstrcpy(char *buf, int buf_size, const char *str); |
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char *pstrcat(char *buf, int buf_size, const char *s); |
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int strstart(const char *str, const char *val, const char **ptr); |
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int stristart(const char *str, const char *val, const char **ptr); |
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/* vl.c */
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uint64_t muldiv64(uint64_t a, uint32_t b, uint32_t c); |
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void hw_error(const char *fmt, ...); |
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extern const char *bios_dir; |
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extern int vm_running; |
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typedef struct vm_change_state_entry VMChangeStateEntry; |
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typedef void VMChangeStateHandler(void *opaque, int running); |
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typedef void VMStopHandler(void *opaque, int reason); |
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VMChangeStateEntry *qemu_add_vm_change_state_handler(VMChangeStateHandler *cb, |
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void *opaque);
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void qemu_del_vm_change_state_handler(VMChangeStateEntry *e);
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int qemu_add_vm_stop_handler(VMStopHandler *cb, void *opaque); |
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void qemu_del_vm_stop_handler(VMStopHandler *cb, void *opaque); |
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void vm_start(void); |
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void vm_stop(int reason); |
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typedef void QEMUResetHandler(void *opaque); |
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void qemu_register_reset(QEMUResetHandler *func, void *opaque); |
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void qemu_system_reset_request(void); |
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void qemu_system_shutdown_request(void); |
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void qemu_system_powerdown_request(void); |
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#if !defined(TARGET_SPARC)
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// Please implement a power failure function to signal the OS
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#define qemu_system_powerdown() do{}while(0) |
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#else
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void qemu_system_powerdown(void); |
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#endif
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void main_loop_wait(int timeout); |
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extern int ram_size; |
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extern int bios_size; |
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extern int rtc_utc; |
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extern int cirrus_vga_enabled; |
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extern int graphic_width; |
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extern int graphic_height; |
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extern int graphic_depth; |
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extern const char *keyboard_layout; |
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extern int kqemu_allowed; |
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extern int win2k_install_hack; |
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extern int usb_enabled; |
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extern int smp_cpus; |
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extern int no_quit; |
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#define MAX_OPTION_ROMS 16 |
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extern const char *option_rom[MAX_OPTION_ROMS]; |
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extern int nb_option_roms; |
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/* XXX: make it dynamic */
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#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
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#define BIOS_SIZE ((512 + 32) * 1024) |
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#elif defined(TARGET_MIPS)
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#define BIOS_SIZE (128 * 1024) |
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#else
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#define BIOS_SIZE ((256 + 64) * 1024) |
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#endif
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/* keyboard/mouse support */
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#define MOUSE_EVENT_LBUTTON 0x01 |
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#define MOUSE_EVENT_RBUTTON 0x02 |
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#define MOUSE_EVENT_MBUTTON 0x04 |
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typedef void QEMUPutKBDEvent(void *opaque, int keycode); |
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typedef void QEMUPutMouseEvent(void *opaque, int dx, int dy, int dz, int buttons_state); |
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typedef struct QEMUPutMouseEntry { |
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QEMUPutMouseEvent *qemu_put_mouse_event; |
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void *qemu_put_mouse_event_opaque;
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int qemu_put_mouse_event_absolute;
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char *qemu_put_mouse_event_name;
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/* used internally by qemu for handling mice */
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struct QEMUPutMouseEntry *next;
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} QEMUPutMouseEntry; |
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void qemu_add_kbd_event_handler(QEMUPutKBDEvent *func, void *opaque); |
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QEMUPutMouseEntry *qemu_add_mouse_event_handler(QEMUPutMouseEvent *func, |
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void *opaque, int absolute, |
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const char *name); |
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void qemu_remove_mouse_event_handler(QEMUPutMouseEntry *entry);
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void kbd_put_keycode(int keycode); |
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void kbd_mouse_event(int dx, int dy, int dz, int buttons_state); |
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int kbd_mouse_is_absolute(void); |
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void do_info_mice(void); |
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void do_mouse_set(int index); |
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/* keysym is a unicode code except for special keys (see QEMU_KEY_xxx
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constants) */
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#define QEMU_KEY_ESC1(c) ((c) | 0xe100) |
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#define QEMU_KEY_BACKSPACE 0x007f |
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#define QEMU_KEY_UP QEMU_KEY_ESC1('A') |
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#define QEMU_KEY_DOWN QEMU_KEY_ESC1('B') |
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#define QEMU_KEY_RIGHT QEMU_KEY_ESC1('C') |
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#define QEMU_KEY_LEFT QEMU_KEY_ESC1('D') |
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#define QEMU_KEY_HOME QEMU_KEY_ESC1(1) |
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#define QEMU_KEY_END QEMU_KEY_ESC1(4) |
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#define QEMU_KEY_PAGEUP QEMU_KEY_ESC1(5) |
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#define QEMU_KEY_PAGEDOWN QEMU_KEY_ESC1(6) |
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#define QEMU_KEY_DELETE QEMU_KEY_ESC1(3) |
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#define QEMU_KEY_CTRL_UP 0xe400 |
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#define QEMU_KEY_CTRL_DOWN 0xe401 |
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#define QEMU_KEY_CTRL_LEFT 0xe402 |
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#define QEMU_KEY_CTRL_RIGHT 0xe403 |
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#define QEMU_KEY_CTRL_HOME 0xe404 |
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#define QEMU_KEY_CTRL_END 0xe405 |
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#define QEMU_KEY_CTRL_PAGEUP 0xe406 |
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#define QEMU_KEY_CTRL_PAGEDOWN 0xe407 |
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void kbd_put_keysym(int keysym); |
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/* async I/O support */
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typedef void IOReadHandler(void *opaque, const uint8_t *buf, int size); |
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typedef int IOCanRWHandler(void *opaque); |
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typedef void IOHandler(void *opaque); |
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int qemu_set_fd_handler2(int fd, |
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IOCanRWHandler *fd_read_poll, |
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IOHandler *fd_read, |
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IOHandler *fd_write, |
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void *opaque);
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int qemu_set_fd_handler(int fd, |
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IOHandler *fd_read, |
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IOHandler *fd_write, |
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void *opaque);
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/* Polling handling */
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/* return TRUE if no sleep should be done afterwards */
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typedef int PollingFunc(void *opaque); |
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int qemu_add_polling_cb(PollingFunc *func, void *opaque); |
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void qemu_del_polling_cb(PollingFunc *func, void *opaque); |
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#ifdef _WIN32
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/* Wait objects handling */
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typedef void WaitObjectFunc(void *opaque); |
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int qemu_add_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
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void qemu_del_wait_object(HANDLE handle, WaitObjectFunc *func, void *opaque); |
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#endif
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typedef struct QEMUBH QEMUBH; |
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/* character device */
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#define CHR_EVENT_BREAK 0 /* serial break char */ |
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#define CHR_EVENT_FOCUS 1 /* focus to this terminal (modal input needed) */ |
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#define CHR_EVENT_RESET 2 /* new connection established */ |
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#define CHR_IOCTL_SERIAL_SET_PARAMS 1 |
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typedef struct { |
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int speed;
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int parity;
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int data_bits;
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int stop_bits;
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} QEMUSerialSetParams; |
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#define CHR_IOCTL_SERIAL_SET_BREAK 2 |
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#define CHR_IOCTL_PP_READ_DATA 3 |
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#define CHR_IOCTL_PP_WRITE_DATA 4 |
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#define CHR_IOCTL_PP_READ_CONTROL 5 |
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#define CHR_IOCTL_PP_WRITE_CONTROL 6 |
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#define CHR_IOCTL_PP_READ_STATUS 7 |
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typedef void IOEventHandler(void *opaque, int event); |
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typedef struct CharDriverState { |
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int (*chr_write)(struct CharDriverState *s, const uint8_t *buf, int len); |
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void (*chr_add_read_handler)(struct CharDriverState *s, |
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IOCanRWHandler *fd_can_read, |
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IOReadHandler *fd_read, void *opaque);
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int (*chr_ioctl)(struct CharDriverState *s, int cmd, void *arg); |
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IOEventHandler *chr_event; |
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void (*chr_send_event)(struct CharDriverState *chr, int event); |
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void (*chr_close)(struct CharDriverState *chr); |
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void *opaque;
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QEMUBH *bh; |
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} CharDriverState; |
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void qemu_chr_printf(CharDriverState *s, const char *fmt, ...); |
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int qemu_chr_write(CharDriverState *s, const uint8_t *buf, int len); |
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void qemu_chr_send_event(CharDriverState *s, int event); |
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void qemu_chr_add_read_handler(CharDriverState *s,
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IOCanRWHandler *fd_can_read, |
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IOReadHandler *fd_read, void *opaque);
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void qemu_chr_add_event_handler(CharDriverState *s, IOEventHandler *chr_event);
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int qemu_chr_ioctl(CharDriverState *s, int cmd, void *arg); |
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void qemu_chr_reset(CharDriverState *s);
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/* consoles */
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typedef struct DisplayState DisplayState; |
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typedef struct TextConsole TextConsole; |
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typedef void (*vga_hw_update_ptr)(void *); |
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typedef void (*vga_hw_invalidate_ptr)(void *); |
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typedef void (*vga_hw_screen_dump_ptr)(void *, const char *); |
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TextConsole *graphic_console_init(DisplayState *ds, vga_hw_update_ptr update, |
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vga_hw_invalidate_ptr invalidate, |
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vga_hw_screen_dump_ptr screen_dump, |
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void *opaque);
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void vga_hw_update(void); |
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void vga_hw_invalidate(void); |
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void vga_hw_screen_dump(const char *filename); |
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int is_graphic_console(void); |
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CharDriverState *text_console_init(DisplayState *ds); |
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void console_select(unsigned int index); |
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/* serial ports */
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#define MAX_SERIAL_PORTS 4 |
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extern CharDriverState *serial_hds[MAX_SERIAL_PORTS];
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/* parallel ports */
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#define MAX_PARALLEL_PORTS 3 |
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extern CharDriverState *parallel_hds[MAX_PARALLEL_PORTS];
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/* VLANs support */
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typedef struct VLANClientState VLANClientState; |
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struct VLANClientState {
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IOReadHandler *fd_read; |
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/* Packets may still be sent if this returns zero. It's used to
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rate-limit the slirp code. */
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IOCanRWHandler *fd_can_read; |
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void *opaque;
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struct VLANClientState *next;
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struct VLANState *vlan;
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char info_str[256]; |
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}; |
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typedef struct VLANState { |
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int id;
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VLANClientState *first_client; |
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struct VLANState *next;
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} VLANState; |
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VLANState *qemu_find_vlan(int id);
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VLANClientState *qemu_new_vlan_client(VLANState *vlan, |
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IOReadHandler *fd_read, |
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IOCanRWHandler *fd_can_read, |
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void *opaque);
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int qemu_can_send_packet(VLANClientState *vc);
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void qemu_send_packet(VLANClientState *vc, const uint8_t *buf, int size); |
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void qemu_handler_true(void *opaque); |
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void do_info_network(void); |
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/* TAP win32 */
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int tap_win32_init(VLANState *vlan, const char *ifname); |
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/* NIC info */
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#define MAX_NICS 8 |
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typedef struct NICInfo { |
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uint8_t macaddr[6];
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const char *model; |
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VLANState *vlan; |
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} NICInfo; |
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extern int nb_nics; |
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extern NICInfo nd_table[MAX_NICS];
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|
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/* timers */
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typedef struct QEMUClock QEMUClock; |
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typedef struct QEMUTimer QEMUTimer; |
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typedef void QEMUTimerCB(void *opaque); |
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/* The real time clock should be used only for stuff which does not
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change the virtual machine state, as it is run even if the virtual
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machine is stopped. The real time clock has a frequency of 1000
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Hz. */
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extern QEMUClock *rt_clock;
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/* The virtual clock is only run during the emulation. It is stopped
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when the virtual machine is stopped. Virtual timers use a high
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precision clock, usually cpu cycles (use ticks_per_sec). */
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extern QEMUClock *vm_clock;
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int64_t qemu_get_clock(QEMUClock *clock); |
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QEMUTimer *qemu_new_timer(QEMUClock *clock, QEMUTimerCB *cb, void *opaque);
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void qemu_free_timer(QEMUTimer *ts);
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void qemu_del_timer(QEMUTimer *ts);
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void qemu_mod_timer(QEMUTimer *ts, int64_t expire_time);
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int qemu_timer_pending(QEMUTimer *ts);
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extern int64_t ticks_per_sec;
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extern int pit_min_timer_count; |
423 |
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int64_t cpu_get_ticks(void);
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void cpu_enable_ticks(void); |
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void cpu_disable_ticks(void); |
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/* VM Load/Save */
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|
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typedef struct QEMUFile QEMUFile; |
431 |
|
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QEMUFile *qemu_fopen(const char *filename, const char *mode); |
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void qemu_fflush(QEMUFile *f);
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void qemu_fclose(QEMUFile *f);
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void qemu_put_buffer(QEMUFile *f, const uint8_t *buf, int size); |
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void qemu_put_byte(QEMUFile *f, int v); |
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void qemu_put_be16(QEMUFile *f, unsigned int v); |
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void qemu_put_be32(QEMUFile *f, unsigned int v); |
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void qemu_put_be64(QEMUFile *f, uint64_t v);
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int qemu_get_buffer(QEMUFile *f, uint8_t *buf, int size); |
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int qemu_get_byte(QEMUFile *f);
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unsigned int qemu_get_be16(QEMUFile *f); |
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unsigned int qemu_get_be32(QEMUFile *f); |
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uint64_t qemu_get_be64(QEMUFile *f); |
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|
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static inline void qemu_put_be64s(QEMUFile *f, const uint64_t *pv) |
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{ |
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qemu_put_be64(f, *pv); |
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} |
450 |
|
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static inline void qemu_put_be32s(QEMUFile *f, const uint32_t *pv) |
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{ |
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qemu_put_be32(f, *pv); |
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} |
455 |
|
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static inline void qemu_put_be16s(QEMUFile *f, const uint16_t *pv) |
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{ |
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qemu_put_be16(f, *pv); |
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} |
460 |
|
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static inline void qemu_put_8s(QEMUFile *f, const uint8_t *pv) |
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{ |
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qemu_put_byte(f, *pv); |
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} |
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|
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static inline void qemu_get_be64s(QEMUFile *f, uint64_t *pv) |
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{ |
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*pv = qemu_get_be64(f); |
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} |
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|
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static inline void qemu_get_be32s(QEMUFile *f, uint32_t *pv) |
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{ |
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*pv = qemu_get_be32(f); |
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} |
475 |
|
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static inline void qemu_get_be16s(QEMUFile *f, uint16_t *pv) |
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{ |
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*pv = qemu_get_be16(f); |
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} |
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|
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static inline void qemu_get_8s(QEMUFile *f, uint8_t *pv) |
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{ |
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*pv = qemu_get_byte(f); |
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} |
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|
486 |
#if TARGET_LONG_BITS == 64 |
487 |
#define qemu_put_betl qemu_put_be64
|
488 |
#define qemu_get_betl qemu_get_be64
|
489 |
#define qemu_put_betls qemu_put_be64s
|
490 |
#define qemu_get_betls qemu_get_be64s
|
491 |
#else
|
492 |
#define qemu_put_betl qemu_put_be32
|
493 |
#define qemu_get_betl qemu_get_be32
|
494 |
#define qemu_put_betls qemu_put_be32s
|
495 |
#define qemu_get_betls qemu_get_be32s
|
496 |
#endif
|
497 |
|
498 |
int64_t qemu_ftell(QEMUFile *f); |
499 |
int64_t qemu_fseek(QEMUFile *f, int64_t pos, int whence);
|
500 |
|
501 |
typedef void SaveStateHandler(QEMUFile *f, void *opaque); |
502 |
typedef int LoadStateHandler(QEMUFile *f, void *opaque, int version_id); |
503 |
|
504 |
int register_savevm(const char *idstr, |
505 |
int instance_id,
|
506 |
int version_id,
|
507 |
SaveStateHandler *save_state, |
508 |
LoadStateHandler *load_state, |
509 |
void *opaque);
|
510 |
void qemu_get_timer(QEMUFile *f, QEMUTimer *ts);
|
511 |
void qemu_put_timer(QEMUFile *f, QEMUTimer *ts);
|
512 |
|
513 |
void cpu_save(QEMUFile *f, void *opaque); |
514 |
int cpu_load(QEMUFile *f, void *opaque, int version_id); |
515 |
|
516 |
void do_savevm(const char *name); |
517 |
void do_loadvm(const char *name); |
518 |
void do_delvm(const char *name); |
519 |
void do_info_snapshots(void); |
520 |
|
521 |
/* bottom halves */
|
522 |
typedef void QEMUBHFunc(void *opaque); |
523 |
|
524 |
QEMUBH *qemu_bh_new(QEMUBHFunc *cb, void *opaque);
|
525 |
void qemu_bh_schedule(QEMUBH *bh);
|
526 |
void qemu_bh_cancel(QEMUBH *bh);
|
527 |
void qemu_bh_delete(QEMUBH *bh);
|
528 |
int qemu_bh_poll(void); |
529 |
|
530 |
/* block.c */
|
531 |
typedef struct BlockDriverState BlockDriverState; |
532 |
typedef struct BlockDriver BlockDriver; |
533 |
|
534 |
extern BlockDriver bdrv_raw;
|
535 |
extern BlockDriver bdrv_host_device;
|
536 |
extern BlockDriver bdrv_cow;
|
537 |
extern BlockDriver bdrv_qcow;
|
538 |
extern BlockDriver bdrv_vmdk;
|
539 |
extern BlockDriver bdrv_cloop;
|
540 |
extern BlockDriver bdrv_dmg;
|
541 |
extern BlockDriver bdrv_bochs;
|
542 |
extern BlockDriver bdrv_vpc;
|
543 |
extern BlockDriver bdrv_vvfat;
|
544 |
extern BlockDriver bdrv_qcow2;
|
545 |
|
546 |
typedef struct BlockDriverInfo { |
547 |
/* in bytes, 0 if irrelevant */
|
548 |
int cluster_size;
|
549 |
/* offset at which the VM state can be saved (0 if not possible) */
|
550 |
int64_t vm_state_offset; |
551 |
} BlockDriverInfo; |
552 |
|
553 |
typedef struct QEMUSnapshotInfo { |
554 |
char id_str[128]; /* unique snapshot id */ |
555 |
/* the following fields are informative. They are not needed for
|
556 |
the consistency of the snapshot */
|
557 |
char name[256]; /* user choosen name */ |
558 |
uint32_t vm_state_size; /* VM state info size */
|
559 |
uint32_t date_sec; /* UTC date of the snapshot */
|
560 |
uint32_t date_nsec; |
561 |
uint64_t vm_clock_nsec; /* VM clock relative to boot */
|
562 |
} QEMUSnapshotInfo; |
563 |
|
564 |
#define BDRV_O_RDONLY 0x0000 |
565 |
#define BDRV_O_RDWR 0x0002 |
566 |
#define BDRV_O_ACCESS 0x0003 |
567 |
#define BDRV_O_CREAT 0x0004 /* create an empty file */ |
568 |
#define BDRV_O_SNAPSHOT 0x0008 /* open the file read only and save writes in a snapshot */ |
569 |
#define BDRV_O_FILE 0x0010 /* open as a raw file (do not try to |
570 |
use a disk image format on top of
|
571 |
it (default for
|
572 |
bdrv_file_open()) */
|
573 |
|
574 |
void bdrv_init(void); |
575 |
BlockDriver *bdrv_find_format(const char *format_name); |
576 |
int bdrv_create(BlockDriver *drv,
|
577 |
const char *filename, int64_t size_in_sectors, |
578 |
const char *backing_file, int flags); |
579 |
BlockDriverState *bdrv_new(const char *device_name); |
580 |
void bdrv_delete(BlockDriverState *bs);
|
581 |
int bdrv_file_open(BlockDriverState **pbs, const char *filename, int flags); |
582 |
int bdrv_open(BlockDriverState *bs, const char *filename, int flags); |
583 |
int bdrv_open2(BlockDriverState *bs, const char *filename, int flags, |
584 |
BlockDriver *drv); |
585 |
void bdrv_close(BlockDriverState *bs);
|
586 |
int bdrv_read(BlockDriverState *bs, int64_t sector_num,
|
587 |
uint8_t *buf, int nb_sectors);
|
588 |
int bdrv_write(BlockDriverState *bs, int64_t sector_num,
|
589 |
const uint8_t *buf, int nb_sectors); |
590 |
int bdrv_pread(BlockDriverState *bs, int64_t offset,
|
591 |
void *buf, int count); |
592 |
int bdrv_pwrite(BlockDriverState *bs, int64_t offset,
|
593 |
const void *buf, int count); |
594 |
int bdrv_truncate(BlockDriverState *bs, int64_t offset);
|
595 |
int64_t bdrv_getlength(BlockDriverState *bs); |
596 |
void bdrv_get_geometry(BlockDriverState *bs, int64_t *nb_sectors_ptr);
|
597 |
int bdrv_commit(BlockDriverState *bs);
|
598 |
void bdrv_set_boot_sector(BlockDriverState *bs, const uint8_t *data, int size); |
599 |
/* async block I/O */
|
600 |
typedef struct BlockDriverAIOCB BlockDriverAIOCB; |
601 |
typedef void BlockDriverCompletionFunc(void *opaque, int ret); |
602 |
|
603 |
BlockDriverAIOCB *bdrv_aio_read(BlockDriverState *bs, int64_t sector_num, |
604 |
uint8_t *buf, int nb_sectors,
|
605 |
BlockDriverCompletionFunc *cb, void *opaque);
|
606 |
BlockDriverAIOCB *bdrv_aio_write(BlockDriverState *bs, int64_t sector_num, |
607 |
const uint8_t *buf, int nb_sectors, |
608 |
BlockDriverCompletionFunc *cb, void *opaque);
|
609 |
void bdrv_aio_cancel(BlockDriverAIOCB *acb);
|
610 |
|
611 |
void qemu_aio_init(void); |
612 |
void qemu_aio_poll(void); |
613 |
void qemu_aio_flush(void); |
614 |
void qemu_aio_wait_start(void); |
615 |
void qemu_aio_wait(void); |
616 |
void qemu_aio_wait_end(void); |
617 |
|
618 |
/* Ensure contents are flushed to disk. */
|
619 |
void bdrv_flush(BlockDriverState *bs);
|
620 |
|
621 |
#define BDRV_TYPE_HD 0 |
622 |
#define BDRV_TYPE_CDROM 1 |
623 |
#define BDRV_TYPE_FLOPPY 2 |
624 |
#define BIOS_ATA_TRANSLATION_AUTO 0 |
625 |
#define BIOS_ATA_TRANSLATION_NONE 1 |
626 |
#define BIOS_ATA_TRANSLATION_LBA 2 |
627 |
#define BIOS_ATA_TRANSLATION_LARGE 3 |
628 |
#define BIOS_ATA_TRANSLATION_RECHS 4 |
629 |
|
630 |
void bdrv_set_geometry_hint(BlockDriverState *bs,
|
631 |
int cyls, int heads, int secs); |
632 |
void bdrv_set_type_hint(BlockDriverState *bs, int type); |
633 |
void bdrv_set_translation_hint(BlockDriverState *bs, int translation); |
634 |
void bdrv_get_geometry_hint(BlockDriverState *bs,
|
635 |
int *pcyls, int *pheads, int *psecs); |
636 |
int bdrv_get_type_hint(BlockDriverState *bs);
|
637 |
int bdrv_get_translation_hint(BlockDriverState *bs);
|
638 |
int bdrv_is_removable(BlockDriverState *bs);
|
639 |
int bdrv_is_read_only(BlockDriverState *bs);
|
640 |
int bdrv_is_inserted(BlockDriverState *bs);
|
641 |
int bdrv_media_changed(BlockDriverState *bs);
|
642 |
int bdrv_is_locked(BlockDriverState *bs);
|
643 |
void bdrv_set_locked(BlockDriverState *bs, int locked); |
644 |
void bdrv_eject(BlockDriverState *bs, int eject_flag); |
645 |
void bdrv_set_change_cb(BlockDriverState *bs,
|
646 |
void (*change_cb)(void *opaque), void *opaque); |
647 |
void bdrv_get_format(BlockDriverState *bs, char *buf, int buf_size); |
648 |
void bdrv_info(void); |
649 |
BlockDriverState *bdrv_find(const char *name); |
650 |
void bdrv_iterate(void (*it)(void *opaque, const char *name), void *opaque); |
651 |
int bdrv_is_encrypted(BlockDriverState *bs);
|
652 |
int bdrv_set_key(BlockDriverState *bs, const char *key); |
653 |
void bdrv_iterate_format(void (*it)(void *opaque, const char *name), |
654 |
void *opaque);
|
655 |
const char *bdrv_get_device_name(BlockDriverState *bs); |
656 |
int bdrv_write_compressed(BlockDriverState *bs, int64_t sector_num,
|
657 |
const uint8_t *buf, int nb_sectors); |
658 |
int bdrv_get_info(BlockDriverState *bs, BlockDriverInfo *bdi);
|
659 |
|
660 |
void bdrv_get_backing_filename(BlockDriverState *bs,
|
661 |
char *filename, int filename_size); |
662 |
int bdrv_snapshot_create(BlockDriverState *bs,
|
663 |
QEMUSnapshotInfo *sn_info); |
664 |
int bdrv_snapshot_goto(BlockDriverState *bs,
|
665 |
const char *snapshot_id); |
666 |
int bdrv_snapshot_delete(BlockDriverState *bs, const char *snapshot_id); |
667 |
int bdrv_snapshot_list(BlockDriverState *bs,
|
668 |
QEMUSnapshotInfo **psn_info); |
669 |
char *bdrv_snapshot_dump(char *buf, int buf_size, QEMUSnapshotInfo *sn); |
670 |
|
671 |
char *get_human_readable_size(char *buf, int buf_size, int64_t size); |
672 |
int path_is_absolute(const char *path); |
673 |
void path_combine(char *dest, int dest_size, |
674 |
const char *base_path, |
675 |
const char *filename); |
676 |
|
677 |
#ifndef QEMU_TOOL
|
678 |
|
679 |
typedef void QEMUMachineInitFunc(int ram_size, int vga_ram_size, |
680 |
int boot_device,
|
681 |
DisplayState *ds, const char **fd_filename, int snapshot, |
682 |
const char *kernel_filename, const char *kernel_cmdline, |
683 |
const char *initrd_filename); |
684 |
|
685 |
typedef struct QEMUMachine { |
686 |
const char *name; |
687 |
const char *desc; |
688 |
QEMUMachineInitFunc *init; |
689 |
struct QEMUMachine *next;
|
690 |
} QEMUMachine; |
691 |
|
692 |
int qemu_register_machine(QEMUMachine *m);
|
693 |
|
694 |
typedef void SetIRQFunc(void *opaque, int irq_num, int level); |
695 |
typedef void IRQRequestFunc(void *opaque, int level); |
696 |
|
697 |
/* ISA bus */
|
698 |
|
699 |
extern target_phys_addr_t isa_mem_base;
|
700 |
|
701 |
typedef void (IOPortWriteFunc)(void *opaque, uint32_t address, uint32_t data); |
702 |
typedef uint32_t (IOPortReadFunc)(void *opaque, uint32_t address); |
703 |
|
704 |
int register_ioport_read(int start, int length, int size, |
705 |
IOPortReadFunc *func, void *opaque);
|
706 |
int register_ioport_write(int start, int length, int size, |
707 |
IOPortWriteFunc *func, void *opaque);
|
708 |
void isa_unassign_ioport(int start, int length); |
709 |
|
710 |
void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size);
|
711 |
|
712 |
/* PCI bus */
|
713 |
|
714 |
extern target_phys_addr_t pci_mem_base;
|
715 |
|
716 |
typedef struct PCIBus PCIBus; |
717 |
typedef struct PCIDevice PCIDevice; |
718 |
|
719 |
typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
720 |
uint32_t address, uint32_t data, int len);
|
721 |
typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
|
722 |
uint32_t address, int len);
|
723 |
typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
724 |
uint32_t addr, uint32_t size, int type);
|
725 |
|
726 |
#define PCI_ADDRESS_SPACE_MEM 0x00 |
727 |
#define PCI_ADDRESS_SPACE_IO 0x01 |
728 |
#define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
729 |
|
730 |
typedef struct PCIIORegion { |
731 |
uint32_t addr; /* current PCI mapping address. -1 means not mapped */
|
732 |
uint32_t size; |
733 |
uint8_t type; |
734 |
PCIMapIORegionFunc *map_func; |
735 |
} PCIIORegion; |
736 |
|
737 |
#define PCI_ROM_SLOT 6 |
738 |
#define PCI_NUM_REGIONS 7 |
739 |
|
740 |
#define PCI_DEVICES_MAX 64 |
741 |
|
742 |
#define PCI_VENDOR_ID 0x00 /* 16 bits */ |
743 |
#define PCI_DEVICE_ID 0x02 /* 16 bits */ |
744 |
#define PCI_COMMAND 0x04 /* 16 bits */ |
745 |
#define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
746 |
#define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
747 |
#define PCI_CLASS_DEVICE 0x0a /* Device class */ |
748 |
#define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
749 |
#define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
750 |
#define PCI_MIN_GNT 0x3e /* 8 bits */ |
751 |
#define PCI_MAX_LAT 0x3f /* 8 bits */ |
752 |
|
753 |
struct PCIDevice {
|
754 |
/* PCI config space */
|
755 |
uint8_t config[256];
|
756 |
|
757 |
/* the following fields are read only */
|
758 |
PCIBus *bus; |
759 |
int devfn;
|
760 |
char name[64]; |
761 |
PCIIORegion io_regions[PCI_NUM_REGIONS]; |
762 |
|
763 |
/* do not access the following fields */
|
764 |
PCIConfigReadFunc *config_read; |
765 |
PCIConfigWriteFunc *config_write; |
766 |
/* ??? This is a PC-specific hack, and should be removed. */
|
767 |
int irq_index;
|
768 |
|
769 |
/* Current IRQ levels. Used internally by the generic PCI code. */
|
770 |
int irq_state[4]; |
771 |
}; |
772 |
|
773 |
PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
774 |
int instance_size, int devfn, |
775 |
PCIConfigReadFunc *config_read, |
776 |
PCIConfigWriteFunc *config_write); |
777 |
|
778 |
void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
779 |
uint32_t size, int type,
|
780 |
PCIMapIORegionFunc *map_func); |
781 |
|
782 |
void pci_set_irq(PCIDevice *pci_dev, int irq_num, int level); |
783 |
|
784 |
uint32_t pci_default_read_config(PCIDevice *d, |
785 |
uint32_t address, int len);
|
786 |
void pci_default_write_config(PCIDevice *d,
|
787 |
uint32_t address, uint32_t val, int len);
|
788 |
void pci_device_save(PCIDevice *s, QEMUFile *f);
|
789 |
int pci_device_load(PCIDevice *s, QEMUFile *f);
|
790 |
|
791 |
typedef void (*pci_set_irq_fn)(void *pic, int irq_num, int level); |
792 |
typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
793 |
PCIBus *pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
794 |
void *pic, int devfn_min, int nirq); |
795 |
|
796 |
void pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn); |
797 |
void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
798 |
uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
799 |
int pci_bus_num(PCIBus *s);
|
800 |
void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); |
801 |
|
802 |
void pci_info(void); |
803 |
PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint32_t id,
|
804 |
pci_map_irq_fn map_irq, const char *name); |
805 |
|
806 |
/* prep_pci.c */
|
807 |
PCIBus *pci_prep_init(void);
|
808 |
|
809 |
/* grackle_pci.c */
|
810 |
PCIBus *pci_grackle_init(uint32_t base, void *pic);
|
811 |
|
812 |
/* unin_pci.c */
|
813 |
PCIBus *pci_pmac_init(void *pic);
|
814 |
|
815 |
/* apb_pci.c */
|
816 |
PCIBus *pci_apb_init(target_ulong special_base, target_ulong mem_base, |
817 |
void *pic);
|
818 |
|
819 |
PCIBus *pci_vpb_init(void *pic, int irq, int realview); |
820 |
|
821 |
/* piix_pci.c */
|
822 |
PCIBus *i440fx_init(PCIDevice **pi440fx_state); |
823 |
void i440fx_set_smm(PCIDevice *d, int val); |
824 |
int piix3_init(PCIBus *bus);
|
825 |
void i440fx_init_memory_mappings(PCIDevice *d);
|
826 |
|
827 |
/* openpic.c */
|
828 |
typedef struct openpic_t openpic_t; |
829 |
void openpic_set_irq(void *opaque, int n_IRQ, int level); |
830 |
openpic_t *openpic_init (PCIBus *bus, int *pmem_index, int nb_cpus, |
831 |
CPUState **envp); |
832 |
|
833 |
/* heathrow_pic.c */
|
834 |
typedef struct HeathrowPICS HeathrowPICS; |
835 |
void heathrow_pic_set_irq(void *opaque, int num, int level); |
836 |
HeathrowPICS *heathrow_pic_init(int *pmem_index);
|
837 |
|
838 |
#ifdef HAS_AUDIO
|
839 |
struct soundhw {
|
840 |
const char *name; |
841 |
const char *descr; |
842 |
int enabled;
|
843 |
int isa;
|
844 |
union {
|
845 |
int (*init_isa) (AudioState *s);
|
846 |
int (*init_pci) (PCIBus *bus, AudioState *s);
|
847 |
} init; |
848 |
}; |
849 |
|
850 |
extern struct soundhw soundhw[]; |
851 |
#endif
|
852 |
|
853 |
/* vga.c */
|
854 |
|
855 |
#define VGA_RAM_SIZE (8192 * 1024) |
856 |
|
857 |
struct DisplayState {
|
858 |
uint8_t *data; |
859 |
int linesize;
|
860 |
int depth;
|
861 |
int bgr; /* BGR color order instead of RGB. Only valid for depth == 32 */ |
862 |
int width;
|
863 |
int height;
|
864 |
void *opaque;
|
865 |
|
866 |
void (*dpy_update)(struct DisplayState *s, int x, int y, int w, int h); |
867 |
void (*dpy_resize)(struct DisplayState *s, int w, int h); |
868 |
void (*dpy_refresh)(struct DisplayState *s); |
869 |
void (*dpy_copy)(struct DisplayState *s, int src_x, int src_y, int dst_x, int dst_y, int w, int h); |
870 |
}; |
871 |
|
872 |
static inline void dpy_update(DisplayState *s, int x, int y, int w, int h) |
873 |
{ |
874 |
s->dpy_update(s, x, y, w, h); |
875 |
} |
876 |
|
877 |
static inline void dpy_resize(DisplayState *s, int w, int h) |
878 |
{ |
879 |
s->dpy_resize(s, w, h); |
880 |
} |
881 |
|
882 |
int isa_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
883 |
unsigned long vga_ram_offset, int vga_ram_size); |
884 |
int pci_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
885 |
unsigned long vga_ram_offset, int vga_ram_size, |
886 |
unsigned long vga_bios_offset, int vga_bios_size); |
887 |
|
888 |
/* cirrus_vga.c */
|
889 |
void pci_cirrus_vga_init(PCIBus *bus, DisplayState *ds, uint8_t *vga_ram_base,
|
890 |
unsigned long vga_ram_offset, int vga_ram_size); |
891 |
void isa_cirrus_vga_init(DisplayState *ds, uint8_t *vga_ram_base,
|
892 |
unsigned long vga_ram_offset, int vga_ram_size); |
893 |
|
894 |
/* sdl.c */
|
895 |
void sdl_display_init(DisplayState *ds, int full_screen); |
896 |
|
897 |
/* cocoa.m */
|
898 |
void cocoa_display_init(DisplayState *ds, int full_screen); |
899 |
|
900 |
/* vnc.c */
|
901 |
void vnc_display_init(DisplayState *ds, const char *display); |
902 |
|
903 |
/* ide.c */
|
904 |
#define MAX_DISKS 4 |
905 |
|
906 |
extern BlockDriverState *bs_table[MAX_DISKS + 1]; |
907 |
|
908 |
void isa_ide_init(int iobase, int iobase2, int irq, |
909 |
BlockDriverState *hd0, BlockDriverState *hd1); |
910 |
void pci_cmd646_ide_init(PCIBus *bus, BlockDriverState **hd_table,
|
911 |
int secondary_ide_enabled);
|
912 |
void pci_piix3_ide_init(PCIBus *bus, BlockDriverState **hd_table, int devfn); |
913 |
int pmac_ide_init (BlockDriverState **hd_table,
|
914 |
SetIRQFunc *set_irq, void *irq_opaque, int irq); |
915 |
|
916 |
/* cdrom.c */
|
917 |
int cdrom_read_toc(int nb_sectors, uint8_t *buf, int msf, int start_track); |
918 |
int cdrom_read_toc_raw(int nb_sectors, uint8_t *buf, int msf, int session_num); |
919 |
|
920 |
/* es1370.c */
|
921 |
int es1370_init (PCIBus *bus, AudioState *s);
|
922 |
|
923 |
/* sb16.c */
|
924 |
int SB16_init (AudioState *s);
|
925 |
|
926 |
/* adlib.c */
|
927 |
int Adlib_init (AudioState *s);
|
928 |
|
929 |
/* gus.c */
|
930 |
int GUS_init (AudioState *s);
|
931 |
|
932 |
/* dma.c */
|
933 |
typedef int (*DMA_transfer_handler) (void *opaque, int nchan, int pos, int size); |
934 |
int DMA_get_channel_mode (int nchan); |
935 |
int DMA_read_memory (int nchan, void *buf, int pos, int size); |
936 |
int DMA_write_memory (int nchan, void *buf, int pos, int size); |
937 |
void DMA_hold_DREQ (int nchan); |
938 |
void DMA_release_DREQ (int nchan); |
939 |
void DMA_schedule(int nchan); |
940 |
void DMA_run (void); |
941 |
void DMA_init (int high_page_enable); |
942 |
void DMA_register_channel (int nchan, |
943 |
DMA_transfer_handler transfer_handler, |
944 |
void *opaque);
|
945 |
/* fdc.c */
|
946 |
#define MAX_FD 2 |
947 |
extern BlockDriverState *fd_table[MAX_FD];
|
948 |
|
949 |
typedef struct fdctrl_t fdctrl_t; |
950 |
|
951 |
fdctrl_t *fdctrl_init (int irq_lvl, int dma_chann, int mem_mapped, |
952 |
uint32_t io_base, |
953 |
BlockDriverState **fds); |
954 |
int fdctrl_get_drive_type(fdctrl_t *fdctrl, int drive_num); |
955 |
|
956 |
/* ne2000.c */
|
957 |
|
958 |
void isa_ne2000_init(int base, int irq, NICInfo *nd); |
959 |
void pci_ne2000_init(PCIBus *bus, NICInfo *nd, int devfn); |
960 |
|
961 |
/* rtl8139.c */
|
962 |
|
963 |
void pci_rtl8139_init(PCIBus *bus, NICInfo *nd, int devfn); |
964 |
|
965 |
/* pcnet.c */
|
966 |
|
967 |
void pci_pcnet_init(PCIBus *bus, NICInfo *nd, int devfn); |
968 |
void pcnet_h_reset(void *opaque); |
969 |
void *lance_init(NICInfo *nd, uint32_t leaddr, void *dma_opaque); |
970 |
|
971 |
|
972 |
/* pckbd.c */
|
973 |
|
974 |
void kbd_init(void); |
975 |
|
976 |
/* mc146818rtc.c */
|
977 |
|
978 |
typedef struct RTCState RTCState; |
979 |
|
980 |
RTCState *rtc_init(int base, int irq); |
981 |
void rtc_set_memory(RTCState *s, int addr, int val); |
982 |
void rtc_set_date(RTCState *s, const struct tm *tm); |
983 |
|
984 |
/* serial.c */
|
985 |
|
986 |
typedef struct SerialState SerialState; |
987 |
SerialState *serial_init(SetIRQFunc *set_irq, void *opaque,
|
988 |
int base, int irq, CharDriverState *chr); |
989 |
SerialState *serial_mm_init (SetIRQFunc *set_irq, void *opaque,
|
990 |
target_ulong base, int it_shift,
|
991 |
int irq, CharDriverState *chr);
|
992 |
|
993 |
/* parallel.c */
|
994 |
|
995 |
typedef struct ParallelState ParallelState; |
996 |
ParallelState *parallel_init(int base, int irq, CharDriverState *chr); |
997 |
|
998 |
/* i8259.c */
|
999 |
|
1000 |
typedef struct PicState2 PicState2; |
1001 |
extern PicState2 *isa_pic;
|
1002 |
void pic_set_irq(int irq, int level); |
1003 |
void pic_set_irq_new(void *opaque, int irq, int level); |
1004 |
PicState2 *pic_init(IRQRequestFunc *irq_request, void *irq_request_opaque);
|
1005 |
void pic_set_alt_irq_func(PicState2 *s, SetIRQFunc *alt_irq_func,
|
1006 |
void *alt_irq_opaque);
|
1007 |
int pic_read_irq(PicState2 *s);
|
1008 |
void pic_update_irq(PicState2 *s);
|
1009 |
uint32_t pic_intack_read(PicState2 *s); |
1010 |
void pic_info(void); |
1011 |
void irq_info(void); |
1012 |
|
1013 |
/* APIC */
|
1014 |
typedef struct IOAPICState IOAPICState; |
1015 |
|
1016 |
int apic_init(CPUState *env);
|
1017 |
int apic_get_interrupt(CPUState *env);
|
1018 |
IOAPICState *ioapic_init(void);
|
1019 |
void ioapic_set_irq(void *opaque, int vector, int level); |
1020 |
|
1021 |
/* i8254.c */
|
1022 |
|
1023 |
#define PIT_FREQ 1193182 |
1024 |
|
1025 |
typedef struct PITState PITState; |
1026 |
|
1027 |
PITState *pit_init(int base, int irq); |
1028 |
void pit_set_gate(PITState *pit, int channel, int val); |
1029 |
int pit_get_gate(PITState *pit, int channel); |
1030 |
int pit_get_initial_count(PITState *pit, int channel); |
1031 |
int pit_get_mode(PITState *pit, int channel); |
1032 |
int pit_get_out(PITState *pit, int channel, int64_t current_time); |
1033 |
|
1034 |
/* pcspk.c */
|
1035 |
void pcspk_init(PITState *);
|
1036 |
int pcspk_audio_init(AudioState *);
|
1037 |
|
1038 |
/* acpi.c */
|
1039 |
extern int acpi_enabled; |
1040 |
void piix4_pm_init(PCIBus *bus, int devfn); |
1041 |
void acpi_bios_init(void); |
1042 |
|
1043 |
/* pc.c */
|
1044 |
extern QEMUMachine pc_machine;
|
1045 |
extern QEMUMachine isapc_machine;
|
1046 |
extern int fd_bootchk; |
1047 |
|
1048 |
void ioport_set_a20(int enable); |
1049 |
int ioport_get_a20(void); |
1050 |
|
1051 |
/* ppc.c */
|
1052 |
extern QEMUMachine prep_machine;
|
1053 |
extern QEMUMachine core99_machine;
|
1054 |
extern QEMUMachine heathrow_machine;
|
1055 |
|
1056 |
/* mips_r4k.c */
|
1057 |
extern QEMUMachine mips_machine;
|
1058 |
|
1059 |
/* mips_timer.c */
|
1060 |
extern void cpu_mips_clock_init(CPUState *); |
1061 |
extern void cpu_mips_irqctrl_init (void); |
1062 |
|
1063 |
/* shix.c */
|
1064 |
extern QEMUMachine shix_machine;
|
1065 |
|
1066 |
#ifdef TARGET_PPC
|
1067 |
ppc_tb_t *cpu_ppc_tb_init (CPUState *env, uint32_t freq); |
1068 |
#endif
|
1069 |
void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val); |
1070 |
|
1071 |
extern CPUWriteMemoryFunc *PPC_io_write[];
|
1072 |
extern CPUReadMemoryFunc *PPC_io_read[];
|
1073 |
void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val); |
1074 |
|
1075 |
/* sun4m.c */
|
1076 |
extern QEMUMachine sun4m_machine;
|
1077 |
void pic_set_irq_cpu(int irq, int level, unsigned int cpu); |
1078 |
|
1079 |
/* iommu.c */
|
1080 |
void *iommu_init(uint32_t addr);
|
1081 |
void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr, |
1082 |
uint8_t *buf, int len, int is_write); |
1083 |
static inline void sparc_iommu_memory_read(void *opaque, |
1084 |
target_phys_addr_t addr, |
1085 |
uint8_t *buf, int len)
|
1086 |
{ |
1087 |
sparc_iommu_memory_rw(opaque, addr, buf, len, 0);
|
1088 |
} |
1089 |
|
1090 |
static inline void sparc_iommu_memory_write(void *opaque, |
1091 |
target_phys_addr_t addr, |
1092 |
uint8_t *buf, int len)
|
1093 |
{ |
1094 |
sparc_iommu_memory_rw(opaque, addr, buf, len, 1);
|
1095 |
} |
1096 |
|
1097 |
/* tcx.c */
|
1098 |
void tcx_init(DisplayState *ds, uint32_t addr, uint8_t *vram_base,
|
1099 |
unsigned long vram_offset, int vram_size, int width, int height); |
1100 |
|
1101 |
/* slavio_intctl.c */
|
1102 |
void *slavio_intctl_init();
|
1103 |
void slavio_intctl_set_cpu(void *opaque, unsigned int cpu, CPUState *env); |
1104 |
void slavio_pic_info(void *opaque); |
1105 |
void slavio_irq_info(void *opaque); |
1106 |
void slavio_pic_set_irq(void *opaque, int irq, int level); |
1107 |
void slavio_pic_set_irq_cpu(void *opaque, int irq, int level, unsigned int cpu); |
1108 |
|
1109 |
/* loader.c */
|
1110 |
int get_image_size(const char *filename); |
1111 |
int load_image(const char *filename, uint8_t *addr); |
1112 |
int load_elf(const char *filename, int64_t virt_to_phys_addend, uint64_t *pentry); |
1113 |
int load_aout(const char *filename, uint8_t *addr); |
1114 |
|
1115 |
/* slavio_timer.c */
|
1116 |
void slavio_timer_init(uint32_t addr, int irq, int mode, unsigned int cpu); |
1117 |
|
1118 |
/* slavio_serial.c */
|
1119 |
SerialState *slavio_serial_init(int base, int irq, CharDriverState *chr1, CharDriverState *chr2); |
1120 |
void slavio_serial_ms_kbd_init(int base, int irq); |
1121 |
|
1122 |
/* slavio_misc.c */
|
1123 |
void *slavio_misc_init(uint32_t base, int irq); |
1124 |
void slavio_set_power_fail(void *opaque, int power_failing); |
1125 |
|
1126 |
/* esp.c */
|
1127 |
void esp_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
1128 |
void *esp_init(BlockDriverState **bd, uint32_t espaddr, void *dma_opaque); |
1129 |
void esp_reset(void *opaque); |
1130 |
|
1131 |
/* sparc32_dma.c */
|
1132 |
void *sparc32_dma_init(uint32_t daddr, int espirq, int leirq, void *iommu, |
1133 |
void *intctl);
|
1134 |
void ledma_set_irq(void *opaque, int isr); |
1135 |
void ledma_memory_read(void *opaque, target_phys_addr_t addr, |
1136 |
uint8_t *buf, int len, int do_bswap); |
1137 |
void ledma_memory_write(void *opaque, target_phys_addr_t addr, |
1138 |
uint8_t *buf, int len, int do_bswap); |
1139 |
void espdma_raise_irq(void *opaque); |
1140 |
void espdma_clear_irq(void *opaque); |
1141 |
void espdma_memory_read(void *opaque, uint8_t *buf, int len); |
1142 |
void espdma_memory_write(void *opaque, uint8_t *buf, int len); |
1143 |
void sparc32_dma_set_reset_data(void *opaque, void *esp_opaque, |
1144 |
void *lance_opaque);
|
1145 |
|
1146 |
/* cs4231.c */
|
1147 |
void cs_init(target_phys_addr_t base, int irq, void *intctl); |
1148 |
|
1149 |
/* sun4u.c */
|
1150 |
extern QEMUMachine sun4u_machine;
|
1151 |
|
1152 |
/* NVRAM helpers */
|
1153 |
#include "hw/m48t59.h" |
1154 |
|
1155 |
void NVRAM_set_byte (m48t59_t *nvram, uint32_t addr, uint8_t value);
|
1156 |
uint8_t NVRAM_get_byte (m48t59_t *nvram, uint32_t addr); |
1157 |
void NVRAM_set_word (m48t59_t *nvram, uint32_t addr, uint16_t value);
|
1158 |
uint16_t NVRAM_get_word (m48t59_t *nvram, uint32_t addr); |
1159 |
void NVRAM_set_lword (m48t59_t *nvram, uint32_t addr, uint32_t value);
|
1160 |
uint32_t NVRAM_get_lword (m48t59_t *nvram, uint32_t addr); |
1161 |
void NVRAM_set_string (m48t59_t *nvram, uint32_t addr,
|
1162 |
const unsigned char *str, uint32_t max); |
1163 |
int NVRAM_get_string (m48t59_t *nvram, uint8_t *dst, uint16_t addr, int max); |
1164 |
void NVRAM_set_crc (m48t59_t *nvram, uint32_t addr,
|
1165 |
uint32_t start, uint32_t count); |
1166 |
int PPC_NVRAM_set_params (m48t59_t *nvram, uint16_t NVRAM_size,
|
1167 |
const unsigned char *arch, |
1168 |
uint32_t RAM_size, int boot_device,
|
1169 |
uint32_t kernel_image, uint32_t kernel_size, |
1170 |
const char *cmdline, |
1171 |
uint32_t initrd_image, uint32_t initrd_size, |
1172 |
uint32_t NVRAM_image, |
1173 |
int width, int height, int depth); |
1174 |
|
1175 |
/* adb.c */
|
1176 |
|
1177 |
#define MAX_ADB_DEVICES 16 |
1178 |
|
1179 |
#define ADB_MAX_OUT_LEN 16 |
1180 |
|
1181 |
typedef struct ADBDevice ADBDevice; |
1182 |
|
1183 |
/* buf = NULL means polling */
|
1184 |
typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out, |
1185 |
const uint8_t *buf, int len); |
1186 |
typedef int ADBDeviceReset(ADBDevice *d); |
1187 |
|
1188 |
struct ADBDevice {
|
1189 |
struct ADBBusState *bus;
|
1190 |
int devaddr;
|
1191 |
int handler;
|
1192 |
ADBDeviceRequest *devreq; |
1193 |
ADBDeviceReset *devreset; |
1194 |
void *opaque;
|
1195 |
}; |
1196 |
|
1197 |
typedef struct ADBBusState { |
1198 |
ADBDevice devices[MAX_ADB_DEVICES]; |
1199 |
int nb_devices;
|
1200 |
int poll_index;
|
1201 |
} ADBBusState; |
1202 |
|
1203 |
int adb_request(ADBBusState *s, uint8_t *buf_out,
|
1204 |
const uint8_t *buf, int len); |
1205 |
int adb_poll(ADBBusState *s, uint8_t *buf_out);
|
1206 |
|
1207 |
ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
|
1208 |
ADBDeviceRequest *devreq, |
1209 |
ADBDeviceReset *devreset, |
1210 |
void *opaque);
|
1211 |
void adb_kbd_init(ADBBusState *bus);
|
1212 |
void adb_mouse_init(ADBBusState *bus);
|
1213 |
|
1214 |
/* cuda.c */
|
1215 |
|
1216 |
extern ADBBusState adb_bus;
|
1217 |
int cuda_init(SetIRQFunc *set_irq, void *irq_opaque, int irq); |
1218 |
|
1219 |
#include "hw/usb.h" |
1220 |
|
1221 |
/* usb ports of the VM */
|
1222 |
|
1223 |
void qemu_register_usb_port(USBPort *port, void *opaque, int index, |
1224 |
usb_attachfn attach); |
1225 |
|
1226 |
#define VM_USB_HUB_SIZE 8 |
1227 |
|
1228 |
void do_usb_add(const char *devname); |
1229 |
void do_usb_del(const char *devname); |
1230 |
void usb_info(void); |
1231 |
|
1232 |
/* scsi-disk.c */
|
1233 |
enum scsi_reason {
|
1234 |
SCSI_REASON_DONE, /* Command complete. */
|
1235 |
SCSI_REASON_DATA /* Transfer complete, more data required. */
|
1236 |
}; |
1237 |
|
1238 |
typedef struct SCSIDevice SCSIDevice; |
1239 |
typedef void (*scsi_completionfn)(void *opaque, int reason, uint32_t tag, |
1240 |
uint32_t arg); |
1241 |
|
1242 |
SCSIDevice *scsi_disk_init(BlockDriverState *bdrv, |
1243 |
int tcq,
|
1244 |
scsi_completionfn completion, |
1245 |
void *opaque);
|
1246 |
void scsi_disk_destroy(SCSIDevice *s);
|
1247 |
|
1248 |
int32_t scsi_send_command(SCSIDevice *s, uint32_t tag, uint8_t *buf, int lun);
|
1249 |
/* SCSI data transfers are asynchrnonous. However, unlike the block IO
|
1250 |
layer the completion routine may be called directly by
|
1251 |
scsi_{read,write}_data. */
|
1252 |
void scsi_read_data(SCSIDevice *s, uint32_t tag);
|
1253 |
int scsi_write_data(SCSIDevice *s, uint32_t tag);
|
1254 |
void scsi_cancel_io(SCSIDevice *s, uint32_t tag);
|
1255 |
uint8_t *scsi_get_buf(SCSIDevice *s, uint32_t tag); |
1256 |
|
1257 |
/* lsi53c895a.c */
|
1258 |
void lsi_scsi_attach(void *opaque, BlockDriverState *bd, int id); |
1259 |
void *lsi_scsi_init(PCIBus *bus, int devfn); |
1260 |
|
1261 |
/* integratorcp.c */
|
1262 |
extern QEMUMachine integratorcp926_machine;
|
1263 |
extern QEMUMachine integratorcp1026_machine;
|
1264 |
|
1265 |
/* versatilepb.c */
|
1266 |
extern QEMUMachine versatilepb_machine;
|
1267 |
extern QEMUMachine versatileab_machine;
|
1268 |
|
1269 |
/* realview.c */
|
1270 |
extern QEMUMachine realview_machine;
|
1271 |
|
1272 |
/* ps2.c */
|
1273 |
void *ps2_kbd_init(void (*update_irq)(void *, int), void *update_arg); |
1274 |
void *ps2_mouse_init(void (*update_irq)(void *, int), void *update_arg); |
1275 |
void ps2_write_mouse(void *, int val); |
1276 |
void ps2_write_keyboard(void *, int val); |
1277 |
uint32_t ps2_read_data(void *);
|
1278 |
void ps2_queue(void *, int b); |
1279 |
void ps2_keyboard_set_translation(void *opaque, int mode); |
1280 |
|
1281 |
/* smc91c111.c */
|
1282 |
void smc91c111_init(NICInfo *, uint32_t, void *, int); |
1283 |
|
1284 |
/* pl110.c */
|
1285 |
void *pl110_init(DisplayState *ds, uint32_t base, void *pic, int irq, int); |
1286 |
|
1287 |
/* pl011.c */
|
1288 |
void pl011_init(uint32_t base, void *pic, int irq, CharDriverState *chr); |
1289 |
|
1290 |
/* pl050.c */
|
1291 |
void pl050_init(uint32_t base, void *pic, int irq, int is_mouse); |
1292 |
|
1293 |
/* pl080.c */
|
1294 |
void *pl080_init(uint32_t base, void *pic, int irq, int nchannels); |
1295 |
|
1296 |
/* pl190.c */
|
1297 |
void *pl190_init(uint32_t base, void *parent, int irq, int fiq); |
1298 |
|
1299 |
/* arm-timer.c */
|
1300 |
void sp804_init(uint32_t base, void *pic, int irq); |
1301 |
void icp_pit_init(uint32_t base, void *pic, int irq); |
1302 |
|
1303 |
/* arm_sysctl.c */
|
1304 |
void arm_sysctl_init(uint32_t base, uint32_t sys_id);
|
1305 |
|
1306 |
/* arm_gic.c */
|
1307 |
void *arm_gic_init(uint32_t base, void *parent, int parent_irq); |
1308 |
|
1309 |
/* arm_boot.c */
|
1310 |
|
1311 |
void arm_load_kernel(int ram_size, const char *kernel_filename, |
1312 |
const char *kernel_cmdline, const char *initrd_filename, |
1313 |
int board_id);
|
1314 |
|
1315 |
/* sh7750.c */
|
1316 |
struct SH7750State;
|
1317 |
|
1318 |
struct SH7750State *sh7750_init(CPUState * cpu);
|
1319 |
|
1320 |
typedef struct { |
1321 |
/* The callback will be triggered if any of the designated lines change */
|
1322 |
uint16_t portamask_trigger; |
1323 |
uint16_t portbmask_trigger; |
1324 |
/* Return 0 if no action was taken */
|
1325 |
int (*port_change_cb) (uint16_t porta, uint16_t portb,
|
1326 |
uint16_t * periph_pdtra, |
1327 |
uint16_t * periph_portdira, |
1328 |
uint16_t * periph_pdtrb, |
1329 |
uint16_t * periph_portdirb); |
1330 |
} sh7750_io_device; |
1331 |
|
1332 |
int sh7750_register_io_device(struct SH7750State *s, |
1333 |
sh7750_io_device * device); |
1334 |
/* tc58128.c */
|
1335 |
int tc58128_init(struct SH7750State *s, char *zone1, char *zone2); |
1336 |
|
1337 |
/* NOR flash devices */
|
1338 |
typedef struct pflash_t pflash_t; |
1339 |
|
1340 |
pflash_t *pflash_register (target_ulong base, ram_addr_t off, |
1341 |
BlockDriverState *bs, |
1342 |
target_ulong sector_len, int nb_blocs, int width, |
1343 |
uint16_t id0, uint16_t id1, |
1344 |
uint16_t id2, uint16_t id3); |
1345 |
|
1346 |
#endif /* defined(QEMU_TOOL) */ |
1347 |
|
1348 |
/* monitor.c */
|
1349 |
void monitor_init(CharDriverState *hd, int show_banner); |
1350 |
void term_puts(const char *str); |
1351 |
void term_vprintf(const char *fmt, va_list ap); |
1352 |
void term_printf(const char *fmt, ...) __attribute__ ((__format__ (__printf__, 1, 2))); |
1353 |
void term_print_filename(const char *filename); |
1354 |
void term_flush(void); |
1355 |
void term_print_help(void); |
1356 |
void monitor_readline(const char *prompt, int is_password, |
1357 |
char *buf, int buf_size); |
1358 |
|
1359 |
/* readline.c */
|
1360 |
typedef void ReadLineFunc(void *opaque, const char *str); |
1361 |
|
1362 |
extern int completion_index; |
1363 |
void add_completion(const char *str); |
1364 |
void readline_handle_byte(int ch); |
1365 |
void readline_find_completion(const char *cmdline); |
1366 |
const char *readline_get_history(unsigned int index); |
1367 |
void readline_start(const char *prompt, int is_password, |
1368 |
ReadLineFunc *readline_func, void *opaque);
|
1369 |
|
1370 |
void kqemu_record_dump(void); |
1371 |
|
1372 |
#endif /* VL_H */ |