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1 | b92e5a22 | bellard | /*
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2 | b92e5a22 | bellard | * Software MMU support
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3 | 5fafdf24 | ths | *
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4 | b92e5a22 | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | b92e5a22 | bellard | *
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6 | b92e5a22 | bellard | * This library is free software; you can redistribute it and/or
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7 | b92e5a22 | bellard | * modify it under the terms of the GNU Lesser General Public
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8 | b92e5a22 | bellard | * License as published by the Free Software Foundation; either
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9 | b92e5a22 | bellard | * version 2 of the License, or (at your option) any later version.
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10 | b92e5a22 | bellard | *
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11 | b92e5a22 | bellard | * This library is distributed in the hope that it will be useful,
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12 | b92e5a22 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | b92e5a22 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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14 | b92e5a22 | bellard | * Lesser General Public License for more details.
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15 | b92e5a22 | bellard | *
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16 | b92e5a22 | bellard | * You should have received a copy of the GNU Lesser General Public
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17 | b92e5a22 | bellard | * License along with this library; if not, write to the Free Software
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18 | b92e5a22 | bellard | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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19 | b92e5a22 | bellard | */
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20 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
21 | b92e5a22 | bellard | #define SUFFIX q
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22 | 61382a50 | bellard | #define USUFFIX q
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23 | b92e5a22 | bellard | #define DATA_TYPE uint64_t
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24 | b92e5a22 | bellard | #elif DATA_SIZE == 4 |
25 | b92e5a22 | bellard | #define SUFFIX l
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26 | 61382a50 | bellard | #define USUFFIX l
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27 | b92e5a22 | bellard | #define DATA_TYPE uint32_t
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28 | b92e5a22 | bellard | #elif DATA_SIZE == 2 |
29 | b92e5a22 | bellard | #define SUFFIX w
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30 | 61382a50 | bellard | #define USUFFIX uw
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31 | b92e5a22 | bellard | #define DATA_TYPE uint16_t
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32 | b92e5a22 | bellard | #define DATA_STYPE int16_t
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33 | b92e5a22 | bellard | #elif DATA_SIZE == 1 |
34 | b92e5a22 | bellard | #define SUFFIX b
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35 | 61382a50 | bellard | #define USUFFIX ub
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36 | b92e5a22 | bellard | #define DATA_TYPE uint8_t
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37 | b92e5a22 | bellard | #define DATA_STYPE int8_t
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38 | b92e5a22 | bellard | #else
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39 | b92e5a22 | bellard | #error unsupported data size
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40 | b92e5a22 | bellard | #endif
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41 | b92e5a22 | bellard | |
42 | 6ebbf390 | j_mayer | #if ACCESS_TYPE < (NB_MMU_MODES)
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43 | 61382a50 | bellard | |
44 | 6ebbf390 | j_mayer | #define CPU_MMU_INDEX ACCESS_TYPE
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45 | 61382a50 | bellard | #define MMUSUFFIX _mmu
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46 | 61382a50 | bellard | |
47 | 6ebbf390 | j_mayer | #elif ACCESS_TYPE == (NB_MMU_MODES)
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48 | 61382a50 | bellard | |
49 | 6ebbf390 | j_mayer | #define CPU_MMU_INDEX (cpu_mmu_index(env))
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50 | 61382a50 | bellard | #define MMUSUFFIX _mmu
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51 | 61382a50 | bellard | |
52 | 6ebbf390 | j_mayer | #elif ACCESS_TYPE == (NB_MMU_MODES + 1) |
53 | 61382a50 | bellard | |
54 | 6ebbf390 | j_mayer | #define CPU_MMU_INDEX (cpu_mmu_index(env))
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55 | 61382a50 | bellard | #define MMUSUFFIX _cmmu
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56 | 61382a50 | bellard | |
57 | b92e5a22 | bellard | #else
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58 | 61382a50 | bellard | #error invalid ACCESS_TYPE
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59 | b92e5a22 | bellard | #endif
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60 | b92e5a22 | bellard | |
61 | b92e5a22 | bellard | #if DATA_SIZE == 8 |
62 | b92e5a22 | bellard | #define RES_TYPE uint64_t
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63 | b92e5a22 | bellard | #else
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64 | b92e5a22 | bellard | #define RES_TYPE int |
65 | b92e5a22 | bellard | #endif
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66 | b92e5a22 | bellard | |
67 | 6ebbf390 | j_mayer | #if ACCESS_TYPE == (NB_MMU_MODES + 1) |
68 | 84b7b8e7 | bellard | #define ADDR_READ addr_code
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69 | 84b7b8e7 | bellard | #else
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70 | 84b7b8e7 | bellard | #define ADDR_READ addr_read
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71 | 84b7b8e7 | bellard | #endif
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72 | b92e5a22 | bellard | |
73 | c27004ec | bellard | DATA_TYPE REGPARM(1) glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr,
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74 | 6ebbf390 | j_mayer | int mmu_idx);
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75 | 6ebbf390 | j_mayer | void REGPARM(2) glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, DATA_TYPE v, int mmu_idx); |
76 | b92e5a22 | bellard | |
77 | c27004ec | bellard | #if (DATA_SIZE <= 4) && (TARGET_LONG_BITS == 32) && defined(__i386__) && \ |
78 | 6ebbf390 | j_mayer | (ACCESS_TYPE < NB_MMU_MODES) && defined(ASM_SOFTMMU) |
79 | e16c53fa | bellard | |
80 | 84b7b8e7 | bellard | #define CPU_TLB_ENTRY_BITS 4 |
81 | 84b7b8e7 | bellard | |
82 | c27004ec | bellard | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
83 | e16c53fa | bellard | { |
84 | e16c53fa | bellard | int res;
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85 | e16c53fa | bellard | |
86 | e16c53fa | bellard | asm volatile ("movl %1, %%edx\n" |
87 | e16c53fa | bellard | "movl %1, %%eax\n"
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88 | e16c53fa | bellard | "shrl %3, %%edx\n"
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89 | e16c53fa | bellard | "andl %4, %%eax\n"
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90 | e16c53fa | bellard | "andl %2, %%edx\n"
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91 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
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92 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
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93 | e16c53fa | bellard | "movl %1, %%eax\n"
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94 | e16c53fa | bellard | "je 1f\n"
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95 | e16c53fa | bellard | "pushl %6\n"
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96 | e16c53fa | bellard | "call %7\n"
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97 | e16c53fa | bellard | "popl %%edx\n"
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98 | e16c53fa | bellard | "movl %%eax, %0\n"
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99 | e16c53fa | bellard | "jmp 2f\n"
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100 | e16c53fa | bellard | "1:\n"
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101 | 84b7b8e7 | bellard | "addl 12(%%edx), %%eax\n"
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102 | e16c53fa | bellard | #if DATA_SIZE == 1 |
103 | e16c53fa | bellard | "movzbl (%%eax), %0\n"
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104 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
105 | e16c53fa | bellard | "movzwl (%%eax), %0\n"
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106 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
107 | e16c53fa | bellard | "movl (%%eax), %0\n"
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108 | e16c53fa | bellard | #else
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109 | e16c53fa | bellard | #error unsupported size
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110 | e16c53fa | bellard | #endif
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111 | e16c53fa | bellard | "2:\n"
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112 | e16c53fa | bellard | : "=r" (res)
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113 | 5fafdf24 | ths | : "r" (ptr),
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114 | 5fafdf24 | ths | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
115 | 5fafdf24 | ths | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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116 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
117 | 6ebbf390 | j_mayer | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)), |
118 | 6ebbf390 | j_mayer | "i" (CPU_MMU_INDEX),
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119 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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120 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
121 | e16c53fa | bellard | return res;
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122 | e16c53fa | bellard | } |
123 | e16c53fa | bellard | |
124 | e16c53fa | bellard | #if DATA_SIZE <= 2 |
125 | c27004ec | bellard | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
126 | e16c53fa | bellard | { |
127 | e16c53fa | bellard | int res;
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128 | e16c53fa | bellard | |
129 | e16c53fa | bellard | asm volatile ("movl %1, %%edx\n" |
130 | e16c53fa | bellard | "movl %1, %%eax\n"
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131 | e16c53fa | bellard | "shrl %3, %%edx\n"
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132 | e16c53fa | bellard | "andl %4, %%eax\n"
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133 | e16c53fa | bellard | "andl %2, %%edx\n"
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134 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
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135 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
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136 | e16c53fa | bellard | "movl %1, %%eax\n"
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137 | e16c53fa | bellard | "je 1f\n"
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138 | e16c53fa | bellard | "pushl %6\n"
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139 | e16c53fa | bellard | "call %7\n"
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140 | e16c53fa | bellard | "popl %%edx\n"
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141 | e16c53fa | bellard | #if DATA_SIZE == 1 |
142 | e16c53fa | bellard | "movsbl %%al, %0\n"
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143 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
144 | e16c53fa | bellard | "movswl %%ax, %0\n"
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145 | e16c53fa | bellard | #else
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146 | e16c53fa | bellard | #error unsupported size
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147 | e16c53fa | bellard | #endif
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148 | e16c53fa | bellard | "jmp 2f\n"
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149 | e16c53fa | bellard | "1:\n"
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150 | 84b7b8e7 | bellard | "addl 12(%%edx), %%eax\n"
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151 | e16c53fa | bellard | #if DATA_SIZE == 1 |
152 | e16c53fa | bellard | "movsbl (%%eax), %0\n"
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153 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
154 | e16c53fa | bellard | "movswl (%%eax), %0\n"
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155 | e16c53fa | bellard | #else
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156 | e16c53fa | bellard | #error unsupported size
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157 | e16c53fa | bellard | #endif
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158 | e16c53fa | bellard | "2:\n"
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159 | e16c53fa | bellard | : "=r" (res)
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160 | 5fafdf24 | ths | : "r" (ptr),
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161 | 5fafdf24 | ths | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
162 | 5fafdf24 | ths | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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163 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
164 | 6ebbf390 | j_mayer | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_read)), |
165 | 6ebbf390 | j_mayer | "i" (CPU_MMU_INDEX),
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166 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__ld, SUFFIX), MMUSUFFIX))
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167 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
168 | e16c53fa | bellard | return res;
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169 | e16c53fa | bellard | } |
170 | e16c53fa | bellard | #endif
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171 | e16c53fa | bellard | |
172 | c27004ec | bellard | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
173 | e16c53fa | bellard | { |
174 | e16c53fa | bellard | asm volatile ("movl %0, %%edx\n" |
175 | e16c53fa | bellard | "movl %0, %%eax\n"
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176 | e16c53fa | bellard | "shrl %3, %%edx\n"
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177 | e16c53fa | bellard | "andl %4, %%eax\n"
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178 | e16c53fa | bellard | "andl %2, %%edx\n"
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179 | e16c53fa | bellard | "leal %5(%%edx, %%ebp), %%edx\n"
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180 | e16c53fa | bellard | "cmpl (%%edx), %%eax\n"
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181 | e16c53fa | bellard | "movl %0, %%eax\n"
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182 | e16c53fa | bellard | "je 1f\n"
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183 | e16c53fa | bellard | #if DATA_SIZE == 1 |
184 | e16c53fa | bellard | "movzbl %b1, %%edx\n"
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185 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
186 | e16c53fa | bellard | "movzwl %w1, %%edx\n"
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187 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
188 | e16c53fa | bellard | "movl %1, %%edx\n"
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189 | e16c53fa | bellard | #else
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190 | e16c53fa | bellard | #error unsupported size
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191 | e16c53fa | bellard | #endif
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192 | e16c53fa | bellard | "pushl %6\n"
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193 | e16c53fa | bellard | "call %7\n"
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194 | e16c53fa | bellard | "popl %%eax\n"
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195 | e16c53fa | bellard | "jmp 2f\n"
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196 | e16c53fa | bellard | "1:\n"
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197 | 84b7b8e7 | bellard | "addl 8(%%edx), %%eax\n"
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198 | e16c53fa | bellard | #if DATA_SIZE == 1 |
199 | e16c53fa | bellard | "movb %b1, (%%eax)\n"
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200 | e16c53fa | bellard | #elif DATA_SIZE == 2 |
201 | e16c53fa | bellard | "movw %w1, (%%eax)\n"
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202 | e16c53fa | bellard | #elif DATA_SIZE == 4 |
203 | e16c53fa | bellard | "movl %1, (%%eax)\n"
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204 | e16c53fa | bellard | #else
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205 | e16c53fa | bellard | #error unsupported size
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206 | e16c53fa | bellard | #endif
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207 | e16c53fa | bellard | "2:\n"
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208 | 5fafdf24 | ths | : |
209 | 5fafdf24 | ths | : "r" (ptr),
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210 | e16c53fa | bellard | /* NOTE: 'q' would be needed as constraint, but we could not use it
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211 | e16c53fa | bellard | with T1 ! */
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212 | 5fafdf24 | ths | "r" (v),
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213 | 5fafdf24 | ths | "i" ((CPU_TLB_SIZE - 1) << CPU_TLB_ENTRY_BITS), |
214 | 5fafdf24 | ths | "i" (TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS),
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215 | e16c53fa | bellard | "i" (TARGET_PAGE_MASK | (DATA_SIZE - 1)), |
216 | 6ebbf390 | j_mayer | "m" (*(uint32_t *)offsetof(CPUState, tlb_table[CPU_MMU_INDEX][0].addr_write)), |
217 | 6ebbf390 | j_mayer | "i" (CPU_MMU_INDEX),
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218 | e16c53fa | bellard | "m" (*(uint8_t *)&glue(glue(__st, SUFFIX), MMUSUFFIX))
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219 | e16c53fa | bellard | : "%eax", "%ecx", "%edx", "memory", "cc"); |
220 | e16c53fa | bellard | } |
221 | e16c53fa | bellard | |
222 | e16c53fa | bellard | #else
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223 | e16c53fa | bellard | |
224 | e16c53fa | bellard | /* generic load/store macros */
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225 | e16c53fa | bellard | |
226 | c27004ec | bellard | static inline RES_TYPE glue(glue(ld, USUFFIX), MEMSUFFIX)(target_ulong ptr) |
227 | b92e5a22 | bellard | { |
228 | b92e5a22 | bellard | int index;
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229 | b92e5a22 | bellard | RES_TYPE res; |
230 | c27004ec | bellard | target_ulong addr; |
231 | c27004ec | bellard | unsigned long physaddr; |
232 | 6ebbf390 | j_mayer | int mmu_idx;
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233 | 61382a50 | bellard | |
234 | c27004ec | bellard | addr = ptr; |
235 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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236 | 6ebbf390 | j_mayer | mmu_idx = CPU_MMU_INDEX; |
237 | 6ebbf390 | j_mayer | if (__builtin_expect(env->tlb_table[mmu_idx][index].ADDR_READ !=
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238 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
239 | 6ebbf390 | j_mayer | res = glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); |
240 | b92e5a22 | bellard | } else {
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241 | 6ebbf390 | j_mayer | physaddr = addr + env->tlb_table[mmu_idx][index].addend; |
242 | 61382a50 | bellard | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)physaddr); |
243 | b92e5a22 | bellard | } |
244 | b92e5a22 | bellard | return res;
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245 | b92e5a22 | bellard | } |
246 | b92e5a22 | bellard | |
247 | b92e5a22 | bellard | #if DATA_SIZE <= 2 |
248 | c27004ec | bellard | static inline int glue(glue(lds, SUFFIX), MEMSUFFIX)(target_ulong ptr) |
249 | b92e5a22 | bellard | { |
250 | b92e5a22 | bellard | int res, index;
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251 | c27004ec | bellard | target_ulong addr; |
252 | c27004ec | bellard | unsigned long physaddr; |
253 | 6ebbf390 | j_mayer | int mmu_idx;
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254 | 61382a50 | bellard | |
255 | c27004ec | bellard | addr = ptr; |
256 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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257 | 6ebbf390 | j_mayer | mmu_idx = CPU_MMU_INDEX; |
258 | 6ebbf390 | j_mayer | if (__builtin_expect(env->tlb_table[mmu_idx][index].ADDR_READ !=
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259 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
260 | 6ebbf390 | j_mayer | res = (DATA_STYPE)glue(glue(__ld, SUFFIX), MMUSUFFIX)(addr, mmu_idx); |
261 | b92e5a22 | bellard | } else {
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262 | 6ebbf390 | j_mayer | physaddr = addr + env->tlb_table[mmu_idx][index].addend; |
263 | b92e5a22 | bellard | res = glue(glue(lds, SUFFIX), _raw)((uint8_t *)physaddr); |
264 | b92e5a22 | bellard | } |
265 | b92e5a22 | bellard | return res;
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266 | b92e5a22 | bellard | } |
267 | b92e5a22 | bellard | #endif
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268 | b92e5a22 | bellard | |
269 | 6ebbf390 | j_mayer | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
270 | 84b7b8e7 | bellard | |
271 | e16c53fa | bellard | /* generic store macro */
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272 | e16c53fa | bellard | |
273 | c27004ec | bellard | static inline void glue(glue(st, SUFFIX), MEMSUFFIX)(target_ulong ptr, RES_TYPE v) |
274 | b92e5a22 | bellard | { |
275 | b92e5a22 | bellard | int index;
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276 | c27004ec | bellard | target_ulong addr; |
277 | c27004ec | bellard | unsigned long physaddr; |
278 | 6ebbf390 | j_mayer | int mmu_idx;
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279 | 61382a50 | bellard | |
280 | c27004ec | bellard | addr = ptr; |
281 | b92e5a22 | bellard | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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282 | 6ebbf390 | j_mayer | mmu_idx = CPU_MMU_INDEX; |
283 | 6ebbf390 | j_mayer | if (__builtin_expect(env->tlb_table[mmu_idx][index].addr_write !=
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284 | b92e5a22 | bellard | (addr & (TARGET_PAGE_MASK | (DATA_SIZE - 1))), 0)) { |
285 | 6ebbf390 | j_mayer | glue(glue(__st, SUFFIX), MMUSUFFIX)(addr, v, mmu_idx); |
286 | b92e5a22 | bellard | } else {
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287 | 6ebbf390 | j_mayer | physaddr = addr + env->tlb_table[mmu_idx][index].addend; |
288 | b92e5a22 | bellard | glue(glue(st, SUFFIX), _raw)((uint8_t *)physaddr, v); |
289 | b92e5a22 | bellard | } |
290 | b92e5a22 | bellard | } |
291 | b92e5a22 | bellard | |
292 | 6ebbf390 | j_mayer | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
293 | 84b7b8e7 | bellard | |
294 | 84b7b8e7 | bellard | #endif /* !asm */ |
295 | 84b7b8e7 | bellard | |
296 | 6ebbf390 | j_mayer | #if ACCESS_TYPE != (NB_MMU_MODES + 1) |
297 | e16c53fa | bellard | |
298 | 2d603d22 | bellard | #if DATA_SIZE == 8 |
299 | 3f87bf69 | bellard | static inline float64 glue(ldfq, MEMSUFFIX)(target_ulong ptr) |
300 | 2d603d22 | bellard | { |
301 | 2d603d22 | bellard | union {
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302 | 3f87bf69 | bellard | float64 d; |
303 | 2d603d22 | bellard | uint64_t i; |
304 | 2d603d22 | bellard | } u; |
305 | 2d603d22 | bellard | u.i = glue(ldq, MEMSUFFIX)(ptr); |
306 | 2d603d22 | bellard | return u.d;
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307 | 2d603d22 | bellard | } |
308 | 2d603d22 | bellard | |
309 | 3f87bf69 | bellard | static inline void glue(stfq, MEMSUFFIX)(target_ulong ptr, float64 v) |
310 | 2d603d22 | bellard | { |
311 | 2d603d22 | bellard | union {
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312 | 3f87bf69 | bellard | float64 d; |
313 | 2d603d22 | bellard | uint64_t i; |
314 | 2d603d22 | bellard | } u; |
315 | 2d603d22 | bellard | u.d = v; |
316 | 2d603d22 | bellard | glue(stq, MEMSUFFIX)(ptr, u.i); |
317 | 2d603d22 | bellard | } |
318 | 2d603d22 | bellard | #endif /* DATA_SIZE == 8 */ |
319 | 2d603d22 | bellard | |
320 | 2d603d22 | bellard | #if DATA_SIZE == 4 |
321 | 3f87bf69 | bellard | static inline float32 glue(ldfl, MEMSUFFIX)(target_ulong ptr) |
322 | 2d603d22 | bellard | { |
323 | 2d603d22 | bellard | union {
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324 | 3f87bf69 | bellard | float32 f; |
325 | 2d603d22 | bellard | uint32_t i; |
326 | 2d603d22 | bellard | } u; |
327 | 2d603d22 | bellard | u.i = glue(ldl, MEMSUFFIX)(ptr); |
328 | 2d603d22 | bellard | return u.f;
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329 | 2d603d22 | bellard | } |
330 | 2d603d22 | bellard | |
331 | 3f87bf69 | bellard | static inline void glue(stfl, MEMSUFFIX)(target_ulong ptr, float32 v) |
332 | 2d603d22 | bellard | { |
333 | 2d603d22 | bellard | union {
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334 | 3f87bf69 | bellard | float32 f; |
335 | 2d603d22 | bellard | uint32_t i; |
336 | 2d603d22 | bellard | } u; |
337 | 2d603d22 | bellard | u.f = v; |
338 | 2d603d22 | bellard | glue(stl, MEMSUFFIX)(ptr, u.i); |
339 | 2d603d22 | bellard | } |
340 | 2d603d22 | bellard | #endif /* DATA_SIZE == 4 */ |
341 | 2d603d22 | bellard | |
342 | 6ebbf390 | j_mayer | #endif /* ACCESS_TYPE != (NB_MMU_MODES + 1) */ |
343 | 84b7b8e7 | bellard | |
344 | b92e5a22 | bellard | #undef RES_TYPE
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345 | b92e5a22 | bellard | #undef DATA_TYPE
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346 | b92e5a22 | bellard | #undef DATA_STYPE
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347 | b92e5a22 | bellard | #undef SUFFIX
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348 | 61382a50 | bellard | #undef USUFFIX
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349 | b92e5a22 | bellard | #undef DATA_SIZE
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350 | 6ebbf390 | j_mayer | #undef CPU_MMU_INDEX
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351 | 61382a50 | bellard | #undef MMUSUFFIX
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352 | 84b7b8e7 | bellard | #undef ADDR_READ |